1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Copyright (c) 2016 Hisilicon Limited.
3*4882a593Smuzhiyun * Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved.
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * This software is available to you under a choice of one of two
6*4882a593Smuzhiyun * licenses. You may choose to be licensed under the terms of the GNU
7*4882a593Smuzhiyun * General Public License (GPL) Version 2, available from the file
8*4882a593Smuzhiyun * COPYING in the main directory of this source tree, or the
9*4882a593Smuzhiyun * OpenIB.org BSD license below:
10*4882a593Smuzhiyun *
11*4882a593Smuzhiyun * Redistribution and use in source and binary forms, with or
12*4882a593Smuzhiyun * without modification, are permitted provided that the following
13*4882a593Smuzhiyun * conditions are met:
14*4882a593Smuzhiyun *
15*4882a593Smuzhiyun * - Redistributions of source code must retain the above
16*4882a593Smuzhiyun * copyright notice, this list of conditions and the following
17*4882a593Smuzhiyun * disclaimer.
18*4882a593Smuzhiyun *
19*4882a593Smuzhiyun * - Redistributions in binary form must reproduce the above
20*4882a593Smuzhiyun * copyright notice, this list of conditions and the following
21*4882a593Smuzhiyun * disclaimer in the documentation and/or other materials
22*4882a593Smuzhiyun * provided with the distribution.
23*4882a593Smuzhiyun *
24*4882a593Smuzhiyun * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25*4882a593Smuzhiyun * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26*4882a593Smuzhiyun * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27*4882a593Smuzhiyun * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28*4882a593Smuzhiyun * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29*4882a593Smuzhiyun * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30*4882a593Smuzhiyun * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
31*4882a593Smuzhiyun * SOFTWARE.
32*4882a593Smuzhiyun */
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun #ifndef _HNS_ROCE_HEM_H
35*4882a593Smuzhiyun #define _HNS_ROCE_HEM_H
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun #define HW_SYNC_SLEEP_TIME_INTERVAL 20
38*4882a593Smuzhiyun #define HW_SYNC_TIMEOUT_MSECS (25 * HW_SYNC_SLEEP_TIME_INTERVAL)
39*4882a593Smuzhiyun #define BT_CMD_SYNC_SHIFT 31
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun enum {
42*4882a593Smuzhiyun /* MAP HEM(Hardware Entry Memory) */
43*4882a593Smuzhiyun HEM_TYPE_QPC = 0,
44*4882a593Smuzhiyun HEM_TYPE_MTPT,
45*4882a593Smuzhiyun HEM_TYPE_CQC,
46*4882a593Smuzhiyun HEM_TYPE_SRQC,
47*4882a593Smuzhiyun HEM_TYPE_SCCC,
48*4882a593Smuzhiyun HEM_TYPE_QPC_TIMER,
49*4882a593Smuzhiyun HEM_TYPE_CQC_TIMER,
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun /* UNMAP HEM */
52*4882a593Smuzhiyun HEM_TYPE_MTT,
53*4882a593Smuzhiyun HEM_TYPE_CQE,
54*4882a593Smuzhiyun HEM_TYPE_SRQWQE,
55*4882a593Smuzhiyun HEM_TYPE_IDX,
56*4882a593Smuzhiyun HEM_TYPE_IRRL,
57*4882a593Smuzhiyun HEM_TYPE_TRRL,
58*4882a593Smuzhiyun };
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun #define HNS_ROCE_HEM_CHUNK_LEN \
61*4882a593Smuzhiyun ((256 - sizeof(struct list_head) - 2 * sizeof(int)) / \
62*4882a593Smuzhiyun (sizeof(struct scatterlist) + sizeof(void *)))
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun #define check_whether_bt_num_3(type, hop_num) \
65*4882a593Smuzhiyun (type < HEM_TYPE_MTT && hop_num == 2)
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun #define check_whether_bt_num_2(type, hop_num) \
68*4882a593Smuzhiyun ((type < HEM_TYPE_MTT && hop_num == 1) || \
69*4882a593Smuzhiyun (type >= HEM_TYPE_MTT && hop_num == 2))
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun #define check_whether_bt_num_1(type, hop_num) \
72*4882a593Smuzhiyun ((type < HEM_TYPE_MTT && hop_num == HNS_ROCE_HOP_NUM_0) || \
73*4882a593Smuzhiyun (type >= HEM_TYPE_MTT && hop_num == 1) || \
74*4882a593Smuzhiyun (type >= HEM_TYPE_MTT && hop_num == HNS_ROCE_HOP_NUM_0))
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun enum {
77*4882a593Smuzhiyun HNS_ROCE_HEM_PAGE_SHIFT = 12,
78*4882a593Smuzhiyun HNS_ROCE_HEM_PAGE_SIZE = 1 << HNS_ROCE_HEM_PAGE_SHIFT,
79*4882a593Smuzhiyun };
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun struct hns_roce_hem_chunk {
82*4882a593Smuzhiyun struct list_head list;
83*4882a593Smuzhiyun int npages;
84*4882a593Smuzhiyun int nsg;
85*4882a593Smuzhiyun struct scatterlist mem[HNS_ROCE_HEM_CHUNK_LEN];
86*4882a593Smuzhiyun void *buf[HNS_ROCE_HEM_CHUNK_LEN];
87*4882a593Smuzhiyun };
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun struct hns_roce_hem {
90*4882a593Smuzhiyun struct list_head chunk_list;
91*4882a593Smuzhiyun int refcount;
92*4882a593Smuzhiyun };
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun struct hns_roce_hem_iter {
95*4882a593Smuzhiyun struct hns_roce_hem *hem;
96*4882a593Smuzhiyun struct hns_roce_hem_chunk *chunk;
97*4882a593Smuzhiyun int page_idx;
98*4882a593Smuzhiyun };
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun struct hns_roce_hem_mhop {
101*4882a593Smuzhiyun u32 hop_num;
102*4882a593Smuzhiyun u32 buf_chunk_size;
103*4882a593Smuzhiyun u32 bt_chunk_size;
104*4882a593Smuzhiyun u32 ba_l0_num;
105*4882a593Smuzhiyun u32 l0_idx; /* level 0 base address table index */
106*4882a593Smuzhiyun u32 l1_idx; /* level 1 base address table index */
107*4882a593Smuzhiyun u32 l2_idx; /* level 2 base address table index */
108*4882a593Smuzhiyun };
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun void hns_roce_free_hem(struct hns_roce_dev *hr_dev, struct hns_roce_hem *hem);
111*4882a593Smuzhiyun int hns_roce_table_get(struct hns_roce_dev *hr_dev,
112*4882a593Smuzhiyun struct hns_roce_hem_table *table, unsigned long obj);
113*4882a593Smuzhiyun void hns_roce_table_put(struct hns_roce_dev *hr_dev,
114*4882a593Smuzhiyun struct hns_roce_hem_table *table, unsigned long obj);
115*4882a593Smuzhiyun void *hns_roce_table_find(struct hns_roce_dev *hr_dev,
116*4882a593Smuzhiyun struct hns_roce_hem_table *table, unsigned long obj,
117*4882a593Smuzhiyun dma_addr_t *dma_handle);
118*4882a593Smuzhiyun int hns_roce_init_hem_table(struct hns_roce_dev *hr_dev,
119*4882a593Smuzhiyun struct hns_roce_hem_table *table, u32 type,
120*4882a593Smuzhiyun unsigned long obj_size, unsigned long nobj,
121*4882a593Smuzhiyun int use_lowmem);
122*4882a593Smuzhiyun void hns_roce_cleanup_hem_table(struct hns_roce_dev *hr_dev,
123*4882a593Smuzhiyun struct hns_roce_hem_table *table);
124*4882a593Smuzhiyun void hns_roce_cleanup_hem(struct hns_roce_dev *hr_dev);
125*4882a593Smuzhiyun int hns_roce_calc_hem_mhop(struct hns_roce_dev *hr_dev,
126*4882a593Smuzhiyun struct hns_roce_hem_table *table, unsigned long *obj,
127*4882a593Smuzhiyun struct hns_roce_hem_mhop *mhop);
128*4882a593Smuzhiyun bool hns_roce_check_whether_mhop(struct hns_roce_dev *hr_dev, u32 type);
129*4882a593Smuzhiyun
130*4882a593Smuzhiyun void hns_roce_hem_list_init(struct hns_roce_hem_list *hem_list);
131*4882a593Smuzhiyun int hns_roce_hem_list_calc_root_ba(const struct hns_roce_buf_region *regions,
132*4882a593Smuzhiyun int region_cnt, int unit);
133*4882a593Smuzhiyun int hns_roce_hem_list_request(struct hns_roce_dev *hr_dev,
134*4882a593Smuzhiyun struct hns_roce_hem_list *hem_list,
135*4882a593Smuzhiyun const struct hns_roce_buf_region *regions,
136*4882a593Smuzhiyun int region_cnt, unsigned int bt_pg_shift);
137*4882a593Smuzhiyun void hns_roce_hem_list_release(struct hns_roce_dev *hr_dev,
138*4882a593Smuzhiyun struct hns_roce_hem_list *hem_list);
139*4882a593Smuzhiyun void *hns_roce_hem_list_find_mtt(struct hns_roce_dev *hr_dev,
140*4882a593Smuzhiyun struct hns_roce_hem_list *hem_list,
141*4882a593Smuzhiyun int offset, int *mtt_cnt, u64 *phy_addr);
142*4882a593Smuzhiyun
hns_roce_hem_first(struct hns_roce_hem * hem,struct hns_roce_hem_iter * iter)143*4882a593Smuzhiyun static inline void hns_roce_hem_first(struct hns_roce_hem *hem,
144*4882a593Smuzhiyun struct hns_roce_hem_iter *iter)
145*4882a593Smuzhiyun {
146*4882a593Smuzhiyun iter->hem = hem;
147*4882a593Smuzhiyun iter->chunk = list_empty(&hem->chunk_list) ? NULL :
148*4882a593Smuzhiyun list_entry(hem->chunk_list.next,
149*4882a593Smuzhiyun struct hns_roce_hem_chunk, list);
150*4882a593Smuzhiyun iter->page_idx = 0;
151*4882a593Smuzhiyun }
152*4882a593Smuzhiyun
hns_roce_hem_last(struct hns_roce_hem_iter * iter)153*4882a593Smuzhiyun static inline int hns_roce_hem_last(struct hns_roce_hem_iter *iter)
154*4882a593Smuzhiyun {
155*4882a593Smuzhiyun return !iter->chunk;
156*4882a593Smuzhiyun }
157*4882a593Smuzhiyun
hns_roce_hem_next(struct hns_roce_hem_iter * iter)158*4882a593Smuzhiyun static inline void hns_roce_hem_next(struct hns_roce_hem_iter *iter)
159*4882a593Smuzhiyun {
160*4882a593Smuzhiyun if (++iter->page_idx >= iter->chunk->nsg) {
161*4882a593Smuzhiyun if (iter->chunk->list.next == &iter->hem->chunk_list) {
162*4882a593Smuzhiyun iter->chunk = NULL;
163*4882a593Smuzhiyun return;
164*4882a593Smuzhiyun }
165*4882a593Smuzhiyun
166*4882a593Smuzhiyun iter->chunk = list_entry(iter->chunk->list.next,
167*4882a593Smuzhiyun struct hns_roce_hem_chunk, list);
168*4882a593Smuzhiyun iter->page_idx = 0;
169*4882a593Smuzhiyun }
170*4882a593Smuzhiyun }
171*4882a593Smuzhiyun
hns_roce_hem_addr(struct hns_roce_hem_iter * iter)172*4882a593Smuzhiyun static inline dma_addr_t hns_roce_hem_addr(struct hns_roce_hem_iter *iter)
173*4882a593Smuzhiyun {
174*4882a593Smuzhiyun return sg_dma_address(&iter->chunk->mem[iter->page_idx]);
175*4882a593Smuzhiyun }
176*4882a593Smuzhiyun
177*4882a593Smuzhiyun #endif /*_HNS_ROCE_HEM_H*/
178