1*4882a593Smuzhiyun /* SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright(c) 2018 Intel Corporation.
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun #ifndef HFI1_TID_RDMA_H
7*4882a593Smuzhiyun #define HFI1_TID_RDMA_H
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun #include <linux/circ_buf.h>
10*4882a593Smuzhiyun #include "common.h"
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun /* Add a convenience helper */
13*4882a593Smuzhiyun #define CIRC_ADD(val, add, size) (((val) + (add)) & ((size) - 1))
14*4882a593Smuzhiyun #define CIRC_NEXT(val, size) CIRC_ADD(val, 1, size)
15*4882a593Smuzhiyun #define CIRC_PREV(val, size) CIRC_ADD(val, -1, size)
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun #define TID_RDMA_MIN_SEGMENT_SIZE BIT(18) /* 256 KiB (for now) */
18*4882a593Smuzhiyun #define TID_RDMA_MAX_SEGMENT_SIZE BIT(18) /* 256 KiB (for now) */
19*4882a593Smuzhiyun #define TID_RDMA_MAX_PAGES (BIT(18) >> PAGE_SHIFT)
20*4882a593Smuzhiyun #define TID_RDMA_SEGMENT_SHIFT 18
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun /*
23*4882a593Smuzhiyun * Bit definitions for priv->s_flags.
24*4882a593Smuzhiyun * These bit flags overload the bit flags defined for the QP's s_flags.
25*4882a593Smuzhiyun * Due to the fact that these bit fields are used only for the QP priv
26*4882a593Smuzhiyun * s_flags, there are no collisions.
27*4882a593Smuzhiyun *
28*4882a593Smuzhiyun * HFI1_S_TID_WAIT_INTERLCK - QP is waiting for requester interlock
29*4882a593Smuzhiyun * HFI1_R_TID_WAIT_INTERLCK - QP is waiting for responder interlock
30*4882a593Smuzhiyun */
31*4882a593Smuzhiyun #define HFI1_S_TID_BUSY_SET BIT(0)
32*4882a593Smuzhiyun /* BIT(1) reserved for RVT_S_BUSY. */
33*4882a593Smuzhiyun #define HFI1_R_TID_RSC_TIMER BIT(2)
34*4882a593Smuzhiyun /* BIT(3) reserved for RVT_S_RESP_PENDING. */
35*4882a593Smuzhiyun /* BIT(4) reserved for RVT_S_ACK_PENDING. */
36*4882a593Smuzhiyun #define HFI1_S_TID_WAIT_INTERLCK BIT(5)
37*4882a593Smuzhiyun #define HFI1_R_TID_WAIT_INTERLCK BIT(6)
38*4882a593Smuzhiyun /* BIT(7) - BIT(15) reserved for RVT_S_WAIT_*. */
39*4882a593Smuzhiyun /* BIT(16) reserved for RVT_S_SEND_ONE */
40*4882a593Smuzhiyun #define HFI1_S_TID_RETRY_TIMER BIT(17)
41*4882a593Smuzhiyun /* BIT(18) reserved for RVT_S_ECN. */
42*4882a593Smuzhiyun #define HFI1_R_TID_SW_PSN BIT(19)
43*4882a593Smuzhiyun /* BIT(26) reserved for HFI1_S_WAIT_HALT */
44*4882a593Smuzhiyun /* BIT(27) reserved for HFI1_S_WAIT_TID_RESP */
45*4882a593Smuzhiyun /* BIT(28) reserved for HFI1_S_WAIT_TID_SPACE */
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun /*
48*4882a593Smuzhiyun * Unlike regular IB RDMA VERBS, which do not require an entry
49*4882a593Smuzhiyun * in the s_ack_queue, TID RDMA WRITE requests do because they
50*4882a593Smuzhiyun * generate responses.
51*4882a593Smuzhiyun * Therefore, the s_ack_queue needs to be extended by a certain
52*4882a593Smuzhiyun * amount. The key point is that the queue needs to be extended
53*4882a593Smuzhiyun * without letting the "user" know so they user doesn't end up
54*4882a593Smuzhiyun * using these extra entries.
55*4882a593Smuzhiyun */
56*4882a593Smuzhiyun #define HFI1_TID_RDMA_WRITE_CNT 8
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun struct tid_rdma_params {
59*4882a593Smuzhiyun struct rcu_head rcu_head;
60*4882a593Smuzhiyun u32 qp;
61*4882a593Smuzhiyun u32 max_len;
62*4882a593Smuzhiyun u16 jkey;
63*4882a593Smuzhiyun u8 max_read;
64*4882a593Smuzhiyun u8 max_write;
65*4882a593Smuzhiyun u8 timeout;
66*4882a593Smuzhiyun u8 urg;
67*4882a593Smuzhiyun u8 version;
68*4882a593Smuzhiyun };
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun struct tid_rdma_qp_params {
71*4882a593Smuzhiyun struct work_struct trigger_work;
72*4882a593Smuzhiyun struct tid_rdma_params local;
73*4882a593Smuzhiyun struct tid_rdma_params __rcu *remote;
74*4882a593Smuzhiyun };
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun /* Track state for each hardware flow */
77*4882a593Smuzhiyun struct tid_flow_state {
78*4882a593Smuzhiyun u32 generation;
79*4882a593Smuzhiyun u32 psn;
80*4882a593Smuzhiyun u8 index;
81*4882a593Smuzhiyun u8 last_index;
82*4882a593Smuzhiyun };
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun enum tid_rdma_req_state {
85*4882a593Smuzhiyun TID_REQUEST_INACTIVE = 0,
86*4882a593Smuzhiyun TID_REQUEST_INIT,
87*4882a593Smuzhiyun TID_REQUEST_INIT_RESEND,
88*4882a593Smuzhiyun TID_REQUEST_ACTIVE,
89*4882a593Smuzhiyun TID_REQUEST_RESEND,
90*4882a593Smuzhiyun TID_REQUEST_RESEND_ACTIVE,
91*4882a593Smuzhiyun TID_REQUEST_QUEUED,
92*4882a593Smuzhiyun TID_REQUEST_SYNC,
93*4882a593Smuzhiyun TID_REQUEST_RNR_NAK,
94*4882a593Smuzhiyun TID_REQUEST_COMPLETE,
95*4882a593Smuzhiyun };
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun struct tid_rdma_request {
98*4882a593Smuzhiyun struct rvt_qp *qp;
99*4882a593Smuzhiyun struct hfi1_ctxtdata *rcd;
100*4882a593Smuzhiyun union {
101*4882a593Smuzhiyun struct rvt_swqe *swqe;
102*4882a593Smuzhiyun struct rvt_ack_entry *ack;
103*4882a593Smuzhiyun } e;
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun struct tid_rdma_flow *flows; /* array of tid flows */
106*4882a593Smuzhiyun struct rvt_sge_state ss; /* SGE state for TID RDMA requests */
107*4882a593Smuzhiyun u16 n_flows; /* size of the flow buffer window */
108*4882a593Smuzhiyun u16 setup_head; /* flow index we are setting up */
109*4882a593Smuzhiyun u16 clear_tail; /* flow index we are clearing */
110*4882a593Smuzhiyun u16 flow_idx; /* flow index most recently set up */
111*4882a593Smuzhiyun u16 acked_tail;
112*4882a593Smuzhiyun
113*4882a593Smuzhiyun u32 seg_len;
114*4882a593Smuzhiyun u32 total_len;
115*4882a593Smuzhiyun u32 r_ack_psn; /* next expected ack PSN */
116*4882a593Smuzhiyun u32 r_flow_psn; /* IB PSN of next segment start */
117*4882a593Smuzhiyun u32 r_last_acked; /* IB PSN of last ACK'ed packet */
118*4882a593Smuzhiyun u32 s_next_psn; /* IB PSN of next segment start for read */
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun u32 total_segs; /* segments required to complete a request */
121*4882a593Smuzhiyun u32 cur_seg; /* index of current segment */
122*4882a593Smuzhiyun u32 comp_seg; /* index of last completed segment */
123*4882a593Smuzhiyun u32 ack_seg; /* index of last ack'ed segment */
124*4882a593Smuzhiyun u32 alloc_seg; /* index of next segment to be allocated */
125*4882a593Smuzhiyun u32 isge; /* index of "current" sge */
126*4882a593Smuzhiyun u32 ack_pending; /* num acks pending for this request */
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun enum tid_rdma_req_state state;
129*4882a593Smuzhiyun };
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun /*
132*4882a593Smuzhiyun * When header suppression is used, PSNs associated with a "flow" are
133*4882a593Smuzhiyun * relevant (and not the PSNs maintained by verbs). Track per-flow
134*4882a593Smuzhiyun * PSNs here for a TID RDMA segment.
135*4882a593Smuzhiyun *
136*4882a593Smuzhiyun */
137*4882a593Smuzhiyun struct flow_state {
138*4882a593Smuzhiyun u32 flags;
139*4882a593Smuzhiyun u32 resp_ib_psn; /* The IB PSN of the response for this flow */
140*4882a593Smuzhiyun u32 generation; /* generation of flow */
141*4882a593Smuzhiyun u32 spsn; /* starting PSN in TID space */
142*4882a593Smuzhiyun u32 lpsn; /* last PSN in TID space */
143*4882a593Smuzhiyun u32 r_next_psn; /* next PSN to be received (in TID space) */
144*4882a593Smuzhiyun
145*4882a593Smuzhiyun /* For tid rdma read */
146*4882a593Smuzhiyun u32 ib_spsn; /* starting PSN in Verbs space */
147*4882a593Smuzhiyun u32 ib_lpsn; /* last PSn in Verbs space */
148*4882a593Smuzhiyun };
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun struct tid_rdma_pageset {
151*4882a593Smuzhiyun dma_addr_t addr : 48; /* Only needed for the first page */
152*4882a593Smuzhiyun u8 idx: 8;
153*4882a593Smuzhiyun u8 count : 7;
154*4882a593Smuzhiyun u8 mapped: 1;
155*4882a593Smuzhiyun };
156*4882a593Smuzhiyun
157*4882a593Smuzhiyun /**
158*4882a593Smuzhiyun * kern_tid_node - used for managing TID's in TID groups
159*4882a593Smuzhiyun *
160*4882a593Smuzhiyun * @grp_idx: rcd relative index to tid_group
161*4882a593Smuzhiyun * @map: grp->map captured prior to programming this TID group in HW
162*4882a593Smuzhiyun * @cnt: Only @cnt of available group entries are actually programmed
163*4882a593Smuzhiyun */
164*4882a593Smuzhiyun struct kern_tid_node {
165*4882a593Smuzhiyun struct tid_group *grp;
166*4882a593Smuzhiyun u8 map;
167*4882a593Smuzhiyun u8 cnt;
168*4882a593Smuzhiyun };
169*4882a593Smuzhiyun
170*4882a593Smuzhiyun /* Overall info for a TID RDMA segment */
171*4882a593Smuzhiyun struct tid_rdma_flow {
172*4882a593Smuzhiyun /*
173*4882a593Smuzhiyun * While a TID RDMA segment is being transferred, it uses a QP number
174*4882a593Smuzhiyun * from the "KDETH section of QP numbers" (which is different from the
175*4882a593Smuzhiyun * QP number that originated the request). Bits 11-15 of these QP
176*4882a593Smuzhiyun * numbers identify the "TID flow" for the segment.
177*4882a593Smuzhiyun */
178*4882a593Smuzhiyun struct flow_state flow_state;
179*4882a593Smuzhiyun struct tid_rdma_request *req;
180*4882a593Smuzhiyun u32 tid_qpn;
181*4882a593Smuzhiyun u32 tid_offset;
182*4882a593Smuzhiyun u32 length;
183*4882a593Smuzhiyun u32 sent;
184*4882a593Smuzhiyun u8 tnode_cnt;
185*4882a593Smuzhiyun u8 tidcnt;
186*4882a593Smuzhiyun u8 tid_idx;
187*4882a593Smuzhiyun u8 idx;
188*4882a593Smuzhiyun u8 npagesets;
189*4882a593Smuzhiyun u8 npkts;
190*4882a593Smuzhiyun u8 pkt;
191*4882a593Smuzhiyun u8 resync_npkts;
192*4882a593Smuzhiyun struct kern_tid_node tnode[TID_RDMA_MAX_PAGES];
193*4882a593Smuzhiyun struct tid_rdma_pageset pagesets[TID_RDMA_MAX_PAGES];
194*4882a593Smuzhiyun u32 tid_entry[TID_RDMA_MAX_PAGES];
195*4882a593Smuzhiyun };
196*4882a593Smuzhiyun
197*4882a593Smuzhiyun enum tid_rnr_nak_state {
198*4882a593Smuzhiyun TID_RNR_NAK_INIT = 0,
199*4882a593Smuzhiyun TID_RNR_NAK_SEND,
200*4882a593Smuzhiyun TID_RNR_NAK_SENT,
201*4882a593Smuzhiyun };
202*4882a593Smuzhiyun
203*4882a593Smuzhiyun bool tid_rdma_conn_req(struct rvt_qp *qp, u64 *data);
204*4882a593Smuzhiyun bool tid_rdma_conn_reply(struct rvt_qp *qp, u64 data);
205*4882a593Smuzhiyun bool tid_rdma_conn_resp(struct rvt_qp *qp, u64 *data);
206*4882a593Smuzhiyun void tid_rdma_conn_error(struct rvt_qp *qp);
207*4882a593Smuzhiyun void tid_rdma_opfn_init(struct rvt_qp *qp, struct tid_rdma_params *p);
208*4882a593Smuzhiyun
209*4882a593Smuzhiyun int hfi1_kern_exp_rcv_init(struct hfi1_ctxtdata *rcd, int reinit);
210*4882a593Smuzhiyun int hfi1_kern_exp_rcv_setup(struct tid_rdma_request *req,
211*4882a593Smuzhiyun struct rvt_sge_state *ss, bool *last);
212*4882a593Smuzhiyun int hfi1_kern_exp_rcv_clear(struct tid_rdma_request *req);
213*4882a593Smuzhiyun void hfi1_kern_exp_rcv_clear_all(struct tid_rdma_request *req);
214*4882a593Smuzhiyun void __trdma_clean_swqe(struct rvt_qp *qp, struct rvt_swqe *wqe);
215*4882a593Smuzhiyun
216*4882a593Smuzhiyun /**
217*4882a593Smuzhiyun * trdma_clean_swqe - clean flows for swqe if large send queue
218*4882a593Smuzhiyun * @qp: the qp
219*4882a593Smuzhiyun * @wqe: the send wqe
220*4882a593Smuzhiyun */
trdma_clean_swqe(struct rvt_qp * qp,struct rvt_swqe * wqe)221*4882a593Smuzhiyun static inline void trdma_clean_swqe(struct rvt_qp *qp, struct rvt_swqe *wqe)
222*4882a593Smuzhiyun {
223*4882a593Smuzhiyun if (!wqe->priv)
224*4882a593Smuzhiyun return;
225*4882a593Smuzhiyun __trdma_clean_swqe(qp, wqe);
226*4882a593Smuzhiyun }
227*4882a593Smuzhiyun
228*4882a593Smuzhiyun void hfi1_kern_read_tid_flow_free(struct rvt_qp *qp);
229*4882a593Smuzhiyun
230*4882a593Smuzhiyun int hfi1_qp_priv_init(struct rvt_dev_info *rdi, struct rvt_qp *qp,
231*4882a593Smuzhiyun struct ib_qp_init_attr *init_attr);
232*4882a593Smuzhiyun void hfi1_qp_priv_tid_free(struct rvt_dev_info *rdi, struct rvt_qp *qp);
233*4882a593Smuzhiyun
234*4882a593Smuzhiyun void hfi1_tid_rdma_flush_wait(struct rvt_qp *qp);
235*4882a593Smuzhiyun
236*4882a593Smuzhiyun int hfi1_kern_setup_hw_flow(struct hfi1_ctxtdata *rcd, struct rvt_qp *qp);
237*4882a593Smuzhiyun void hfi1_kern_clear_hw_flow(struct hfi1_ctxtdata *rcd, struct rvt_qp *qp);
238*4882a593Smuzhiyun void hfi1_kern_init_ctxt_generations(struct hfi1_ctxtdata *rcd);
239*4882a593Smuzhiyun
240*4882a593Smuzhiyun struct cntr_entry;
241*4882a593Smuzhiyun u64 hfi1_access_sw_tid_wait(const struct cntr_entry *entry,
242*4882a593Smuzhiyun void *context, int vl, int mode, u64 data);
243*4882a593Smuzhiyun
244*4882a593Smuzhiyun u32 hfi1_build_tid_rdma_read_packet(struct rvt_swqe *wqe,
245*4882a593Smuzhiyun struct ib_other_headers *ohdr,
246*4882a593Smuzhiyun u32 *bth1, u32 *bth2, u32 *len);
247*4882a593Smuzhiyun u32 hfi1_build_tid_rdma_read_req(struct rvt_qp *qp, struct rvt_swqe *wqe,
248*4882a593Smuzhiyun struct ib_other_headers *ohdr, u32 *bth1,
249*4882a593Smuzhiyun u32 *bth2, u32 *len);
250*4882a593Smuzhiyun void hfi1_rc_rcv_tid_rdma_read_req(struct hfi1_packet *packet);
251*4882a593Smuzhiyun u32 hfi1_build_tid_rdma_read_resp(struct rvt_qp *qp, struct rvt_ack_entry *e,
252*4882a593Smuzhiyun struct ib_other_headers *ohdr, u32 *bth0,
253*4882a593Smuzhiyun u32 *bth1, u32 *bth2, u32 *len, bool *last);
254*4882a593Smuzhiyun void hfi1_rc_rcv_tid_rdma_read_resp(struct hfi1_packet *packet);
255*4882a593Smuzhiyun bool hfi1_handle_kdeth_eflags(struct hfi1_ctxtdata *rcd,
256*4882a593Smuzhiyun struct hfi1_pportdata *ppd,
257*4882a593Smuzhiyun struct hfi1_packet *packet);
258*4882a593Smuzhiyun void hfi1_tid_rdma_restart_req(struct rvt_qp *qp, struct rvt_swqe *wqe,
259*4882a593Smuzhiyun u32 *bth2);
260*4882a593Smuzhiyun void hfi1_qp_kern_exp_rcv_clear_all(struct rvt_qp *qp);
261*4882a593Smuzhiyun bool hfi1_tid_rdma_wqe_interlock(struct rvt_qp *qp, struct rvt_swqe *wqe);
262*4882a593Smuzhiyun
263*4882a593Smuzhiyun void setup_tid_rdma_wqe(struct rvt_qp *qp, struct rvt_swqe *wqe);
hfi1_setup_tid_rdma_wqe(struct rvt_qp * qp,struct rvt_swqe * wqe)264*4882a593Smuzhiyun static inline void hfi1_setup_tid_rdma_wqe(struct rvt_qp *qp,
265*4882a593Smuzhiyun struct rvt_swqe *wqe)
266*4882a593Smuzhiyun {
267*4882a593Smuzhiyun if (wqe->priv &&
268*4882a593Smuzhiyun (wqe->wr.opcode == IB_WR_RDMA_READ ||
269*4882a593Smuzhiyun wqe->wr.opcode == IB_WR_RDMA_WRITE) &&
270*4882a593Smuzhiyun wqe->length >= TID_RDMA_MIN_SEGMENT_SIZE)
271*4882a593Smuzhiyun setup_tid_rdma_wqe(qp, wqe);
272*4882a593Smuzhiyun }
273*4882a593Smuzhiyun
274*4882a593Smuzhiyun u32 hfi1_build_tid_rdma_write_req(struct rvt_qp *qp, struct rvt_swqe *wqe,
275*4882a593Smuzhiyun struct ib_other_headers *ohdr,
276*4882a593Smuzhiyun u32 *bth1, u32 *bth2, u32 *len);
277*4882a593Smuzhiyun
278*4882a593Smuzhiyun void hfi1_rc_rcv_tid_rdma_write_req(struct hfi1_packet *packet);
279*4882a593Smuzhiyun
280*4882a593Smuzhiyun u32 hfi1_build_tid_rdma_write_resp(struct rvt_qp *qp, struct rvt_ack_entry *e,
281*4882a593Smuzhiyun struct ib_other_headers *ohdr, u32 *bth1,
282*4882a593Smuzhiyun u32 bth2, u32 *len,
283*4882a593Smuzhiyun struct rvt_sge_state **ss);
284*4882a593Smuzhiyun
285*4882a593Smuzhiyun void hfi1_del_tid_reap_timer(struct rvt_qp *qp);
286*4882a593Smuzhiyun
287*4882a593Smuzhiyun void hfi1_rc_rcv_tid_rdma_write_resp(struct hfi1_packet *packet);
288*4882a593Smuzhiyun
289*4882a593Smuzhiyun bool hfi1_build_tid_rdma_packet(struct rvt_swqe *wqe,
290*4882a593Smuzhiyun struct ib_other_headers *ohdr,
291*4882a593Smuzhiyun u32 *bth1, u32 *bth2, u32 *len);
292*4882a593Smuzhiyun
293*4882a593Smuzhiyun void hfi1_rc_rcv_tid_rdma_write_data(struct hfi1_packet *packet);
294*4882a593Smuzhiyun
295*4882a593Smuzhiyun u32 hfi1_build_tid_rdma_write_ack(struct rvt_qp *qp, struct rvt_ack_entry *e,
296*4882a593Smuzhiyun struct ib_other_headers *ohdr, u16 iflow,
297*4882a593Smuzhiyun u32 *bth1, u32 *bth2);
298*4882a593Smuzhiyun
299*4882a593Smuzhiyun void hfi1_rc_rcv_tid_rdma_ack(struct hfi1_packet *packet);
300*4882a593Smuzhiyun
301*4882a593Smuzhiyun void hfi1_add_tid_retry_timer(struct rvt_qp *qp);
302*4882a593Smuzhiyun void hfi1_del_tid_retry_timer(struct rvt_qp *qp);
303*4882a593Smuzhiyun
304*4882a593Smuzhiyun u32 hfi1_build_tid_rdma_resync(struct rvt_qp *qp, struct rvt_swqe *wqe,
305*4882a593Smuzhiyun struct ib_other_headers *ohdr, u32 *bth1,
306*4882a593Smuzhiyun u32 *bth2, u16 fidx);
307*4882a593Smuzhiyun
308*4882a593Smuzhiyun void hfi1_rc_rcv_tid_rdma_resync(struct hfi1_packet *packet);
309*4882a593Smuzhiyun
310*4882a593Smuzhiyun struct hfi1_pkt_state;
311*4882a593Smuzhiyun int hfi1_make_tid_rdma_pkt(struct rvt_qp *qp, struct hfi1_pkt_state *ps);
312*4882a593Smuzhiyun
313*4882a593Smuzhiyun void _hfi1_do_tid_send(struct work_struct *work);
314*4882a593Smuzhiyun
315*4882a593Smuzhiyun bool hfi1_schedule_tid_send(struct rvt_qp *qp);
316*4882a593Smuzhiyun
317*4882a593Smuzhiyun bool hfi1_tid_rdma_ack_interlock(struct rvt_qp *qp, struct rvt_ack_entry *e);
318*4882a593Smuzhiyun
319*4882a593Smuzhiyun #endif /* HFI1_TID_RDMA_H */
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