xref: /OK3568_Linux_fs/kernel/drivers/infiniband/hw/hfi1/qp.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun #ifndef _QP_H
2*4882a593Smuzhiyun #define _QP_H
3*4882a593Smuzhiyun /*
4*4882a593Smuzhiyun  * Copyright(c) 2015 - 2018 Intel Corporation.
5*4882a593Smuzhiyun  *
6*4882a593Smuzhiyun  * This file is provided under a dual BSD/GPLv2 license.  When using or
7*4882a593Smuzhiyun  * redistributing this file, you may do so under either license.
8*4882a593Smuzhiyun  *
9*4882a593Smuzhiyun  * GPL LICENSE SUMMARY
10*4882a593Smuzhiyun  *
11*4882a593Smuzhiyun  * This program is free software; you can redistribute it and/or modify
12*4882a593Smuzhiyun  * it under the terms of version 2 of the GNU General Public License as
13*4882a593Smuzhiyun  * published by the Free Software Foundation.
14*4882a593Smuzhiyun  *
15*4882a593Smuzhiyun  * This program is distributed in the hope that it will be useful, but
16*4882a593Smuzhiyun  * WITHOUT ANY WARRANTY; without even the implied warranty of
17*4882a593Smuzhiyun  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
18*4882a593Smuzhiyun  * General Public License for more details.
19*4882a593Smuzhiyun  *
20*4882a593Smuzhiyun  * BSD LICENSE
21*4882a593Smuzhiyun  *
22*4882a593Smuzhiyun  * Redistribution and use in source and binary forms, with or without
23*4882a593Smuzhiyun  * modification, are permitted provided that the following conditions
24*4882a593Smuzhiyun  * are met:
25*4882a593Smuzhiyun  *
26*4882a593Smuzhiyun  *  - Redistributions of source code must retain the above copyright
27*4882a593Smuzhiyun  *    notice, this list of conditions and the following disclaimer.
28*4882a593Smuzhiyun  *  - Redistributions in binary form must reproduce the above copyright
29*4882a593Smuzhiyun  *    notice, this list of conditions and the following disclaimer in
30*4882a593Smuzhiyun  *    the documentation and/or other materials provided with the
31*4882a593Smuzhiyun  *    distribution.
32*4882a593Smuzhiyun  *  - Neither the name of Intel Corporation nor the names of its
33*4882a593Smuzhiyun  *    contributors may be used to endorse or promote products derived
34*4882a593Smuzhiyun  *    from this software without specific prior written permission.
35*4882a593Smuzhiyun  *
36*4882a593Smuzhiyun  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
37*4882a593Smuzhiyun  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
38*4882a593Smuzhiyun  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
39*4882a593Smuzhiyun  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
40*4882a593Smuzhiyun  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
41*4882a593Smuzhiyun  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
42*4882a593Smuzhiyun  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
43*4882a593Smuzhiyun  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
44*4882a593Smuzhiyun  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
45*4882a593Smuzhiyun  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
46*4882a593Smuzhiyun  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
47*4882a593Smuzhiyun  *
48*4882a593Smuzhiyun  */
49*4882a593Smuzhiyun 
50*4882a593Smuzhiyun #include <linux/hash.h>
51*4882a593Smuzhiyun #include <rdma/rdmavt_qp.h>
52*4882a593Smuzhiyun #include "verbs.h"
53*4882a593Smuzhiyun #include "sdma.h"
54*4882a593Smuzhiyun #include "verbs_txreq.h"
55*4882a593Smuzhiyun 
56*4882a593Smuzhiyun extern unsigned int hfi1_qp_table_size;
57*4882a593Smuzhiyun 
58*4882a593Smuzhiyun extern const struct rvt_operation_params hfi1_post_parms[];
59*4882a593Smuzhiyun 
60*4882a593Smuzhiyun /*
61*4882a593Smuzhiyun  * Driver specific s_flags starting at bit 31 down to HFI1_S_MIN_BIT_MASK
62*4882a593Smuzhiyun  *
63*4882a593Smuzhiyun  * HFI1_S_AHG_VALID - ahg header valid on chip
64*4882a593Smuzhiyun  * HFI1_S_AHG_CLEAR - have send engine clear ahg state
65*4882a593Smuzhiyun  * HFI1_S_WAIT_PIO_DRAIN - qp waiting for PIOs to drain
66*4882a593Smuzhiyun  * HFI1_S_WAIT_TID_SPACE - a QP is waiting for TID resource
67*4882a593Smuzhiyun  * HFI1_S_WAIT_TID_RESP - waiting for a TID RDMA WRITE response
68*4882a593Smuzhiyun  * HFI1_S_WAIT_HALT - halt the first leg send engine
69*4882a593Smuzhiyun  * HFI1_S_MIN_BIT_MASK - the lowest bit that can be used by hfi1
70*4882a593Smuzhiyun  */
71*4882a593Smuzhiyun #define HFI1_S_AHG_VALID         0x80000000
72*4882a593Smuzhiyun #define HFI1_S_AHG_CLEAR         0x40000000
73*4882a593Smuzhiyun #define HFI1_S_WAIT_PIO_DRAIN    0x20000000
74*4882a593Smuzhiyun #define HFI1_S_WAIT_TID_SPACE    0x10000000
75*4882a593Smuzhiyun #define HFI1_S_WAIT_TID_RESP     0x08000000
76*4882a593Smuzhiyun #define HFI1_S_WAIT_HALT         0x04000000
77*4882a593Smuzhiyun #define HFI1_S_MIN_BIT_MASK      0x01000000
78*4882a593Smuzhiyun 
79*4882a593Smuzhiyun /*
80*4882a593Smuzhiyun  * overload wait defines
81*4882a593Smuzhiyun  */
82*4882a593Smuzhiyun 
83*4882a593Smuzhiyun #define HFI1_S_ANY_WAIT_IO (RVT_S_ANY_WAIT_IO | HFI1_S_WAIT_PIO_DRAIN)
84*4882a593Smuzhiyun #define HFI1_S_ANY_WAIT (HFI1_S_ANY_WAIT_IO | RVT_S_ANY_WAIT_SEND)
85*4882a593Smuzhiyun #define HFI1_S_ANY_TID_WAIT_SEND (RVT_S_WAIT_SSN_CREDIT | RVT_S_WAIT_DMA)
86*4882a593Smuzhiyun 
87*4882a593Smuzhiyun /*
88*4882a593Smuzhiyun  * Send if not busy or waiting for I/O and either
89*4882a593Smuzhiyun  * a RC response is pending or we can process send work requests.
90*4882a593Smuzhiyun  */
hfi1_send_ok(struct rvt_qp * qp)91*4882a593Smuzhiyun static inline int hfi1_send_ok(struct rvt_qp *qp)
92*4882a593Smuzhiyun {
93*4882a593Smuzhiyun 	struct hfi1_qp_priv *priv = qp->priv;
94*4882a593Smuzhiyun 
95*4882a593Smuzhiyun 	return !(qp->s_flags & (RVT_S_BUSY | HFI1_S_ANY_WAIT_IO)) &&
96*4882a593Smuzhiyun 		(verbs_txreq_queued(iowait_get_ib_work(&priv->s_iowait)) ||
97*4882a593Smuzhiyun 		(qp->s_flags & RVT_S_RESP_PENDING) ||
98*4882a593Smuzhiyun 		 !(qp->s_flags & RVT_S_ANY_WAIT_SEND));
99*4882a593Smuzhiyun }
100*4882a593Smuzhiyun 
101*4882a593Smuzhiyun /*
102*4882a593Smuzhiyun  * free_ahg - clear ahg from QP
103*4882a593Smuzhiyun  */
clear_ahg(struct rvt_qp * qp)104*4882a593Smuzhiyun static inline void clear_ahg(struct rvt_qp *qp)
105*4882a593Smuzhiyun {
106*4882a593Smuzhiyun 	struct hfi1_qp_priv *priv = qp->priv;
107*4882a593Smuzhiyun 
108*4882a593Smuzhiyun 	priv->s_ahg->ahgcount = 0;
109*4882a593Smuzhiyun 	qp->s_flags &= ~(HFI1_S_AHG_VALID | HFI1_S_AHG_CLEAR);
110*4882a593Smuzhiyun 	if (priv->s_sde && qp->s_ahgidx >= 0)
111*4882a593Smuzhiyun 		sdma_ahg_free(priv->s_sde, qp->s_ahgidx);
112*4882a593Smuzhiyun 	qp->s_ahgidx = -1;
113*4882a593Smuzhiyun }
114*4882a593Smuzhiyun 
115*4882a593Smuzhiyun /**
116*4882a593Smuzhiyun  * hfi1_qp_wakeup - wake up on the indicated event
117*4882a593Smuzhiyun  * @qp: the QP
118*4882a593Smuzhiyun  * @flag: flag the qp on which the qp is stalled
119*4882a593Smuzhiyun  */
120*4882a593Smuzhiyun void hfi1_qp_wakeup(struct rvt_qp *qp, u32 flag);
121*4882a593Smuzhiyun 
122*4882a593Smuzhiyun struct sdma_engine *qp_to_sdma_engine(struct rvt_qp *qp, u8 sc5);
123*4882a593Smuzhiyun struct send_context *qp_to_send_context(struct rvt_qp *qp, u8 sc5);
124*4882a593Smuzhiyun 
125*4882a593Smuzhiyun void qp_iter_print(struct seq_file *s, struct rvt_qp_iter *iter);
126*4882a593Smuzhiyun 
127*4882a593Smuzhiyun bool _hfi1_schedule_send(struct rvt_qp *qp);
128*4882a593Smuzhiyun bool hfi1_schedule_send(struct rvt_qp *qp);
129*4882a593Smuzhiyun 
130*4882a593Smuzhiyun void hfi1_migrate_qp(struct rvt_qp *qp);
131*4882a593Smuzhiyun 
132*4882a593Smuzhiyun /*
133*4882a593Smuzhiyun  * Functions provided by hfi1 driver for rdmavt to use
134*4882a593Smuzhiyun  */
135*4882a593Smuzhiyun void *qp_priv_alloc(struct rvt_dev_info *rdi, struct rvt_qp *qp);
136*4882a593Smuzhiyun void qp_priv_free(struct rvt_dev_info *rdi, struct rvt_qp *qp);
137*4882a593Smuzhiyun unsigned free_all_qps(struct rvt_dev_info *rdi);
138*4882a593Smuzhiyun void notify_qp_reset(struct rvt_qp *qp);
139*4882a593Smuzhiyun int get_pmtu_from_attr(struct rvt_dev_info *rdi, struct rvt_qp *qp,
140*4882a593Smuzhiyun 		       struct ib_qp_attr *attr);
141*4882a593Smuzhiyun void flush_qp_waiters(struct rvt_qp *qp);
142*4882a593Smuzhiyun void notify_error_qp(struct rvt_qp *qp);
143*4882a593Smuzhiyun void stop_send_queue(struct rvt_qp *qp);
144*4882a593Smuzhiyun void quiesce_qp(struct rvt_qp *qp);
145*4882a593Smuzhiyun u32 mtu_from_qp(struct rvt_dev_info *rdi, struct rvt_qp *qp, u32 pmtu);
146*4882a593Smuzhiyun int mtu_to_path_mtu(u32 mtu);
147*4882a593Smuzhiyun void hfi1_error_port_qps(struct hfi1_ibport *ibp, u8 sl);
148*4882a593Smuzhiyun void hfi1_qp_unbusy(struct rvt_qp *qp, struct iowait_work *wait);
149*4882a593Smuzhiyun #endif /* _QP_H */
150