xref: /OK3568_Linux_fs/kernel/drivers/iio/temperature/tmp007.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * tmp007.c - Support for TI TMP007 IR thermopile sensor with integrated math engine
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (c) 2017 Manivannan Sadhasivam <manivannanece23@gmail.com>
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * Driver for the Texas Instruments I2C 16-bit IR thermopile sensor
8*4882a593Smuzhiyun  *
9*4882a593Smuzhiyun  * (7-bit I2C slave address (0x40 - 0x47), changeable via ADR pins)
10*4882a593Smuzhiyun  *
11*4882a593Smuzhiyun  * Note:
12*4882a593Smuzhiyun  * 1. This driver assumes that the sensor has been calibrated beforehand
13*4882a593Smuzhiyun  * 2. Limit threshold events are enabled at the start
14*4882a593Smuzhiyun  * 3. Operating mode: INT
15*4882a593Smuzhiyun  */
16*4882a593Smuzhiyun 
17*4882a593Smuzhiyun #include <linux/err.h>
18*4882a593Smuzhiyun #include <linux/i2c.h>
19*4882a593Smuzhiyun #include <linux/delay.h>
20*4882a593Smuzhiyun #include <linux/module.h>
21*4882a593Smuzhiyun #include <linux/pm.h>
22*4882a593Smuzhiyun #include <linux/bitops.h>
23*4882a593Smuzhiyun #include <linux/mod_devicetable.h>
24*4882a593Smuzhiyun #include <linux/irq.h>
25*4882a593Smuzhiyun #include <linux/interrupt.h>
26*4882a593Smuzhiyun 
27*4882a593Smuzhiyun #include <linux/iio/iio.h>
28*4882a593Smuzhiyun #include <linux/iio/sysfs.h>
29*4882a593Smuzhiyun #include <linux/iio/events.h>
30*4882a593Smuzhiyun 
31*4882a593Smuzhiyun #define TMP007_TDIE 0x01
32*4882a593Smuzhiyun #define TMP007_CONFIG 0x02
33*4882a593Smuzhiyun #define TMP007_TOBJECT 0x03
34*4882a593Smuzhiyun #define TMP007_STATUS 0x04
35*4882a593Smuzhiyun #define TMP007_STATUS_MASK 0x05
36*4882a593Smuzhiyun #define TMP007_TOBJ_HIGH_LIMIT 0x06
37*4882a593Smuzhiyun #define TMP007_TOBJ_LOW_LIMIT 0x07
38*4882a593Smuzhiyun #define TMP007_TDIE_HIGH_LIMIT 0x08
39*4882a593Smuzhiyun #define TMP007_TDIE_LOW_LIMIT 0x09
40*4882a593Smuzhiyun #define TMP007_MANUFACTURER_ID 0x1e
41*4882a593Smuzhiyun #define TMP007_DEVICE_ID 0x1f
42*4882a593Smuzhiyun 
43*4882a593Smuzhiyun #define TMP007_CONFIG_CONV_EN BIT(12)
44*4882a593Smuzhiyun #define TMP007_CONFIG_TC_EN BIT(6)
45*4882a593Smuzhiyun #define TMP007_CONFIG_CR_MASK GENMASK(11, 9)
46*4882a593Smuzhiyun #define TMP007_CONFIG_ALERT_EN BIT(8)
47*4882a593Smuzhiyun #define TMP007_CONFIG_CR_SHIFT 9
48*4882a593Smuzhiyun 
49*4882a593Smuzhiyun /* Status register flags */
50*4882a593Smuzhiyun #define TMP007_STATUS_ALERT BIT(15)
51*4882a593Smuzhiyun #define TMP007_STATUS_CONV_READY BIT(14)
52*4882a593Smuzhiyun #define TMP007_STATUS_OHF BIT(13)
53*4882a593Smuzhiyun #define TMP007_STATUS_OLF BIT(12)
54*4882a593Smuzhiyun #define TMP007_STATUS_LHF BIT(11)
55*4882a593Smuzhiyun #define TMP007_STATUS_LLF BIT(10)
56*4882a593Smuzhiyun #define TMP007_STATUS_DATA_VALID BIT(9)
57*4882a593Smuzhiyun 
58*4882a593Smuzhiyun #define TMP007_MANUFACTURER_MAGIC 0x5449
59*4882a593Smuzhiyun #define TMP007_DEVICE_MAGIC 0x0078
60*4882a593Smuzhiyun 
61*4882a593Smuzhiyun #define TMP007_TEMP_SHIFT 2
62*4882a593Smuzhiyun 
63*4882a593Smuzhiyun struct tmp007_data {
64*4882a593Smuzhiyun 	struct i2c_client *client;
65*4882a593Smuzhiyun 	struct mutex lock;
66*4882a593Smuzhiyun 	u16 config;
67*4882a593Smuzhiyun 	u16 status_mask;
68*4882a593Smuzhiyun };
69*4882a593Smuzhiyun 
70*4882a593Smuzhiyun static const int tmp007_avgs[5][2] = { {4, 0}, {2, 0}, {1, 0},
71*4882a593Smuzhiyun 					{0, 500000}, {0, 250000} };
72*4882a593Smuzhiyun 
tmp007_read_temperature(struct tmp007_data * data,u8 reg)73*4882a593Smuzhiyun static int tmp007_read_temperature(struct tmp007_data *data, u8 reg)
74*4882a593Smuzhiyun {
75*4882a593Smuzhiyun 	s32 ret;
76*4882a593Smuzhiyun 	int tries = 50;
77*4882a593Smuzhiyun 
78*4882a593Smuzhiyun 	while (tries-- > 0) {
79*4882a593Smuzhiyun 		ret = i2c_smbus_read_word_swapped(data->client,
80*4882a593Smuzhiyun 			TMP007_STATUS);
81*4882a593Smuzhiyun 		if (ret < 0)
82*4882a593Smuzhiyun 			return ret;
83*4882a593Smuzhiyun 		if ((ret & TMP007_STATUS_CONV_READY) &&
84*4882a593Smuzhiyun 			!(ret & TMP007_STATUS_DATA_VALID))
85*4882a593Smuzhiyun 				break;
86*4882a593Smuzhiyun 		msleep(100);
87*4882a593Smuzhiyun 	}
88*4882a593Smuzhiyun 
89*4882a593Smuzhiyun 	if (tries < 0)
90*4882a593Smuzhiyun 		return -EIO;
91*4882a593Smuzhiyun 
92*4882a593Smuzhiyun 	return i2c_smbus_read_word_swapped(data->client, reg);
93*4882a593Smuzhiyun }
94*4882a593Smuzhiyun 
tmp007_powerdown(struct tmp007_data * data)95*4882a593Smuzhiyun static int tmp007_powerdown(struct tmp007_data *data)
96*4882a593Smuzhiyun {
97*4882a593Smuzhiyun 	return i2c_smbus_write_word_swapped(data->client, TMP007_CONFIG,
98*4882a593Smuzhiyun 			data->config & ~TMP007_CONFIG_CONV_EN);
99*4882a593Smuzhiyun }
100*4882a593Smuzhiyun 
tmp007_read_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * channel,int * val,int * val2,long mask)101*4882a593Smuzhiyun static int tmp007_read_raw(struct iio_dev *indio_dev,
102*4882a593Smuzhiyun 		struct iio_chan_spec const *channel, int *val,
103*4882a593Smuzhiyun 		int *val2, long mask)
104*4882a593Smuzhiyun {
105*4882a593Smuzhiyun 	struct tmp007_data *data = iio_priv(indio_dev);
106*4882a593Smuzhiyun 	s32 ret;
107*4882a593Smuzhiyun 	int conv_rate;
108*4882a593Smuzhiyun 
109*4882a593Smuzhiyun 	switch (mask) {
110*4882a593Smuzhiyun 	case IIO_CHAN_INFO_RAW:
111*4882a593Smuzhiyun 		switch (channel->channel2) {
112*4882a593Smuzhiyun 		case IIO_MOD_TEMP_AMBIENT: /* LSB: 0.03125 degree Celsius */
113*4882a593Smuzhiyun 			ret = i2c_smbus_read_word_swapped(data->client, TMP007_TDIE);
114*4882a593Smuzhiyun 			if (ret < 0)
115*4882a593Smuzhiyun 				return ret;
116*4882a593Smuzhiyun 			break;
117*4882a593Smuzhiyun 		case IIO_MOD_TEMP_OBJECT:
118*4882a593Smuzhiyun 			ret = tmp007_read_temperature(data, TMP007_TOBJECT);
119*4882a593Smuzhiyun 			if (ret < 0)
120*4882a593Smuzhiyun 				return ret;
121*4882a593Smuzhiyun 			break;
122*4882a593Smuzhiyun 		default:
123*4882a593Smuzhiyun 			return -EINVAL;
124*4882a593Smuzhiyun 		}
125*4882a593Smuzhiyun 
126*4882a593Smuzhiyun 		*val = sign_extend32(ret, 15) >> TMP007_TEMP_SHIFT;
127*4882a593Smuzhiyun 
128*4882a593Smuzhiyun 		return IIO_VAL_INT;
129*4882a593Smuzhiyun 	case IIO_CHAN_INFO_SCALE:
130*4882a593Smuzhiyun 		*val = 31;
131*4882a593Smuzhiyun 		*val2 = 250000;
132*4882a593Smuzhiyun 
133*4882a593Smuzhiyun 		return IIO_VAL_INT_PLUS_MICRO;
134*4882a593Smuzhiyun 	case IIO_CHAN_INFO_SAMP_FREQ:
135*4882a593Smuzhiyun 		conv_rate = (data->config & TMP007_CONFIG_CR_MASK)
136*4882a593Smuzhiyun 				>> TMP007_CONFIG_CR_SHIFT;
137*4882a593Smuzhiyun 		*val = tmp007_avgs[conv_rate][0];
138*4882a593Smuzhiyun 		*val2 = tmp007_avgs[conv_rate][1];
139*4882a593Smuzhiyun 
140*4882a593Smuzhiyun 		return IIO_VAL_INT_PLUS_MICRO;
141*4882a593Smuzhiyun 	default:
142*4882a593Smuzhiyun 		return -EINVAL;
143*4882a593Smuzhiyun 	}
144*4882a593Smuzhiyun }
145*4882a593Smuzhiyun 
tmp007_write_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * channel,int val,int val2,long mask)146*4882a593Smuzhiyun static int tmp007_write_raw(struct iio_dev *indio_dev,
147*4882a593Smuzhiyun 		struct iio_chan_spec const *channel, int val,
148*4882a593Smuzhiyun 		int val2, long mask)
149*4882a593Smuzhiyun {
150*4882a593Smuzhiyun 	struct tmp007_data *data = iio_priv(indio_dev);
151*4882a593Smuzhiyun 	int i;
152*4882a593Smuzhiyun 	u16 tmp;
153*4882a593Smuzhiyun 
154*4882a593Smuzhiyun 	if (mask == IIO_CHAN_INFO_SAMP_FREQ) {
155*4882a593Smuzhiyun 		for (i = 0; i < ARRAY_SIZE(tmp007_avgs); i++) {
156*4882a593Smuzhiyun 			if ((val == tmp007_avgs[i][0]) &&
157*4882a593Smuzhiyun 			(val2 == tmp007_avgs[i][1])) {
158*4882a593Smuzhiyun 				tmp = data->config & ~TMP007_CONFIG_CR_MASK;
159*4882a593Smuzhiyun 				tmp |= (i << TMP007_CONFIG_CR_SHIFT);
160*4882a593Smuzhiyun 
161*4882a593Smuzhiyun 				return i2c_smbus_write_word_swapped(data->client,
162*4882a593Smuzhiyun 								TMP007_CONFIG,
163*4882a593Smuzhiyun 								data->config = tmp);
164*4882a593Smuzhiyun 			}
165*4882a593Smuzhiyun 		}
166*4882a593Smuzhiyun 	}
167*4882a593Smuzhiyun 
168*4882a593Smuzhiyun 	return -EINVAL;
169*4882a593Smuzhiyun }
170*4882a593Smuzhiyun 
tmp007_interrupt_handler(int irq,void * private)171*4882a593Smuzhiyun static irqreturn_t tmp007_interrupt_handler(int irq, void *private)
172*4882a593Smuzhiyun {
173*4882a593Smuzhiyun 	struct iio_dev *indio_dev = private;
174*4882a593Smuzhiyun 	struct tmp007_data *data = iio_priv(indio_dev);
175*4882a593Smuzhiyun 	int ret;
176*4882a593Smuzhiyun 
177*4882a593Smuzhiyun 	ret = i2c_smbus_read_word_swapped(data->client, TMP007_STATUS);
178*4882a593Smuzhiyun 	if ((ret < 0) || !(ret & (TMP007_STATUS_OHF | TMP007_STATUS_OLF |
179*4882a593Smuzhiyun 				TMP007_STATUS_LHF | TMP007_STATUS_LLF)))
180*4882a593Smuzhiyun 		return IRQ_NONE;
181*4882a593Smuzhiyun 
182*4882a593Smuzhiyun 	if (ret & TMP007_STATUS_OHF)
183*4882a593Smuzhiyun 		iio_push_event(indio_dev,
184*4882a593Smuzhiyun 				IIO_MOD_EVENT_CODE(IIO_TEMP, 0,
185*4882a593Smuzhiyun 					IIO_MOD_TEMP_OBJECT,
186*4882a593Smuzhiyun 					IIO_EV_TYPE_THRESH,
187*4882a593Smuzhiyun 					IIO_EV_DIR_RISING),
188*4882a593Smuzhiyun 				iio_get_time_ns(indio_dev));
189*4882a593Smuzhiyun 
190*4882a593Smuzhiyun 	if (ret & TMP007_STATUS_OLF)
191*4882a593Smuzhiyun 		iio_push_event(indio_dev,
192*4882a593Smuzhiyun 				IIO_MOD_EVENT_CODE(IIO_TEMP, 0,
193*4882a593Smuzhiyun 					IIO_MOD_TEMP_OBJECT,
194*4882a593Smuzhiyun 					IIO_EV_TYPE_THRESH,
195*4882a593Smuzhiyun 					IIO_EV_DIR_FALLING),
196*4882a593Smuzhiyun 				iio_get_time_ns(indio_dev));
197*4882a593Smuzhiyun 
198*4882a593Smuzhiyun 	if (ret & TMP007_STATUS_LHF)
199*4882a593Smuzhiyun 		iio_push_event(indio_dev,
200*4882a593Smuzhiyun 				IIO_MOD_EVENT_CODE(IIO_TEMP, 0,
201*4882a593Smuzhiyun 					IIO_MOD_TEMP_AMBIENT,
202*4882a593Smuzhiyun 					IIO_EV_TYPE_THRESH,
203*4882a593Smuzhiyun 					IIO_EV_DIR_RISING),
204*4882a593Smuzhiyun 				iio_get_time_ns(indio_dev));
205*4882a593Smuzhiyun 
206*4882a593Smuzhiyun 	if (ret & TMP007_STATUS_LLF)
207*4882a593Smuzhiyun 		iio_push_event(indio_dev,
208*4882a593Smuzhiyun 				IIO_MOD_EVENT_CODE(IIO_TEMP, 0,
209*4882a593Smuzhiyun 					IIO_MOD_TEMP_AMBIENT,
210*4882a593Smuzhiyun 					IIO_EV_TYPE_THRESH,
211*4882a593Smuzhiyun 					IIO_EV_DIR_FALLING),
212*4882a593Smuzhiyun 				iio_get_time_ns(indio_dev));
213*4882a593Smuzhiyun 
214*4882a593Smuzhiyun 	return IRQ_HANDLED;
215*4882a593Smuzhiyun }
216*4882a593Smuzhiyun 
tmp007_write_event_config(struct iio_dev * indio_dev,const struct iio_chan_spec * chan,enum iio_event_type type,enum iio_event_direction dir,int state)217*4882a593Smuzhiyun static int tmp007_write_event_config(struct iio_dev *indio_dev,
218*4882a593Smuzhiyun 		const struct iio_chan_spec *chan, enum iio_event_type type,
219*4882a593Smuzhiyun 		enum iio_event_direction dir, int state)
220*4882a593Smuzhiyun {
221*4882a593Smuzhiyun 	struct tmp007_data *data = iio_priv(indio_dev);
222*4882a593Smuzhiyun 	unsigned int status_mask;
223*4882a593Smuzhiyun 	int ret;
224*4882a593Smuzhiyun 
225*4882a593Smuzhiyun 	switch (chan->channel2) {
226*4882a593Smuzhiyun 	case IIO_MOD_TEMP_AMBIENT:
227*4882a593Smuzhiyun 	if (dir == IIO_EV_DIR_RISING)
228*4882a593Smuzhiyun 			status_mask = TMP007_STATUS_LHF;
229*4882a593Smuzhiyun 		else
230*4882a593Smuzhiyun 			status_mask = TMP007_STATUS_LLF;
231*4882a593Smuzhiyun 		break;
232*4882a593Smuzhiyun 	case IIO_MOD_TEMP_OBJECT:
233*4882a593Smuzhiyun 		if (dir == IIO_EV_DIR_RISING)
234*4882a593Smuzhiyun 			status_mask = TMP007_STATUS_OHF;
235*4882a593Smuzhiyun 		else
236*4882a593Smuzhiyun 			status_mask = TMP007_STATUS_OLF;
237*4882a593Smuzhiyun 		break;
238*4882a593Smuzhiyun 	default:
239*4882a593Smuzhiyun 		return -EINVAL;
240*4882a593Smuzhiyun 	}
241*4882a593Smuzhiyun 
242*4882a593Smuzhiyun 	mutex_lock(&data->lock);
243*4882a593Smuzhiyun 	ret = i2c_smbus_read_word_swapped(data->client, TMP007_STATUS_MASK);
244*4882a593Smuzhiyun 	mutex_unlock(&data->lock);
245*4882a593Smuzhiyun 	if (ret < 0)
246*4882a593Smuzhiyun 		return ret;
247*4882a593Smuzhiyun 
248*4882a593Smuzhiyun 	if (state)
249*4882a593Smuzhiyun 		ret |= status_mask;
250*4882a593Smuzhiyun 	else
251*4882a593Smuzhiyun 		ret &= ~status_mask;
252*4882a593Smuzhiyun 
253*4882a593Smuzhiyun 	return i2c_smbus_write_word_swapped(data->client, TMP007_STATUS_MASK,
254*4882a593Smuzhiyun 					data->status_mask = ret);
255*4882a593Smuzhiyun }
256*4882a593Smuzhiyun 
tmp007_read_event_config(struct iio_dev * indio_dev,const struct iio_chan_spec * chan,enum iio_event_type type,enum iio_event_direction dir)257*4882a593Smuzhiyun static int tmp007_read_event_config(struct iio_dev *indio_dev,
258*4882a593Smuzhiyun 		const struct iio_chan_spec *chan, enum iio_event_type type,
259*4882a593Smuzhiyun 		enum iio_event_direction dir)
260*4882a593Smuzhiyun {
261*4882a593Smuzhiyun 	struct tmp007_data *data = iio_priv(indio_dev);
262*4882a593Smuzhiyun 	unsigned int mask;
263*4882a593Smuzhiyun 
264*4882a593Smuzhiyun 	switch (chan->channel2) {
265*4882a593Smuzhiyun 	case IIO_MOD_TEMP_AMBIENT:
266*4882a593Smuzhiyun 		if (dir == IIO_EV_DIR_RISING)
267*4882a593Smuzhiyun 			mask = TMP007_STATUS_LHF;
268*4882a593Smuzhiyun 		else
269*4882a593Smuzhiyun 			mask = TMP007_STATUS_LLF;
270*4882a593Smuzhiyun 		break;
271*4882a593Smuzhiyun 	case IIO_MOD_TEMP_OBJECT:
272*4882a593Smuzhiyun 		if (dir == IIO_EV_DIR_RISING)
273*4882a593Smuzhiyun 			mask = TMP007_STATUS_OHF;
274*4882a593Smuzhiyun 		else
275*4882a593Smuzhiyun 			mask = TMP007_STATUS_OLF;
276*4882a593Smuzhiyun 		break;
277*4882a593Smuzhiyun 	default:
278*4882a593Smuzhiyun 		return -EINVAL;
279*4882a593Smuzhiyun 	}
280*4882a593Smuzhiyun 
281*4882a593Smuzhiyun 	return !!(data->status_mask & mask);
282*4882a593Smuzhiyun }
283*4882a593Smuzhiyun 
tmp007_read_thresh(struct iio_dev * indio_dev,const struct iio_chan_spec * chan,enum iio_event_type type,enum iio_event_direction dir,enum iio_event_info info,int * val,int * val2)284*4882a593Smuzhiyun static int tmp007_read_thresh(struct iio_dev *indio_dev,
285*4882a593Smuzhiyun 		const struct iio_chan_spec *chan, enum iio_event_type type,
286*4882a593Smuzhiyun 		enum iio_event_direction dir, enum iio_event_info info,
287*4882a593Smuzhiyun 		int *val, int *val2)
288*4882a593Smuzhiyun {
289*4882a593Smuzhiyun 	struct tmp007_data *data = iio_priv(indio_dev);
290*4882a593Smuzhiyun 	int ret;
291*4882a593Smuzhiyun 	u8 reg;
292*4882a593Smuzhiyun 
293*4882a593Smuzhiyun 	switch (chan->channel2) {
294*4882a593Smuzhiyun 	case IIO_MOD_TEMP_AMBIENT: /* LSB: 0.5 degree Celsius */
295*4882a593Smuzhiyun 		if (dir == IIO_EV_DIR_RISING)
296*4882a593Smuzhiyun 			reg = TMP007_TDIE_HIGH_LIMIT;
297*4882a593Smuzhiyun 		else
298*4882a593Smuzhiyun 			reg = TMP007_TDIE_LOW_LIMIT;
299*4882a593Smuzhiyun 		break;
300*4882a593Smuzhiyun 	case IIO_MOD_TEMP_OBJECT:
301*4882a593Smuzhiyun 		if (dir == IIO_EV_DIR_RISING)
302*4882a593Smuzhiyun 			reg = TMP007_TOBJ_HIGH_LIMIT;
303*4882a593Smuzhiyun 	else
304*4882a593Smuzhiyun 			reg = TMP007_TOBJ_LOW_LIMIT;
305*4882a593Smuzhiyun 		break;
306*4882a593Smuzhiyun 	default:
307*4882a593Smuzhiyun 		return -EINVAL;
308*4882a593Smuzhiyun 	}
309*4882a593Smuzhiyun 
310*4882a593Smuzhiyun 	ret = i2c_smbus_read_word_swapped(data->client, reg);
311*4882a593Smuzhiyun 	if (ret < 0)
312*4882a593Smuzhiyun 		return ret;
313*4882a593Smuzhiyun 
314*4882a593Smuzhiyun 	/* Shift length 7 bits = 6(15:6) + 1(0.5 LSB) */
315*4882a593Smuzhiyun 	*val = sign_extend32(ret, 15) >> 7;
316*4882a593Smuzhiyun 
317*4882a593Smuzhiyun 	return IIO_VAL_INT;
318*4882a593Smuzhiyun }
319*4882a593Smuzhiyun 
tmp007_write_thresh(struct iio_dev * indio_dev,const struct iio_chan_spec * chan,enum iio_event_type type,enum iio_event_direction dir,enum iio_event_info info,int val,int val2)320*4882a593Smuzhiyun static int tmp007_write_thresh(struct iio_dev *indio_dev,
321*4882a593Smuzhiyun 		const struct iio_chan_spec *chan, enum iio_event_type type,
322*4882a593Smuzhiyun 		enum iio_event_direction dir, enum iio_event_info info,
323*4882a593Smuzhiyun 		int val, int val2)
324*4882a593Smuzhiyun {
325*4882a593Smuzhiyun 	struct tmp007_data *data = iio_priv(indio_dev);
326*4882a593Smuzhiyun 	u8 reg;
327*4882a593Smuzhiyun 
328*4882a593Smuzhiyun 	switch (chan->channel2) {
329*4882a593Smuzhiyun 	case IIO_MOD_TEMP_AMBIENT:
330*4882a593Smuzhiyun 		if (dir == IIO_EV_DIR_RISING)
331*4882a593Smuzhiyun 			reg = TMP007_TDIE_HIGH_LIMIT;
332*4882a593Smuzhiyun 		else
333*4882a593Smuzhiyun 			reg = TMP007_TDIE_LOW_LIMIT;
334*4882a593Smuzhiyun 		break;
335*4882a593Smuzhiyun 	case IIO_MOD_TEMP_OBJECT:
336*4882a593Smuzhiyun 		if (dir == IIO_EV_DIR_RISING)
337*4882a593Smuzhiyun 			reg = TMP007_TOBJ_HIGH_LIMIT;
338*4882a593Smuzhiyun 		else
339*4882a593Smuzhiyun 			reg = TMP007_TOBJ_LOW_LIMIT;
340*4882a593Smuzhiyun 		break;
341*4882a593Smuzhiyun 	default:
342*4882a593Smuzhiyun 		return -EINVAL;
343*4882a593Smuzhiyun 	}
344*4882a593Smuzhiyun 
345*4882a593Smuzhiyun 	/* Full scale threshold value is +/- 256 degree Celsius */
346*4882a593Smuzhiyun 	if (val < -256 || val > 255)
347*4882a593Smuzhiyun 		return -EINVAL;
348*4882a593Smuzhiyun 
349*4882a593Smuzhiyun 	/* Shift length 7 bits = 6(15:6) + 1(0.5 LSB) */
350*4882a593Smuzhiyun 	return i2c_smbus_write_word_swapped(data->client, reg, (val << 7));
351*4882a593Smuzhiyun }
352*4882a593Smuzhiyun 
353*4882a593Smuzhiyun static IIO_CONST_ATTR(sampling_frequency_available, "4 2 1 0.5 0.25");
354*4882a593Smuzhiyun 
355*4882a593Smuzhiyun static struct attribute *tmp007_attributes[] = {
356*4882a593Smuzhiyun 	&iio_const_attr_sampling_frequency_available.dev_attr.attr,
357*4882a593Smuzhiyun 	NULL
358*4882a593Smuzhiyun };
359*4882a593Smuzhiyun 
360*4882a593Smuzhiyun static const struct attribute_group tmp007_attribute_group = {
361*4882a593Smuzhiyun 	.attrs = tmp007_attributes,
362*4882a593Smuzhiyun };
363*4882a593Smuzhiyun 
364*4882a593Smuzhiyun static const struct iio_event_spec tmp007_obj_event[] = {
365*4882a593Smuzhiyun 	{
366*4882a593Smuzhiyun 		.type = IIO_EV_TYPE_THRESH,
367*4882a593Smuzhiyun 		.dir = IIO_EV_DIR_RISING,
368*4882a593Smuzhiyun 		.mask_separate = BIT(IIO_EV_INFO_VALUE) |
369*4882a593Smuzhiyun 			BIT(IIO_EV_INFO_ENABLE),
370*4882a593Smuzhiyun 	},
371*4882a593Smuzhiyun 	{
372*4882a593Smuzhiyun 		.type = IIO_EV_TYPE_THRESH,
373*4882a593Smuzhiyun 		.dir = IIO_EV_DIR_FALLING,
374*4882a593Smuzhiyun 		.mask_separate = BIT(IIO_EV_INFO_VALUE) |
375*4882a593Smuzhiyun 			BIT(IIO_EV_INFO_ENABLE),
376*4882a593Smuzhiyun 	},
377*4882a593Smuzhiyun };
378*4882a593Smuzhiyun 
379*4882a593Smuzhiyun static const struct iio_event_spec tmp007_die_event[] = {
380*4882a593Smuzhiyun 	{
381*4882a593Smuzhiyun 		.type = IIO_EV_TYPE_THRESH,
382*4882a593Smuzhiyun 		.dir = IIO_EV_DIR_RISING,
383*4882a593Smuzhiyun 		.mask_separate = BIT(IIO_EV_INFO_VALUE) |
384*4882a593Smuzhiyun 			BIT(IIO_EV_INFO_ENABLE),
385*4882a593Smuzhiyun 	},
386*4882a593Smuzhiyun 	{
387*4882a593Smuzhiyun 		.type = IIO_EV_TYPE_THRESH,
388*4882a593Smuzhiyun 		.dir = IIO_EV_DIR_FALLING,
389*4882a593Smuzhiyun 		.mask_separate = BIT(IIO_EV_INFO_VALUE) |
390*4882a593Smuzhiyun 			BIT(IIO_EV_INFO_ENABLE),
391*4882a593Smuzhiyun 	},
392*4882a593Smuzhiyun };
393*4882a593Smuzhiyun 
394*4882a593Smuzhiyun static const struct iio_chan_spec tmp007_channels[] = {
395*4882a593Smuzhiyun 	{
396*4882a593Smuzhiyun 		.type = IIO_TEMP,
397*4882a593Smuzhiyun 		.modified = 1,
398*4882a593Smuzhiyun 		.channel2 = IIO_MOD_TEMP_AMBIENT,
399*4882a593Smuzhiyun 		.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
400*4882a593Smuzhiyun 				BIT(IIO_CHAN_INFO_SCALE),
401*4882a593Smuzhiyun 		.info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ),
402*4882a593Smuzhiyun 		.event_spec = tmp007_die_event,
403*4882a593Smuzhiyun 		.num_event_specs = ARRAY_SIZE(tmp007_die_event),
404*4882a593Smuzhiyun 	},
405*4882a593Smuzhiyun 	{
406*4882a593Smuzhiyun 		.type = IIO_TEMP,
407*4882a593Smuzhiyun 		.modified = 1,
408*4882a593Smuzhiyun 		.channel2 = IIO_MOD_TEMP_OBJECT,
409*4882a593Smuzhiyun 		.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
410*4882a593Smuzhiyun 				BIT(IIO_CHAN_INFO_SCALE),
411*4882a593Smuzhiyun 		.info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ),
412*4882a593Smuzhiyun 		.event_spec = tmp007_obj_event,
413*4882a593Smuzhiyun 		.num_event_specs = ARRAY_SIZE(tmp007_obj_event),
414*4882a593Smuzhiyun 	}
415*4882a593Smuzhiyun };
416*4882a593Smuzhiyun 
417*4882a593Smuzhiyun static const struct iio_info tmp007_info = {
418*4882a593Smuzhiyun 	.read_raw = tmp007_read_raw,
419*4882a593Smuzhiyun 	.write_raw = tmp007_write_raw,
420*4882a593Smuzhiyun 	.read_event_config = tmp007_read_event_config,
421*4882a593Smuzhiyun 	.write_event_config = tmp007_write_event_config,
422*4882a593Smuzhiyun 	.read_event_value = tmp007_read_thresh,
423*4882a593Smuzhiyun 	.write_event_value = tmp007_write_thresh,
424*4882a593Smuzhiyun 	.attrs = &tmp007_attribute_group,
425*4882a593Smuzhiyun };
426*4882a593Smuzhiyun 
tmp007_identify(struct i2c_client * client)427*4882a593Smuzhiyun static bool tmp007_identify(struct i2c_client *client)
428*4882a593Smuzhiyun {
429*4882a593Smuzhiyun 	int manf_id, dev_id;
430*4882a593Smuzhiyun 
431*4882a593Smuzhiyun 	manf_id = i2c_smbus_read_word_swapped(client, TMP007_MANUFACTURER_ID);
432*4882a593Smuzhiyun 	if (manf_id < 0)
433*4882a593Smuzhiyun 		return false;
434*4882a593Smuzhiyun 
435*4882a593Smuzhiyun 	dev_id = i2c_smbus_read_word_swapped(client, TMP007_DEVICE_ID);
436*4882a593Smuzhiyun 	if (dev_id < 0)
437*4882a593Smuzhiyun 		return false;
438*4882a593Smuzhiyun 
439*4882a593Smuzhiyun 	return (manf_id == TMP007_MANUFACTURER_MAGIC && dev_id == TMP007_DEVICE_MAGIC);
440*4882a593Smuzhiyun }
441*4882a593Smuzhiyun 
tmp007_probe(struct i2c_client * client,const struct i2c_device_id * tmp007_id)442*4882a593Smuzhiyun static int tmp007_probe(struct i2c_client *client,
443*4882a593Smuzhiyun 			const struct i2c_device_id *tmp007_id)
444*4882a593Smuzhiyun {
445*4882a593Smuzhiyun 	struct tmp007_data *data;
446*4882a593Smuzhiyun 	struct iio_dev *indio_dev;
447*4882a593Smuzhiyun 	int ret;
448*4882a593Smuzhiyun 
449*4882a593Smuzhiyun 	if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_WORD_DATA))
450*4882a593Smuzhiyun 		return -EOPNOTSUPP;
451*4882a593Smuzhiyun 
452*4882a593Smuzhiyun 	if (!tmp007_identify(client)) {
453*4882a593Smuzhiyun 		dev_err(&client->dev, "TMP007 not found\n");
454*4882a593Smuzhiyun 		return -ENODEV;
455*4882a593Smuzhiyun 	}
456*4882a593Smuzhiyun 
457*4882a593Smuzhiyun 	indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
458*4882a593Smuzhiyun 	if (!indio_dev)
459*4882a593Smuzhiyun 		return -ENOMEM;
460*4882a593Smuzhiyun 
461*4882a593Smuzhiyun 	data = iio_priv(indio_dev);
462*4882a593Smuzhiyun 	i2c_set_clientdata(client, indio_dev);
463*4882a593Smuzhiyun 	data->client = client;
464*4882a593Smuzhiyun 	mutex_init(&data->lock);
465*4882a593Smuzhiyun 
466*4882a593Smuzhiyun 	indio_dev->name = "tmp007";
467*4882a593Smuzhiyun 	indio_dev->modes = INDIO_DIRECT_MODE;
468*4882a593Smuzhiyun 	indio_dev->info = &tmp007_info;
469*4882a593Smuzhiyun 
470*4882a593Smuzhiyun 	indio_dev->channels = tmp007_channels;
471*4882a593Smuzhiyun 	indio_dev->num_channels = ARRAY_SIZE(tmp007_channels);
472*4882a593Smuzhiyun 
473*4882a593Smuzhiyun 	/*
474*4882a593Smuzhiyun 	 * Set Configuration register:
475*4882a593Smuzhiyun 	 * 1. Conversion ON
476*4882a593Smuzhiyun 	 * 2. ALERT enable
477*4882a593Smuzhiyun 	 * 3. Transient correction enable
478*4882a593Smuzhiyun 	 */
479*4882a593Smuzhiyun 
480*4882a593Smuzhiyun 	ret = i2c_smbus_read_word_swapped(data->client, TMP007_CONFIG);
481*4882a593Smuzhiyun 	if (ret < 0)
482*4882a593Smuzhiyun 		return ret;
483*4882a593Smuzhiyun 
484*4882a593Smuzhiyun 	data->config = ret;
485*4882a593Smuzhiyun 	data->config |= (TMP007_CONFIG_CONV_EN | TMP007_CONFIG_ALERT_EN | TMP007_CONFIG_TC_EN);
486*4882a593Smuzhiyun 
487*4882a593Smuzhiyun 	ret = i2c_smbus_write_word_swapped(data->client, TMP007_CONFIG,
488*4882a593Smuzhiyun 					data->config);
489*4882a593Smuzhiyun 	if (ret < 0)
490*4882a593Smuzhiyun 		return ret;
491*4882a593Smuzhiyun 
492*4882a593Smuzhiyun 	/*
493*4882a593Smuzhiyun 	 * Only the following flags can activate ALERT pin. Data conversion/validity flags
494*4882a593Smuzhiyun 	 * flags can still be polled for getting temperature data
495*4882a593Smuzhiyun 	 *
496*4882a593Smuzhiyun 	 * Set Status Mask register:
497*4882a593Smuzhiyun 	 * 1. Object temperature high limit enable
498*4882a593Smuzhiyun 	 * 2. Object temperature low limit enable
499*4882a593Smuzhiyun 	 * 3. TDIE temperature high limit enable
500*4882a593Smuzhiyun 	 * 4. TDIE temperature low limit enable
501*4882a593Smuzhiyun 	 */
502*4882a593Smuzhiyun 
503*4882a593Smuzhiyun 	ret = i2c_smbus_read_word_swapped(data->client, TMP007_STATUS_MASK);
504*4882a593Smuzhiyun 	if (ret < 0)
505*4882a593Smuzhiyun 		goto error_powerdown;
506*4882a593Smuzhiyun 
507*4882a593Smuzhiyun 	data->status_mask = ret;
508*4882a593Smuzhiyun 	data->status_mask |= (TMP007_STATUS_OHF | TMP007_STATUS_OLF
509*4882a593Smuzhiyun 				| TMP007_STATUS_LHF | TMP007_STATUS_LLF);
510*4882a593Smuzhiyun 
511*4882a593Smuzhiyun 	ret = i2c_smbus_write_word_swapped(data->client, TMP007_STATUS_MASK, data->status_mask);
512*4882a593Smuzhiyun 	if (ret < 0)
513*4882a593Smuzhiyun 		goto error_powerdown;
514*4882a593Smuzhiyun 
515*4882a593Smuzhiyun 	if (client->irq) {
516*4882a593Smuzhiyun 		ret = devm_request_threaded_irq(&client->dev, client->irq,
517*4882a593Smuzhiyun 				NULL, tmp007_interrupt_handler,
518*4882a593Smuzhiyun 				IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
519*4882a593Smuzhiyun 				tmp007_id->name, indio_dev);
520*4882a593Smuzhiyun 		if (ret) {
521*4882a593Smuzhiyun 			dev_err(&client->dev, "irq request error %d\n", -ret);
522*4882a593Smuzhiyun 			goto error_powerdown;
523*4882a593Smuzhiyun 		}
524*4882a593Smuzhiyun 	}
525*4882a593Smuzhiyun 
526*4882a593Smuzhiyun 	return iio_device_register(indio_dev);
527*4882a593Smuzhiyun 
528*4882a593Smuzhiyun error_powerdown:
529*4882a593Smuzhiyun 	tmp007_powerdown(data);
530*4882a593Smuzhiyun 
531*4882a593Smuzhiyun 	return ret;
532*4882a593Smuzhiyun }
533*4882a593Smuzhiyun 
tmp007_remove(struct i2c_client * client)534*4882a593Smuzhiyun static int tmp007_remove(struct i2c_client *client)
535*4882a593Smuzhiyun {
536*4882a593Smuzhiyun 	struct iio_dev *indio_dev = i2c_get_clientdata(client);
537*4882a593Smuzhiyun 	struct tmp007_data *data = iio_priv(indio_dev);
538*4882a593Smuzhiyun 
539*4882a593Smuzhiyun 	iio_device_unregister(indio_dev);
540*4882a593Smuzhiyun 	tmp007_powerdown(data);
541*4882a593Smuzhiyun 
542*4882a593Smuzhiyun 	return 0;
543*4882a593Smuzhiyun }
544*4882a593Smuzhiyun 
545*4882a593Smuzhiyun #ifdef CONFIG_PM_SLEEP
tmp007_suspend(struct device * dev)546*4882a593Smuzhiyun static int tmp007_suspend(struct device *dev)
547*4882a593Smuzhiyun {
548*4882a593Smuzhiyun 	struct tmp007_data *data = iio_priv(i2c_get_clientdata(
549*4882a593Smuzhiyun 			to_i2c_client(dev)));
550*4882a593Smuzhiyun 
551*4882a593Smuzhiyun 	return tmp007_powerdown(data);
552*4882a593Smuzhiyun }
553*4882a593Smuzhiyun 
tmp007_resume(struct device * dev)554*4882a593Smuzhiyun static int tmp007_resume(struct device *dev)
555*4882a593Smuzhiyun {
556*4882a593Smuzhiyun 	struct tmp007_data *data = iio_priv(i2c_get_clientdata(
557*4882a593Smuzhiyun 			to_i2c_client(dev)));
558*4882a593Smuzhiyun 
559*4882a593Smuzhiyun 	return i2c_smbus_write_word_swapped(data->client, TMP007_CONFIG,
560*4882a593Smuzhiyun 			data->config | TMP007_CONFIG_CONV_EN);
561*4882a593Smuzhiyun }
562*4882a593Smuzhiyun #endif
563*4882a593Smuzhiyun 
564*4882a593Smuzhiyun static SIMPLE_DEV_PM_OPS(tmp007_pm_ops, tmp007_suspend, tmp007_resume);
565*4882a593Smuzhiyun 
566*4882a593Smuzhiyun static const struct of_device_id tmp007_of_match[] = {
567*4882a593Smuzhiyun 	{ .compatible = "ti,tmp007", },
568*4882a593Smuzhiyun 	{ },
569*4882a593Smuzhiyun };
570*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, tmp007_of_match);
571*4882a593Smuzhiyun 
572*4882a593Smuzhiyun static const struct i2c_device_id tmp007_id[] = {
573*4882a593Smuzhiyun 	{ "tmp007", 0 },
574*4882a593Smuzhiyun 	{ }
575*4882a593Smuzhiyun };
576*4882a593Smuzhiyun MODULE_DEVICE_TABLE(i2c, tmp007_id);
577*4882a593Smuzhiyun 
578*4882a593Smuzhiyun static struct i2c_driver tmp007_driver = {
579*4882a593Smuzhiyun 	.driver = {
580*4882a593Smuzhiyun 		.name	= "tmp007",
581*4882a593Smuzhiyun 		.of_match_table = tmp007_of_match,
582*4882a593Smuzhiyun 		.pm	= &tmp007_pm_ops,
583*4882a593Smuzhiyun 	},
584*4882a593Smuzhiyun 	.probe		= tmp007_probe,
585*4882a593Smuzhiyun 	.remove		= tmp007_remove,
586*4882a593Smuzhiyun 	.id_table	= tmp007_id,
587*4882a593Smuzhiyun };
588*4882a593Smuzhiyun module_i2c_driver(tmp007_driver);
589*4882a593Smuzhiyun 
590*4882a593Smuzhiyun MODULE_AUTHOR("Manivannan Sadhasivam <manivannanece23@gmail.com>");
591*4882a593Smuzhiyun MODULE_DESCRIPTION("TI TMP007 IR thermopile sensor driver");
592*4882a593Smuzhiyun MODULE_LICENSE("GPL");
593