xref: /OK3568_Linux_fs/kernel/drivers/iio/proximity/rfd77402.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * rfd77402.c - Support for RF Digital RFD77402 Time-of-Flight (distance) sensor
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright 2017 Peter Meerwald-Stadler <pmeerw@pmeerw.net>
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * 7-bit I2C slave address 0x4c
8*4882a593Smuzhiyun  *
9*4882a593Smuzhiyun  * TODO: interrupt
10*4882a593Smuzhiyun  * https://media.digikey.com/pdf/Data%20Sheets/RF%20Digital%20PDFs/RFD77402.pdf
11*4882a593Smuzhiyun  */
12*4882a593Smuzhiyun 
13*4882a593Smuzhiyun #include <linux/module.h>
14*4882a593Smuzhiyun #include <linux/i2c.h>
15*4882a593Smuzhiyun #include <linux/delay.h>
16*4882a593Smuzhiyun 
17*4882a593Smuzhiyun #include <linux/iio/iio.h>
18*4882a593Smuzhiyun 
19*4882a593Smuzhiyun #define RFD77402_DRV_NAME "rfd77402"
20*4882a593Smuzhiyun 
21*4882a593Smuzhiyun #define RFD77402_ICSR		0x00 /* Interrupt Control Status Register */
22*4882a593Smuzhiyun #define RFD77402_ICSR_INT_MODE	BIT(2)
23*4882a593Smuzhiyun #define RFD77402_ICSR_INT_POL	BIT(3)
24*4882a593Smuzhiyun #define RFD77402_ICSR_RESULT	BIT(4)
25*4882a593Smuzhiyun #define RFD77402_ICSR_M2H_MSG	BIT(5)
26*4882a593Smuzhiyun #define RFD77402_ICSR_H2M_MSG	BIT(6)
27*4882a593Smuzhiyun #define RFD77402_ICSR_RESET	BIT(7)
28*4882a593Smuzhiyun 
29*4882a593Smuzhiyun #define RFD77402_CMD_R		0x04
30*4882a593Smuzhiyun #define RFD77402_CMD_SINGLE	0x01
31*4882a593Smuzhiyun #define RFD77402_CMD_STANDBY	0x10
32*4882a593Smuzhiyun #define RFD77402_CMD_MCPU_OFF	0x11
33*4882a593Smuzhiyun #define RFD77402_CMD_MCPU_ON	0x12
34*4882a593Smuzhiyun #define RFD77402_CMD_RESET	BIT(6)
35*4882a593Smuzhiyun #define RFD77402_CMD_VALID	BIT(7)
36*4882a593Smuzhiyun 
37*4882a593Smuzhiyun #define RFD77402_STATUS_R	0x06
38*4882a593Smuzhiyun #define RFD77402_STATUS_PM_MASK	GENMASK(4, 0)
39*4882a593Smuzhiyun #define RFD77402_STATUS_STANDBY	0x00
40*4882a593Smuzhiyun #define RFD77402_STATUS_MCPU_OFF	0x10
41*4882a593Smuzhiyun #define RFD77402_STATUS_MCPU_ON	0x18
42*4882a593Smuzhiyun 
43*4882a593Smuzhiyun #define RFD77402_RESULT_R	0x08
44*4882a593Smuzhiyun #define RFD77402_RESULT_DIST_MASK	GENMASK(12, 2)
45*4882a593Smuzhiyun #define RFD77402_RESULT_ERR_MASK	GENMASK(14, 13)
46*4882a593Smuzhiyun #define RFD77402_RESULT_VALID	BIT(15)
47*4882a593Smuzhiyun 
48*4882a593Smuzhiyun #define RFD77402_PMU_CFG	0x14
49*4882a593Smuzhiyun #define RFD77402_PMU_MCPU_INIT	BIT(9)
50*4882a593Smuzhiyun 
51*4882a593Smuzhiyun #define RFD77402_I2C_INIT_CFG	0x1c
52*4882a593Smuzhiyun #define RFD77402_I2C_ADDR_INCR	BIT(0)
53*4882a593Smuzhiyun #define RFD77402_I2C_DATA_INCR	BIT(2)
54*4882a593Smuzhiyun #define RFD77402_I2C_HOST_DEBUG	BIT(5)
55*4882a593Smuzhiyun #define RFD77402_I2C_MCPU_DEBUG	BIT(6)
56*4882a593Smuzhiyun 
57*4882a593Smuzhiyun #define RFD77402_CMD_CFGR_A	0x0c
58*4882a593Smuzhiyun #define RFD77402_CMD_CFGR_B	0x0e
59*4882a593Smuzhiyun #define RFD77402_HFCFG_0	0x20
60*4882a593Smuzhiyun #define RFD77402_HFCFG_1	0x22
61*4882a593Smuzhiyun #define RFD77402_HFCFG_2	0x24
62*4882a593Smuzhiyun #define RFD77402_HFCFG_3	0x26
63*4882a593Smuzhiyun 
64*4882a593Smuzhiyun #define RFD77402_MOD_CHIP_ID	0x28
65*4882a593Smuzhiyun 
66*4882a593Smuzhiyun /* magic configuration values from datasheet */
67*4882a593Smuzhiyun static const struct {
68*4882a593Smuzhiyun 	u8 reg;
69*4882a593Smuzhiyun 	u16 val;
70*4882a593Smuzhiyun } rf77402_tof_config[] = {
71*4882a593Smuzhiyun 	{RFD77402_CMD_CFGR_A,	0xe100},
72*4882a593Smuzhiyun 	{RFD77402_CMD_CFGR_B,	0x10ff},
73*4882a593Smuzhiyun 	{RFD77402_HFCFG_0,	0x07d0},
74*4882a593Smuzhiyun 	{RFD77402_HFCFG_1,	0x5008},
75*4882a593Smuzhiyun 	{RFD77402_HFCFG_2,	0xa041},
76*4882a593Smuzhiyun 	{RFD77402_HFCFG_3,	0x45d4},
77*4882a593Smuzhiyun };
78*4882a593Smuzhiyun 
79*4882a593Smuzhiyun struct rfd77402_data {
80*4882a593Smuzhiyun 	struct i2c_client *client;
81*4882a593Smuzhiyun 	/* Serialize reads from the sensor */
82*4882a593Smuzhiyun 	struct mutex lock;
83*4882a593Smuzhiyun };
84*4882a593Smuzhiyun 
85*4882a593Smuzhiyun static const struct iio_chan_spec rfd77402_channels[] = {
86*4882a593Smuzhiyun 	{
87*4882a593Smuzhiyun 		.type = IIO_DISTANCE,
88*4882a593Smuzhiyun 		.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
89*4882a593Smuzhiyun 				      BIT(IIO_CHAN_INFO_SCALE),
90*4882a593Smuzhiyun 	},
91*4882a593Smuzhiyun };
92*4882a593Smuzhiyun 
rfd77402_set_state(struct rfd77402_data * data,u8 state,u16 check)93*4882a593Smuzhiyun static int rfd77402_set_state(struct rfd77402_data *data, u8 state, u16 check)
94*4882a593Smuzhiyun {
95*4882a593Smuzhiyun 	int ret;
96*4882a593Smuzhiyun 
97*4882a593Smuzhiyun 	ret = i2c_smbus_write_byte_data(data->client, RFD77402_CMD_R,
98*4882a593Smuzhiyun 					state | RFD77402_CMD_VALID);
99*4882a593Smuzhiyun 	if (ret < 0)
100*4882a593Smuzhiyun 		return ret;
101*4882a593Smuzhiyun 
102*4882a593Smuzhiyun 	usleep_range(10000, 20000);
103*4882a593Smuzhiyun 
104*4882a593Smuzhiyun 	ret = i2c_smbus_read_word_data(data->client, RFD77402_STATUS_R);
105*4882a593Smuzhiyun 	if (ret < 0)
106*4882a593Smuzhiyun 		return ret;
107*4882a593Smuzhiyun 	if ((ret & RFD77402_STATUS_PM_MASK) != check)
108*4882a593Smuzhiyun 		return -ENODEV;
109*4882a593Smuzhiyun 
110*4882a593Smuzhiyun 	return 0;
111*4882a593Smuzhiyun }
112*4882a593Smuzhiyun 
rfd77402_measure(struct rfd77402_data * data)113*4882a593Smuzhiyun static int rfd77402_measure(struct rfd77402_data *data)
114*4882a593Smuzhiyun {
115*4882a593Smuzhiyun 	int ret;
116*4882a593Smuzhiyun 	int tries = 10;
117*4882a593Smuzhiyun 
118*4882a593Smuzhiyun 	ret = rfd77402_set_state(data, RFD77402_CMD_MCPU_ON,
119*4882a593Smuzhiyun 				 RFD77402_STATUS_MCPU_ON);
120*4882a593Smuzhiyun 	if (ret < 0)
121*4882a593Smuzhiyun 		return ret;
122*4882a593Smuzhiyun 
123*4882a593Smuzhiyun 	ret = i2c_smbus_write_byte_data(data->client, RFD77402_CMD_R,
124*4882a593Smuzhiyun 					RFD77402_CMD_SINGLE |
125*4882a593Smuzhiyun 					RFD77402_CMD_VALID);
126*4882a593Smuzhiyun 	if (ret < 0)
127*4882a593Smuzhiyun 		goto err;
128*4882a593Smuzhiyun 
129*4882a593Smuzhiyun 	while (tries-- > 0) {
130*4882a593Smuzhiyun 		ret = i2c_smbus_read_byte_data(data->client, RFD77402_ICSR);
131*4882a593Smuzhiyun 		if (ret < 0)
132*4882a593Smuzhiyun 			goto err;
133*4882a593Smuzhiyun 		if (ret & RFD77402_ICSR_RESULT)
134*4882a593Smuzhiyun 			break;
135*4882a593Smuzhiyun 		msleep(20);
136*4882a593Smuzhiyun 	}
137*4882a593Smuzhiyun 
138*4882a593Smuzhiyun 	if (tries < 0) {
139*4882a593Smuzhiyun 		ret = -ETIMEDOUT;
140*4882a593Smuzhiyun 		goto err;
141*4882a593Smuzhiyun 	}
142*4882a593Smuzhiyun 
143*4882a593Smuzhiyun 	ret = i2c_smbus_read_word_data(data->client, RFD77402_RESULT_R);
144*4882a593Smuzhiyun 	if (ret < 0)
145*4882a593Smuzhiyun 		goto err;
146*4882a593Smuzhiyun 
147*4882a593Smuzhiyun 	if ((ret & RFD77402_RESULT_ERR_MASK) ||
148*4882a593Smuzhiyun 	    !(ret & RFD77402_RESULT_VALID)) {
149*4882a593Smuzhiyun 		ret = -EIO;
150*4882a593Smuzhiyun 		goto err;
151*4882a593Smuzhiyun 	}
152*4882a593Smuzhiyun 
153*4882a593Smuzhiyun 	return (ret & RFD77402_RESULT_DIST_MASK) >> 2;
154*4882a593Smuzhiyun 
155*4882a593Smuzhiyun err:
156*4882a593Smuzhiyun 	rfd77402_set_state(data, RFD77402_CMD_MCPU_OFF,
157*4882a593Smuzhiyun 			   RFD77402_STATUS_MCPU_OFF);
158*4882a593Smuzhiyun 	return ret;
159*4882a593Smuzhiyun }
160*4882a593Smuzhiyun 
rfd77402_read_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int * val,int * val2,long mask)161*4882a593Smuzhiyun static int rfd77402_read_raw(struct iio_dev *indio_dev,
162*4882a593Smuzhiyun 			     struct iio_chan_spec const *chan,
163*4882a593Smuzhiyun 			     int *val, int *val2, long mask)
164*4882a593Smuzhiyun {
165*4882a593Smuzhiyun 	struct rfd77402_data *data = iio_priv(indio_dev);
166*4882a593Smuzhiyun 	int ret;
167*4882a593Smuzhiyun 
168*4882a593Smuzhiyun 	switch (mask) {
169*4882a593Smuzhiyun 	case IIO_CHAN_INFO_RAW:
170*4882a593Smuzhiyun 		mutex_lock(&data->lock);
171*4882a593Smuzhiyun 		ret = rfd77402_measure(data);
172*4882a593Smuzhiyun 		mutex_unlock(&data->lock);
173*4882a593Smuzhiyun 		if (ret < 0)
174*4882a593Smuzhiyun 			return ret;
175*4882a593Smuzhiyun 		*val = ret;
176*4882a593Smuzhiyun 		return IIO_VAL_INT;
177*4882a593Smuzhiyun 	case IIO_CHAN_INFO_SCALE:
178*4882a593Smuzhiyun 		/* 1 LSB is 1 mm */
179*4882a593Smuzhiyun 		*val = 0;
180*4882a593Smuzhiyun 		*val2 = 1000;
181*4882a593Smuzhiyun 		return IIO_VAL_INT_PLUS_MICRO;
182*4882a593Smuzhiyun 	default:
183*4882a593Smuzhiyun 		return -EINVAL;
184*4882a593Smuzhiyun 	}
185*4882a593Smuzhiyun }
186*4882a593Smuzhiyun 
187*4882a593Smuzhiyun static const struct iio_info rfd77402_info = {
188*4882a593Smuzhiyun 	.read_raw = rfd77402_read_raw,
189*4882a593Smuzhiyun };
190*4882a593Smuzhiyun 
rfd77402_init(struct rfd77402_data * data)191*4882a593Smuzhiyun static int rfd77402_init(struct rfd77402_data *data)
192*4882a593Smuzhiyun {
193*4882a593Smuzhiyun 	int ret, i;
194*4882a593Smuzhiyun 
195*4882a593Smuzhiyun 	ret = rfd77402_set_state(data, RFD77402_CMD_STANDBY,
196*4882a593Smuzhiyun 				 RFD77402_STATUS_STANDBY);
197*4882a593Smuzhiyun 	if (ret < 0)
198*4882a593Smuzhiyun 		return ret;
199*4882a593Smuzhiyun 
200*4882a593Smuzhiyun 	/* configure INT pad as push-pull, active low */
201*4882a593Smuzhiyun 	ret = i2c_smbus_write_byte_data(data->client, RFD77402_ICSR,
202*4882a593Smuzhiyun 					RFD77402_ICSR_INT_MODE);
203*4882a593Smuzhiyun 	if (ret < 0)
204*4882a593Smuzhiyun 		return ret;
205*4882a593Smuzhiyun 
206*4882a593Smuzhiyun 	/* I2C configuration */
207*4882a593Smuzhiyun 	ret = i2c_smbus_write_word_data(data->client, RFD77402_I2C_INIT_CFG,
208*4882a593Smuzhiyun 					RFD77402_I2C_ADDR_INCR |
209*4882a593Smuzhiyun 					RFD77402_I2C_DATA_INCR |
210*4882a593Smuzhiyun 					RFD77402_I2C_HOST_DEBUG	|
211*4882a593Smuzhiyun 					RFD77402_I2C_MCPU_DEBUG);
212*4882a593Smuzhiyun 	if (ret < 0)
213*4882a593Smuzhiyun 		return ret;
214*4882a593Smuzhiyun 
215*4882a593Smuzhiyun 	/* set initialization */
216*4882a593Smuzhiyun 	ret = i2c_smbus_write_word_data(data->client, RFD77402_PMU_CFG, 0x0500);
217*4882a593Smuzhiyun 	if (ret < 0)
218*4882a593Smuzhiyun 		return ret;
219*4882a593Smuzhiyun 
220*4882a593Smuzhiyun 	ret = rfd77402_set_state(data, RFD77402_CMD_MCPU_OFF,
221*4882a593Smuzhiyun 				 RFD77402_STATUS_MCPU_OFF);
222*4882a593Smuzhiyun 	if (ret < 0)
223*4882a593Smuzhiyun 		return ret;
224*4882a593Smuzhiyun 
225*4882a593Smuzhiyun 	/* set initialization */
226*4882a593Smuzhiyun 	ret = i2c_smbus_write_word_data(data->client, RFD77402_PMU_CFG, 0x0600);
227*4882a593Smuzhiyun 	if (ret < 0)
228*4882a593Smuzhiyun 		return ret;
229*4882a593Smuzhiyun 
230*4882a593Smuzhiyun 	ret = rfd77402_set_state(data, RFD77402_CMD_MCPU_ON,
231*4882a593Smuzhiyun 				 RFD77402_STATUS_MCPU_ON);
232*4882a593Smuzhiyun 	if (ret < 0)
233*4882a593Smuzhiyun 		return ret;
234*4882a593Smuzhiyun 
235*4882a593Smuzhiyun 	for (i = 0; i < ARRAY_SIZE(rf77402_tof_config); i++) {
236*4882a593Smuzhiyun 		ret = i2c_smbus_write_word_data(data->client,
237*4882a593Smuzhiyun 						rf77402_tof_config[i].reg,
238*4882a593Smuzhiyun 						rf77402_tof_config[i].val);
239*4882a593Smuzhiyun 		if (ret < 0)
240*4882a593Smuzhiyun 			return ret;
241*4882a593Smuzhiyun 	}
242*4882a593Smuzhiyun 
243*4882a593Smuzhiyun 	ret = rfd77402_set_state(data, RFD77402_CMD_STANDBY,
244*4882a593Smuzhiyun 				 RFD77402_STATUS_STANDBY);
245*4882a593Smuzhiyun 
246*4882a593Smuzhiyun 	return ret;
247*4882a593Smuzhiyun }
248*4882a593Smuzhiyun 
rfd77402_powerdown(struct rfd77402_data * data)249*4882a593Smuzhiyun static int rfd77402_powerdown(struct rfd77402_data *data)
250*4882a593Smuzhiyun {
251*4882a593Smuzhiyun 	return rfd77402_set_state(data, RFD77402_CMD_STANDBY,
252*4882a593Smuzhiyun 				  RFD77402_STATUS_STANDBY);
253*4882a593Smuzhiyun }
254*4882a593Smuzhiyun 
rfd77402_probe(struct i2c_client * client,const struct i2c_device_id * id)255*4882a593Smuzhiyun static int rfd77402_probe(struct i2c_client *client,
256*4882a593Smuzhiyun 			  const struct i2c_device_id *id)
257*4882a593Smuzhiyun {
258*4882a593Smuzhiyun 	struct rfd77402_data *data;
259*4882a593Smuzhiyun 	struct iio_dev *indio_dev;
260*4882a593Smuzhiyun 	int ret;
261*4882a593Smuzhiyun 
262*4882a593Smuzhiyun 	ret = i2c_smbus_read_word_data(client, RFD77402_MOD_CHIP_ID);
263*4882a593Smuzhiyun 	if (ret < 0)
264*4882a593Smuzhiyun 		return ret;
265*4882a593Smuzhiyun 	if (ret != 0xad01 && ret != 0xad02) /* known chip ids */
266*4882a593Smuzhiyun 		return -ENODEV;
267*4882a593Smuzhiyun 
268*4882a593Smuzhiyun 	indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
269*4882a593Smuzhiyun 	if (!indio_dev)
270*4882a593Smuzhiyun 		return -ENOMEM;
271*4882a593Smuzhiyun 
272*4882a593Smuzhiyun 	data = iio_priv(indio_dev);
273*4882a593Smuzhiyun 	i2c_set_clientdata(client, indio_dev);
274*4882a593Smuzhiyun 	data->client = client;
275*4882a593Smuzhiyun 	mutex_init(&data->lock);
276*4882a593Smuzhiyun 
277*4882a593Smuzhiyun 	indio_dev->info = &rfd77402_info;
278*4882a593Smuzhiyun 	indio_dev->channels = rfd77402_channels;
279*4882a593Smuzhiyun 	indio_dev->num_channels = ARRAY_SIZE(rfd77402_channels);
280*4882a593Smuzhiyun 	indio_dev->name = RFD77402_DRV_NAME;
281*4882a593Smuzhiyun 	indio_dev->modes = INDIO_DIRECT_MODE;
282*4882a593Smuzhiyun 
283*4882a593Smuzhiyun 	ret = rfd77402_init(data);
284*4882a593Smuzhiyun 	if (ret < 0)
285*4882a593Smuzhiyun 		return ret;
286*4882a593Smuzhiyun 
287*4882a593Smuzhiyun 	ret = iio_device_register(indio_dev);
288*4882a593Smuzhiyun 	if (ret)
289*4882a593Smuzhiyun 		goto err_powerdown;
290*4882a593Smuzhiyun 
291*4882a593Smuzhiyun 	return 0;
292*4882a593Smuzhiyun 
293*4882a593Smuzhiyun err_powerdown:
294*4882a593Smuzhiyun 	rfd77402_powerdown(data);
295*4882a593Smuzhiyun 	return ret;
296*4882a593Smuzhiyun }
297*4882a593Smuzhiyun 
rfd77402_remove(struct i2c_client * client)298*4882a593Smuzhiyun static int rfd77402_remove(struct i2c_client *client)
299*4882a593Smuzhiyun {
300*4882a593Smuzhiyun 	struct iio_dev *indio_dev = i2c_get_clientdata(client);
301*4882a593Smuzhiyun 
302*4882a593Smuzhiyun 	iio_device_unregister(indio_dev);
303*4882a593Smuzhiyun 	rfd77402_powerdown(iio_priv(indio_dev));
304*4882a593Smuzhiyun 
305*4882a593Smuzhiyun 	return 0;
306*4882a593Smuzhiyun }
307*4882a593Smuzhiyun 
308*4882a593Smuzhiyun #ifdef CONFIG_PM_SLEEP
rfd77402_suspend(struct device * dev)309*4882a593Smuzhiyun static int rfd77402_suspend(struct device *dev)
310*4882a593Smuzhiyun {
311*4882a593Smuzhiyun 	struct rfd77402_data *data = iio_priv(i2c_get_clientdata(
312*4882a593Smuzhiyun 				     to_i2c_client(dev)));
313*4882a593Smuzhiyun 
314*4882a593Smuzhiyun 	return rfd77402_powerdown(data);
315*4882a593Smuzhiyun }
316*4882a593Smuzhiyun 
rfd77402_resume(struct device * dev)317*4882a593Smuzhiyun static int rfd77402_resume(struct device *dev)
318*4882a593Smuzhiyun {
319*4882a593Smuzhiyun 	struct rfd77402_data *data = iio_priv(i2c_get_clientdata(
320*4882a593Smuzhiyun 				     to_i2c_client(dev)));
321*4882a593Smuzhiyun 
322*4882a593Smuzhiyun 	return rfd77402_init(data);
323*4882a593Smuzhiyun }
324*4882a593Smuzhiyun #endif
325*4882a593Smuzhiyun 
326*4882a593Smuzhiyun static SIMPLE_DEV_PM_OPS(rfd77402_pm_ops, rfd77402_suspend, rfd77402_resume);
327*4882a593Smuzhiyun 
328*4882a593Smuzhiyun static const struct i2c_device_id rfd77402_id[] = {
329*4882a593Smuzhiyun 	{ "rfd77402", 0},
330*4882a593Smuzhiyun 	{ }
331*4882a593Smuzhiyun };
332*4882a593Smuzhiyun MODULE_DEVICE_TABLE(i2c, rfd77402_id);
333*4882a593Smuzhiyun 
334*4882a593Smuzhiyun static struct i2c_driver rfd77402_driver = {
335*4882a593Smuzhiyun 	.driver = {
336*4882a593Smuzhiyun 		.name   = RFD77402_DRV_NAME,
337*4882a593Smuzhiyun 		.pm     = &rfd77402_pm_ops,
338*4882a593Smuzhiyun 	},
339*4882a593Smuzhiyun 	.probe  = rfd77402_probe,
340*4882a593Smuzhiyun 	.remove = rfd77402_remove,
341*4882a593Smuzhiyun 	.id_table = rfd77402_id,
342*4882a593Smuzhiyun };
343*4882a593Smuzhiyun 
344*4882a593Smuzhiyun module_i2c_driver(rfd77402_driver);
345*4882a593Smuzhiyun 
346*4882a593Smuzhiyun MODULE_AUTHOR("Peter Meerwald-Stadler <pmeerw@pmeerw.net>");
347*4882a593Smuzhiyun MODULE_DESCRIPTION("RFD77402 Time-of-Flight sensor driver");
348*4882a593Smuzhiyun MODULE_LICENSE("GPL");
349