1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0+
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * as3935.c - Support for AS3935 Franklin lightning sensor
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2014, 2017-2018
6*4882a593Smuzhiyun * Author: Matt Ranostay <matt.ranostay@konsulko.com>
7*4882a593Smuzhiyun */
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun #include <linux/module.h>
10*4882a593Smuzhiyun #include <linux/mod_devicetable.h>
11*4882a593Smuzhiyun #include <linux/init.h>
12*4882a593Smuzhiyun #include <linux/interrupt.h>
13*4882a593Smuzhiyun #include <linux/delay.h>
14*4882a593Smuzhiyun #include <linux/workqueue.h>
15*4882a593Smuzhiyun #include <linux/mutex.h>
16*4882a593Smuzhiyun #include <linux/err.h>
17*4882a593Smuzhiyun #include <linux/irq.h>
18*4882a593Smuzhiyun #include <linux/spi/spi.h>
19*4882a593Smuzhiyun #include <linux/iio/iio.h>
20*4882a593Smuzhiyun #include <linux/iio/sysfs.h>
21*4882a593Smuzhiyun #include <linux/iio/trigger.h>
22*4882a593Smuzhiyun #include <linux/iio/trigger_consumer.h>
23*4882a593Smuzhiyun #include <linux/iio/buffer.h>
24*4882a593Smuzhiyun #include <linux/iio/triggered_buffer.h>
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun #define AS3935_AFE_GAIN 0x00
27*4882a593Smuzhiyun #define AS3935_AFE_MASK 0x3F
28*4882a593Smuzhiyun #define AS3935_AFE_GAIN_MAX 0x1F
29*4882a593Smuzhiyun #define AS3935_AFE_PWR_BIT BIT(0)
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun #define AS3935_NFLWDTH 0x01
32*4882a593Smuzhiyun #define AS3935_NFLWDTH_MASK 0x7f
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun #define AS3935_INT 0x03
35*4882a593Smuzhiyun #define AS3935_INT_MASK 0x0f
36*4882a593Smuzhiyun #define AS3935_DISTURB_INT BIT(2)
37*4882a593Smuzhiyun #define AS3935_EVENT_INT BIT(3)
38*4882a593Smuzhiyun #define AS3935_NOISE_INT BIT(0)
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun #define AS3935_DATA 0x07
41*4882a593Smuzhiyun #define AS3935_DATA_MASK 0x3F
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun #define AS3935_TUNE_CAP 0x08
44*4882a593Smuzhiyun #define AS3935_DEFAULTS 0x3C
45*4882a593Smuzhiyun #define AS3935_CALIBRATE 0x3D
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun #define AS3935_READ_DATA BIT(14)
48*4882a593Smuzhiyun #define AS3935_ADDRESS(x) ((x) << 8)
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun #define MAX_PF_CAP 120
51*4882a593Smuzhiyun #define TUNE_CAP_DIV 8
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun struct as3935_state {
54*4882a593Smuzhiyun struct spi_device *spi;
55*4882a593Smuzhiyun struct iio_trigger *trig;
56*4882a593Smuzhiyun struct mutex lock;
57*4882a593Smuzhiyun struct delayed_work work;
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun unsigned long noise_tripped;
60*4882a593Smuzhiyun u32 tune_cap;
61*4882a593Smuzhiyun u32 nflwdth_reg;
62*4882a593Smuzhiyun /* Ensure timestamp is naturally aligned */
63*4882a593Smuzhiyun struct {
64*4882a593Smuzhiyun u8 chan;
65*4882a593Smuzhiyun s64 timestamp __aligned(8);
66*4882a593Smuzhiyun } scan;
67*4882a593Smuzhiyun u8 buf[2] ____cacheline_aligned;
68*4882a593Smuzhiyun };
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun static const struct iio_chan_spec as3935_channels[] = {
71*4882a593Smuzhiyun {
72*4882a593Smuzhiyun .type = IIO_PROXIMITY,
73*4882a593Smuzhiyun .info_mask_separate =
74*4882a593Smuzhiyun BIT(IIO_CHAN_INFO_RAW) |
75*4882a593Smuzhiyun BIT(IIO_CHAN_INFO_PROCESSED) |
76*4882a593Smuzhiyun BIT(IIO_CHAN_INFO_SCALE),
77*4882a593Smuzhiyun .scan_index = 0,
78*4882a593Smuzhiyun .scan_type = {
79*4882a593Smuzhiyun .sign = 'u',
80*4882a593Smuzhiyun .realbits = 6,
81*4882a593Smuzhiyun .storagebits = 8,
82*4882a593Smuzhiyun },
83*4882a593Smuzhiyun },
84*4882a593Smuzhiyun IIO_CHAN_SOFT_TIMESTAMP(1),
85*4882a593Smuzhiyun };
86*4882a593Smuzhiyun
as3935_read(struct as3935_state * st,unsigned int reg,int * val)87*4882a593Smuzhiyun static int as3935_read(struct as3935_state *st, unsigned int reg, int *val)
88*4882a593Smuzhiyun {
89*4882a593Smuzhiyun u8 cmd;
90*4882a593Smuzhiyun int ret;
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun cmd = (AS3935_READ_DATA | AS3935_ADDRESS(reg)) >> 8;
93*4882a593Smuzhiyun ret = spi_w8r8(st->spi, cmd);
94*4882a593Smuzhiyun if (ret < 0)
95*4882a593Smuzhiyun return ret;
96*4882a593Smuzhiyun *val = ret;
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun return 0;
99*4882a593Smuzhiyun }
100*4882a593Smuzhiyun
as3935_write(struct as3935_state * st,unsigned int reg,unsigned int val)101*4882a593Smuzhiyun static int as3935_write(struct as3935_state *st,
102*4882a593Smuzhiyun unsigned int reg,
103*4882a593Smuzhiyun unsigned int val)
104*4882a593Smuzhiyun {
105*4882a593Smuzhiyun u8 *buf = st->buf;
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun buf[0] = AS3935_ADDRESS(reg) >> 8;
108*4882a593Smuzhiyun buf[1] = val;
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun return spi_write(st->spi, buf, 2);
111*4882a593Smuzhiyun }
112*4882a593Smuzhiyun
as3935_sensor_sensitivity_show(struct device * dev,struct device_attribute * attr,char * buf)113*4882a593Smuzhiyun static ssize_t as3935_sensor_sensitivity_show(struct device *dev,
114*4882a593Smuzhiyun struct device_attribute *attr,
115*4882a593Smuzhiyun char *buf)
116*4882a593Smuzhiyun {
117*4882a593Smuzhiyun struct as3935_state *st = iio_priv(dev_to_iio_dev(dev));
118*4882a593Smuzhiyun int val, ret;
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun ret = as3935_read(st, AS3935_AFE_GAIN, &val);
121*4882a593Smuzhiyun if (ret)
122*4882a593Smuzhiyun return ret;
123*4882a593Smuzhiyun val = (val & AS3935_AFE_MASK) >> 1;
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun return sprintf(buf, "%d\n", val);
126*4882a593Smuzhiyun }
127*4882a593Smuzhiyun
as3935_sensor_sensitivity_store(struct device * dev,struct device_attribute * attr,const char * buf,size_t len)128*4882a593Smuzhiyun static ssize_t as3935_sensor_sensitivity_store(struct device *dev,
129*4882a593Smuzhiyun struct device_attribute *attr,
130*4882a593Smuzhiyun const char *buf, size_t len)
131*4882a593Smuzhiyun {
132*4882a593Smuzhiyun struct as3935_state *st = iio_priv(dev_to_iio_dev(dev));
133*4882a593Smuzhiyun unsigned long val;
134*4882a593Smuzhiyun int ret;
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun ret = kstrtoul((const char *) buf, 10, &val);
137*4882a593Smuzhiyun if (ret)
138*4882a593Smuzhiyun return -EINVAL;
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun if (val > AS3935_AFE_GAIN_MAX)
141*4882a593Smuzhiyun return -EINVAL;
142*4882a593Smuzhiyun
143*4882a593Smuzhiyun as3935_write(st, AS3935_AFE_GAIN, val << 1);
144*4882a593Smuzhiyun
145*4882a593Smuzhiyun return len;
146*4882a593Smuzhiyun }
147*4882a593Smuzhiyun
as3935_noise_level_tripped_show(struct device * dev,struct device_attribute * attr,char * buf)148*4882a593Smuzhiyun static ssize_t as3935_noise_level_tripped_show(struct device *dev,
149*4882a593Smuzhiyun struct device_attribute *attr,
150*4882a593Smuzhiyun char *buf)
151*4882a593Smuzhiyun {
152*4882a593Smuzhiyun struct as3935_state *st = iio_priv(dev_to_iio_dev(dev));
153*4882a593Smuzhiyun int ret;
154*4882a593Smuzhiyun
155*4882a593Smuzhiyun mutex_lock(&st->lock);
156*4882a593Smuzhiyun ret = sprintf(buf, "%d\n", !time_after(jiffies, st->noise_tripped + HZ));
157*4882a593Smuzhiyun mutex_unlock(&st->lock);
158*4882a593Smuzhiyun
159*4882a593Smuzhiyun return ret;
160*4882a593Smuzhiyun }
161*4882a593Smuzhiyun
162*4882a593Smuzhiyun static IIO_DEVICE_ATTR(sensor_sensitivity, S_IRUGO | S_IWUSR,
163*4882a593Smuzhiyun as3935_sensor_sensitivity_show, as3935_sensor_sensitivity_store, 0);
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun static IIO_DEVICE_ATTR(noise_level_tripped, S_IRUGO,
166*4882a593Smuzhiyun as3935_noise_level_tripped_show, NULL, 0);
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun static struct attribute *as3935_attributes[] = {
169*4882a593Smuzhiyun &iio_dev_attr_sensor_sensitivity.dev_attr.attr,
170*4882a593Smuzhiyun &iio_dev_attr_noise_level_tripped.dev_attr.attr,
171*4882a593Smuzhiyun NULL,
172*4882a593Smuzhiyun };
173*4882a593Smuzhiyun
174*4882a593Smuzhiyun static const struct attribute_group as3935_attribute_group = {
175*4882a593Smuzhiyun .attrs = as3935_attributes,
176*4882a593Smuzhiyun };
177*4882a593Smuzhiyun
as3935_read_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int * val,int * val2,long m)178*4882a593Smuzhiyun static int as3935_read_raw(struct iio_dev *indio_dev,
179*4882a593Smuzhiyun struct iio_chan_spec const *chan,
180*4882a593Smuzhiyun int *val,
181*4882a593Smuzhiyun int *val2,
182*4882a593Smuzhiyun long m)
183*4882a593Smuzhiyun {
184*4882a593Smuzhiyun struct as3935_state *st = iio_priv(indio_dev);
185*4882a593Smuzhiyun int ret;
186*4882a593Smuzhiyun
187*4882a593Smuzhiyun
188*4882a593Smuzhiyun switch (m) {
189*4882a593Smuzhiyun case IIO_CHAN_INFO_PROCESSED:
190*4882a593Smuzhiyun case IIO_CHAN_INFO_RAW:
191*4882a593Smuzhiyun *val2 = 0;
192*4882a593Smuzhiyun ret = as3935_read(st, AS3935_DATA, val);
193*4882a593Smuzhiyun if (ret)
194*4882a593Smuzhiyun return ret;
195*4882a593Smuzhiyun
196*4882a593Smuzhiyun /* storm out of range */
197*4882a593Smuzhiyun if (*val == AS3935_DATA_MASK)
198*4882a593Smuzhiyun return -EINVAL;
199*4882a593Smuzhiyun
200*4882a593Smuzhiyun if (m == IIO_CHAN_INFO_RAW)
201*4882a593Smuzhiyun return IIO_VAL_INT;
202*4882a593Smuzhiyun
203*4882a593Smuzhiyun if (m == IIO_CHAN_INFO_PROCESSED)
204*4882a593Smuzhiyun *val *= 1000;
205*4882a593Smuzhiyun break;
206*4882a593Smuzhiyun case IIO_CHAN_INFO_SCALE:
207*4882a593Smuzhiyun *val = 1000;
208*4882a593Smuzhiyun break;
209*4882a593Smuzhiyun default:
210*4882a593Smuzhiyun return -EINVAL;
211*4882a593Smuzhiyun }
212*4882a593Smuzhiyun
213*4882a593Smuzhiyun return IIO_VAL_INT;
214*4882a593Smuzhiyun }
215*4882a593Smuzhiyun
216*4882a593Smuzhiyun static const struct iio_info as3935_info = {
217*4882a593Smuzhiyun .attrs = &as3935_attribute_group,
218*4882a593Smuzhiyun .read_raw = &as3935_read_raw,
219*4882a593Smuzhiyun };
220*4882a593Smuzhiyun
as3935_trigger_handler(int irq,void * private)221*4882a593Smuzhiyun static irqreturn_t as3935_trigger_handler(int irq, void *private)
222*4882a593Smuzhiyun {
223*4882a593Smuzhiyun struct iio_poll_func *pf = private;
224*4882a593Smuzhiyun struct iio_dev *indio_dev = pf->indio_dev;
225*4882a593Smuzhiyun struct as3935_state *st = iio_priv(indio_dev);
226*4882a593Smuzhiyun int val, ret;
227*4882a593Smuzhiyun
228*4882a593Smuzhiyun ret = as3935_read(st, AS3935_DATA, &val);
229*4882a593Smuzhiyun if (ret)
230*4882a593Smuzhiyun goto err_read;
231*4882a593Smuzhiyun
232*4882a593Smuzhiyun st->scan.chan = val & AS3935_DATA_MASK;
233*4882a593Smuzhiyun iio_push_to_buffers_with_timestamp(indio_dev, &st->scan,
234*4882a593Smuzhiyun iio_get_time_ns(indio_dev));
235*4882a593Smuzhiyun err_read:
236*4882a593Smuzhiyun iio_trigger_notify_done(indio_dev->trig);
237*4882a593Smuzhiyun
238*4882a593Smuzhiyun return IRQ_HANDLED;
239*4882a593Smuzhiyun }
240*4882a593Smuzhiyun
241*4882a593Smuzhiyun static const struct iio_trigger_ops iio_interrupt_trigger_ops = {
242*4882a593Smuzhiyun };
243*4882a593Smuzhiyun
as3935_event_work(struct work_struct * work)244*4882a593Smuzhiyun static void as3935_event_work(struct work_struct *work)
245*4882a593Smuzhiyun {
246*4882a593Smuzhiyun struct as3935_state *st;
247*4882a593Smuzhiyun int val;
248*4882a593Smuzhiyun int ret;
249*4882a593Smuzhiyun
250*4882a593Smuzhiyun st = container_of(work, struct as3935_state, work.work);
251*4882a593Smuzhiyun
252*4882a593Smuzhiyun ret = as3935_read(st, AS3935_INT, &val);
253*4882a593Smuzhiyun if (ret) {
254*4882a593Smuzhiyun dev_warn(&st->spi->dev, "read error\n");
255*4882a593Smuzhiyun return;
256*4882a593Smuzhiyun }
257*4882a593Smuzhiyun
258*4882a593Smuzhiyun val &= AS3935_INT_MASK;
259*4882a593Smuzhiyun
260*4882a593Smuzhiyun switch (val) {
261*4882a593Smuzhiyun case AS3935_EVENT_INT:
262*4882a593Smuzhiyun iio_trigger_poll_chained(st->trig);
263*4882a593Smuzhiyun break;
264*4882a593Smuzhiyun case AS3935_DISTURB_INT:
265*4882a593Smuzhiyun case AS3935_NOISE_INT:
266*4882a593Smuzhiyun mutex_lock(&st->lock);
267*4882a593Smuzhiyun st->noise_tripped = jiffies;
268*4882a593Smuzhiyun mutex_unlock(&st->lock);
269*4882a593Smuzhiyun dev_warn(&st->spi->dev, "noise level is too high\n");
270*4882a593Smuzhiyun break;
271*4882a593Smuzhiyun }
272*4882a593Smuzhiyun }
273*4882a593Smuzhiyun
as3935_interrupt_handler(int irq,void * private)274*4882a593Smuzhiyun static irqreturn_t as3935_interrupt_handler(int irq, void *private)
275*4882a593Smuzhiyun {
276*4882a593Smuzhiyun struct iio_dev *indio_dev = private;
277*4882a593Smuzhiyun struct as3935_state *st = iio_priv(indio_dev);
278*4882a593Smuzhiyun
279*4882a593Smuzhiyun /*
280*4882a593Smuzhiyun * Delay work for >2 milliseconds after an interrupt to allow
281*4882a593Smuzhiyun * estimated distance to recalculated.
282*4882a593Smuzhiyun */
283*4882a593Smuzhiyun
284*4882a593Smuzhiyun schedule_delayed_work(&st->work, msecs_to_jiffies(3));
285*4882a593Smuzhiyun
286*4882a593Smuzhiyun return IRQ_HANDLED;
287*4882a593Smuzhiyun }
288*4882a593Smuzhiyun
calibrate_as3935(struct as3935_state * st)289*4882a593Smuzhiyun static void calibrate_as3935(struct as3935_state *st)
290*4882a593Smuzhiyun {
291*4882a593Smuzhiyun as3935_write(st, AS3935_DEFAULTS, 0x96);
292*4882a593Smuzhiyun as3935_write(st, AS3935_CALIBRATE, 0x96);
293*4882a593Smuzhiyun as3935_write(st, AS3935_TUNE_CAP,
294*4882a593Smuzhiyun BIT(5) | (st->tune_cap / TUNE_CAP_DIV));
295*4882a593Smuzhiyun
296*4882a593Smuzhiyun mdelay(2);
297*4882a593Smuzhiyun as3935_write(st, AS3935_TUNE_CAP, (st->tune_cap / TUNE_CAP_DIV));
298*4882a593Smuzhiyun as3935_write(st, AS3935_NFLWDTH, st->nflwdth_reg);
299*4882a593Smuzhiyun }
300*4882a593Smuzhiyun
301*4882a593Smuzhiyun #ifdef CONFIG_PM_SLEEP
as3935_suspend(struct device * dev)302*4882a593Smuzhiyun static int as3935_suspend(struct device *dev)
303*4882a593Smuzhiyun {
304*4882a593Smuzhiyun struct iio_dev *indio_dev = dev_get_drvdata(dev);
305*4882a593Smuzhiyun struct as3935_state *st = iio_priv(indio_dev);
306*4882a593Smuzhiyun int val, ret;
307*4882a593Smuzhiyun
308*4882a593Smuzhiyun mutex_lock(&st->lock);
309*4882a593Smuzhiyun ret = as3935_read(st, AS3935_AFE_GAIN, &val);
310*4882a593Smuzhiyun if (ret)
311*4882a593Smuzhiyun goto err_suspend;
312*4882a593Smuzhiyun val |= AS3935_AFE_PWR_BIT;
313*4882a593Smuzhiyun
314*4882a593Smuzhiyun ret = as3935_write(st, AS3935_AFE_GAIN, val);
315*4882a593Smuzhiyun
316*4882a593Smuzhiyun err_suspend:
317*4882a593Smuzhiyun mutex_unlock(&st->lock);
318*4882a593Smuzhiyun
319*4882a593Smuzhiyun return ret;
320*4882a593Smuzhiyun }
321*4882a593Smuzhiyun
as3935_resume(struct device * dev)322*4882a593Smuzhiyun static int as3935_resume(struct device *dev)
323*4882a593Smuzhiyun {
324*4882a593Smuzhiyun struct iio_dev *indio_dev = dev_get_drvdata(dev);
325*4882a593Smuzhiyun struct as3935_state *st = iio_priv(indio_dev);
326*4882a593Smuzhiyun int val, ret;
327*4882a593Smuzhiyun
328*4882a593Smuzhiyun mutex_lock(&st->lock);
329*4882a593Smuzhiyun ret = as3935_read(st, AS3935_AFE_GAIN, &val);
330*4882a593Smuzhiyun if (ret)
331*4882a593Smuzhiyun goto err_resume;
332*4882a593Smuzhiyun val &= ~AS3935_AFE_PWR_BIT;
333*4882a593Smuzhiyun ret = as3935_write(st, AS3935_AFE_GAIN, val);
334*4882a593Smuzhiyun
335*4882a593Smuzhiyun calibrate_as3935(st);
336*4882a593Smuzhiyun
337*4882a593Smuzhiyun err_resume:
338*4882a593Smuzhiyun mutex_unlock(&st->lock);
339*4882a593Smuzhiyun
340*4882a593Smuzhiyun return ret;
341*4882a593Smuzhiyun }
342*4882a593Smuzhiyun
343*4882a593Smuzhiyun static SIMPLE_DEV_PM_OPS(as3935_pm_ops, as3935_suspend, as3935_resume);
344*4882a593Smuzhiyun #define AS3935_PM_OPS (&as3935_pm_ops)
345*4882a593Smuzhiyun
346*4882a593Smuzhiyun #else
347*4882a593Smuzhiyun #define AS3935_PM_OPS NULL
348*4882a593Smuzhiyun #endif
349*4882a593Smuzhiyun
as3935_stop_work(void * data)350*4882a593Smuzhiyun static void as3935_stop_work(void *data)
351*4882a593Smuzhiyun {
352*4882a593Smuzhiyun struct iio_dev *indio_dev = data;
353*4882a593Smuzhiyun struct as3935_state *st = iio_priv(indio_dev);
354*4882a593Smuzhiyun
355*4882a593Smuzhiyun cancel_delayed_work_sync(&st->work);
356*4882a593Smuzhiyun }
357*4882a593Smuzhiyun
as3935_probe(struct spi_device * spi)358*4882a593Smuzhiyun static int as3935_probe(struct spi_device *spi)
359*4882a593Smuzhiyun {
360*4882a593Smuzhiyun struct device *dev = &spi->dev;
361*4882a593Smuzhiyun struct iio_dev *indio_dev;
362*4882a593Smuzhiyun struct iio_trigger *trig;
363*4882a593Smuzhiyun struct as3935_state *st;
364*4882a593Smuzhiyun int ret;
365*4882a593Smuzhiyun
366*4882a593Smuzhiyun /* Be sure lightning event interrupt is specified */
367*4882a593Smuzhiyun if (!spi->irq) {
368*4882a593Smuzhiyun dev_err(dev, "unable to get event interrupt\n");
369*4882a593Smuzhiyun return -EINVAL;
370*4882a593Smuzhiyun }
371*4882a593Smuzhiyun
372*4882a593Smuzhiyun indio_dev = devm_iio_device_alloc(dev, sizeof(*st));
373*4882a593Smuzhiyun if (!indio_dev)
374*4882a593Smuzhiyun return -ENOMEM;
375*4882a593Smuzhiyun
376*4882a593Smuzhiyun st = iio_priv(indio_dev);
377*4882a593Smuzhiyun st->spi = spi;
378*4882a593Smuzhiyun
379*4882a593Smuzhiyun spi_set_drvdata(spi, indio_dev);
380*4882a593Smuzhiyun mutex_init(&st->lock);
381*4882a593Smuzhiyun
382*4882a593Smuzhiyun ret = device_property_read_u32(dev,
383*4882a593Smuzhiyun "ams,tuning-capacitor-pf", &st->tune_cap);
384*4882a593Smuzhiyun if (ret) {
385*4882a593Smuzhiyun st->tune_cap = 0;
386*4882a593Smuzhiyun dev_warn(dev, "no tuning-capacitor-pf set, defaulting to %d",
387*4882a593Smuzhiyun st->tune_cap);
388*4882a593Smuzhiyun }
389*4882a593Smuzhiyun
390*4882a593Smuzhiyun if (st->tune_cap > MAX_PF_CAP) {
391*4882a593Smuzhiyun dev_err(dev, "wrong tuning-capacitor-pf setting of %d\n",
392*4882a593Smuzhiyun st->tune_cap);
393*4882a593Smuzhiyun return -EINVAL;
394*4882a593Smuzhiyun }
395*4882a593Smuzhiyun
396*4882a593Smuzhiyun ret = device_property_read_u32(dev,
397*4882a593Smuzhiyun "ams,nflwdth", &st->nflwdth_reg);
398*4882a593Smuzhiyun if (!ret && st->nflwdth_reg > AS3935_NFLWDTH_MASK) {
399*4882a593Smuzhiyun dev_err(dev, "invalid nflwdth setting of %d\n",
400*4882a593Smuzhiyun st->nflwdth_reg);
401*4882a593Smuzhiyun return -EINVAL;
402*4882a593Smuzhiyun }
403*4882a593Smuzhiyun
404*4882a593Smuzhiyun indio_dev->name = spi_get_device_id(spi)->name;
405*4882a593Smuzhiyun indio_dev->channels = as3935_channels;
406*4882a593Smuzhiyun indio_dev->num_channels = ARRAY_SIZE(as3935_channels);
407*4882a593Smuzhiyun indio_dev->modes = INDIO_DIRECT_MODE;
408*4882a593Smuzhiyun indio_dev->info = &as3935_info;
409*4882a593Smuzhiyun
410*4882a593Smuzhiyun trig = devm_iio_trigger_alloc(dev, "%s-dev%d",
411*4882a593Smuzhiyun indio_dev->name, indio_dev->id);
412*4882a593Smuzhiyun
413*4882a593Smuzhiyun if (!trig)
414*4882a593Smuzhiyun return -ENOMEM;
415*4882a593Smuzhiyun
416*4882a593Smuzhiyun st->trig = trig;
417*4882a593Smuzhiyun st->noise_tripped = jiffies - HZ;
418*4882a593Smuzhiyun trig->dev.parent = indio_dev->dev.parent;
419*4882a593Smuzhiyun iio_trigger_set_drvdata(trig, indio_dev);
420*4882a593Smuzhiyun trig->ops = &iio_interrupt_trigger_ops;
421*4882a593Smuzhiyun
422*4882a593Smuzhiyun ret = devm_iio_trigger_register(dev, trig);
423*4882a593Smuzhiyun if (ret) {
424*4882a593Smuzhiyun dev_err(dev, "failed to register trigger\n");
425*4882a593Smuzhiyun return ret;
426*4882a593Smuzhiyun }
427*4882a593Smuzhiyun
428*4882a593Smuzhiyun ret = devm_iio_triggered_buffer_setup(dev, indio_dev,
429*4882a593Smuzhiyun iio_pollfunc_store_time,
430*4882a593Smuzhiyun as3935_trigger_handler, NULL);
431*4882a593Smuzhiyun
432*4882a593Smuzhiyun if (ret) {
433*4882a593Smuzhiyun dev_err(dev, "cannot setup iio trigger\n");
434*4882a593Smuzhiyun return ret;
435*4882a593Smuzhiyun }
436*4882a593Smuzhiyun
437*4882a593Smuzhiyun calibrate_as3935(st);
438*4882a593Smuzhiyun
439*4882a593Smuzhiyun INIT_DELAYED_WORK(&st->work, as3935_event_work);
440*4882a593Smuzhiyun ret = devm_add_action(dev, as3935_stop_work, indio_dev);
441*4882a593Smuzhiyun if (ret)
442*4882a593Smuzhiyun return ret;
443*4882a593Smuzhiyun
444*4882a593Smuzhiyun ret = devm_request_irq(dev, spi->irq,
445*4882a593Smuzhiyun &as3935_interrupt_handler,
446*4882a593Smuzhiyun IRQF_TRIGGER_RISING,
447*4882a593Smuzhiyun dev_name(dev),
448*4882a593Smuzhiyun indio_dev);
449*4882a593Smuzhiyun
450*4882a593Smuzhiyun if (ret) {
451*4882a593Smuzhiyun dev_err(dev, "unable to request irq\n");
452*4882a593Smuzhiyun return ret;
453*4882a593Smuzhiyun }
454*4882a593Smuzhiyun
455*4882a593Smuzhiyun ret = devm_iio_device_register(dev, indio_dev);
456*4882a593Smuzhiyun if (ret < 0) {
457*4882a593Smuzhiyun dev_err(dev, "unable to register device\n");
458*4882a593Smuzhiyun return ret;
459*4882a593Smuzhiyun }
460*4882a593Smuzhiyun return 0;
461*4882a593Smuzhiyun }
462*4882a593Smuzhiyun
463*4882a593Smuzhiyun static const struct of_device_id as3935_of_match[] = {
464*4882a593Smuzhiyun { .compatible = "ams,as3935", },
465*4882a593Smuzhiyun { /* sentinel */ },
466*4882a593Smuzhiyun };
467*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, as3935_of_match);
468*4882a593Smuzhiyun
469*4882a593Smuzhiyun static const struct spi_device_id as3935_id[] = {
470*4882a593Smuzhiyun {"as3935", 0},
471*4882a593Smuzhiyun {},
472*4882a593Smuzhiyun };
473*4882a593Smuzhiyun MODULE_DEVICE_TABLE(spi, as3935_id);
474*4882a593Smuzhiyun
475*4882a593Smuzhiyun static struct spi_driver as3935_driver = {
476*4882a593Smuzhiyun .driver = {
477*4882a593Smuzhiyun .name = "as3935",
478*4882a593Smuzhiyun .of_match_table = as3935_of_match,
479*4882a593Smuzhiyun .pm = AS3935_PM_OPS,
480*4882a593Smuzhiyun },
481*4882a593Smuzhiyun .probe = as3935_probe,
482*4882a593Smuzhiyun .id_table = as3935_id,
483*4882a593Smuzhiyun };
484*4882a593Smuzhiyun module_spi_driver(as3935_driver);
485*4882a593Smuzhiyun
486*4882a593Smuzhiyun MODULE_AUTHOR("Matt Ranostay <matt.ranostay@konsulko.com>");
487*4882a593Smuzhiyun MODULE_DESCRIPTION("AS3935 lightning sensor");
488*4882a593Smuzhiyun MODULE_LICENSE("GPL");
489