1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun #include <linux/bitops.h> 3*4882a593Smuzhiyun #include <linux/device.h> 4*4882a593Smuzhiyun #include <linux/regmap.h> 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun /* BMP280 specific registers */ 7*4882a593Smuzhiyun #define BMP280_REG_HUMIDITY_LSB 0xFE 8*4882a593Smuzhiyun #define BMP280_REG_HUMIDITY_MSB 0xFD 9*4882a593Smuzhiyun #define BMP280_REG_TEMP_XLSB 0xFC 10*4882a593Smuzhiyun #define BMP280_REG_TEMP_LSB 0xFB 11*4882a593Smuzhiyun #define BMP280_REG_TEMP_MSB 0xFA 12*4882a593Smuzhiyun #define BMP280_REG_PRESS_XLSB 0xF9 13*4882a593Smuzhiyun #define BMP280_REG_PRESS_LSB 0xF8 14*4882a593Smuzhiyun #define BMP280_REG_PRESS_MSB 0xF7 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun #define BMP280_REG_CONFIG 0xF5 17*4882a593Smuzhiyun #define BMP280_REG_CTRL_MEAS 0xF4 18*4882a593Smuzhiyun #define BMP280_REG_STATUS 0xF3 19*4882a593Smuzhiyun #define BMP280_REG_CTRL_HUMIDITY 0xF2 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun /* Due to non linear mapping, and data sizes we can't do a bulk read */ 22*4882a593Smuzhiyun #define BMP280_REG_COMP_H1 0xA1 23*4882a593Smuzhiyun #define BMP280_REG_COMP_H2 0xE1 24*4882a593Smuzhiyun #define BMP280_REG_COMP_H3 0xE3 25*4882a593Smuzhiyun #define BMP280_REG_COMP_H4 0xE4 26*4882a593Smuzhiyun #define BMP280_REG_COMP_H5 0xE5 27*4882a593Smuzhiyun #define BMP280_REG_COMP_H6 0xE7 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun #define BMP280_REG_COMP_TEMP_START 0x88 30*4882a593Smuzhiyun #define BMP280_COMP_TEMP_REG_COUNT 6 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun #define BMP280_REG_COMP_PRESS_START 0x8E 33*4882a593Smuzhiyun #define BMP280_COMP_PRESS_REG_COUNT 18 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun #define BMP280_FILTER_MASK (BIT(4) | BIT(3) | BIT(2)) 36*4882a593Smuzhiyun #define BMP280_FILTER_OFF 0 37*4882a593Smuzhiyun #define BMP280_FILTER_2X BIT(2) 38*4882a593Smuzhiyun #define BMP280_FILTER_4X BIT(3) 39*4882a593Smuzhiyun #define BMP280_FILTER_8X (BIT(3) | BIT(2)) 40*4882a593Smuzhiyun #define BMP280_FILTER_16X BIT(4) 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun #define BMP280_OSRS_HUMIDITY_MASK (BIT(2) | BIT(1) | BIT(0)) 43*4882a593Smuzhiyun #define BMP280_OSRS_HUMIDITIY_X(osrs_h) ((osrs_h) << 0) 44*4882a593Smuzhiyun #define BMP280_OSRS_HUMIDITY_SKIP 0 45*4882a593Smuzhiyun #define BMP280_OSRS_HUMIDITY_1X BMP280_OSRS_HUMIDITIY_X(1) 46*4882a593Smuzhiyun #define BMP280_OSRS_HUMIDITY_2X BMP280_OSRS_HUMIDITIY_X(2) 47*4882a593Smuzhiyun #define BMP280_OSRS_HUMIDITY_4X BMP280_OSRS_HUMIDITIY_X(3) 48*4882a593Smuzhiyun #define BMP280_OSRS_HUMIDITY_8X BMP280_OSRS_HUMIDITIY_X(4) 49*4882a593Smuzhiyun #define BMP280_OSRS_HUMIDITY_16X BMP280_OSRS_HUMIDITIY_X(5) 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun #define BMP280_OSRS_TEMP_MASK (BIT(7) | BIT(6) | BIT(5)) 52*4882a593Smuzhiyun #define BMP280_OSRS_TEMP_SKIP 0 53*4882a593Smuzhiyun #define BMP280_OSRS_TEMP_X(osrs_t) ((osrs_t) << 5) 54*4882a593Smuzhiyun #define BMP280_OSRS_TEMP_1X BMP280_OSRS_TEMP_X(1) 55*4882a593Smuzhiyun #define BMP280_OSRS_TEMP_2X BMP280_OSRS_TEMP_X(2) 56*4882a593Smuzhiyun #define BMP280_OSRS_TEMP_4X BMP280_OSRS_TEMP_X(3) 57*4882a593Smuzhiyun #define BMP280_OSRS_TEMP_8X BMP280_OSRS_TEMP_X(4) 58*4882a593Smuzhiyun #define BMP280_OSRS_TEMP_16X BMP280_OSRS_TEMP_X(5) 59*4882a593Smuzhiyun 60*4882a593Smuzhiyun #define BMP280_OSRS_PRESS_MASK (BIT(4) | BIT(3) | BIT(2)) 61*4882a593Smuzhiyun #define BMP280_OSRS_PRESS_SKIP 0 62*4882a593Smuzhiyun #define BMP280_OSRS_PRESS_X(osrs_p) ((osrs_p) << 2) 63*4882a593Smuzhiyun #define BMP280_OSRS_PRESS_1X BMP280_OSRS_PRESS_X(1) 64*4882a593Smuzhiyun #define BMP280_OSRS_PRESS_2X BMP280_OSRS_PRESS_X(2) 65*4882a593Smuzhiyun #define BMP280_OSRS_PRESS_4X BMP280_OSRS_PRESS_X(3) 66*4882a593Smuzhiyun #define BMP280_OSRS_PRESS_8X BMP280_OSRS_PRESS_X(4) 67*4882a593Smuzhiyun #define BMP280_OSRS_PRESS_16X BMP280_OSRS_PRESS_X(5) 68*4882a593Smuzhiyun 69*4882a593Smuzhiyun #define BMP280_MODE_MASK (BIT(1) | BIT(0)) 70*4882a593Smuzhiyun #define BMP280_MODE_SLEEP 0 71*4882a593Smuzhiyun #define BMP280_MODE_FORCED BIT(0) 72*4882a593Smuzhiyun #define BMP280_MODE_NORMAL (BIT(1) | BIT(0)) 73*4882a593Smuzhiyun 74*4882a593Smuzhiyun /* BMP180 specific registers */ 75*4882a593Smuzhiyun #define BMP180_REG_OUT_XLSB 0xF8 76*4882a593Smuzhiyun #define BMP180_REG_OUT_LSB 0xF7 77*4882a593Smuzhiyun #define BMP180_REG_OUT_MSB 0xF6 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun #define BMP180_REG_CALIB_START 0xAA 80*4882a593Smuzhiyun #define BMP180_REG_CALIB_COUNT 22 81*4882a593Smuzhiyun 82*4882a593Smuzhiyun #define BMP180_MEAS_SCO BIT(5) 83*4882a593Smuzhiyun #define BMP180_MEAS_TEMP (0x0E | BMP180_MEAS_SCO) 84*4882a593Smuzhiyun #define BMP180_MEAS_PRESS_X(oss) ((oss) << 6 | 0x14 | BMP180_MEAS_SCO) 85*4882a593Smuzhiyun #define BMP180_MEAS_PRESS_1X BMP180_MEAS_PRESS_X(0) 86*4882a593Smuzhiyun #define BMP180_MEAS_PRESS_2X BMP180_MEAS_PRESS_X(1) 87*4882a593Smuzhiyun #define BMP180_MEAS_PRESS_4X BMP180_MEAS_PRESS_X(2) 88*4882a593Smuzhiyun #define BMP180_MEAS_PRESS_8X BMP180_MEAS_PRESS_X(3) 89*4882a593Smuzhiyun 90*4882a593Smuzhiyun /* BMP180 and BMP280 common registers */ 91*4882a593Smuzhiyun #define BMP280_REG_CTRL_MEAS 0xF4 92*4882a593Smuzhiyun #define BMP280_REG_RESET 0xE0 93*4882a593Smuzhiyun #define BMP280_REG_ID 0xD0 94*4882a593Smuzhiyun 95*4882a593Smuzhiyun #define BMP180_CHIP_ID 0x55 96*4882a593Smuzhiyun #define BMP280_CHIP_ID 0x58 97*4882a593Smuzhiyun #define BME280_CHIP_ID 0x60 98*4882a593Smuzhiyun #define BMP280_SOFT_RESET_VAL 0xB6 99*4882a593Smuzhiyun 100*4882a593Smuzhiyun /* BMP280 register skipped special values */ 101*4882a593Smuzhiyun #define BMP280_TEMP_SKIPPED 0x80000 102*4882a593Smuzhiyun #define BMP280_PRESS_SKIPPED 0x80000 103*4882a593Smuzhiyun #define BMP280_HUMIDITY_SKIPPED 0x8000 104*4882a593Smuzhiyun 105*4882a593Smuzhiyun /* Regmap configurations */ 106*4882a593Smuzhiyun extern const struct regmap_config bmp180_regmap_config; 107*4882a593Smuzhiyun extern const struct regmap_config bmp280_regmap_config; 108*4882a593Smuzhiyun 109*4882a593Smuzhiyun /* Probe called from different transports */ 110*4882a593Smuzhiyun int bmp280_common_probe(struct device *dev, 111*4882a593Smuzhiyun struct regmap *regmap, 112*4882a593Smuzhiyun unsigned int chip, 113*4882a593Smuzhiyun const char *name, 114*4882a593Smuzhiyun int irq); 115*4882a593Smuzhiyun 116*4882a593Smuzhiyun /* PM ops */ 117*4882a593Smuzhiyun extern const struct dev_pm_ops bmp280_dev_pm_ops; 118