1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0+
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * lmp91000.c - Support for Texas Instruments digital potentiostats
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2016, 2018
6*4882a593Smuzhiyun * Author: Matt Ranostay <matt.ranostay@konsulko.com>
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * TODO: bias voltage + polarity control, and multiple chip support
9*4882a593Smuzhiyun */
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun #include <linux/module.h>
12*4882a593Smuzhiyun #include <linux/i2c.h>
13*4882a593Smuzhiyun #include <linux/delay.h>
14*4882a593Smuzhiyun #include <linux/mod_devicetable.h>
15*4882a593Smuzhiyun #include <linux/regmap.h>
16*4882a593Smuzhiyun #include <linux/iio/iio.h>
17*4882a593Smuzhiyun #include <linux/iio/buffer.h>
18*4882a593Smuzhiyun #include <linux/iio/consumer.h>
19*4882a593Smuzhiyun #include <linux/iio/trigger.h>
20*4882a593Smuzhiyun #include <linux/iio/trigger_consumer.h>
21*4882a593Smuzhiyun #include <linux/iio/triggered_buffer.h>
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun #define LMP91000_REG_LOCK 0x01
24*4882a593Smuzhiyun #define LMP91000_REG_TIACN 0x10
25*4882a593Smuzhiyun #define LMP91000_REG_TIACN_GAIN_SHIFT 2
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun #define LMP91000_REG_REFCN 0x11
28*4882a593Smuzhiyun #define LMP91000_REG_REFCN_EXT_REF 0x20
29*4882a593Smuzhiyun #define LMP91000_REG_REFCN_50_ZERO 0x80
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun #define LMP91000_REG_MODECN 0x12
32*4882a593Smuzhiyun #define LMP91000_REG_MODECN_3LEAD 0x03
33*4882a593Smuzhiyun #define LMP91000_REG_MODECN_TEMP 0x07
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun #define LMP91000_DRV_NAME "lmp91000"
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun static const int lmp91000_tia_gain[] = { 0, 2750, 3500, 7000, 14000, 35000,
38*4882a593Smuzhiyun 120000, 350000 };
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun static const int lmp91000_rload[] = { 10, 33, 50, 100 };
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun #define LMP91000_TEMP_BASE -40
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun static const u16 lmp91000_temp_lut[] = {
45*4882a593Smuzhiyun 1875, 1867, 1860, 1852, 1844, 1836, 1828, 1821, 1813, 1805,
46*4882a593Smuzhiyun 1797, 1789, 1782, 1774, 1766, 1758, 1750, 1742, 1734, 1727,
47*4882a593Smuzhiyun 1719, 1711, 1703, 1695, 1687, 1679, 1671, 1663, 1656, 1648,
48*4882a593Smuzhiyun 1640, 1632, 1624, 1616, 1608, 1600, 1592, 1584, 1576, 1568,
49*4882a593Smuzhiyun 1560, 1552, 1544, 1536, 1528, 1520, 1512, 1504, 1496, 1488,
50*4882a593Smuzhiyun 1480, 1472, 1464, 1456, 1448, 1440, 1432, 1424, 1415, 1407,
51*4882a593Smuzhiyun 1399, 1391, 1383, 1375, 1367, 1359, 1351, 1342, 1334, 1326,
52*4882a593Smuzhiyun 1318, 1310, 1302, 1293, 1285, 1277, 1269, 1261, 1253, 1244,
53*4882a593Smuzhiyun 1236, 1228, 1220, 1212, 1203, 1195, 1187, 1179, 1170, 1162,
54*4882a593Smuzhiyun 1154, 1146, 1137, 1129, 1121, 1112, 1104, 1096, 1087, 1079,
55*4882a593Smuzhiyun 1071, 1063, 1054, 1046, 1038, 1029, 1021, 1012, 1004, 996,
56*4882a593Smuzhiyun 987, 979, 971, 962, 954, 945, 937, 929, 920, 912,
57*4882a593Smuzhiyun 903, 895, 886, 878, 870, 861 };
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun static const struct regmap_config lmp91000_regmap_config = {
60*4882a593Smuzhiyun .reg_bits = 8,
61*4882a593Smuzhiyun .val_bits = 8,
62*4882a593Smuzhiyun };
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun struct lmp91000_data {
65*4882a593Smuzhiyun struct regmap *regmap;
66*4882a593Smuzhiyun struct device *dev;
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun struct iio_trigger *trig;
69*4882a593Smuzhiyun struct iio_cb_buffer *cb_buffer;
70*4882a593Smuzhiyun struct iio_channel *adc_chan;
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun struct completion completion;
73*4882a593Smuzhiyun u8 chan_select;
74*4882a593Smuzhiyun /* 64-bit data + 64-bit naturally aligned timestamp */
75*4882a593Smuzhiyun u32 buffer[4] __aligned(8);
76*4882a593Smuzhiyun };
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun static const struct iio_chan_spec lmp91000_channels[] = {
79*4882a593Smuzhiyun { /* chemical channel mV */
80*4882a593Smuzhiyun .type = IIO_VOLTAGE,
81*4882a593Smuzhiyun .channel = 0,
82*4882a593Smuzhiyun .address = LMP91000_REG_MODECN_3LEAD,
83*4882a593Smuzhiyun .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
84*4882a593Smuzhiyun BIT(IIO_CHAN_INFO_OFFSET) |
85*4882a593Smuzhiyun BIT(IIO_CHAN_INFO_SCALE),
86*4882a593Smuzhiyun .scan_index = 0,
87*4882a593Smuzhiyun .scan_type = {
88*4882a593Smuzhiyun .sign = 's',
89*4882a593Smuzhiyun .realbits = 32,
90*4882a593Smuzhiyun .storagebits = 32,
91*4882a593Smuzhiyun },
92*4882a593Smuzhiyun },
93*4882a593Smuzhiyun IIO_CHAN_SOFT_TIMESTAMP(1),
94*4882a593Smuzhiyun { /* temperature channel mV */
95*4882a593Smuzhiyun .type = IIO_TEMP,
96*4882a593Smuzhiyun .channel = 1,
97*4882a593Smuzhiyun .address = LMP91000_REG_MODECN_TEMP,
98*4882a593Smuzhiyun .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED),
99*4882a593Smuzhiyun .scan_index = -1,
100*4882a593Smuzhiyun },
101*4882a593Smuzhiyun };
102*4882a593Smuzhiyun
lmp91000_read(struct lmp91000_data * data,int channel,int * val)103*4882a593Smuzhiyun static int lmp91000_read(struct lmp91000_data *data, int channel, int *val)
104*4882a593Smuzhiyun {
105*4882a593Smuzhiyun int state, ret;
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun ret = regmap_read(data->regmap, LMP91000_REG_MODECN, &state);
108*4882a593Smuzhiyun if (ret)
109*4882a593Smuzhiyun return -EINVAL;
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun ret = regmap_write(data->regmap, LMP91000_REG_MODECN, channel);
112*4882a593Smuzhiyun if (ret)
113*4882a593Smuzhiyun return -EINVAL;
114*4882a593Smuzhiyun
115*4882a593Smuzhiyun /* delay till first temperature reading is complete */
116*4882a593Smuzhiyun if (state != channel && channel == LMP91000_REG_MODECN_TEMP)
117*4882a593Smuzhiyun usleep_range(3000, 4000);
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun data->chan_select = channel != LMP91000_REG_MODECN_3LEAD;
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun iio_trigger_poll_chained(data->trig);
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun ret = wait_for_completion_timeout(&data->completion, HZ);
124*4882a593Smuzhiyun reinit_completion(&data->completion);
125*4882a593Smuzhiyun
126*4882a593Smuzhiyun if (!ret)
127*4882a593Smuzhiyun return -ETIMEDOUT;
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun *val = data->buffer[data->chan_select];
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun return 0;
132*4882a593Smuzhiyun }
133*4882a593Smuzhiyun
lmp91000_buffer_handler(int irq,void * private)134*4882a593Smuzhiyun static irqreturn_t lmp91000_buffer_handler(int irq, void *private)
135*4882a593Smuzhiyun {
136*4882a593Smuzhiyun struct iio_poll_func *pf = private;
137*4882a593Smuzhiyun struct iio_dev *indio_dev = pf->indio_dev;
138*4882a593Smuzhiyun struct lmp91000_data *data = iio_priv(indio_dev);
139*4882a593Smuzhiyun int ret, val;
140*4882a593Smuzhiyun
141*4882a593Smuzhiyun memset(data->buffer, 0, sizeof(data->buffer));
142*4882a593Smuzhiyun
143*4882a593Smuzhiyun ret = lmp91000_read(data, LMP91000_REG_MODECN_3LEAD, &val);
144*4882a593Smuzhiyun if (!ret) {
145*4882a593Smuzhiyun data->buffer[0] = val;
146*4882a593Smuzhiyun iio_push_to_buffers_with_timestamp(indio_dev, data->buffer,
147*4882a593Smuzhiyun iio_get_time_ns(indio_dev));
148*4882a593Smuzhiyun }
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun iio_trigger_notify_done(indio_dev->trig);
151*4882a593Smuzhiyun
152*4882a593Smuzhiyun return IRQ_HANDLED;
153*4882a593Smuzhiyun }
154*4882a593Smuzhiyun
lmp91000_read_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int * val,int * val2,long mask)155*4882a593Smuzhiyun static int lmp91000_read_raw(struct iio_dev *indio_dev,
156*4882a593Smuzhiyun struct iio_chan_spec const *chan,
157*4882a593Smuzhiyun int *val, int *val2, long mask)
158*4882a593Smuzhiyun {
159*4882a593Smuzhiyun struct lmp91000_data *data = iio_priv(indio_dev);
160*4882a593Smuzhiyun
161*4882a593Smuzhiyun switch (mask) {
162*4882a593Smuzhiyun case IIO_CHAN_INFO_RAW:
163*4882a593Smuzhiyun case IIO_CHAN_INFO_PROCESSED: {
164*4882a593Smuzhiyun int ret = iio_channel_start_all_cb(data->cb_buffer);
165*4882a593Smuzhiyun
166*4882a593Smuzhiyun if (ret)
167*4882a593Smuzhiyun return ret;
168*4882a593Smuzhiyun
169*4882a593Smuzhiyun ret = lmp91000_read(data, chan->address, val);
170*4882a593Smuzhiyun
171*4882a593Smuzhiyun iio_channel_stop_all_cb(data->cb_buffer);
172*4882a593Smuzhiyun
173*4882a593Smuzhiyun if (ret)
174*4882a593Smuzhiyun return ret;
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun if (mask == IIO_CHAN_INFO_PROCESSED) {
177*4882a593Smuzhiyun int tmp, i;
178*4882a593Smuzhiyun
179*4882a593Smuzhiyun ret = iio_convert_raw_to_processed(data->adc_chan,
180*4882a593Smuzhiyun *val, &tmp, 1);
181*4882a593Smuzhiyun if (ret)
182*4882a593Smuzhiyun return ret;
183*4882a593Smuzhiyun
184*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(lmp91000_temp_lut); i++)
185*4882a593Smuzhiyun if (lmp91000_temp_lut[i] < tmp)
186*4882a593Smuzhiyun break;
187*4882a593Smuzhiyun
188*4882a593Smuzhiyun *val = (LMP91000_TEMP_BASE + i) * 1000;
189*4882a593Smuzhiyun }
190*4882a593Smuzhiyun return IIO_VAL_INT;
191*4882a593Smuzhiyun }
192*4882a593Smuzhiyun case IIO_CHAN_INFO_OFFSET:
193*4882a593Smuzhiyun return iio_read_channel_offset(data->adc_chan, val, val2);
194*4882a593Smuzhiyun case IIO_CHAN_INFO_SCALE:
195*4882a593Smuzhiyun return iio_read_channel_scale(data->adc_chan, val, val2);
196*4882a593Smuzhiyun }
197*4882a593Smuzhiyun
198*4882a593Smuzhiyun return -EINVAL;
199*4882a593Smuzhiyun }
200*4882a593Smuzhiyun
201*4882a593Smuzhiyun static const struct iio_info lmp91000_info = {
202*4882a593Smuzhiyun .read_raw = lmp91000_read_raw,
203*4882a593Smuzhiyun };
204*4882a593Smuzhiyun
lmp91000_read_config(struct lmp91000_data * data)205*4882a593Smuzhiyun static int lmp91000_read_config(struct lmp91000_data *data)
206*4882a593Smuzhiyun {
207*4882a593Smuzhiyun struct device *dev = data->dev;
208*4882a593Smuzhiyun unsigned int reg, val;
209*4882a593Smuzhiyun int i, ret;
210*4882a593Smuzhiyun
211*4882a593Smuzhiyun ret = device_property_read_u32(dev, "ti,tia-gain-ohm", &val);
212*4882a593Smuzhiyun if (ret) {
213*4882a593Smuzhiyun if (!device_property_read_bool(dev, "ti,external-tia-resistor")) {
214*4882a593Smuzhiyun dev_err(dev, "no ti,tia-gain-ohm defined and external resistor not specified\n");
215*4882a593Smuzhiyun return ret;
216*4882a593Smuzhiyun }
217*4882a593Smuzhiyun val = 0;
218*4882a593Smuzhiyun }
219*4882a593Smuzhiyun
220*4882a593Smuzhiyun ret = -EINVAL;
221*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(lmp91000_tia_gain); i++) {
222*4882a593Smuzhiyun if (lmp91000_tia_gain[i] == val) {
223*4882a593Smuzhiyun reg = i << LMP91000_REG_TIACN_GAIN_SHIFT;
224*4882a593Smuzhiyun ret = 0;
225*4882a593Smuzhiyun break;
226*4882a593Smuzhiyun }
227*4882a593Smuzhiyun }
228*4882a593Smuzhiyun
229*4882a593Smuzhiyun if (ret) {
230*4882a593Smuzhiyun dev_err(dev, "invalid ti,tia-gain-ohm %d\n", val);
231*4882a593Smuzhiyun return ret;
232*4882a593Smuzhiyun }
233*4882a593Smuzhiyun
234*4882a593Smuzhiyun ret = device_property_read_u32(dev, "ti,rload-ohm", &val);
235*4882a593Smuzhiyun if (ret) {
236*4882a593Smuzhiyun val = 100;
237*4882a593Smuzhiyun dev_info(dev, "no ti,rload-ohm defined, default to %d\n", val);
238*4882a593Smuzhiyun }
239*4882a593Smuzhiyun
240*4882a593Smuzhiyun ret = -EINVAL;
241*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(lmp91000_rload); i++) {
242*4882a593Smuzhiyun if (lmp91000_rload[i] == val) {
243*4882a593Smuzhiyun reg |= i;
244*4882a593Smuzhiyun ret = 0;
245*4882a593Smuzhiyun break;
246*4882a593Smuzhiyun }
247*4882a593Smuzhiyun }
248*4882a593Smuzhiyun
249*4882a593Smuzhiyun if (ret) {
250*4882a593Smuzhiyun dev_err(dev, "invalid ti,rload-ohm %d\n", val);
251*4882a593Smuzhiyun return ret;
252*4882a593Smuzhiyun }
253*4882a593Smuzhiyun
254*4882a593Smuzhiyun regmap_write(data->regmap, LMP91000_REG_LOCK, 0);
255*4882a593Smuzhiyun regmap_write(data->regmap, LMP91000_REG_TIACN, reg);
256*4882a593Smuzhiyun regmap_write(data->regmap, LMP91000_REG_REFCN,
257*4882a593Smuzhiyun LMP91000_REG_REFCN_EXT_REF | LMP91000_REG_REFCN_50_ZERO);
258*4882a593Smuzhiyun regmap_write(data->regmap, LMP91000_REG_LOCK, 1);
259*4882a593Smuzhiyun
260*4882a593Smuzhiyun return 0;
261*4882a593Smuzhiyun }
262*4882a593Smuzhiyun
lmp91000_buffer_cb(const void * val,void * private)263*4882a593Smuzhiyun static int lmp91000_buffer_cb(const void *val, void *private)
264*4882a593Smuzhiyun {
265*4882a593Smuzhiyun struct iio_dev *indio_dev = private;
266*4882a593Smuzhiyun struct lmp91000_data *data = iio_priv(indio_dev);
267*4882a593Smuzhiyun
268*4882a593Smuzhiyun data->buffer[data->chan_select] = *((int *)val);
269*4882a593Smuzhiyun complete_all(&data->completion);
270*4882a593Smuzhiyun
271*4882a593Smuzhiyun return 0;
272*4882a593Smuzhiyun }
273*4882a593Smuzhiyun
274*4882a593Smuzhiyun static const struct iio_trigger_ops lmp91000_trigger_ops = {
275*4882a593Smuzhiyun };
276*4882a593Smuzhiyun
lmp91000_buffer_postenable(struct iio_dev * indio_dev)277*4882a593Smuzhiyun static int lmp91000_buffer_postenable(struct iio_dev *indio_dev)
278*4882a593Smuzhiyun {
279*4882a593Smuzhiyun struct lmp91000_data *data = iio_priv(indio_dev);
280*4882a593Smuzhiyun
281*4882a593Smuzhiyun return iio_channel_start_all_cb(data->cb_buffer);
282*4882a593Smuzhiyun }
283*4882a593Smuzhiyun
lmp91000_buffer_predisable(struct iio_dev * indio_dev)284*4882a593Smuzhiyun static int lmp91000_buffer_predisable(struct iio_dev *indio_dev)
285*4882a593Smuzhiyun {
286*4882a593Smuzhiyun struct lmp91000_data *data = iio_priv(indio_dev);
287*4882a593Smuzhiyun
288*4882a593Smuzhiyun iio_channel_stop_all_cb(data->cb_buffer);
289*4882a593Smuzhiyun
290*4882a593Smuzhiyun return 0;
291*4882a593Smuzhiyun }
292*4882a593Smuzhiyun
293*4882a593Smuzhiyun static const struct iio_buffer_setup_ops lmp91000_buffer_setup_ops = {
294*4882a593Smuzhiyun .postenable = lmp91000_buffer_postenable,
295*4882a593Smuzhiyun .predisable = lmp91000_buffer_predisable,
296*4882a593Smuzhiyun };
297*4882a593Smuzhiyun
lmp91000_probe(struct i2c_client * client,const struct i2c_device_id * id)298*4882a593Smuzhiyun static int lmp91000_probe(struct i2c_client *client,
299*4882a593Smuzhiyun const struct i2c_device_id *id)
300*4882a593Smuzhiyun {
301*4882a593Smuzhiyun struct device *dev = &client->dev;
302*4882a593Smuzhiyun struct lmp91000_data *data;
303*4882a593Smuzhiyun struct iio_dev *indio_dev;
304*4882a593Smuzhiyun int ret;
305*4882a593Smuzhiyun
306*4882a593Smuzhiyun indio_dev = devm_iio_device_alloc(dev, sizeof(*data));
307*4882a593Smuzhiyun if (!indio_dev)
308*4882a593Smuzhiyun return -ENOMEM;
309*4882a593Smuzhiyun
310*4882a593Smuzhiyun indio_dev->info = &lmp91000_info;
311*4882a593Smuzhiyun indio_dev->channels = lmp91000_channels;
312*4882a593Smuzhiyun indio_dev->num_channels = ARRAY_SIZE(lmp91000_channels);
313*4882a593Smuzhiyun indio_dev->name = LMP91000_DRV_NAME;
314*4882a593Smuzhiyun indio_dev->modes = INDIO_DIRECT_MODE;
315*4882a593Smuzhiyun i2c_set_clientdata(client, indio_dev);
316*4882a593Smuzhiyun
317*4882a593Smuzhiyun data = iio_priv(indio_dev);
318*4882a593Smuzhiyun data->dev = dev;
319*4882a593Smuzhiyun data->regmap = devm_regmap_init_i2c(client, &lmp91000_regmap_config);
320*4882a593Smuzhiyun if (IS_ERR(data->regmap)) {
321*4882a593Smuzhiyun dev_err(dev, "regmap initialization failed.\n");
322*4882a593Smuzhiyun return PTR_ERR(data->regmap);
323*4882a593Smuzhiyun }
324*4882a593Smuzhiyun
325*4882a593Smuzhiyun data->trig = devm_iio_trigger_alloc(data->dev, "%s-mux%d",
326*4882a593Smuzhiyun indio_dev->name, indio_dev->id);
327*4882a593Smuzhiyun if (!data->trig) {
328*4882a593Smuzhiyun dev_err(dev, "cannot allocate iio trigger.\n");
329*4882a593Smuzhiyun return -ENOMEM;
330*4882a593Smuzhiyun }
331*4882a593Smuzhiyun
332*4882a593Smuzhiyun data->trig->ops = &lmp91000_trigger_ops;
333*4882a593Smuzhiyun data->trig->dev.parent = dev;
334*4882a593Smuzhiyun init_completion(&data->completion);
335*4882a593Smuzhiyun
336*4882a593Smuzhiyun ret = lmp91000_read_config(data);
337*4882a593Smuzhiyun if (ret)
338*4882a593Smuzhiyun return ret;
339*4882a593Smuzhiyun
340*4882a593Smuzhiyun ret = iio_trigger_set_immutable(iio_channel_cb_get_iio_dev(data->cb_buffer),
341*4882a593Smuzhiyun data->trig);
342*4882a593Smuzhiyun if (ret) {
343*4882a593Smuzhiyun dev_err(dev, "cannot set immutable trigger.\n");
344*4882a593Smuzhiyun return ret;
345*4882a593Smuzhiyun }
346*4882a593Smuzhiyun
347*4882a593Smuzhiyun ret = iio_trigger_register(data->trig);
348*4882a593Smuzhiyun if (ret) {
349*4882a593Smuzhiyun dev_err(dev, "cannot register iio trigger.\n");
350*4882a593Smuzhiyun return ret;
351*4882a593Smuzhiyun }
352*4882a593Smuzhiyun
353*4882a593Smuzhiyun ret = iio_triggered_buffer_setup(indio_dev, NULL,
354*4882a593Smuzhiyun &lmp91000_buffer_handler,
355*4882a593Smuzhiyun &lmp91000_buffer_setup_ops);
356*4882a593Smuzhiyun if (ret)
357*4882a593Smuzhiyun goto error_unreg_trigger;
358*4882a593Smuzhiyun
359*4882a593Smuzhiyun data->cb_buffer = iio_channel_get_all_cb(dev, &lmp91000_buffer_cb,
360*4882a593Smuzhiyun indio_dev);
361*4882a593Smuzhiyun
362*4882a593Smuzhiyun if (IS_ERR(data->cb_buffer)) {
363*4882a593Smuzhiyun if (PTR_ERR(data->cb_buffer) == -ENODEV)
364*4882a593Smuzhiyun ret = -EPROBE_DEFER;
365*4882a593Smuzhiyun else
366*4882a593Smuzhiyun ret = PTR_ERR(data->cb_buffer);
367*4882a593Smuzhiyun
368*4882a593Smuzhiyun goto error_unreg_buffer;
369*4882a593Smuzhiyun }
370*4882a593Smuzhiyun
371*4882a593Smuzhiyun data->adc_chan = iio_channel_cb_get_channels(data->cb_buffer);
372*4882a593Smuzhiyun
373*4882a593Smuzhiyun ret = iio_device_register(indio_dev);
374*4882a593Smuzhiyun if (ret)
375*4882a593Smuzhiyun goto error_unreg_cb_buffer;
376*4882a593Smuzhiyun
377*4882a593Smuzhiyun return 0;
378*4882a593Smuzhiyun
379*4882a593Smuzhiyun error_unreg_cb_buffer:
380*4882a593Smuzhiyun iio_channel_release_all_cb(data->cb_buffer);
381*4882a593Smuzhiyun
382*4882a593Smuzhiyun error_unreg_buffer:
383*4882a593Smuzhiyun iio_triggered_buffer_cleanup(indio_dev);
384*4882a593Smuzhiyun
385*4882a593Smuzhiyun error_unreg_trigger:
386*4882a593Smuzhiyun iio_trigger_unregister(data->trig);
387*4882a593Smuzhiyun
388*4882a593Smuzhiyun return ret;
389*4882a593Smuzhiyun }
390*4882a593Smuzhiyun
lmp91000_remove(struct i2c_client * client)391*4882a593Smuzhiyun static int lmp91000_remove(struct i2c_client *client)
392*4882a593Smuzhiyun {
393*4882a593Smuzhiyun struct iio_dev *indio_dev = i2c_get_clientdata(client);
394*4882a593Smuzhiyun struct lmp91000_data *data = iio_priv(indio_dev);
395*4882a593Smuzhiyun
396*4882a593Smuzhiyun iio_device_unregister(indio_dev);
397*4882a593Smuzhiyun
398*4882a593Smuzhiyun iio_channel_stop_all_cb(data->cb_buffer);
399*4882a593Smuzhiyun iio_channel_release_all_cb(data->cb_buffer);
400*4882a593Smuzhiyun
401*4882a593Smuzhiyun iio_triggered_buffer_cleanup(indio_dev);
402*4882a593Smuzhiyun iio_trigger_unregister(data->trig);
403*4882a593Smuzhiyun
404*4882a593Smuzhiyun return 0;
405*4882a593Smuzhiyun }
406*4882a593Smuzhiyun
407*4882a593Smuzhiyun static const struct of_device_id lmp91000_of_match[] = {
408*4882a593Smuzhiyun { .compatible = "ti,lmp91000", },
409*4882a593Smuzhiyun { .compatible = "ti,lmp91002", },
410*4882a593Smuzhiyun { },
411*4882a593Smuzhiyun };
412*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, lmp91000_of_match);
413*4882a593Smuzhiyun
414*4882a593Smuzhiyun static const struct i2c_device_id lmp91000_id[] = {
415*4882a593Smuzhiyun { "lmp91000", 0 },
416*4882a593Smuzhiyun { "lmp91002", 0 },
417*4882a593Smuzhiyun {}
418*4882a593Smuzhiyun };
419*4882a593Smuzhiyun MODULE_DEVICE_TABLE(i2c, lmp91000_id);
420*4882a593Smuzhiyun
421*4882a593Smuzhiyun static struct i2c_driver lmp91000_driver = {
422*4882a593Smuzhiyun .driver = {
423*4882a593Smuzhiyun .name = LMP91000_DRV_NAME,
424*4882a593Smuzhiyun .of_match_table = lmp91000_of_match,
425*4882a593Smuzhiyun },
426*4882a593Smuzhiyun .probe = lmp91000_probe,
427*4882a593Smuzhiyun .remove = lmp91000_remove,
428*4882a593Smuzhiyun .id_table = lmp91000_id,
429*4882a593Smuzhiyun };
430*4882a593Smuzhiyun module_i2c_driver(lmp91000_driver);
431*4882a593Smuzhiyun
432*4882a593Smuzhiyun MODULE_AUTHOR("Matt Ranostay <matt.ranostay@konsulko.com>");
433*4882a593Smuzhiyun MODULE_DESCRIPTION("LMP91000 digital potentiostat");
434*4882a593Smuzhiyun MODULE_LICENSE("GPL");
435