xref: /OK3568_Linux_fs/kernel/drivers/iio/magnetometer/mag3110.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * mag3110.c - Support for Freescale MAG3110 magnetometer sensor
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (c) 2013 Peter Meerwald <pmeerw@pmeerw.net>
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * (7-bit I2C slave address 0x0e)
8*4882a593Smuzhiyun  *
9*4882a593Smuzhiyun  * TODO: irq, user offset, oversampling, continuous mode
10*4882a593Smuzhiyun  */
11*4882a593Smuzhiyun 
12*4882a593Smuzhiyun #include <linux/module.h>
13*4882a593Smuzhiyun #include <linux/i2c.h>
14*4882a593Smuzhiyun #include <linux/iio/iio.h>
15*4882a593Smuzhiyun #include <linux/iio/sysfs.h>
16*4882a593Smuzhiyun #include <linux/iio/trigger_consumer.h>
17*4882a593Smuzhiyun #include <linux/iio/buffer.h>
18*4882a593Smuzhiyun #include <linux/iio/triggered_buffer.h>
19*4882a593Smuzhiyun #include <linux/delay.h>
20*4882a593Smuzhiyun #include <linux/regulator/consumer.h>
21*4882a593Smuzhiyun 
22*4882a593Smuzhiyun #define MAG3110_STATUS 0x00
23*4882a593Smuzhiyun #define MAG3110_OUT_X 0x01 /* MSB first */
24*4882a593Smuzhiyun #define MAG3110_OUT_Y 0x03
25*4882a593Smuzhiyun #define MAG3110_OUT_Z 0x05
26*4882a593Smuzhiyun #define MAG3110_WHO_AM_I 0x07
27*4882a593Smuzhiyun #define MAG3110_SYSMOD 0x08
28*4882a593Smuzhiyun #define MAG3110_OFF_X 0x09 /* MSB first */
29*4882a593Smuzhiyun #define MAG3110_OFF_Y 0x0b
30*4882a593Smuzhiyun #define MAG3110_OFF_Z 0x0d
31*4882a593Smuzhiyun #define MAG3110_DIE_TEMP 0x0f
32*4882a593Smuzhiyun #define MAG3110_CTRL_REG1 0x10
33*4882a593Smuzhiyun #define MAG3110_CTRL_REG2 0x11
34*4882a593Smuzhiyun 
35*4882a593Smuzhiyun #define MAG3110_STATUS_DRDY (BIT(2) | BIT(1) | BIT(0))
36*4882a593Smuzhiyun 
37*4882a593Smuzhiyun #define MAG3110_CTRL_DR_MASK (BIT(7) | BIT(6) | BIT(5))
38*4882a593Smuzhiyun #define MAG3110_CTRL_DR_SHIFT 5
39*4882a593Smuzhiyun #define MAG3110_CTRL_DR_DEFAULT 0
40*4882a593Smuzhiyun 
41*4882a593Smuzhiyun #define MAG3110_SYSMOD_MODE_MASK GENMASK(1, 0)
42*4882a593Smuzhiyun 
43*4882a593Smuzhiyun #define MAG3110_CTRL_TM BIT(1) /* trigger single measurement */
44*4882a593Smuzhiyun #define MAG3110_CTRL_AC BIT(0) /* continuous measurements */
45*4882a593Smuzhiyun 
46*4882a593Smuzhiyun #define MAG3110_CTRL_AUTO_MRST_EN BIT(7) /* magnetic auto-reset */
47*4882a593Smuzhiyun #define MAG3110_CTRL_RAW BIT(5) /* measurements not user-offset corrected */
48*4882a593Smuzhiyun 
49*4882a593Smuzhiyun #define MAG3110_DEVICE_ID 0xc4
50*4882a593Smuzhiyun 
51*4882a593Smuzhiyun /* Each client has this additional data */
52*4882a593Smuzhiyun struct mag3110_data {
53*4882a593Smuzhiyun 	struct i2c_client *client;
54*4882a593Smuzhiyun 	struct mutex lock;
55*4882a593Smuzhiyun 	u8 ctrl_reg1;
56*4882a593Smuzhiyun 	int sleep_val;
57*4882a593Smuzhiyun 	struct regulator *vdd_reg;
58*4882a593Smuzhiyun 	struct regulator *vddio_reg;
59*4882a593Smuzhiyun 	/* Ensure natural alignment of timestamp */
60*4882a593Smuzhiyun 	struct {
61*4882a593Smuzhiyun 		__be16 channels[3];
62*4882a593Smuzhiyun 		u8 temperature;
63*4882a593Smuzhiyun 		s64 ts __aligned(8);
64*4882a593Smuzhiyun 	} scan;
65*4882a593Smuzhiyun };
66*4882a593Smuzhiyun 
mag3110_request(struct mag3110_data * data)67*4882a593Smuzhiyun static int mag3110_request(struct mag3110_data *data)
68*4882a593Smuzhiyun {
69*4882a593Smuzhiyun 	int ret, tries = 150;
70*4882a593Smuzhiyun 
71*4882a593Smuzhiyun 	if ((data->ctrl_reg1 & MAG3110_CTRL_AC) == 0) {
72*4882a593Smuzhiyun 		/* trigger measurement */
73*4882a593Smuzhiyun 		ret = i2c_smbus_write_byte_data(data->client, MAG3110_CTRL_REG1,
74*4882a593Smuzhiyun 			data->ctrl_reg1 | MAG3110_CTRL_TM);
75*4882a593Smuzhiyun 		if (ret < 0)
76*4882a593Smuzhiyun 			return ret;
77*4882a593Smuzhiyun 	}
78*4882a593Smuzhiyun 
79*4882a593Smuzhiyun 	while (tries-- > 0) {
80*4882a593Smuzhiyun 		ret = i2c_smbus_read_byte_data(data->client, MAG3110_STATUS);
81*4882a593Smuzhiyun 		if (ret < 0)
82*4882a593Smuzhiyun 			return ret;
83*4882a593Smuzhiyun 		/* wait for data ready */
84*4882a593Smuzhiyun 		if ((ret & MAG3110_STATUS_DRDY) == MAG3110_STATUS_DRDY)
85*4882a593Smuzhiyun 			break;
86*4882a593Smuzhiyun 
87*4882a593Smuzhiyun 		if (data->sleep_val <= 20)
88*4882a593Smuzhiyun 			usleep_range(data->sleep_val * 250, data->sleep_val * 500);
89*4882a593Smuzhiyun 		else
90*4882a593Smuzhiyun 			msleep(20);
91*4882a593Smuzhiyun 	}
92*4882a593Smuzhiyun 
93*4882a593Smuzhiyun 	if (tries < 0) {
94*4882a593Smuzhiyun 		dev_err(&data->client->dev, "data not ready\n");
95*4882a593Smuzhiyun 		return -EIO;
96*4882a593Smuzhiyun 	}
97*4882a593Smuzhiyun 
98*4882a593Smuzhiyun 	return 0;
99*4882a593Smuzhiyun }
100*4882a593Smuzhiyun 
mag3110_read(struct mag3110_data * data,__be16 buf[3])101*4882a593Smuzhiyun static int mag3110_read(struct mag3110_data *data, __be16 buf[3])
102*4882a593Smuzhiyun {
103*4882a593Smuzhiyun 	int ret;
104*4882a593Smuzhiyun 
105*4882a593Smuzhiyun 	mutex_lock(&data->lock);
106*4882a593Smuzhiyun 	ret = mag3110_request(data);
107*4882a593Smuzhiyun 	if (ret < 0) {
108*4882a593Smuzhiyun 		mutex_unlock(&data->lock);
109*4882a593Smuzhiyun 		return ret;
110*4882a593Smuzhiyun 	}
111*4882a593Smuzhiyun 	ret = i2c_smbus_read_i2c_block_data(data->client,
112*4882a593Smuzhiyun 		MAG3110_OUT_X, 3 * sizeof(__be16), (u8 *) buf);
113*4882a593Smuzhiyun 	mutex_unlock(&data->lock);
114*4882a593Smuzhiyun 
115*4882a593Smuzhiyun 	return ret;
116*4882a593Smuzhiyun }
117*4882a593Smuzhiyun 
mag3110_show_int_plus_micros(char * buf,const int (* vals)[2],int n)118*4882a593Smuzhiyun static ssize_t mag3110_show_int_plus_micros(char *buf,
119*4882a593Smuzhiyun 	const int (*vals)[2], int n)
120*4882a593Smuzhiyun {
121*4882a593Smuzhiyun 	size_t len = 0;
122*4882a593Smuzhiyun 
123*4882a593Smuzhiyun 	while (n-- > 0)
124*4882a593Smuzhiyun 		len += scnprintf(buf + len, PAGE_SIZE - len,
125*4882a593Smuzhiyun 			"%d.%06d ", vals[n][0], vals[n][1]);
126*4882a593Smuzhiyun 
127*4882a593Smuzhiyun 	/* replace trailing space by newline */
128*4882a593Smuzhiyun 	buf[len - 1] = '\n';
129*4882a593Smuzhiyun 
130*4882a593Smuzhiyun 	return len;
131*4882a593Smuzhiyun }
132*4882a593Smuzhiyun 
mag3110_get_int_plus_micros_index(const int (* vals)[2],int n,int val,int val2)133*4882a593Smuzhiyun static int mag3110_get_int_plus_micros_index(const int (*vals)[2], int n,
134*4882a593Smuzhiyun 					int val, int val2)
135*4882a593Smuzhiyun {
136*4882a593Smuzhiyun 	while (n-- > 0)
137*4882a593Smuzhiyun 		if (val == vals[n][0] && val2 == vals[n][1])
138*4882a593Smuzhiyun 			return n;
139*4882a593Smuzhiyun 
140*4882a593Smuzhiyun 	return -EINVAL;
141*4882a593Smuzhiyun }
142*4882a593Smuzhiyun 
143*4882a593Smuzhiyun static const int mag3110_samp_freq[8][2] = {
144*4882a593Smuzhiyun 	{80, 0}, {40, 0}, {20, 0}, {10, 0}, {5, 0}, {2, 500000},
145*4882a593Smuzhiyun 	{1, 250000}, {0, 625000}
146*4882a593Smuzhiyun };
147*4882a593Smuzhiyun 
mag3110_show_samp_freq_avail(struct device * dev,struct device_attribute * attr,char * buf)148*4882a593Smuzhiyun static ssize_t mag3110_show_samp_freq_avail(struct device *dev,
149*4882a593Smuzhiyun 				struct device_attribute *attr, char *buf)
150*4882a593Smuzhiyun {
151*4882a593Smuzhiyun 	return mag3110_show_int_plus_micros(buf, mag3110_samp_freq, 8);
152*4882a593Smuzhiyun }
153*4882a593Smuzhiyun 
154*4882a593Smuzhiyun static IIO_DEV_ATTR_SAMP_FREQ_AVAIL(mag3110_show_samp_freq_avail);
155*4882a593Smuzhiyun 
mag3110_get_samp_freq_index(struct mag3110_data * data,int val,int val2)156*4882a593Smuzhiyun static int mag3110_get_samp_freq_index(struct mag3110_data *data,
157*4882a593Smuzhiyun 	int val, int val2)
158*4882a593Smuzhiyun {
159*4882a593Smuzhiyun 	return mag3110_get_int_plus_micros_index(mag3110_samp_freq, 8, val,
160*4882a593Smuzhiyun 		val2);
161*4882a593Smuzhiyun }
162*4882a593Smuzhiyun 
mag3110_calculate_sleep(struct mag3110_data * data)163*4882a593Smuzhiyun static int mag3110_calculate_sleep(struct mag3110_data *data)
164*4882a593Smuzhiyun {
165*4882a593Smuzhiyun 	int ret, i = data->ctrl_reg1 >> MAG3110_CTRL_DR_SHIFT;
166*4882a593Smuzhiyun 
167*4882a593Smuzhiyun 	if (mag3110_samp_freq[i][0] > 0)
168*4882a593Smuzhiyun 		ret = 1000 / mag3110_samp_freq[i][0];
169*4882a593Smuzhiyun 	else
170*4882a593Smuzhiyun 		ret = 1000;
171*4882a593Smuzhiyun 
172*4882a593Smuzhiyun 	return ret == 0 ? 1 : ret;
173*4882a593Smuzhiyun }
174*4882a593Smuzhiyun 
mag3110_standby(struct mag3110_data * data)175*4882a593Smuzhiyun static int mag3110_standby(struct mag3110_data *data)
176*4882a593Smuzhiyun {
177*4882a593Smuzhiyun 	return i2c_smbus_write_byte_data(data->client, MAG3110_CTRL_REG1,
178*4882a593Smuzhiyun 		data->ctrl_reg1 & ~MAG3110_CTRL_AC);
179*4882a593Smuzhiyun }
180*4882a593Smuzhiyun 
mag3110_wait_standby(struct mag3110_data * data)181*4882a593Smuzhiyun static int mag3110_wait_standby(struct mag3110_data *data)
182*4882a593Smuzhiyun {
183*4882a593Smuzhiyun 	int ret, tries = 30;
184*4882a593Smuzhiyun 
185*4882a593Smuzhiyun 	/*
186*4882a593Smuzhiyun 	 * Takes up to 1/ODR to come out of active mode into stby
187*4882a593Smuzhiyun 	 * Longest expected period is 12.5seconds.
188*4882a593Smuzhiyun 	 * We'll sleep for 500ms between checks
189*4882a593Smuzhiyun 	 */
190*4882a593Smuzhiyun 	while (tries-- > 0) {
191*4882a593Smuzhiyun 		ret = i2c_smbus_read_byte_data(data->client, MAG3110_SYSMOD);
192*4882a593Smuzhiyun 		if (ret < 0) {
193*4882a593Smuzhiyun 			dev_err(&data->client->dev, "i2c error\n");
194*4882a593Smuzhiyun 			return ret;
195*4882a593Smuzhiyun 		}
196*4882a593Smuzhiyun 		/* wait for standby */
197*4882a593Smuzhiyun 		if ((ret & MAG3110_SYSMOD_MODE_MASK) == 0)
198*4882a593Smuzhiyun 			break;
199*4882a593Smuzhiyun 
200*4882a593Smuzhiyun 		msleep_interruptible(500);
201*4882a593Smuzhiyun 	}
202*4882a593Smuzhiyun 
203*4882a593Smuzhiyun 	if (tries < 0) {
204*4882a593Smuzhiyun 		dev_err(&data->client->dev, "device not entering standby mode\n");
205*4882a593Smuzhiyun 		return -EIO;
206*4882a593Smuzhiyun 	}
207*4882a593Smuzhiyun 
208*4882a593Smuzhiyun 	return 0;
209*4882a593Smuzhiyun }
210*4882a593Smuzhiyun 
mag3110_active(struct mag3110_data * data)211*4882a593Smuzhiyun static int mag3110_active(struct mag3110_data *data)
212*4882a593Smuzhiyun {
213*4882a593Smuzhiyun 	return i2c_smbus_write_byte_data(data->client, MAG3110_CTRL_REG1,
214*4882a593Smuzhiyun 					 data->ctrl_reg1);
215*4882a593Smuzhiyun }
216*4882a593Smuzhiyun 
217*4882a593Smuzhiyun /* returns >0 if active, 0 if in standby and <0 on error */
mag3110_is_active(struct mag3110_data * data)218*4882a593Smuzhiyun static int mag3110_is_active(struct mag3110_data *data)
219*4882a593Smuzhiyun {
220*4882a593Smuzhiyun 	int reg;
221*4882a593Smuzhiyun 
222*4882a593Smuzhiyun 	reg = i2c_smbus_read_byte_data(data->client, MAG3110_CTRL_REG1);
223*4882a593Smuzhiyun 	if (reg < 0)
224*4882a593Smuzhiyun 		return reg;
225*4882a593Smuzhiyun 
226*4882a593Smuzhiyun 	return reg & MAG3110_CTRL_AC;
227*4882a593Smuzhiyun }
228*4882a593Smuzhiyun 
mag3110_change_config(struct mag3110_data * data,u8 reg,u8 val)229*4882a593Smuzhiyun static int mag3110_change_config(struct mag3110_data *data, u8 reg, u8 val)
230*4882a593Smuzhiyun {
231*4882a593Smuzhiyun 	int ret;
232*4882a593Smuzhiyun 	int is_active;
233*4882a593Smuzhiyun 
234*4882a593Smuzhiyun 	mutex_lock(&data->lock);
235*4882a593Smuzhiyun 
236*4882a593Smuzhiyun 	is_active = mag3110_is_active(data);
237*4882a593Smuzhiyun 	if (is_active < 0) {
238*4882a593Smuzhiyun 		ret = is_active;
239*4882a593Smuzhiyun 		goto fail;
240*4882a593Smuzhiyun 	}
241*4882a593Smuzhiyun 
242*4882a593Smuzhiyun 	/* config can only be changed when in standby */
243*4882a593Smuzhiyun 	if (is_active > 0) {
244*4882a593Smuzhiyun 		ret = mag3110_standby(data);
245*4882a593Smuzhiyun 		if (ret < 0)
246*4882a593Smuzhiyun 			goto fail;
247*4882a593Smuzhiyun 	}
248*4882a593Smuzhiyun 
249*4882a593Smuzhiyun 	/*
250*4882a593Smuzhiyun 	 * After coming out of active we must wait for the part
251*4882a593Smuzhiyun 	 * to transition to STBY. This can take up to 1 /ODR to occur
252*4882a593Smuzhiyun 	 */
253*4882a593Smuzhiyun 	ret = mag3110_wait_standby(data);
254*4882a593Smuzhiyun 	if (ret < 0)
255*4882a593Smuzhiyun 		goto fail;
256*4882a593Smuzhiyun 
257*4882a593Smuzhiyun 	ret = i2c_smbus_write_byte_data(data->client, reg, val);
258*4882a593Smuzhiyun 	if (ret < 0)
259*4882a593Smuzhiyun 		goto fail;
260*4882a593Smuzhiyun 
261*4882a593Smuzhiyun 	if (is_active > 0) {
262*4882a593Smuzhiyun 		ret = mag3110_active(data);
263*4882a593Smuzhiyun 		if (ret < 0)
264*4882a593Smuzhiyun 			goto fail;
265*4882a593Smuzhiyun 	}
266*4882a593Smuzhiyun 
267*4882a593Smuzhiyun 	ret = 0;
268*4882a593Smuzhiyun fail:
269*4882a593Smuzhiyun 	mutex_unlock(&data->lock);
270*4882a593Smuzhiyun 
271*4882a593Smuzhiyun 	return ret;
272*4882a593Smuzhiyun }
273*4882a593Smuzhiyun 
mag3110_read_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int * val,int * val2,long mask)274*4882a593Smuzhiyun static int mag3110_read_raw(struct iio_dev *indio_dev,
275*4882a593Smuzhiyun 			    struct iio_chan_spec const *chan,
276*4882a593Smuzhiyun 			    int *val, int *val2, long mask)
277*4882a593Smuzhiyun {
278*4882a593Smuzhiyun 	struct mag3110_data *data = iio_priv(indio_dev);
279*4882a593Smuzhiyun 	__be16 buffer[3];
280*4882a593Smuzhiyun 	int i, ret;
281*4882a593Smuzhiyun 
282*4882a593Smuzhiyun 	switch (mask) {
283*4882a593Smuzhiyun 	case IIO_CHAN_INFO_RAW:
284*4882a593Smuzhiyun 		ret = iio_device_claim_direct_mode(indio_dev);
285*4882a593Smuzhiyun 		if (ret)
286*4882a593Smuzhiyun 			return ret;
287*4882a593Smuzhiyun 
288*4882a593Smuzhiyun 		switch (chan->type) {
289*4882a593Smuzhiyun 		case IIO_MAGN: /* in 0.1 uT / LSB */
290*4882a593Smuzhiyun 			ret = mag3110_read(data, buffer);
291*4882a593Smuzhiyun 			if (ret < 0)
292*4882a593Smuzhiyun 				goto release;
293*4882a593Smuzhiyun 			*val = sign_extend32(
294*4882a593Smuzhiyun 				be16_to_cpu(buffer[chan->scan_index]), 15);
295*4882a593Smuzhiyun 			ret = IIO_VAL_INT;
296*4882a593Smuzhiyun 			break;
297*4882a593Smuzhiyun 		case IIO_TEMP: /* in 1 C / LSB */
298*4882a593Smuzhiyun 			mutex_lock(&data->lock);
299*4882a593Smuzhiyun 			ret = mag3110_request(data);
300*4882a593Smuzhiyun 			if (ret < 0) {
301*4882a593Smuzhiyun 				mutex_unlock(&data->lock);
302*4882a593Smuzhiyun 				goto release;
303*4882a593Smuzhiyun 			}
304*4882a593Smuzhiyun 			ret = i2c_smbus_read_byte_data(data->client,
305*4882a593Smuzhiyun 				MAG3110_DIE_TEMP);
306*4882a593Smuzhiyun 			mutex_unlock(&data->lock);
307*4882a593Smuzhiyun 			if (ret < 0)
308*4882a593Smuzhiyun 				goto release;
309*4882a593Smuzhiyun 			*val = sign_extend32(ret, 7);
310*4882a593Smuzhiyun 			ret = IIO_VAL_INT;
311*4882a593Smuzhiyun 			break;
312*4882a593Smuzhiyun 		default:
313*4882a593Smuzhiyun 			ret = -EINVAL;
314*4882a593Smuzhiyun 		}
315*4882a593Smuzhiyun release:
316*4882a593Smuzhiyun 		iio_device_release_direct_mode(indio_dev);
317*4882a593Smuzhiyun 		return ret;
318*4882a593Smuzhiyun 
319*4882a593Smuzhiyun 	case IIO_CHAN_INFO_SCALE:
320*4882a593Smuzhiyun 		switch (chan->type) {
321*4882a593Smuzhiyun 		case IIO_MAGN:
322*4882a593Smuzhiyun 			*val = 0;
323*4882a593Smuzhiyun 			*val2 = 1000;
324*4882a593Smuzhiyun 			return IIO_VAL_INT_PLUS_MICRO;
325*4882a593Smuzhiyun 		case IIO_TEMP:
326*4882a593Smuzhiyun 			*val = 1000;
327*4882a593Smuzhiyun 			return IIO_VAL_INT;
328*4882a593Smuzhiyun 		default:
329*4882a593Smuzhiyun 			return -EINVAL;
330*4882a593Smuzhiyun 		}
331*4882a593Smuzhiyun 	case IIO_CHAN_INFO_SAMP_FREQ:
332*4882a593Smuzhiyun 		i = data->ctrl_reg1 >> MAG3110_CTRL_DR_SHIFT;
333*4882a593Smuzhiyun 		*val = mag3110_samp_freq[i][0];
334*4882a593Smuzhiyun 		*val2 = mag3110_samp_freq[i][1];
335*4882a593Smuzhiyun 		return IIO_VAL_INT_PLUS_MICRO;
336*4882a593Smuzhiyun 	case IIO_CHAN_INFO_CALIBBIAS:
337*4882a593Smuzhiyun 		ret = i2c_smbus_read_word_swapped(data->client,
338*4882a593Smuzhiyun 			MAG3110_OFF_X +	2 * chan->scan_index);
339*4882a593Smuzhiyun 		if (ret < 0)
340*4882a593Smuzhiyun 			return ret;
341*4882a593Smuzhiyun 		*val = sign_extend32(ret >> 1, 14);
342*4882a593Smuzhiyun 		return IIO_VAL_INT;
343*4882a593Smuzhiyun 	}
344*4882a593Smuzhiyun 	return -EINVAL;
345*4882a593Smuzhiyun }
346*4882a593Smuzhiyun 
mag3110_write_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int val,int val2,long mask)347*4882a593Smuzhiyun static int mag3110_write_raw(struct iio_dev *indio_dev,
348*4882a593Smuzhiyun 			     struct iio_chan_spec const *chan,
349*4882a593Smuzhiyun 			     int val, int val2, long mask)
350*4882a593Smuzhiyun {
351*4882a593Smuzhiyun 	struct mag3110_data *data = iio_priv(indio_dev);
352*4882a593Smuzhiyun 	int rate, ret;
353*4882a593Smuzhiyun 
354*4882a593Smuzhiyun 	ret = iio_device_claim_direct_mode(indio_dev);
355*4882a593Smuzhiyun 	if (ret)
356*4882a593Smuzhiyun 		return ret;
357*4882a593Smuzhiyun 
358*4882a593Smuzhiyun 	switch (mask) {
359*4882a593Smuzhiyun 	case IIO_CHAN_INFO_SAMP_FREQ:
360*4882a593Smuzhiyun 		rate = mag3110_get_samp_freq_index(data, val, val2);
361*4882a593Smuzhiyun 		if (rate < 0) {
362*4882a593Smuzhiyun 			ret = -EINVAL;
363*4882a593Smuzhiyun 			break;
364*4882a593Smuzhiyun 		}
365*4882a593Smuzhiyun 		data->ctrl_reg1 &= 0xff & ~MAG3110_CTRL_DR_MASK
366*4882a593Smuzhiyun 					& ~MAG3110_CTRL_AC;
367*4882a593Smuzhiyun 		data->ctrl_reg1 |= rate << MAG3110_CTRL_DR_SHIFT;
368*4882a593Smuzhiyun 		data->sleep_val = mag3110_calculate_sleep(data);
369*4882a593Smuzhiyun 		if (data->sleep_val < 40)
370*4882a593Smuzhiyun 			data->ctrl_reg1 |= MAG3110_CTRL_AC;
371*4882a593Smuzhiyun 
372*4882a593Smuzhiyun 		ret = mag3110_change_config(data, MAG3110_CTRL_REG1,
373*4882a593Smuzhiyun 					    data->ctrl_reg1);
374*4882a593Smuzhiyun 		break;
375*4882a593Smuzhiyun 	case IIO_CHAN_INFO_CALIBBIAS:
376*4882a593Smuzhiyun 		if (val < -10000 || val > 10000) {
377*4882a593Smuzhiyun 			ret = -EINVAL;
378*4882a593Smuzhiyun 			break;
379*4882a593Smuzhiyun 		}
380*4882a593Smuzhiyun 		ret = i2c_smbus_write_word_swapped(data->client,
381*4882a593Smuzhiyun 			MAG3110_OFF_X + 2 * chan->scan_index, val << 1);
382*4882a593Smuzhiyun 		break;
383*4882a593Smuzhiyun 	default:
384*4882a593Smuzhiyun 		ret = -EINVAL;
385*4882a593Smuzhiyun 		break;
386*4882a593Smuzhiyun 	}
387*4882a593Smuzhiyun 	iio_device_release_direct_mode(indio_dev);
388*4882a593Smuzhiyun 	return ret;
389*4882a593Smuzhiyun }
390*4882a593Smuzhiyun 
mag3110_trigger_handler(int irq,void * p)391*4882a593Smuzhiyun static irqreturn_t mag3110_trigger_handler(int irq, void *p)
392*4882a593Smuzhiyun {
393*4882a593Smuzhiyun 	struct iio_poll_func *pf = p;
394*4882a593Smuzhiyun 	struct iio_dev *indio_dev = pf->indio_dev;
395*4882a593Smuzhiyun 	struct mag3110_data *data = iio_priv(indio_dev);
396*4882a593Smuzhiyun 	int ret;
397*4882a593Smuzhiyun 
398*4882a593Smuzhiyun 	ret = mag3110_read(data, data->scan.channels);
399*4882a593Smuzhiyun 	if (ret < 0)
400*4882a593Smuzhiyun 		goto done;
401*4882a593Smuzhiyun 
402*4882a593Smuzhiyun 	if (test_bit(3, indio_dev->active_scan_mask)) {
403*4882a593Smuzhiyun 		ret = i2c_smbus_read_byte_data(data->client,
404*4882a593Smuzhiyun 			MAG3110_DIE_TEMP);
405*4882a593Smuzhiyun 		if (ret < 0)
406*4882a593Smuzhiyun 			goto done;
407*4882a593Smuzhiyun 		data->scan.temperature = ret;
408*4882a593Smuzhiyun 	}
409*4882a593Smuzhiyun 
410*4882a593Smuzhiyun 	iio_push_to_buffers_with_timestamp(indio_dev, &data->scan,
411*4882a593Smuzhiyun 		iio_get_time_ns(indio_dev));
412*4882a593Smuzhiyun 
413*4882a593Smuzhiyun done:
414*4882a593Smuzhiyun 	iio_trigger_notify_done(indio_dev->trig);
415*4882a593Smuzhiyun 	return IRQ_HANDLED;
416*4882a593Smuzhiyun }
417*4882a593Smuzhiyun 
418*4882a593Smuzhiyun #define MAG3110_CHANNEL(axis, idx) { \
419*4882a593Smuzhiyun 	.type = IIO_MAGN, \
420*4882a593Smuzhiyun 	.modified = 1, \
421*4882a593Smuzhiyun 	.channel2 = IIO_MOD_##axis, \
422*4882a593Smuzhiyun 	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
423*4882a593Smuzhiyun 		BIT(IIO_CHAN_INFO_CALIBBIAS), \
424*4882a593Smuzhiyun 	.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SAMP_FREQ) | \
425*4882a593Smuzhiyun 		BIT(IIO_CHAN_INFO_SCALE), \
426*4882a593Smuzhiyun 	.scan_index = idx, \
427*4882a593Smuzhiyun 	.scan_type = { \
428*4882a593Smuzhiyun 		.sign = 's', \
429*4882a593Smuzhiyun 		.realbits = 16, \
430*4882a593Smuzhiyun 		.storagebits = 16, \
431*4882a593Smuzhiyun 		.endianness = IIO_BE, \
432*4882a593Smuzhiyun 	}, \
433*4882a593Smuzhiyun }
434*4882a593Smuzhiyun 
435*4882a593Smuzhiyun static const struct iio_chan_spec mag3110_channels[] = {
436*4882a593Smuzhiyun 	MAG3110_CHANNEL(X, 0),
437*4882a593Smuzhiyun 	MAG3110_CHANNEL(Y, 1),
438*4882a593Smuzhiyun 	MAG3110_CHANNEL(Z, 2),
439*4882a593Smuzhiyun 	{
440*4882a593Smuzhiyun 		.type = IIO_TEMP,
441*4882a593Smuzhiyun 		.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
442*4882a593Smuzhiyun 			BIT(IIO_CHAN_INFO_SCALE),
443*4882a593Smuzhiyun 		.scan_index = 3,
444*4882a593Smuzhiyun 		.scan_type = {
445*4882a593Smuzhiyun 			.sign = 's',
446*4882a593Smuzhiyun 			.realbits = 8,
447*4882a593Smuzhiyun 			.storagebits = 8,
448*4882a593Smuzhiyun 			},
449*4882a593Smuzhiyun 	},
450*4882a593Smuzhiyun 	IIO_CHAN_SOFT_TIMESTAMP(4),
451*4882a593Smuzhiyun };
452*4882a593Smuzhiyun 
453*4882a593Smuzhiyun static struct attribute *mag3110_attributes[] = {
454*4882a593Smuzhiyun 	&iio_dev_attr_sampling_frequency_available.dev_attr.attr,
455*4882a593Smuzhiyun 	NULL
456*4882a593Smuzhiyun };
457*4882a593Smuzhiyun 
458*4882a593Smuzhiyun static const struct attribute_group mag3110_group = {
459*4882a593Smuzhiyun 	.attrs = mag3110_attributes,
460*4882a593Smuzhiyun };
461*4882a593Smuzhiyun 
462*4882a593Smuzhiyun static const struct iio_info mag3110_info = {
463*4882a593Smuzhiyun 	.attrs = &mag3110_group,
464*4882a593Smuzhiyun 	.read_raw = &mag3110_read_raw,
465*4882a593Smuzhiyun 	.write_raw = &mag3110_write_raw,
466*4882a593Smuzhiyun };
467*4882a593Smuzhiyun 
468*4882a593Smuzhiyun static const unsigned long mag3110_scan_masks[] = {0x7, 0xf, 0};
469*4882a593Smuzhiyun 
mag3110_probe(struct i2c_client * client,const struct i2c_device_id * id)470*4882a593Smuzhiyun static int mag3110_probe(struct i2c_client *client,
471*4882a593Smuzhiyun 			 const struct i2c_device_id *id)
472*4882a593Smuzhiyun {
473*4882a593Smuzhiyun 	struct mag3110_data *data;
474*4882a593Smuzhiyun 	struct iio_dev *indio_dev;
475*4882a593Smuzhiyun 	int ret;
476*4882a593Smuzhiyun 
477*4882a593Smuzhiyun 	indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
478*4882a593Smuzhiyun 	if (!indio_dev)
479*4882a593Smuzhiyun 		return -ENOMEM;
480*4882a593Smuzhiyun 
481*4882a593Smuzhiyun 	data = iio_priv(indio_dev);
482*4882a593Smuzhiyun 
483*4882a593Smuzhiyun 	data->vdd_reg = devm_regulator_get(&client->dev, "vdd");
484*4882a593Smuzhiyun 	if (IS_ERR(data->vdd_reg))
485*4882a593Smuzhiyun 		return dev_err_probe(&client->dev, PTR_ERR(data->vdd_reg),
486*4882a593Smuzhiyun 				     "failed to get VDD regulator!\n");
487*4882a593Smuzhiyun 
488*4882a593Smuzhiyun 	data->vddio_reg = devm_regulator_get(&client->dev, "vddio");
489*4882a593Smuzhiyun 	if (IS_ERR(data->vddio_reg))
490*4882a593Smuzhiyun 		return dev_err_probe(&client->dev, PTR_ERR(data->vddio_reg),
491*4882a593Smuzhiyun 				     "failed to get VDDIO regulator!\n");
492*4882a593Smuzhiyun 
493*4882a593Smuzhiyun 	ret = regulator_enable(data->vdd_reg);
494*4882a593Smuzhiyun 	if (ret) {
495*4882a593Smuzhiyun 		dev_err(&client->dev, "failed to enable VDD regulator!\n");
496*4882a593Smuzhiyun 		return ret;
497*4882a593Smuzhiyun 	}
498*4882a593Smuzhiyun 
499*4882a593Smuzhiyun 	ret = regulator_enable(data->vddio_reg);
500*4882a593Smuzhiyun 	if (ret) {
501*4882a593Smuzhiyun 		dev_err(&client->dev, "failed to enable VDDIO regulator!\n");
502*4882a593Smuzhiyun 		goto disable_regulator_vdd;
503*4882a593Smuzhiyun 	}
504*4882a593Smuzhiyun 
505*4882a593Smuzhiyun 	ret = i2c_smbus_read_byte_data(client, MAG3110_WHO_AM_I);
506*4882a593Smuzhiyun 	if (ret < 0)
507*4882a593Smuzhiyun 		goto disable_regulators;
508*4882a593Smuzhiyun 	if (ret != MAG3110_DEVICE_ID) {
509*4882a593Smuzhiyun 		ret = -ENODEV;
510*4882a593Smuzhiyun 		goto disable_regulators;
511*4882a593Smuzhiyun 	}
512*4882a593Smuzhiyun 
513*4882a593Smuzhiyun 	data->client = client;
514*4882a593Smuzhiyun 	mutex_init(&data->lock);
515*4882a593Smuzhiyun 
516*4882a593Smuzhiyun 	i2c_set_clientdata(client, indio_dev);
517*4882a593Smuzhiyun 	indio_dev->info = &mag3110_info;
518*4882a593Smuzhiyun 	indio_dev->name = id->name;
519*4882a593Smuzhiyun 	indio_dev->modes = INDIO_DIRECT_MODE;
520*4882a593Smuzhiyun 	indio_dev->channels = mag3110_channels;
521*4882a593Smuzhiyun 	indio_dev->num_channels = ARRAY_SIZE(mag3110_channels);
522*4882a593Smuzhiyun 	indio_dev->available_scan_masks = mag3110_scan_masks;
523*4882a593Smuzhiyun 
524*4882a593Smuzhiyun 	data->ctrl_reg1 = MAG3110_CTRL_DR_DEFAULT << MAG3110_CTRL_DR_SHIFT;
525*4882a593Smuzhiyun 	data->sleep_val = mag3110_calculate_sleep(data);
526*4882a593Smuzhiyun 	if (data->sleep_val < 40)
527*4882a593Smuzhiyun 		data->ctrl_reg1 |= MAG3110_CTRL_AC;
528*4882a593Smuzhiyun 
529*4882a593Smuzhiyun 	ret = mag3110_change_config(data, MAG3110_CTRL_REG1, data->ctrl_reg1);
530*4882a593Smuzhiyun 	if (ret < 0)
531*4882a593Smuzhiyun 		goto disable_regulators;
532*4882a593Smuzhiyun 
533*4882a593Smuzhiyun 	ret = i2c_smbus_write_byte_data(client, MAG3110_CTRL_REG2,
534*4882a593Smuzhiyun 		MAG3110_CTRL_AUTO_MRST_EN);
535*4882a593Smuzhiyun 	if (ret < 0)
536*4882a593Smuzhiyun 		goto standby_on_error;
537*4882a593Smuzhiyun 
538*4882a593Smuzhiyun 	ret = iio_triggered_buffer_setup(indio_dev, NULL,
539*4882a593Smuzhiyun 		mag3110_trigger_handler, NULL);
540*4882a593Smuzhiyun 	if (ret < 0)
541*4882a593Smuzhiyun 		goto standby_on_error;
542*4882a593Smuzhiyun 
543*4882a593Smuzhiyun 	ret = iio_device_register(indio_dev);
544*4882a593Smuzhiyun 	if (ret < 0)
545*4882a593Smuzhiyun 		goto buffer_cleanup;
546*4882a593Smuzhiyun 	return 0;
547*4882a593Smuzhiyun 
548*4882a593Smuzhiyun buffer_cleanup:
549*4882a593Smuzhiyun 	iio_triggered_buffer_cleanup(indio_dev);
550*4882a593Smuzhiyun standby_on_error:
551*4882a593Smuzhiyun 	mag3110_standby(iio_priv(indio_dev));
552*4882a593Smuzhiyun disable_regulators:
553*4882a593Smuzhiyun 	regulator_disable(data->vddio_reg);
554*4882a593Smuzhiyun disable_regulator_vdd:
555*4882a593Smuzhiyun 	regulator_disable(data->vdd_reg);
556*4882a593Smuzhiyun 
557*4882a593Smuzhiyun 	return ret;
558*4882a593Smuzhiyun }
559*4882a593Smuzhiyun 
mag3110_remove(struct i2c_client * client)560*4882a593Smuzhiyun static int mag3110_remove(struct i2c_client *client)
561*4882a593Smuzhiyun {
562*4882a593Smuzhiyun 	struct iio_dev *indio_dev = i2c_get_clientdata(client);
563*4882a593Smuzhiyun 	struct mag3110_data *data = iio_priv(indio_dev);
564*4882a593Smuzhiyun 
565*4882a593Smuzhiyun 	iio_device_unregister(indio_dev);
566*4882a593Smuzhiyun 	iio_triggered_buffer_cleanup(indio_dev);
567*4882a593Smuzhiyun 	mag3110_standby(iio_priv(indio_dev));
568*4882a593Smuzhiyun 	regulator_disable(data->vddio_reg);
569*4882a593Smuzhiyun 	regulator_disable(data->vdd_reg);
570*4882a593Smuzhiyun 
571*4882a593Smuzhiyun 	return 0;
572*4882a593Smuzhiyun }
573*4882a593Smuzhiyun 
574*4882a593Smuzhiyun #ifdef CONFIG_PM_SLEEP
mag3110_suspend(struct device * dev)575*4882a593Smuzhiyun static int mag3110_suspend(struct device *dev)
576*4882a593Smuzhiyun {
577*4882a593Smuzhiyun 	struct mag3110_data *data = iio_priv(i2c_get_clientdata(
578*4882a593Smuzhiyun 		to_i2c_client(dev)));
579*4882a593Smuzhiyun 	int ret;
580*4882a593Smuzhiyun 
581*4882a593Smuzhiyun 	ret = mag3110_standby(iio_priv(i2c_get_clientdata(
582*4882a593Smuzhiyun 		to_i2c_client(dev))));
583*4882a593Smuzhiyun 	if (ret)
584*4882a593Smuzhiyun 		return ret;
585*4882a593Smuzhiyun 
586*4882a593Smuzhiyun 	ret = regulator_disable(data->vddio_reg);
587*4882a593Smuzhiyun 	if (ret) {
588*4882a593Smuzhiyun 		dev_err(dev, "failed to disable VDDIO regulator\n");
589*4882a593Smuzhiyun 		return ret;
590*4882a593Smuzhiyun 	}
591*4882a593Smuzhiyun 
592*4882a593Smuzhiyun 	ret = regulator_disable(data->vdd_reg);
593*4882a593Smuzhiyun 	if (ret) {
594*4882a593Smuzhiyun 		dev_err(dev, "failed to disable VDD regulator\n");
595*4882a593Smuzhiyun 		return ret;
596*4882a593Smuzhiyun 	}
597*4882a593Smuzhiyun 
598*4882a593Smuzhiyun 	return 0;
599*4882a593Smuzhiyun }
600*4882a593Smuzhiyun 
mag3110_resume(struct device * dev)601*4882a593Smuzhiyun static int mag3110_resume(struct device *dev)
602*4882a593Smuzhiyun {
603*4882a593Smuzhiyun 	struct mag3110_data *data = iio_priv(i2c_get_clientdata(
604*4882a593Smuzhiyun 		to_i2c_client(dev)));
605*4882a593Smuzhiyun 	int ret;
606*4882a593Smuzhiyun 
607*4882a593Smuzhiyun 	ret = regulator_enable(data->vdd_reg);
608*4882a593Smuzhiyun 	if (ret) {
609*4882a593Smuzhiyun 		dev_err(dev, "failed to enable VDD regulator\n");
610*4882a593Smuzhiyun 		return ret;
611*4882a593Smuzhiyun 	}
612*4882a593Smuzhiyun 
613*4882a593Smuzhiyun 	ret = regulator_enable(data->vddio_reg);
614*4882a593Smuzhiyun 	if (ret) {
615*4882a593Smuzhiyun 		dev_err(dev, "failed to enable VDDIO regulator\n");
616*4882a593Smuzhiyun 		regulator_disable(data->vdd_reg);
617*4882a593Smuzhiyun 		return ret;
618*4882a593Smuzhiyun 	}
619*4882a593Smuzhiyun 
620*4882a593Smuzhiyun 	return i2c_smbus_write_byte_data(data->client, MAG3110_CTRL_REG1,
621*4882a593Smuzhiyun 		data->ctrl_reg1);
622*4882a593Smuzhiyun }
623*4882a593Smuzhiyun 
624*4882a593Smuzhiyun static SIMPLE_DEV_PM_OPS(mag3110_pm_ops, mag3110_suspend, mag3110_resume);
625*4882a593Smuzhiyun #define MAG3110_PM_OPS (&mag3110_pm_ops)
626*4882a593Smuzhiyun #else
627*4882a593Smuzhiyun #define MAG3110_PM_OPS NULL
628*4882a593Smuzhiyun #endif
629*4882a593Smuzhiyun 
630*4882a593Smuzhiyun static const struct i2c_device_id mag3110_id[] = {
631*4882a593Smuzhiyun 	{ "mag3110", 0 },
632*4882a593Smuzhiyun 	{ }
633*4882a593Smuzhiyun };
634*4882a593Smuzhiyun MODULE_DEVICE_TABLE(i2c, mag3110_id);
635*4882a593Smuzhiyun 
636*4882a593Smuzhiyun static const struct of_device_id mag3110_of_match[] = {
637*4882a593Smuzhiyun 	{ .compatible = "fsl,mag3110" },
638*4882a593Smuzhiyun 	{ }
639*4882a593Smuzhiyun };
640*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, mag3110_of_match);
641*4882a593Smuzhiyun 
642*4882a593Smuzhiyun static struct i2c_driver mag3110_driver = {
643*4882a593Smuzhiyun 	.driver = {
644*4882a593Smuzhiyun 		.name	= "mag3110",
645*4882a593Smuzhiyun 		.of_match_table = mag3110_of_match,
646*4882a593Smuzhiyun 		.pm	= MAG3110_PM_OPS,
647*4882a593Smuzhiyun 	},
648*4882a593Smuzhiyun 	.probe = mag3110_probe,
649*4882a593Smuzhiyun 	.remove = mag3110_remove,
650*4882a593Smuzhiyun 	.id_table = mag3110_id,
651*4882a593Smuzhiyun };
652*4882a593Smuzhiyun module_i2c_driver(mag3110_driver);
653*4882a593Smuzhiyun 
654*4882a593Smuzhiyun MODULE_AUTHOR("Peter Meerwald <pmeerw@pmeerw.net>");
655*4882a593Smuzhiyun MODULE_DESCRIPTION("Freescale MAG3110 magnetometer driver");
656*4882a593Smuzhiyun MODULE_LICENSE("GPL");
657