1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * A sensor driver for the magnetometer AK8975.
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Magnetic compass sensor driver for monitoring magnetic flux information.
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Copyright (c) 2010, NVIDIA Corporation.
8*4882a593Smuzhiyun */
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun #include <linux/module.h>
11*4882a593Smuzhiyun #include <linux/mod_devicetable.h>
12*4882a593Smuzhiyun #include <linux/kernel.h>
13*4882a593Smuzhiyun #include <linux/slab.h>
14*4882a593Smuzhiyun #include <linux/i2c.h>
15*4882a593Smuzhiyun #include <linux/interrupt.h>
16*4882a593Smuzhiyun #include <linux/err.h>
17*4882a593Smuzhiyun #include <linux/mutex.h>
18*4882a593Smuzhiyun #include <linux/delay.h>
19*4882a593Smuzhiyun #include <linux/bitops.h>
20*4882a593Smuzhiyun #include <linux/gpio/consumer.h>
21*4882a593Smuzhiyun #include <linux/regulator/consumer.h>
22*4882a593Smuzhiyun #include <linux/pm_runtime.h>
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun #include <linux/iio/iio.h>
25*4882a593Smuzhiyun #include <linux/iio/sysfs.h>
26*4882a593Smuzhiyun #include <linux/iio/buffer.h>
27*4882a593Smuzhiyun #include <linux/iio/trigger.h>
28*4882a593Smuzhiyun #include <linux/iio/trigger_consumer.h>
29*4882a593Smuzhiyun #include <linux/iio/triggered_buffer.h>
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun /*
32*4882a593Smuzhiyun * Register definitions, as well as various shifts and masks to get at the
33*4882a593Smuzhiyun * individual fields of the registers.
34*4882a593Smuzhiyun */
35*4882a593Smuzhiyun #define AK8975_REG_WIA 0x00
36*4882a593Smuzhiyun #define AK8975_DEVICE_ID 0x48
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun #define AK8975_REG_INFO 0x01
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun #define AK8975_REG_ST1 0x02
41*4882a593Smuzhiyun #define AK8975_REG_ST1_DRDY_SHIFT 0
42*4882a593Smuzhiyun #define AK8975_REG_ST1_DRDY_MASK (1 << AK8975_REG_ST1_DRDY_SHIFT)
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun #define AK8975_REG_HXL 0x03
45*4882a593Smuzhiyun #define AK8975_REG_HXH 0x04
46*4882a593Smuzhiyun #define AK8975_REG_HYL 0x05
47*4882a593Smuzhiyun #define AK8975_REG_HYH 0x06
48*4882a593Smuzhiyun #define AK8975_REG_HZL 0x07
49*4882a593Smuzhiyun #define AK8975_REG_HZH 0x08
50*4882a593Smuzhiyun #define AK8975_REG_ST2 0x09
51*4882a593Smuzhiyun #define AK8975_REG_ST2_DERR_SHIFT 2
52*4882a593Smuzhiyun #define AK8975_REG_ST2_DERR_MASK (1 << AK8975_REG_ST2_DERR_SHIFT)
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun #define AK8975_REG_ST2_HOFL_SHIFT 3
55*4882a593Smuzhiyun #define AK8975_REG_ST2_HOFL_MASK (1 << AK8975_REG_ST2_HOFL_SHIFT)
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun #define AK8975_REG_CNTL 0x0A
58*4882a593Smuzhiyun #define AK8975_REG_CNTL_MODE_SHIFT 0
59*4882a593Smuzhiyun #define AK8975_REG_CNTL_MODE_MASK (0xF << AK8975_REG_CNTL_MODE_SHIFT)
60*4882a593Smuzhiyun #define AK8975_REG_CNTL_MODE_POWER_DOWN 0x00
61*4882a593Smuzhiyun #define AK8975_REG_CNTL_MODE_ONCE 0x01
62*4882a593Smuzhiyun #define AK8975_REG_CNTL_MODE_SELF_TEST 0x08
63*4882a593Smuzhiyun #define AK8975_REG_CNTL_MODE_FUSE_ROM 0x0F
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun #define AK8975_REG_RSVC 0x0B
66*4882a593Smuzhiyun #define AK8975_REG_ASTC 0x0C
67*4882a593Smuzhiyun #define AK8975_REG_TS1 0x0D
68*4882a593Smuzhiyun #define AK8975_REG_TS2 0x0E
69*4882a593Smuzhiyun #define AK8975_REG_I2CDIS 0x0F
70*4882a593Smuzhiyun #define AK8975_REG_ASAX 0x10
71*4882a593Smuzhiyun #define AK8975_REG_ASAY 0x11
72*4882a593Smuzhiyun #define AK8975_REG_ASAZ 0x12
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun #define AK8975_MAX_REGS AK8975_REG_ASAZ
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun /*
77*4882a593Smuzhiyun * AK09912 Register definitions
78*4882a593Smuzhiyun */
79*4882a593Smuzhiyun #define AK09912_REG_WIA1 0x00
80*4882a593Smuzhiyun #define AK09912_REG_WIA2 0x01
81*4882a593Smuzhiyun #define AK09912_DEVICE_ID 0x04
82*4882a593Smuzhiyun #define AK09911_DEVICE_ID 0x05
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun #define AK09911_REG_INFO1 0x02
85*4882a593Smuzhiyun #define AK09911_REG_INFO2 0x03
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun #define AK09912_REG_ST1 0x10
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun #define AK09912_REG_ST1_DRDY_SHIFT 0
90*4882a593Smuzhiyun #define AK09912_REG_ST1_DRDY_MASK (1 << AK09912_REG_ST1_DRDY_SHIFT)
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun #define AK09912_REG_HXL 0x11
93*4882a593Smuzhiyun #define AK09912_REG_HXH 0x12
94*4882a593Smuzhiyun #define AK09912_REG_HYL 0x13
95*4882a593Smuzhiyun #define AK09912_REG_HYH 0x14
96*4882a593Smuzhiyun #define AK09912_REG_HZL 0x15
97*4882a593Smuzhiyun #define AK09912_REG_HZH 0x16
98*4882a593Smuzhiyun #define AK09912_REG_TMPS 0x17
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun #define AK09912_REG_ST2 0x18
101*4882a593Smuzhiyun #define AK09912_REG_ST2_HOFL_SHIFT 3
102*4882a593Smuzhiyun #define AK09912_REG_ST2_HOFL_MASK (1 << AK09912_REG_ST2_HOFL_SHIFT)
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun #define AK09912_REG_CNTL1 0x30
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun #define AK09912_REG_CNTL2 0x31
107*4882a593Smuzhiyun #define AK09912_REG_CNTL_MODE_POWER_DOWN 0x00
108*4882a593Smuzhiyun #define AK09912_REG_CNTL_MODE_ONCE 0x01
109*4882a593Smuzhiyun #define AK09912_REG_CNTL_MODE_SELF_TEST 0x10
110*4882a593Smuzhiyun #define AK09912_REG_CNTL_MODE_FUSE_ROM 0x1F
111*4882a593Smuzhiyun #define AK09912_REG_CNTL2_MODE_SHIFT 0
112*4882a593Smuzhiyun #define AK09912_REG_CNTL2_MODE_MASK (0x1F << AK09912_REG_CNTL2_MODE_SHIFT)
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun #define AK09912_REG_CNTL3 0x32
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun #define AK09912_REG_TS1 0x33
117*4882a593Smuzhiyun #define AK09912_REG_TS2 0x34
118*4882a593Smuzhiyun #define AK09912_REG_TS3 0x35
119*4882a593Smuzhiyun #define AK09912_REG_I2CDIS 0x36
120*4882a593Smuzhiyun #define AK09912_REG_TS4 0x37
121*4882a593Smuzhiyun
122*4882a593Smuzhiyun #define AK09912_REG_ASAX 0x60
123*4882a593Smuzhiyun #define AK09912_REG_ASAY 0x61
124*4882a593Smuzhiyun #define AK09912_REG_ASAZ 0x62
125*4882a593Smuzhiyun
126*4882a593Smuzhiyun #define AK09912_MAX_REGS AK09912_REG_ASAZ
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun /*
129*4882a593Smuzhiyun * Miscellaneous values.
130*4882a593Smuzhiyun */
131*4882a593Smuzhiyun #define AK8975_MAX_CONVERSION_TIMEOUT 500
132*4882a593Smuzhiyun #define AK8975_CONVERSION_DONE_POLL_TIME 10
133*4882a593Smuzhiyun #define AK8975_DATA_READY_TIMEOUT ((100*HZ)/1000)
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun /*
136*4882a593Smuzhiyun * Precalculate scale factor (in Gauss units) for each axis and
137*4882a593Smuzhiyun * store in the device data.
138*4882a593Smuzhiyun *
139*4882a593Smuzhiyun * This scale factor is axis-dependent, and is derived from 3 calibration
140*4882a593Smuzhiyun * factors ASA(x), ASA(y), and ASA(z).
141*4882a593Smuzhiyun *
142*4882a593Smuzhiyun * These ASA values are read from the sensor device at start of day, and
143*4882a593Smuzhiyun * cached in the device context struct.
144*4882a593Smuzhiyun *
145*4882a593Smuzhiyun * Adjusting the flux value with the sensitivity adjustment value should be
146*4882a593Smuzhiyun * done via the following formula:
147*4882a593Smuzhiyun *
148*4882a593Smuzhiyun * Hadj = H * ( ( ( (ASA-128)*0.5 ) / 128 ) + 1 )
149*4882a593Smuzhiyun * where H is the raw value, ASA is the sensitivity adjustment, and Hadj
150*4882a593Smuzhiyun * is the resultant adjusted value.
151*4882a593Smuzhiyun *
152*4882a593Smuzhiyun * We reduce the formula to:
153*4882a593Smuzhiyun *
154*4882a593Smuzhiyun * Hadj = H * (ASA + 128) / 256
155*4882a593Smuzhiyun *
156*4882a593Smuzhiyun * H is in the range of -4096 to 4095. The magnetometer has a range of
157*4882a593Smuzhiyun * +-1229uT. To go from the raw value to uT is:
158*4882a593Smuzhiyun *
159*4882a593Smuzhiyun * HuT = H * 1229/4096, or roughly, 3/10.
160*4882a593Smuzhiyun *
161*4882a593Smuzhiyun * Since 1uT = 0.01 gauss, our final scale factor becomes:
162*4882a593Smuzhiyun *
163*4882a593Smuzhiyun * Hadj = H * ((ASA + 128) / 256) * 3/10 * 1/100
164*4882a593Smuzhiyun * Hadj = H * ((ASA + 128) * 0.003) / 256
165*4882a593Smuzhiyun *
166*4882a593Smuzhiyun * Since ASA doesn't change, we cache the resultant scale factor into the
167*4882a593Smuzhiyun * device context in ak8975_setup().
168*4882a593Smuzhiyun *
169*4882a593Smuzhiyun * Given we use IIO_VAL_INT_PLUS_MICRO bit when displaying the scale, we
170*4882a593Smuzhiyun * multiply the stored scale value by 1e6.
171*4882a593Smuzhiyun */
ak8975_raw_to_gauss(u16 data)172*4882a593Smuzhiyun static long ak8975_raw_to_gauss(u16 data)
173*4882a593Smuzhiyun {
174*4882a593Smuzhiyun return (((long)data + 128) * 3000) / 256;
175*4882a593Smuzhiyun }
176*4882a593Smuzhiyun
177*4882a593Smuzhiyun /*
178*4882a593Smuzhiyun * For AK8963 and AK09911, same calculation, but the device is less sensitive:
179*4882a593Smuzhiyun *
180*4882a593Smuzhiyun * H is in the range of +-8190. The magnetometer has a range of
181*4882a593Smuzhiyun * +-4912uT. To go from the raw value to uT is:
182*4882a593Smuzhiyun *
183*4882a593Smuzhiyun * HuT = H * 4912/8190, or roughly, 6/10, instead of 3/10.
184*4882a593Smuzhiyun */
185*4882a593Smuzhiyun
ak8963_09911_raw_to_gauss(u16 data)186*4882a593Smuzhiyun static long ak8963_09911_raw_to_gauss(u16 data)
187*4882a593Smuzhiyun {
188*4882a593Smuzhiyun return (((long)data + 128) * 6000) / 256;
189*4882a593Smuzhiyun }
190*4882a593Smuzhiyun
191*4882a593Smuzhiyun /*
192*4882a593Smuzhiyun * For AK09912, same calculation, except the device is more sensitive:
193*4882a593Smuzhiyun *
194*4882a593Smuzhiyun * H is in the range of -32752 to 32752. The magnetometer has a range of
195*4882a593Smuzhiyun * +-4912uT. To go from the raw value to uT is:
196*4882a593Smuzhiyun *
197*4882a593Smuzhiyun * HuT = H * 4912/32752, or roughly, 3/20, instead of 3/10.
198*4882a593Smuzhiyun */
ak09912_raw_to_gauss(u16 data)199*4882a593Smuzhiyun static long ak09912_raw_to_gauss(u16 data)
200*4882a593Smuzhiyun {
201*4882a593Smuzhiyun return (((long)data + 128) * 1500) / 256;
202*4882a593Smuzhiyun }
203*4882a593Smuzhiyun
204*4882a593Smuzhiyun /* Compatible Asahi Kasei Compass parts */
205*4882a593Smuzhiyun enum asahi_compass_chipset {
206*4882a593Smuzhiyun AKXXXX = 0,
207*4882a593Smuzhiyun AK8975,
208*4882a593Smuzhiyun AK8963,
209*4882a593Smuzhiyun AK09911,
210*4882a593Smuzhiyun AK09912,
211*4882a593Smuzhiyun };
212*4882a593Smuzhiyun
213*4882a593Smuzhiyun enum ak_ctrl_reg_addr {
214*4882a593Smuzhiyun ST1,
215*4882a593Smuzhiyun ST2,
216*4882a593Smuzhiyun CNTL,
217*4882a593Smuzhiyun ASA_BASE,
218*4882a593Smuzhiyun MAX_REGS,
219*4882a593Smuzhiyun REGS_END,
220*4882a593Smuzhiyun };
221*4882a593Smuzhiyun
222*4882a593Smuzhiyun enum ak_ctrl_reg_mask {
223*4882a593Smuzhiyun ST1_DRDY,
224*4882a593Smuzhiyun ST2_HOFL,
225*4882a593Smuzhiyun ST2_DERR,
226*4882a593Smuzhiyun CNTL_MODE,
227*4882a593Smuzhiyun MASK_END,
228*4882a593Smuzhiyun };
229*4882a593Smuzhiyun
230*4882a593Smuzhiyun enum ak_ctrl_mode {
231*4882a593Smuzhiyun POWER_DOWN,
232*4882a593Smuzhiyun MODE_ONCE,
233*4882a593Smuzhiyun SELF_TEST,
234*4882a593Smuzhiyun FUSE_ROM,
235*4882a593Smuzhiyun MODE_END,
236*4882a593Smuzhiyun };
237*4882a593Smuzhiyun
238*4882a593Smuzhiyun struct ak_def {
239*4882a593Smuzhiyun enum asahi_compass_chipset type;
240*4882a593Smuzhiyun long (*raw_to_gauss)(u16 data);
241*4882a593Smuzhiyun u16 range;
242*4882a593Smuzhiyun u8 ctrl_regs[REGS_END];
243*4882a593Smuzhiyun u8 ctrl_masks[MASK_END];
244*4882a593Smuzhiyun u8 ctrl_modes[MODE_END];
245*4882a593Smuzhiyun u8 data_regs[3];
246*4882a593Smuzhiyun };
247*4882a593Smuzhiyun
248*4882a593Smuzhiyun static const struct ak_def ak_def_array[] = {
249*4882a593Smuzhiyun {
250*4882a593Smuzhiyun .type = AK8975,
251*4882a593Smuzhiyun .raw_to_gauss = ak8975_raw_to_gauss,
252*4882a593Smuzhiyun .range = 4096,
253*4882a593Smuzhiyun .ctrl_regs = {
254*4882a593Smuzhiyun AK8975_REG_ST1,
255*4882a593Smuzhiyun AK8975_REG_ST2,
256*4882a593Smuzhiyun AK8975_REG_CNTL,
257*4882a593Smuzhiyun AK8975_REG_ASAX,
258*4882a593Smuzhiyun AK8975_MAX_REGS},
259*4882a593Smuzhiyun .ctrl_masks = {
260*4882a593Smuzhiyun AK8975_REG_ST1_DRDY_MASK,
261*4882a593Smuzhiyun AK8975_REG_ST2_HOFL_MASK,
262*4882a593Smuzhiyun AK8975_REG_ST2_DERR_MASK,
263*4882a593Smuzhiyun AK8975_REG_CNTL_MODE_MASK},
264*4882a593Smuzhiyun .ctrl_modes = {
265*4882a593Smuzhiyun AK8975_REG_CNTL_MODE_POWER_DOWN,
266*4882a593Smuzhiyun AK8975_REG_CNTL_MODE_ONCE,
267*4882a593Smuzhiyun AK8975_REG_CNTL_MODE_SELF_TEST,
268*4882a593Smuzhiyun AK8975_REG_CNTL_MODE_FUSE_ROM},
269*4882a593Smuzhiyun .data_regs = {
270*4882a593Smuzhiyun AK8975_REG_HXL,
271*4882a593Smuzhiyun AK8975_REG_HYL,
272*4882a593Smuzhiyun AK8975_REG_HZL},
273*4882a593Smuzhiyun },
274*4882a593Smuzhiyun {
275*4882a593Smuzhiyun .type = AK8963,
276*4882a593Smuzhiyun .raw_to_gauss = ak8963_09911_raw_to_gauss,
277*4882a593Smuzhiyun .range = 8190,
278*4882a593Smuzhiyun .ctrl_regs = {
279*4882a593Smuzhiyun AK8975_REG_ST1,
280*4882a593Smuzhiyun AK8975_REG_ST2,
281*4882a593Smuzhiyun AK8975_REG_CNTL,
282*4882a593Smuzhiyun AK8975_REG_ASAX,
283*4882a593Smuzhiyun AK8975_MAX_REGS},
284*4882a593Smuzhiyun .ctrl_masks = {
285*4882a593Smuzhiyun AK8975_REG_ST1_DRDY_MASK,
286*4882a593Smuzhiyun AK8975_REG_ST2_HOFL_MASK,
287*4882a593Smuzhiyun 0,
288*4882a593Smuzhiyun AK8975_REG_CNTL_MODE_MASK},
289*4882a593Smuzhiyun .ctrl_modes = {
290*4882a593Smuzhiyun AK8975_REG_CNTL_MODE_POWER_DOWN,
291*4882a593Smuzhiyun AK8975_REG_CNTL_MODE_ONCE,
292*4882a593Smuzhiyun AK8975_REG_CNTL_MODE_SELF_TEST,
293*4882a593Smuzhiyun AK8975_REG_CNTL_MODE_FUSE_ROM},
294*4882a593Smuzhiyun .data_regs = {
295*4882a593Smuzhiyun AK8975_REG_HXL,
296*4882a593Smuzhiyun AK8975_REG_HYL,
297*4882a593Smuzhiyun AK8975_REG_HZL},
298*4882a593Smuzhiyun },
299*4882a593Smuzhiyun {
300*4882a593Smuzhiyun .type = AK09911,
301*4882a593Smuzhiyun .raw_to_gauss = ak8963_09911_raw_to_gauss,
302*4882a593Smuzhiyun .range = 8192,
303*4882a593Smuzhiyun .ctrl_regs = {
304*4882a593Smuzhiyun AK09912_REG_ST1,
305*4882a593Smuzhiyun AK09912_REG_ST2,
306*4882a593Smuzhiyun AK09912_REG_CNTL2,
307*4882a593Smuzhiyun AK09912_REG_ASAX,
308*4882a593Smuzhiyun AK09912_MAX_REGS},
309*4882a593Smuzhiyun .ctrl_masks = {
310*4882a593Smuzhiyun AK09912_REG_ST1_DRDY_MASK,
311*4882a593Smuzhiyun AK09912_REG_ST2_HOFL_MASK,
312*4882a593Smuzhiyun 0,
313*4882a593Smuzhiyun AK09912_REG_CNTL2_MODE_MASK},
314*4882a593Smuzhiyun .ctrl_modes = {
315*4882a593Smuzhiyun AK09912_REG_CNTL_MODE_POWER_DOWN,
316*4882a593Smuzhiyun AK09912_REG_CNTL_MODE_ONCE,
317*4882a593Smuzhiyun AK09912_REG_CNTL_MODE_SELF_TEST,
318*4882a593Smuzhiyun AK09912_REG_CNTL_MODE_FUSE_ROM},
319*4882a593Smuzhiyun .data_regs = {
320*4882a593Smuzhiyun AK09912_REG_HXL,
321*4882a593Smuzhiyun AK09912_REG_HYL,
322*4882a593Smuzhiyun AK09912_REG_HZL},
323*4882a593Smuzhiyun },
324*4882a593Smuzhiyun {
325*4882a593Smuzhiyun .type = AK09912,
326*4882a593Smuzhiyun .raw_to_gauss = ak09912_raw_to_gauss,
327*4882a593Smuzhiyun .range = 32752,
328*4882a593Smuzhiyun .ctrl_regs = {
329*4882a593Smuzhiyun AK09912_REG_ST1,
330*4882a593Smuzhiyun AK09912_REG_ST2,
331*4882a593Smuzhiyun AK09912_REG_CNTL2,
332*4882a593Smuzhiyun AK09912_REG_ASAX,
333*4882a593Smuzhiyun AK09912_MAX_REGS},
334*4882a593Smuzhiyun .ctrl_masks = {
335*4882a593Smuzhiyun AK09912_REG_ST1_DRDY_MASK,
336*4882a593Smuzhiyun AK09912_REG_ST2_HOFL_MASK,
337*4882a593Smuzhiyun 0,
338*4882a593Smuzhiyun AK09912_REG_CNTL2_MODE_MASK},
339*4882a593Smuzhiyun .ctrl_modes = {
340*4882a593Smuzhiyun AK09912_REG_CNTL_MODE_POWER_DOWN,
341*4882a593Smuzhiyun AK09912_REG_CNTL_MODE_ONCE,
342*4882a593Smuzhiyun AK09912_REG_CNTL_MODE_SELF_TEST,
343*4882a593Smuzhiyun AK09912_REG_CNTL_MODE_FUSE_ROM},
344*4882a593Smuzhiyun .data_regs = {
345*4882a593Smuzhiyun AK09912_REG_HXL,
346*4882a593Smuzhiyun AK09912_REG_HYL,
347*4882a593Smuzhiyun AK09912_REG_HZL},
348*4882a593Smuzhiyun }
349*4882a593Smuzhiyun };
350*4882a593Smuzhiyun
351*4882a593Smuzhiyun /*
352*4882a593Smuzhiyun * Per-instance context data for the device.
353*4882a593Smuzhiyun */
354*4882a593Smuzhiyun struct ak8975_data {
355*4882a593Smuzhiyun struct i2c_client *client;
356*4882a593Smuzhiyun const struct ak_def *def;
357*4882a593Smuzhiyun struct mutex lock;
358*4882a593Smuzhiyun u8 asa[3];
359*4882a593Smuzhiyun long raw_to_gauss[3];
360*4882a593Smuzhiyun struct gpio_desc *eoc_gpiod;
361*4882a593Smuzhiyun struct gpio_desc *reset_gpiod;
362*4882a593Smuzhiyun int eoc_irq;
363*4882a593Smuzhiyun wait_queue_head_t data_ready_queue;
364*4882a593Smuzhiyun unsigned long flags;
365*4882a593Smuzhiyun u8 cntl_cache;
366*4882a593Smuzhiyun struct iio_mount_matrix orientation;
367*4882a593Smuzhiyun struct regulator *vdd;
368*4882a593Smuzhiyun struct regulator *vid;
369*4882a593Smuzhiyun
370*4882a593Smuzhiyun /* Ensure natural alignment of timestamp */
371*4882a593Smuzhiyun struct {
372*4882a593Smuzhiyun s16 channels[3];
373*4882a593Smuzhiyun s64 ts __aligned(8);
374*4882a593Smuzhiyun } scan;
375*4882a593Smuzhiyun };
376*4882a593Smuzhiyun
377*4882a593Smuzhiyun /* Enable attached power regulator if any. */
ak8975_power_on(const struct ak8975_data * data)378*4882a593Smuzhiyun static int ak8975_power_on(const struct ak8975_data *data)
379*4882a593Smuzhiyun {
380*4882a593Smuzhiyun int ret;
381*4882a593Smuzhiyun
382*4882a593Smuzhiyun ret = regulator_enable(data->vdd);
383*4882a593Smuzhiyun if (ret) {
384*4882a593Smuzhiyun dev_warn(&data->client->dev,
385*4882a593Smuzhiyun "Failed to enable specified Vdd supply\n");
386*4882a593Smuzhiyun return ret;
387*4882a593Smuzhiyun }
388*4882a593Smuzhiyun ret = regulator_enable(data->vid);
389*4882a593Smuzhiyun if (ret) {
390*4882a593Smuzhiyun dev_warn(&data->client->dev,
391*4882a593Smuzhiyun "Failed to enable specified Vid supply\n");
392*4882a593Smuzhiyun regulator_disable(data->vdd);
393*4882a593Smuzhiyun return ret;
394*4882a593Smuzhiyun }
395*4882a593Smuzhiyun
396*4882a593Smuzhiyun gpiod_set_value_cansleep(data->reset_gpiod, 0);
397*4882a593Smuzhiyun
398*4882a593Smuzhiyun /*
399*4882a593Smuzhiyun * According to the datasheet the power supply rise time is 200us
400*4882a593Smuzhiyun * and the minimum wait time before mode setting is 100us, in
401*4882a593Smuzhiyun * total 300us. Add some margin and say minimum 500us here.
402*4882a593Smuzhiyun */
403*4882a593Smuzhiyun usleep_range(500, 1000);
404*4882a593Smuzhiyun return 0;
405*4882a593Smuzhiyun }
406*4882a593Smuzhiyun
407*4882a593Smuzhiyun /* Disable attached power regulator if any. */
ak8975_power_off(const struct ak8975_data * data)408*4882a593Smuzhiyun static void ak8975_power_off(const struct ak8975_data *data)
409*4882a593Smuzhiyun {
410*4882a593Smuzhiyun gpiod_set_value_cansleep(data->reset_gpiod, 1);
411*4882a593Smuzhiyun
412*4882a593Smuzhiyun regulator_disable(data->vid);
413*4882a593Smuzhiyun regulator_disable(data->vdd);
414*4882a593Smuzhiyun }
415*4882a593Smuzhiyun
416*4882a593Smuzhiyun /*
417*4882a593Smuzhiyun * Return 0 if the i2c device is the one we expect.
418*4882a593Smuzhiyun * return a negative error number otherwise
419*4882a593Smuzhiyun */
ak8975_who_i_am(struct i2c_client * client,enum asahi_compass_chipset type)420*4882a593Smuzhiyun static int ak8975_who_i_am(struct i2c_client *client,
421*4882a593Smuzhiyun enum asahi_compass_chipset type)
422*4882a593Smuzhiyun {
423*4882a593Smuzhiyun u8 wia_val[2];
424*4882a593Smuzhiyun int ret;
425*4882a593Smuzhiyun
426*4882a593Smuzhiyun /*
427*4882a593Smuzhiyun * Signature for each device:
428*4882a593Smuzhiyun * Device | WIA1 | WIA2
429*4882a593Smuzhiyun * AK09912 | DEVICE_ID | AK09912_DEVICE_ID
430*4882a593Smuzhiyun * AK09911 | DEVICE_ID | AK09911_DEVICE_ID
431*4882a593Smuzhiyun * AK8975 | DEVICE_ID | NA
432*4882a593Smuzhiyun * AK8963 | DEVICE_ID | NA
433*4882a593Smuzhiyun */
434*4882a593Smuzhiyun ret = i2c_smbus_read_i2c_block_data_or_emulated(
435*4882a593Smuzhiyun client, AK09912_REG_WIA1, 2, wia_val);
436*4882a593Smuzhiyun if (ret < 0) {
437*4882a593Smuzhiyun dev_err(&client->dev, "Error reading WIA\n");
438*4882a593Smuzhiyun return ret;
439*4882a593Smuzhiyun }
440*4882a593Smuzhiyun
441*4882a593Smuzhiyun if (wia_val[0] != AK8975_DEVICE_ID)
442*4882a593Smuzhiyun return -ENODEV;
443*4882a593Smuzhiyun
444*4882a593Smuzhiyun switch (type) {
445*4882a593Smuzhiyun case AK8975:
446*4882a593Smuzhiyun case AK8963:
447*4882a593Smuzhiyun return 0;
448*4882a593Smuzhiyun case AK09911:
449*4882a593Smuzhiyun if (wia_val[1] == AK09911_DEVICE_ID)
450*4882a593Smuzhiyun return 0;
451*4882a593Smuzhiyun break;
452*4882a593Smuzhiyun case AK09912:
453*4882a593Smuzhiyun if (wia_val[1] == AK09912_DEVICE_ID)
454*4882a593Smuzhiyun return 0;
455*4882a593Smuzhiyun break;
456*4882a593Smuzhiyun default:
457*4882a593Smuzhiyun dev_err(&client->dev, "Type %d unknown\n", type);
458*4882a593Smuzhiyun }
459*4882a593Smuzhiyun return -ENODEV;
460*4882a593Smuzhiyun }
461*4882a593Smuzhiyun
462*4882a593Smuzhiyun /*
463*4882a593Smuzhiyun * Helper function to write to CNTL register.
464*4882a593Smuzhiyun */
ak8975_set_mode(struct ak8975_data * data,enum ak_ctrl_mode mode)465*4882a593Smuzhiyun static int ak8975_set_mode(struct ak8975_data *data, enum ak_ctrl_mode mode)
466*4882a593Smuzhiyun {
467*4882a593Smuzhiyun u8 regval;
468*4882a593Smuzhiyun int ret;
469*4882a593Smuzhiyun
470*4882a593Smuzhiyun regval = (data->cntl_cache & ~data->def->ctrl_masks[CNTL_MODE]) |
471*4882a593Smuzhiyun data->def->ctrl_modes[mode];
472*4882a593Smuzhiyun ret = i2c_smbus_write_byte_data(data->client,
473*4882a593Smuzhiyun data->def->ctrl_regs[CNTL], regval);
474*4882a593Smuzhiyun if (ret < 0) {
475*4882a593Smuzhiyun return ret;
476*4882a593Smuzhiyun }
477*4882a593Smuzhiyun data->cntl_cache = regval;
478*4882a593Smuzhiyun /* After mode change wait atleast 100us */
479*4882a593Smuzhiyun usleep_range(100, 500);
480*4882a593Smuzhiyun
481*4882a593Smuzhiyun return 0;
482*4882a593Smuzhiyun }
483*4882a593Smuzhiyun
484*4882a593Smuzhiyun /*
485*4882a593Smuzhiyun * Handle data ready irq
486*4882a593Smuzhiyun */
ak8975_irq_handler(int irq,void * data)487*4882a593Smuzhiyun static irqreturn_t ak8975_irq_handler(int irq, void *data)
488*4882a593Smuzhiyun {
489*4882a593Smuzhiyun struct ak8975_data *ak8975 = data;
490*4882a593Smuzhiyun
491*4882a593Smuzhiyun set_bit(0, &ak8975->flags);
492*4882a593Smuzhiyun wake_up(&ak8975->data_ready_queue);
493*4882a593Smuzhiyun
494*4882a593Smuzhiyun return IRQ_HANDLED;
495*4882a593Smuzhiyun }
496*4882a593Smuzhiyun
497*4882a593Smuzhiyun /*
498*4882a593Smuzhiyun * Install data ready interrupt handler
499*4882a593Smuzhiyun */
ak8975_setup_irq(struct ak8975_data * data)500*4882a593Smuzhiyun static int ak8975_setup_irq(struct ak8975_data *data)
501*4882a593Smuzhiyun {
502*4882a593Smuzhiyun struct i2c_client *client = data->client;
503*4882a593Smuzhiyun int rc;
504*4882a593Smuzhiyun int irq;
505*4882a593Smuzhiyun
506*4882a593Smuzhiyun init_waitqueue_head(&data->data_ready_queue);
507*4882a593Smuzhiyun clear_bit(0, &data->flags);
508*4882a593Smuzhiyun if (client->irq)
509*4882a593Smuzhiyun irq = client->irq;
510*4882a593Smuzhiyun else
511*4882a593Smuzhiyun irq = gpiod_to_irq(data->eoc_gpiod);
512*4882a593Smuzhiyun
513*4882a593Smuzhiyun rc = devm_request_irq(&client->dev, irq, ak8975_irq_handler,
514*4882a593Smuzhiyun IRQF_TRIGGER_RISING | IRQF_ONESHOT,
515*4882a593Smuzhiyun dev_name(&client->dev), data);
516*4882a593Smuzhiyun if (rc < 0) {
517*4882a593Smuzhiyun dev_err(&client->dev, "irq %d request failed: %d\n", irq, rc);
518*4882a593Smuzhiyun return rc;
519*4882a593Smuzhiyun }
520*4882a593Smuzhiyun
521*4882a593Smuzhiyun data->eoc_irq = irq;
522*4882a593Smuzhiyun
523*4882a593Smuzhiyun return rc;
524*4882a593Smuzhiyun }
525*4882a593Smuzhiyun
526*4882a593Smuzhiyun
527*4882a593Smuzhiyun /*
528*4882a593Smuzhiyun * Perform some start-of-day setup, including reading the asa calibration
529*4882a593Smuzhiyun * values and caching them.
530*4882a593Smuzhiyun */
ak8975_setup(struct i2c_client * client)531*4882a593Smuzhiyun static int ak8975_setup(struct i2c_client *client)
532*4882a593Smuzhiyun {
533*4882a593Smuzhiyun struct iio_dev *indio_dev = i2c_get_clientdata(client);
534*4882a593Smuzhiyun struct ak8975_data *data = iio_priv(indio_dev);
535*4882a593Smuzhiyun int ret;
536*4882a593Smuzhiyun
537*4882a593Smuzhiyun /* Write the fused rom access mode. */
538*4882a593Smuzhiyun ret = ak8975_set_mode(data, FUSE_ROM);
539*4882a593Smuzhiyun if (ret < 0) {
540*4882a593Smuzhiyun dev_err(&client->dev, "Error in setting fuse access mode\n");
541*4882a593Smuzhiyun return ret;
542*4882a593Smuzhiyun }
543*4882a593Smuzhiyun
544*4882a593Smuzhiyun /* Get asa data and store in the device data. */
545*4882a593Smuzhiyun ret = i2c_smbus_read_i2c_block_data_or_emulated(
546*4882a593Smuzhiyun client, data->def->ctrl_regs[ASA_BASE],
547*4882a593Smuzhiyun 3, data->asa);
548*4882a593Smuzhiyun if (ret < 0) {
549*4882a593Smuzhiyun dev_err(&client->dev, "Not able to read asa data\n");
550*4882a593Smuzhiyun return ret;
551*4882a593Smuzhiyun }
552*4882a593Smuzhiyun
553*4882a593Smuzhiyun /* After reading fuse ROM data set power-down mode */
554*4882a593Smuzhiyun ret = ak8975_set_mode(data, POWER_DOWN);
555*4882a593Smuzhiyun if (ret < 0) {
556*4882a593Smuzhiyun dev_err(&client->dev, "Error in setting power-down mode\n");
557*4882a593Smuzhiyun return ret;
558*4882a593Smuzhiyun }
559*4882a593Smuzhiyun
560*4882a593Smuzhiyun if (data->eoc_gpiod || client->irq > 0) {
561*4882a593Smuzhiyun ret = ak8975_setup_irq(data);
562*4882a593Smuzhiyun if (ret < 0) {
563*4882a593Smuzhiyun dev_err(&client->dev,
564*4882a593Smuzhiyun "Error setting data ready interrupt\n");
565*4882a593Smuzhiyun return ret;
566*4882a593Smuzhiyun }
567*4882a593Smuzhiyun }
568*4882a593Smuzhiyun
569*4882a593Smuzhiyun data->raw_to_gauss[0] = data->def->raw_to_gauss(data->asa[0]);
570*4882a593Smuzhiyun data->raw_to_gauss[1] = data->def->raw_to_gauss(data->asa[1]);
571*4882a593Smuzhiyun data->raw_to_gauss[2] = data->def->raw_to_gauss(data->asa[2]);
572*4882a593Smuzhiyun
573*4882a593Smuzhiyun return 0;
574*4882a593Smuzhiyun }
575*4882a593Smuzhiyun
wait_conversion_complete_gpio(struct ak8975_data * data)576*4882a593Smuzhiyun static int wait_conversion_complete_gpio(struct ak8975_data *data)
577*4882a593Smuzhiyun {
578*4882a593Smuzhiyun struct i2c_client *client = data->client;
579*4882a593Smuzhiyun u32 timeout_ms = AK8975_MAX_CONVERSION_TIMEOUT;
580*4882a593Smuzhiyun int ret;
581*4882a593Smuzhiyun
582*4882a593Smuzhiyun /* Wait for the conversion to complete. */
583*4882a593Smuzhiyun while (timeout_ms) {
584*4882a593Smuzhiyun msleep(AK8975_CONVERSION_DONE_POLL_TIME);
585*4882a593Smuzhiyun if (gpiod_get_value(data->eoc_gpiod))
586*4882a593Smuzhiyun break;
587*4882a593Smuzhiyun timeout_ms -= AK8975_CONVERSION_DONE_POLL_TIME;
588*4882a593Smuzhiyun }
589*4882a593Smuzhiyun if (!timeout_ms) {
590*4882a593Smuzhiyun dev_err(&client->dev, "Conversion timeout happened\n");
591*4882a593Smuzhiyun return -EINVAL;
592*4882a593Smuzhiyun }
593*4882a593Smuzhiyun
594*4882a593Smuzhiyun ret = i2c_smbus_read_byte_data(client, data->def->ctrl_regs[ST1]);
595*4882a593Smuzhiyun if (ret < 0)
596*4882a593Smuzhiyun dev_err(&client->dev, "Error in reading ST1\n");
597*4882a593Smuzhiyun
598*4882a593Smuzhiyun return ret;
599*4882a593Smuzhiyun }
600*4882a593Smuzhiyun
wait_conversion_complete_polled(struct ak8975_data * data)601*4882a593Smuzhiyun static int wait_conversion_complete_polled(struct ak8975_data *data)
602*4882a593Smuzhiyun {
603*4882a593Smuzhiyun struct i2c_client *client = data->client;
604*4882a593Smuzhiyun u8 read_status;
605*4882a593Smuzhiyun u32 timeout_ms = AK8975_MAX_CONVERSION_TIMEOUT;
606*4882a593Smuzhiyun int ret;
607*4882a593Smuzhiyun
608*4882a593Smuzhiyun /* Wait for the conversion to complete. */
609*4882a593Smuzhiyun while (timeout_ms) {
610*4882a593Smuzhiyun msleep(AK8975_CONVERSION_DONE_POLL_TIME);
611*4882a593Smuzhiyun ret = i2c_smbus_read_byte_data(client,
612*4882a593Smuzhiyun data->def->ctrl_regs[ST1]);
613*4882a593Smuzhiyun if (ret < 0) {
614*4882a593Smuzhiyun dev_err(&client->dev, "Error in reading ST1\n");
615*4882a593Smuzhiyun return ret;
616*4882a593Smuzhiyun }
617*4882a593Smuzhiyun read_status = ret;
618*4882a593Smuzhiyun if (read_status)
619*4882a593Smuzhiyun break;
620*4882a593Smuzhiyun timeout_ms -= AK8975_CONVERSION_DONE_POLL_TIME;
621*4882a593Smuzhiyun }
622*4882a593Smuzhiyun if (!timeout_ms) {
623*4882a593Smuzhiyun dev_err(&client->dev, "Conversion timeout happened\n");
624*4882a593Smuzhiyun return -EINVAL;
625*4882a593Smuzhiyun }
626*4882a593Smuzhiyun
627*4882a593Smuzhiyun return read_status;
628*4882a593Smuzhiyun }
629*4882a593Smuzhiyun
630*4882a593Smuzhiyun /* Returns 0 if the end of conversion interrupt occured or -ETIME otherwise */
wait_conversion_complete_interrupt(struct ak8975_data * data)631*4882a593Smuzhiyun static int wait_conversion_complete_interrupt(struct ak8975_data *data)
632*4882a593Smuzhiyun {
633*4882a593Smuzhiyun int ret;
634*4882a593Smuzhiyun
635*4882a593Smuzhiyun ret = wait_event_timeout(data->data_ready_queue,
636*4882a593Smuzhiyun test_bit(0, &data->flags),
637*4882a593Smuzhiyun AK8975_DATA_READY_TIMEOUT);
638*4882a593Smuzhiyun clear_bit(0, &data->flags);
639*4882a593Smuzhiyun
640*4882a593Smuzhiyun return ret > 0 ? 0 : -ETIME;
641*4882a593Smuzhiyun }
642*4882a593Smuzhiyun
ak8975_start_read_axis(struct ak8975_data * data,const struct i2c_client * client)643*4882a593Smuzhiyun static int ak8975_start_read_axis(struct ak8975_data *data,
644*4882a593Smuzhiyun const struct i2c_client *client)
645*4882a593Smuzhiyun {
646*4882a593Smuzhiyun /* Set up the device for taking a sample. */
647*4882a593Smuzhiyun int ret = ak8975_set_mode(data, MODE_ONCE);
648*4882a593Smuzhiyun
649*4882a593Smuzhiyun if (ret < 0) {
650*4882a593Smuzhiyun dev_err(&client->dev, "Error in setting operating mode\n");
651*4882a593Smuzhiyun return ret;
652*4882a593Smuzhiyun }
653*4882a593Smuzhiyun
654*4882a593Smuzhiyun /* Wait for the conversion to complete. */
655*4882a593Smuzhiyun if (data->eoc_irq)
656*4882a593Smuzhiyun ret = wait_conversion_complete_interrupt(data);
657*4882a593Smuzhiyun else if (data->eoc_gpiod)
658*4882a593Smuzhiyun ret = wait_conversion_complete_gpio(data);
659*4882a593Smuzhiyun else
660*4882a593Smuzhiyun ret = wait_conversion_complete_polled(data);
661*4882a593Smuzhiyun if (ret < 0)
662*4882a593Smuzhiyun return ret;
663*4882a593Smuzhiyun
664*4882a593Smuzhiyun /* This will be executed only for non-interrupt based waiting case */
665*4882a593Smuzhiyun if (ret & data->def->ctrl_masks[ST1_DRDY]) {
666*4882a593Smuzhiyun ret = i2c_smbus_read_byte_data(client,
667*4882a593Smuzhiyun data->def->ctrl_regs[ST2]);
668*4882a593Smuzhiyun if (ret < 0) {
669*4882a593Smuzhiyun dev_err(&client->dev, "Error in reading ST2\n");
670*4882a593Smuzhiyun return ret;
671*4882a593Smuzhiyun }
672*4882a593Smuzhiyun if (ret & (data->def->ctrl_masks[ST2_DERR] |
673*4882a593Smuzhiyun data->def->ctrl_masks[ST2_HOFL])) {
674*4882a593Smuzhiyun dev_err(&client->dev, "ST2 status error 0x%x\n", ret);
675*4882a593Smuzhiyun return -EINVAL;
676*4882a593Smuzhiyun }
677*4882a593Smuzhiyun }
678*4882a593Smuzhiyun
679*4882a593Smuzhiyun return 0;
680*4882a593Smuzhiyun }
681*4882a593Smuzhiyun
682*4882a593Smuzhiyun /* Retrieve raw flux value for one of the x, y, or z axis. */
ak8975_read_axis(struct iio_dev * indio_dev,int index,int * val)683*4882a593Smuzhiyun static int ak8975_read_axis(struct iio_dev *indio_dev, int index, int *val)
684*4882a593Smuzhiyun {
685*4882a593Smuzhiyun struct ak8975_data *data = iio_priv(indio_dev);
686*4882a593Smuzhiyun const struct i2c_client *client = data->client;
687*4882a593Smuzhiyun const struct ak_def *def = data->def;
688*4882a593Smuzhiyun __le16 rval;
689*4882a593Smuzhiyun u16 buff;
690*4882a593Smuzhiyun int ret;
691*4882a593Smuzhiyun
692*4882a593Smuzhiyun pm_runtime_get_sync(&data->client->dev);
693*4882a593Smuzhiyun
694*4882a593Smuzhiyun mutex_lock(&data->lock);
695*4882a593Smuzhiyun
696*4882a593Smuzhiyun ret = ak8975_start_read_axis(data, client);
697*4882a593Smuzhiyun if (ret)
698*4882a593Smuzhiyun goto exit;
699*4882a593Smuzhiyun
700*4882a593Smuzhiyun ret = i2c_smbus_read_i2c_block_data_or_emulated(
701*4882a593Smuzhiyun client, def->data_regs[index],
702*4882a593Smuzhiyun sizeof(rval), (u8*)&rval);
703*4882a593Smuzhiyun if (ret < 0)
704*4882a593Smuzhiyun goto exit;
705*4882a593Smuzhiyun
706*4882a593Smuzhiyun mutex_unlock(&data->lock);
707*4882a593Smuzhiyun
708*4882a593Smuzhiyun pm_runtime_mark_last_busy(&data->client->dev);
709*4882a593Smuzhiyun pm_runtime_put_autosuspend(&data->client->dev);
710*4882a593Smuzhiyun
711*4882a593Smuzhiyun /* Swap bytes and convert to valid range. */
712*4882a593Smuzhiyun buff = le16_to_cpu(rval);
713*4882a593Smuzhiyun *val = clamp_t(s16, buff, -def->range, def->range);
714*4882a593Smuzhiyun return IIO_VAL_INT;
715*4882a593Smuzhiyun
716*4882a593Smuzhiyun exit:
717*4882a593Smuzhiyun mutex_unlock(&data->lock);
718*4882a593Smuzhiyun dev_err(&client->dev, "Error in reading axis\n");
719*4882a593Smuzhiyun return ret;
720*4882a593Smuzhiyun }
721*4882a593Smuzhiyun
ak8975_read_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int * val,int * val2,long mask)722*4882a593Smuzhiyun static int ak8975_read_raw(struct iio_dev *indio_dev,
723*4882a593Smuzhiyun struct iio_chan_spec const *chan,
724*4882a593Smuzhiyun int *val, int *val2,
725*4882a593Smuzhiyun long mask)
726*4882a593Smuzhiyun {
727*4882a593Smuzhiyun struct ak8975_data *data = iio_priv(indio_dev);
728*4882a593Smuzhiyun
729*4882a593Smuzhiyun switch (mask) {
730*4882a593Smuzhiyun case IIO_CHAN_INFO_RAW:
731*4882a593Smuzhiyun return ak8975_read_axis(indio_dev, chan->address, val);
732*4882a593Smuzhiyun case IIO_CHAN_INFO_SCALE:
733*4882a593Smuzhiyun *val = 0;
734*4882a593Smuzhiyun *val2 = data->raw_to_gauss[chan->address];
735*4882a593Smuzhiyun return IIO_VAL_INT_PLUS_MICRO;
736*4882a593Smuzhiyun }
737*4882a593Smuzhiyun return -EINVAL;
738*4882a593Smuzhiyun }
739*4882a593Smuzhiyun
740*4882a593Smuzhiyun static const struct iio_mount_matrix *
ak8975_get_mount_matrix(const struct iio_dev * indio_dev,const struct iio_chan_spec * chan)741*4882a593Smuzhiyun ak8975_get_mount_matrix(const struct iio_dev *indio_dev,
742*4882a593Smuzhiyun const struct iio_chan_spec *chan)
743*4882a593Smuzhiyun {
744*4882a593Smuzhiyun struct ak8975_data *data = iio_priv(indio_dev);
745*4882a593Smuzhiyun
746*4882a593Smuzhiyun return &data->orientation;
747*4882a593Smuzhiyun }
748*4882a593Smuzhiyun
749*4882a593Smuzhiyun static const struct iio_chan_spec_ext_info ak8975_ext_info[] = {
750*4882a593Smuzhiyun IIO_MOUNT_MATRIX(IIO_SHARED_BY_DIR, ak8975_get_mount_matrix),
751*4882a593Smuzhiyun { }
752*4882a593Smuzhiyun };
753*4882a593Smuzhiyun
754*4882a593Smuzhiyun #define AK8975_CHANNEL(axis, index) \
755*4882a593Smuzhiyun { \
756*4882a593Smuzhiyun .type = IIO_MAGN, \
757*4882a593Smuzhiyun .modified = 1, \
758*4882a593Smuzhiyun .channel2 = IIO_MOD_##axis, \
759*4882a593Smuzhiyun .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
760*4882a593Smuzhiyun BIT(IIO_CHAN_INFO_SCALE), \
761*4882a593Smuzhiyun .address = index, \
762*4882a593Smuzhiyun .scan_index = index, \
763*4882a593Smuzhiyun .scan_type = { \
764*4882a593Smuzhiyun .sign = 's', \
765*4882a593Smuzhiyun .realbits = 16, \
766*4882a593Smuzhiyun .storagebits = 16, \
767*4882a593Smuzhiyun .endianness = IIO_CPU \
768*4882a593Smuzhiyun }, \
769*4882a593Smuzhiyun .ext_info = ak8975_ext_info, \
770*4882a593Smuzhiyun }
771*4882a593Smuzhiyun
772*4882a593Smuzhiyun static const struct iio_chan_spec ak8975_channels[] = {
773*4882a593Smuzhiyun AK8975_CHANNEL(X, 0), AK8975_CHANNEL(Y, 1), AK8975_CHANNEL(Z, 2),
774*4882a593Smuzhiyun IIO_CHAN_SOFT_TIMESTAMP(3),
775*4882a593Smuzhiyun };
776*4882a593Smuzhiyun
777*4882a593Smuzhiyun static const unsigned long ak8975_scan_masks[] = { 0x7, 0 };
778*4882a593Smuzhiyun
779*4882a593Smuzhiyun static const struct iio_info ak8975_info = {
780*4882a593Smuzhiyun .read_raw = &ak8975_read_raw,
781*4882a593Smuzhiyun };
782*4882a593Smuzhiyun
783*4882a593Smuzhiyun static const struct acpi_device_id ak_acpi_match[] = {
784*4882a593Smuzhiyun {"AK8975", AK8975},
785*4882a593Smuzhiyun {"AK8963", AK8963},
786*4882a593Smuzhiyun {"INVN6500", AK8963},
787*4882a593Smuzhiyun {"AK009911", AK09911},
788*4882a593Smuzhiyun {"AK09911", AK09911},
789*4882a593Smuzhiyun {"AKM9911", AK09911},
790*4882a593Smuzhiyun {"AK09912", AK09912},
791*4882a593Smuzhiyun { }
792*4882a593Smuzhiyun };
793*4882a593Smuzhiyun MODULE_DEVICE_TABLE(acpi, ak_acpi_match);
794*4882a593Smuzhiyun
ak8975_fill_buffer(struct iio_dev * indio_dev)795*4882a593Smuzhiyun static void ak8975_fill_buffer(struct iio_dev *indio_dev)
796*4882a593Smuzhiyun {
797*4882a593Smuzhiyun struct ak8975_data *data = iio_priv(indio_dev);
798*4882a593Smuzhiyun const struct i2c_client *client = data->client;
799*4882a593Smuzhiyun const struct ak_def *def = data->def;
800*4882a593Smuzhiyun int ret;
801*4882a593Smuzhiyun __le16 fval[3];
802*4882a593Smuzhiyun
803*4882a593Smuzhiyun mutex_lock(&data->lock);
804*4882a593Smuzhiyun
805*4882a593Smuzhiyun ret = ak8975_start_read_axis(data, client);
806*4882a593Smuzhiyun if (ret)
807*4882a593Smuzhiyun goto unlock;
808*4882a593Smuzhiyun
809*4882a593Smuzhiyun /*
810*4882a593Smuzhiyun * For each axis, read the flux value from the appropriate register
811*4882a593Smuzhiyun * (the register is specified in the iio device attributes).
812*4882a593Smuzhiyun */
813*4882a593Smuzhiyun ret = i2c_smbus_read_i2c_block_data_or_emulated(client,
814*4882a593Smuzhiyun def->data_regs[0],
815*4882a593Smuzhiyun 3 * sizeof(fval[0]),
816*4882a593Smuzhiyun (u8 *)fval);
817*4882a593Smuzhiyun if (ret < 0)
818*4882a593Smuzhiyun goto unlock;
819*4882a593Smuzhiyun
820*4882a593Smuzhiyun mutex_unlock(&data->lock);
821*4882a593Smuzhiyun
822*4882a593Smuzhiyun /* Clamp to valid range. */
823*4882a593Smuzhiyun data->scan.channels[0] = clamp_t(s16, le16_to_cpu(fval[0]), -def->range, def->range);
824*4882a593Smuzhiyun data->scan.channels[1] = clamp_t(s16, le16_to_cpu(fval[1]), -def->range, def->range);
825*4882a593Smuzhiyun data->scan.channels[2] = clamp_t(s16, le16_to_cpu(fval[2]), -def->range, def->range);
826*4882a593Smuzhiyun
827*4882a593Smuzhiyun iio_push_to_buffers_with_timestamp(indio_dev, &data->scan,
828*4882a593Smuzhiyun iio_get_time_ns(indio_dev));
829*4882a593Smuzhiyun
830*4882a593Smuzhiyun return;
831*4882a593Smuzhiyun
832*4882a593Smuzhiyun unlock:
833*4882a593Smuzhiyun mutex_unlock(&data->lock);
834*4882a593Smuzhiyun dev_err(&client->dev, "Error in reading axes block\n");
835*4882a593Smuzhiyun }
836*4882a593Smuzhiyun
ak8975_handle_trigger(int irq,void * p)837*4882a593Smuzhiyun static irqreturn_t ak8975_handle_trigger(int irq, void *p)
838*4882a593Smuzhiyun {
839*4882a593Smuzhiyun const struct iio_poll_func *pf = p;
840*4882a593Smuzhiyun struct iio_dev *indio_dev = pf->indio_dev;
841*4882a593Smuzhiyun
842*4882a593Smuzhiyun ak8975_fill_buffer(indio_dev);
843*4882a593Smuzhiyun iio_trigger_notify_done(indio_dev->trig);
844*4882a593Smuzhiyun return IRQ_HANDLED;
845*4882a593Smuzhiyun }
846*4882a593Smuzhiyun
ak8975_probe(struct i2c_client * client,const struct i2c_device_id * id)847*4882a593Smuzhiyun static int ak8975_probe(struct i2c_client *client,
848*4882a593Smuzhiyun const struct i2c_device_id *id)
849*4882a593Smuzhiyun {
850*4882a593Smuzhiyun struct ak8975_data *data;
851*4882a593Smuzhiyun struct iio_dev *indio_dev;
852*4882a593Smuzhiyun struct gpio_desc *eoc_gpiod;
853*4882a593Smuzhiyun struct gpio_desc *reset_gpiod;
854*4882a593Smuzhiyun const void *match;
855*4882a593Smuzhiyun unsigned int i;
856*4882a593Smuzhiyun int err;
857*4882a593Smuzhiyun enum asahi_compass_chipset chipset;
858*4882a593Smuzhiyun const char *name = NULL;
859*4882a593Smuzhiyun
860*4882a593Smuzhiyun /*
861*4882a593Smuzhiyun * Grab and set up the supplied GPIO.
862*4882a593Smuzhiyun * We may not have a GPIO based IRQ to scan, that is fine, we will
863*4882a593Smuzhiyun * poll if so.
864*4882a593Smuzhiyun */
865*4882a593Smuzhiyun eoc_gpiod = devm_gpiod_get_optional(&client->dev, NULL, GPIOD_IN);
866*4882a593Smuzhiyun if (IS_ERR(eoc_gpiod))
867*4882a593Smuzhiyun return PTR_ERR(eoc_gpiod);
868*4882a593Smuzhiyun if (eoc_gpiod)
869*4882a593Smuzhiyun gpiod_set_consumer_name(eoc_gpiod, "ak_8975");
870*4882a593Smuzhiyun
871*4882a593Smuzhiyun /*
872*4882a593Smuzhiyun * According to AK09911 datasheet, if reset GPIO is provided then
873*4882a593Smuzhiyun * deassert reset on ak8975_power_on() and assert reset on
874*4882a593Smuzhiyun * ak8975_power_off().
875*4882a593Smuzhiyun */
876*4882a593Smuzhiyun reset_gpiod = devm_gpiod_get_optional(&client->dev,
877*4882a593Smuzhiyun "reset", GPIOD_OUT_HIGH);
878*4882a593Smuzhiyun if (IS_ERR(reset_gpiod))
879*4882a593Smuzhiyun return PTR_ERR(reset_gpiod);
880*4882a593Smuzhiyun
881*4882a593Smuzhiyun /* Register with IIO */
882*4882a593Smuzhiyun indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
883*4882a593Smuzhiyun if (indio_dev == NULL)
884*4882a593Smuzhiyun return -ENOMEM;
885*4882a593Smuzhiyun
886*4882a593Smuzhiyun data = iio_priv(indio_dev);
887*4882a593Smuzhiyun i2c_set_clientdata(client, indio_dev);
888*4882a593Smuzhiyun
889*4882a593Smuzhiyun data->client = client;
890*4882a593Smuzhiyun data->eoc_gpiod = eoc_gpiod;
891*4882a593Smuzhiyun data->reset_gpiod = reset_gpiod;
892*4882a593Smuzhiyun data->eoc_irq = 0;
893*4882a593Smuzhiyun
894*4882a593Smuzhiyun err = iio_read_mount_matrix(&client->dev, "mount-matrix", &data->orientation);
895*4882a593Smuzhiyun if (err)
896*4882a593Smuzhiyun return err;
897*4882a593Smuzhiyun
898*4882a593Smuzhiyun /* id will be NULL when enumerated via ACPI */
899*4882a593Smuzhiyun match = device_get_match_data(&client->dev);
900*4882a593Smuzhiyun if (match) {
901*4882a593Smuzhiyun chipset = (enum asahi_compass_chipset)(match);
902*4882a593Smuzhiyun name = dev_name(&client->dev);
903*4882a593Smuzhiyun } else if (id) {
904*4882a593Smuzhiyun chipset = (enum asahi_compass_chipset)(id->driver_data);
905*4882a593Smuzhiyun name = id->name;
906*4882a593Smuzhiyun } else
907*4882a593Smuzhiyun return -ENOSYS;
908*4882a593Smuzhiyun
909*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(ak_def_array); i++)
910*4882a593Smuzhiyun if (ak_def_array[i].type == chipset)
911*4882a593Smuzhiyun break;
912*4882a593Smuzhiyun
913*4882a593Smuzhiyun if (i == ARRAY_SIZE(ak_def_array)) {
914*4882a593Smuzhiyun dev_err(&client->dev, "AKM device type unsupported: %d\n",
915*4882a593Smuzhiyun chipset);
916*4882a593Smuzhiyun return -ENODEV;
917*4882a593Smuzhiyun }
918*4882a593Smuzhiyun
919*4882a593Smuzhiyun data->def = &ak_def_array[i];
920*4882a593Smuzhiyun
921*4882a593Smuzhiyun /* Fetch the regulators */
922*4882a593Smuzhiyun data->vdd = devm_regulator_get(&client->dev, "vdd");
923*4882a593Smuzhiyun if (IS_ERR(data->vdd))
924*4882a593Smuzhiyun return PTR_ERR(data->vdd);
925*4882a593Smuzhiyun data->vid = devm_regulator_get(&client->dev, "vid");
926*4882a593Smuzhiyun if (IS_ERR(data->vid))
927*4882a593Smuzhiyun return PTR_ERR(data->vid);
928*4882a593Smuzhiyun
929*4882a593Smuzhiyun err = ak8975_power_on(data);
930*4882a593Smuzhiyun if (err)
931*4882a593Smuzhiyun return err;
932*4882a593Smuzhiyun
933*4882a593Smuzhiyun err = ak8975_who_i_am(client, data->def->type);
934*4882a593Smuzhiyun if (err < 0) {
935*4882a593Smuzhiyun dev_err(&client->dev, "Unexpected device\n");
936*4882a593Smuzhiyun goto power_off;
937*4882a593Smuzhiyun }
938*4882a593Smuzhiyun dev_dbg(&client->dev, "Asahi compass chip %s\n", name);
939*4882a593Smuzhiyun
940*4882a593Smuzhiyun /* Perform some basic start-of-day setup of the device. */
941*4882a593Smuzhiyun err = ak8975_setup(client);
942*4882a593Smuzhiyun if (err < 0) {
943*4882a593Smuzhiyun dev_err(&client->dev, "%s initialization fails\n", name);
944*4882a593Smuzhiyun goto power_off;
945*4882a593Smuzhiyun }
946*4882a593Smuzhiyun
947*4882a593Smuzhiyun mutex_init(&data->lock);
948*4882a593Smuzhiyun indio_dev->channels = ak8975_channels;
949*4882a593Smuzhiyun indio_dev->num_channels = ARRAY_SIZE(ak8975_channels);
950*4882a593Smuzhiyun indio_dev->info = &ak8975_info;
951*4882a593Smuzhiyun indio_dev->available_scan_masks = ak8975_scan_masks;
952*4882a593Smuzhiyun indio_dev->modes = INDIO_DIRECT_MODE;
953*4882a593Smuzhiyun indio_dev->name = name;
954*4882a593Smuzhiyun
955*4882a593Smuzhiyun err = iio_triggered_buffer_setup(indio_dev, NULL, ak8975_handle_trigger,
956*4882a593Smuzhiyun NULL);
957*4882a593Smuzhiyun if (err) {
958*4882a593Smuzhiyun dev_err(&client->dev, "triggered buffer setup failed\n");
959*4882a593Smuzhiyun goto power_off;
960*4882a593Smuzhiyun }
961*4882a593Smuzhiyun
962*4882a593Smuzhiyun err = iio_device_register(indio_dev);
963*4882a593Smuzhiyun if (err) {
964*4882a593Smuzhiyun dev_err(&client->dev, "device register failed\n");
965*4882a593Smuzhiyun goto cleanup_buffer;
966*4882a593Smuzhiyun }
967*4882a593Smuzhiyun
968*4882a593Smuzhiyun /* Enable runtime PM */
969*4882a593Smuzhiyun pm_runtime_get_noresume(&client->dev);
970*4882a593Smuzhiyun pm_runtime_set_active(&client->dev);
971*4882a593Smuzhiyun pm_runtime_enable(&client->dev);
972*4882a593Smuzhiyun /*
973*4882a593Smuzhiyun * The device comes online in 500us, so add two orders of magnitude
974*4882a593Smuzhiyun * of delay before autosuspending: 50 ms.
975*4882a593Smuzhiyun */
976*4882a593Smuzhiyun pm_runtime_set_autosuspend_delay(&client->dev, 50);
977*4882a593Smuzhiyun pm_runtime_use_autosuspend(&client->dev);
978*4882a593Smuzhiyun pm_runtime_put(&client->dev);
979*4882a593Smuzhiyun
980*4882a593Smuzhiyun return 0;
981*4882a593Smuzhiyun
982*4882a593Smuzhiyun cleanup_buffer:
983*4882a593Smuzhiyun iio_triggered_buffer_cleanup(indio_dev);
984*4882a593Smuzhiyun power_off:
985*4882a593Smuzhiyun ak8975_power_off(data);
986*4882a593Smuzhiyun return err;
987*4882a593Smuzhiyun }
988*4882a593Smuzhiyun
ak8975_remove(struct i2c_client * client)989*4882a593Smuzhiyun static int ak8975_remove(struct i2c_client *client)
990*4882a593Smuzhiyun {
991*4882a593Smuzhiyun struct iio_dev *indio_dev = i2c_get_clientdata(client);
992*4882a593Smuzhiyun struct ak8975_data *data = iio_priv(indio_dev);
993*4882a593Smuzhiyun
994*4882a593Smuzhiyun pm_runtime_get_sync(&client->dev);
995*4882a593Smuzhiyun pm_runtime_put_noidle(&client->dev);
996*4882a593Smuzhiyun pm_runtime_disable(&client->dev);
997*4882a593Smuzhiyun iio_device_unregister(indio_dev);
998*4882a593Smuzhiyun iio_triggered_buffer_cleanup(indio_dev);
999*4882a593Smuzhiyun ak8975_set_mode(data, POWER_DOWN);
1000*4882a593Smuzhiyun ak8975_power_off(data);
1001*4882a593Smuzhiyun
1002*4882a593Smuzhiyun return 0;
1003*4882a593Smuzhiyun }
1004*4882a593Smuzhiyun
1005*4882a593Smuzhiyun #ifdef CONFIG_PM
ak8975_runtime_suspend(struct device * dev)1006*4882a593Smuzhiyun static int ak8975_runtime_suspend(struct device *dev)
1007*4882a593Smuzhiyun {
1008*4882a593Smuzhiyun struct i2c_client *client = to_i2c_client(dev);
1009*4882a593Smuzhiyun struct iio_dev *indio_dev = i2c_get_clientdata(client);
1010*4882a593Smuzhiyun struct ak8975_data *data = iio_priv(indio_dev);
1011*4882a593Smuzhiyun int ret;
1012*4882a593Smuzhiyun
1013*4882a593Smuzhiyun /* Set the device in power down if it wasn't already */
1014*4882a593Smuzhiyun ret = ak8975_set_mode(data, POWER_DOWN);
1015*4882a593Smuzhiyun if (ret < 0) {
1016*4882a593Smuzhiyun dev_err(&client->dev, "Error in setting power-down mode\n");
1017*4882a593Smuzhiyun return ret;
1018*4882a593Smuzhiyun }
1019*4882a593Smuzhiyun /* Next cut the regulators */
1020*4882a593Smuzhiyun ak8975_power_off(data);
1021*4882a593Smuzhiyun
1022*4882a593Smuzhiyun return 0;
1023*4882a593Smuzhiyun }
1024*4882a593Smuzhiyun
ak8975_runtime_resume(struct device * dev)1025*4882a593Smuzhiyun static int ak8975_runtime_resume(struct device *dev)
1026*4882a593Smuzhiyun {
1027*4882a593Smuzhiyun struct i2c_client *client = to_i2c_client(dev);
1028*4882a593Smuzhiyun struct iio_dev *indio_dev = i2c_get_clientdata(client);
1029*4882a593Smuzhiyun struct ak8975_data *data = iio_priv(indio_dev);
1030*4882a593Smuzhiyun int ret;
1031*4882a593Smuzhiyun
1032*4882a593Smuzhiyun /* Take up the regulators */
1033*4882a593Smuzhiyun ak8975_power_on(data);
1034*4882a593Smuzhiyun /*
1035*4882a593Smuzhiyun * We come up in powered down mode, the reading routines will
1036*4882a593Smuzhiyun * put us in the mode to read values later.
1037*4882a593Smuzhiyun */
1038*4882a593Smuzhiyun ret = ak8975_set_mode(data, POWER_DOWN);
1039*4882a593Smuzhiyun if (ret < 0) {
1040*4882a593Smuzhiyun dev_err(&client->dev, "Error in setting power-down mode\n");
1041*4882a593Smuzhiyun return ret;
1042*4882a593Smuzhiyun }
1043*4882a593Smuzhiyun
1044*4882a593Smuzhiyun return 0;
1045*4882a593Smuzhiyun }
1046*4882a593Smuzhiyun #endif /* CONFIG_PM */
1047*4882a593Smuzhiyun
1048*4882a593Smuzhiyun static const struct dev_pm_ops ak8975_dev_pm_ops = {
1049*4882a593Smuzhiyun SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
1050*4882a593Smuzhiyun pm_runtime_force_resume)
1051*4882a593Smuzhiyun SET_RUNTIME_PM_OPS(ak8975_runtime_suspend,
1052*4882a593Smuzhiyun ak8975_runtime_resume, NULL)
1053*4882a593Smuzhiyun };
1054*4882a593Smuzhiyun
1055*4882a593Smuzhiyun static const struct i2c_device_id ak8975_id[] = {
1056*4882a593Smuzhiyun {"ak8975", AK8975},
1057*4882a593Smuzhiyun {"ak8963", AK8963},
1058*4882a593Smuzhiyun {"AK8963", AK8963},
1059*4882a593Smuzhiyun {"ak09911", AK09911},
1060*4882a593Smuzhiyun {"ak09912", AK09912},
1061*4882a593Smuzhiyun {}
1062*4882a593Smuzhiyun };
1063*4882a593Smuzhiyun
1064*4882a593Smuzhiyun MODULE_DEVICE_TABLE(i2c, ak8975_id);
1065*4882a593Smuzhiyun
1066*4882a593Smuzhiyun static const struct of_device_id ak8975_of_match[] = {
1067*4882a593Smuzhiyun { .compatible = "asahi-kasei,ak8975", },
1068*4882a593Smuzhiyun { .compatible = "ak8975", },
1069*4882a593Smuzhiyun { .compatible = "asahi-kasei,ak8963", },
1070*4882a593Smuzhiyun { .compatible = "ak8963", },
1071*4882a593Smuzhiyun { .compatible = "asahi-kasei,ak09911", },
1072*4882a593Smuzhiyun { .compatible = "ak09911", },
1073*4882a593Smuzhiyun { .compatible = "asahi-kasei,ak09912", },
1074*4882a593Smuzhiyun { .compatible = "ak09912", },
1075*4882a593Smuzhiyun {}
1076*4882a593Smuzhiyun };
1077*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, ak8975_of_match);
1078*4882a593Smuzhiyun
1079*4882a593Smuzhiyun static struct i2c_driver ak8975_driver = {
1080*4882a593Smuzhiyun .driver = {
1081*4882a593Smuzhiyun .name = "ak8975",
1082*4882a593Smuzhiyun .pm = &ak8975_dev_pm_ops,
1083*4882a593Smuzhiyun .of_match_table = ak8975_of_match,
1084*4882a593Smuzhiyun .acpi_match_table = ak_acpi_match,
1085*4882a593Smuzhiyun },
1086*4882a593Smuzhiyun .probe = ak8975_probe,
1087*4882a593Smuzhiyun .remove = ak8975_remove,
1088*4882a593Smuzhiyun .id_table = ak8975_id,
1089*4882a593Smuzhiyun };
1090*4882a593Smuzhiyun module_i2c_driver(ak8975_driver);
1091*4882a593Smuzhiyun
1092*4882a593Smuzhiyun MODULE_AUTHOR("Laxman Dewangan <ldewangan@nvidia.com>");
1093*4882a593Smuzhiyun MODULE_DESCRIPTION("AK8975 magnetometer driver");
1094*4882a593Smuzhiyun MODULE_LICENSE("GPL");
1095