xref: /OK3568_Linux_fs/kernel/drivers/iio/light/veml6030.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0+
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * VEML6030 Ambient Light Sensor
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (c) 2019, Rishi Gupta <gupt21@gmail.com>
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * Datasheet: https://www.vishay.com/docs/84366/veml6030.pdf
8*4882a593Smuzhiyun  * Appnote-84367: https://www.vishay.com/docs/84367/designingveml6030.pdf
9*4882a593Smuzhiyun  */
10*4882a593Smuzhiyun 
11*4882a593Smuzhiyun #include <linux/module.h>
12*4882a593Smuzhiyun #include <linux/i2c.h>
13*4882a593Smuzhiyun #include <linux/err.h>
14*4882a593Smuzhiyun #include <linux/regmap.h>
15*4882a593Smuzhiyun #include <linux/interrupt.h>
16*4882a593Smuzhiyun #include <linux/pm_runtime.h>
17*4882a593Smuzhiyun #include <linux/iio/iio.h>
18*4882a593Smuzhiyun #include <linux/iio/sysfs.h>
19*4882a593Smuzhiyun #include <linux/iio/events.h>
20*4882a593Smuzhiyun 
21*4882a593Smuzhiyun /* Device registers */
22*4882a593Smuzhiyun #define VEML6030_REG_ALS_CONF   0x00
23*4882a593Smuzhiyun #define VEML6030_REG_ALS_WH     0x01
24*4882a593Smuzhiyun #define VEML6030_REG_ALS_WL     0x02
25*4882a593Smuzhiyun #define VEML6030_REG_ALS_PSM    0x03
26*4882a593Smuzhiyun #define VEML6030_REG_ALS_DATA   0x04
27*4882a593Smuzhiyun #define VEML6030_REG_WH_DATA    0x05
28*4882a593Smuzhiyun #define VEML6030_REG_ALS_INT    0x06
29*4882a593Smuzhiyun 
30*4882a593Smuzhiyun /* Bit masks for specific functionality */
31*4882a593Smuzhiyun #define VEML6030_ALS_IT       GENMASK(9, 6)
32*4882a593Smuzhiyun #define VEML6030_PSM          GENMASK(2, 1)
33*4882a593Smuzhiyun #define VEML6030_ALS_PERS     GENMASK(5, 4)
34*4882a593Smuzhiyun #define VEML6030_ALS_GAIN     GENMASK(12, 11)
35*4882a593Smuzhiyun #define VEML6030_PSM_EN       BIT(0)
36*4882a593Smuzhiyun #define VEML6030_INT_TH_LOW   BIT(15)
37*4882a593Smuzhiyun #define VEML6030_INT_TH_HIGH  BIT(14)
38*4882a593Smuzhiyun #define VEML6030_ALS_INT_EN   BIT(1)
39*4882a593Smuzhiyun #define VEML6030_ALS_SD       BIT(0)
40*4882a593Smuzhiyun 
41*4882a593Smuzhiyun /*
42*4882a593Smuzhiyun  * The resolution depends on both gain and integration time. The
43*4882a593Smuzhiyun  * cur_resolution stores one of the resolution mentioned in the
44*4882a593Smuzhiyun  * table during startup and gets updated whenever integration time
45*4882a593Smuzhiyun  * or gain is changed.
46*4882a593Smuzhiyun  *
47*4882a593Smuzhiyun  * Table 'resolution and maximum detection range' in appnote 84367
48*4882a593Smuzhiyun  * is visualized as a 2D array. The cur_gain stores index of gain
49*4882a593Smuzhiyun  * in this table (0-3) while the cur_integration_time holds index
50*4882a593Smuzhiyun  * of integration time (0-5).
51*4882a593Smuzhiyun  */
52*4882a593Smuzhiyun struct veml6030_data {
53*4882a593Smuzhiyun 	struct i2c_client *client;
54*4882a593Smuzhiyun 	struct regmap *regmap;
55*4882a593Smuzhiyun 	int cur_resolution;
56*4882a593Smuzhiyun 	int cur_gain;
57*4882a593Smuzhiyun 	int cur_integration_time;
58*4882a593Smuzhiyun };
59*4882a593Smuzhiyun 
60*4882a593Smuzhiyun /* Integration time available in seconds */
61*4882a593Smuzhiyun static IIO_CONST_ATTR(in_illuminance_integration_time_available,
62*4882a593Smuzhiyun 				"0.025 0.05 0.1 0.2 0.4 0.8");
63*4882a593Smuzhiyun 
64*4882a593Smuzhiyun /*
65*4882a593Smuzhiyun  * Scale is 1/gain. Value 0.125 is ALS gain x (1/8), 0.25 is
66*4882a593Smuzhiyun  * ALS gain x (1/4), 1.0 = ALS gain x 1 and 2.0 is ALS gain x 2.
67*4882a593Smuzhiyun  */
68*4882a593Smuzhiyun static IIO_CONST_ATTR(in_illuminance_scale_available,
69*4882a593Smuzhiyun 				"0.125 0.25 1.0 2.0");
70*4882a593Smuzhiyun 
71*4882a593Smuzhiyun static struct attribute *veml6030_attributes[] = {
72*4882a593Smuzhiyun 	&iio_const_attr_in_illuminance_integration_time_available.dev_attr.attr,
73*4882a593Smuzhiyun 	&iio_const_attr_in_illuminance_scale_available.dev_attr.attr,
74*4882a593Smuzhiyun 	NULL
75*4882a593Smuzhiyun };
76*4882a593Smuzhiyun 
77*4882a593Smuzhiyun static const struct attribute_group veml6030_attr_group = {
78*4882a593Smuzhiyun 	.attrs = veml6030_attributes,
79*4882a593Smuzhiyun };
80*4882a593Smuzhiyun 
81*4882a593Smuzhiyun /*
82*4882a593Smuzhiyun  * Persistence = 1/2/4/8 x integration time
83*4882a593Smuzhiyun  * Minimum time for which light readings must stay above configured
84*4882a593Smuzhiyun  * threshold to assert the interrupt.
85*4882a593Smuzhiyun  */
86*4882a593Smuzhiyun static const char * const period_values[] = {
87*4882a593Smuzhiyun 		"0.1 0.2 0.4 0.8",
88*4882a593Smuzhiyun 		"0.2 0.4 0.8 1.6",
89*4882a593Smuzhiyun 		"0.4 0.8 1.6 3.2",
90*4882a593Smuzhiyun 		"0.8 1.6 3.2 6.4",
91*4882a593Smuzhiyun 		"0.05 0.1 0.2 0.4",
92*4882a593Smuzhiyun 		"0.025 0.050 0.1 0.2"
93*4882a593Smuzhiyun };
94*4882a593Smuzhiyun 
95*4882a593Smuzhiyun /*
96*4882a593Smuzhiyun  * Return list of valid period values in seconds corresponding to
97*4882a593Smuzhiyun  * the currently active integration time.
98*4882a593Smuzhiyun  */
in_illuminance_period_available_show(struct device * dev,struct device_attribute * attr,char * buf)99*4882a593Smuzhiyun static ssize_t in_illuminance_period_available_show(struct device *dev,
100*4882a593Smuzhiyun 				struct device_attribute *attr, char *buf)
101*4882a593Smuzhiyun {
102*4882a593Smuzhiyun 	int ret, reg, x;
103*4882a593Smuzhiyun 	struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
104*4882a593Smuzhiyun 	struct veml6030_data *data = iio_priv(indio_dev);
105*4882a593Smuzhiyun 
106*4882a593Smuzhiyun 	ret = regmap_read(data->regmap, VEML6030_REG_ALS_CONF, &reg);
107*4882a593Smuzhiyun 	if (ret) {
108*4882a593Smuzhiyun 		dev_err(&data->client->dev,
109*4882a593Smuzhiyun 				"can't read als conf register %d\n", ret);
110*4882a593Smuzhiyun 		return ret;
111*4882a593Smuzhiyun 	}
112*4882a593Smuzhiyun 
113*4882a593Smuzhiyun 	ret = ((reg >> 6) & 0xF);
114*4882a593Smuzhiyun 	switch (ret) {
115*4882a593Smuzhiyun 	case 0:
116*4882a593Smuzhiyun 	case 1:
117*4882a593Smuzhiyun 	case 2:
118*4882a593Smuzhiyun 	case 3:
119*4882a593Smuzhiyun 		x = ret;
120*4882a593Smuzhiyun 		break;
121*4882a593Smuzhiyun 	case 8:
122*4882a593Smuzhiyun 		x = 4;
123*4882a593Smuzhiyun 		break;
124*4882a593Smuzhiyun 	case 12:
125*4882a593Smuzhiyun 		x = 5;
126*4882a593Smuzhiyun 		break;
127*4882a593Smuzhiyun 	default:
128*4882a593Smuzhiyun 		return -EINVAL;
129*4882a593Smuzhiyun 	}
130*4882a593Smuzhiyun 
131*4882a593Smuzhiyun 	return snprintf(buf, PAGE_SIZE, "%s\n", period_values[x]);
132*4882a593Smuzhiyun }
133*4882a593Smuzhiyun 
134*4882a593Smuzhiyun static IIO_DEVICE_ATTR_RO(in_illuminance_period_available, 0);
135*4882a593Smuzhiyun 
136*4882a593Smuzhiyun static struct attribute *veml6030_event_attributes[] = {
137*4882a593Smuzhiyun 	&iio_dev_attr_in_illuminance_period_available.dev_attr.attr,
138*4882a593Smuzhiyun 	NULL
139*4882a593Smuzhiyun };
140*4882a593Smuzhiyun 
141*4882a593Smuzhiyun static const struct attribute_group veml6030_event_attr_group = {
142*4882a593Smuzhiyun 	.attrs = veml6030_event_attributes,
143*4882a593Smuzhiyun };
144*4882a593Smuzhiyun 
veml6030_als_pwr_on(struct veml6030_data * data)145*4882a593Smuzhiyun static int veml6030_als_pwr_on(struct veml6030_data *data)
146*4882a593Smuzhiyun {
147*4882a593Smuzhiyun 	return regmap_update_bits(data->regmap, VEML6030_REG_ALS_CONF,
148*4882a593Smuzhiyun 				 VEML6030_ALS_SD, 0);
149*4882a593Smuzhiyun }
150*4882a593Smuzhiyun 
veml6030_als_shut_down(struct veml6030_data * data)151*4882a593Smuzhiyun static int veml6030_als_shut_down(struct veml6030_data *data)
152*4882a593Smuzhiyun {
153*4882a593Smuzhiyun 	return regmap_update_bits(data->regmap, VEML6030_REG_ALS_CONF,
154*4882a593Smuzhiyun 				 VEML6030_ALS_SD, 1);
155*4882a593Smuzhiyun }
156*4882a593Smuzhiyun 
veml6030_als_shut_down_action(void * data)157*4882a593Smuzhiyun static void veml6030_als_shut_down_action(void *data)
158*4882a593Smuzhiyun {
159*4882a593Smuzhiyun 	veml6030_als_shut_down(data);
160*4882a593Smuzhiyun }
161*4882a593Smuzhiyun 
162*4882a593Smuzhiyun static const struct iio_event_spec veml6030_event_spec[] = {
163*4882a593Smuzhiyun 	{
164*4882a593Smuzhiyun 		.type = IIO_EV_TYPE_THRESH,
165*4882a593Smuzhiyun 		.dir = IIO_EV_DIR_RISING,
166*4882a593Smuzhiyun 		.mask_separate = BIT(IIO_EV_INFO_VALUE),
167*4882a593Smuzhiyun 	}, {
168*4882a593Smuzhiyun 		.type = IIO_EV_TYPE_THRESH,
169*4882a593Smuzhiyun 		.dir = IIO_EV_DIR_FALLING,
170*4882a593Smuzhiyun 		.mask_separate = BIT(IIO_EV_INFO_VALUE),
171*4882a593Smuzhiyun 	}, {
172*4882a593Smuzhiyun 		.type = IIO_EV_TYPE_THRESH,
173*4882a593Smuzhiyun 		.dir = IIO_EV_DIR_EITHER,
174*4882a593Smuzhiyun 		.mask_separate = BIT(IIO_EV_INFO_PERIOD) |
175*4882a593Smuzhiyun 		BIT(IIO_EV_INFO_ENABLE),
176*4882a593Smuzhiyun 	},
177*4882a593Smuzhiyun };
178*4882a593Smuzhiyun 
179*4882a593Smuzhiyun /* Channel number */
180*4882a593Smuzhiyun enum veml6030_chan {
181*4882a593Smuzhiyun 	CH_ALS,
182*4882a593Smuzhiyun 	CH_WHITE,
183*4882a593Smuzhiyun };
184*4882a593Smuzhiyun 
185*4882a593Smuzhiyun static const struct iio_chan_spec veml6030_channels[] = {
186*4882a593Smuzhiyun 	{
187*4882a593Smuzhiyun 		.type = IIO_LIGHT,
188*4882a593Smuzhiyun 		.channel = CH_ALS,
189*4882a593Smuzhiyun 		.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
190*4882a593Smuzhiyun 				BIT(IIO_CHAN_INFO_PROCESSED) |
191*4882a593Smuzhiyun 				BIT(IIO_CHAN_INFO_INT_TIME) |
192*4882a593Smuzhiyun 				BIT(IIO_CHAN_INFO_SCALE),
193*4882a593Smuzhiyun 		.event_spec = veml6030_event_spec,
194*4882a593Smuzhiyun 		.num_event_specs = ARRAY_SIZE(veml6030_event_spec),
195*4882a593Smuzhiyun 	},
196*4882a593Smuzhiyun 	{
197*4882a593Smuzhiyun 		.type = IIO_INTENSITY,
198*4882a593Smuzhiyun 		.channel = CH_WHITE,
199*4882a593Smuzhiyun 		.modified = 1,
200*4882a593Smuzhiyun 		.channel2 = IIO_MOD_LIGHT_BOTH,
201*4882a593Smuzhiyun 		.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
202*4882a593Smuzhiyun 				BIT(IIO_CHAN_INFO_PROCESSED),
203*4882a593Smuzhiyun 	},
204*4882a593Smuzhiyun };
205*4882a593Smuzhiyun 
206*4882a593Smuzhiyun static const struct regmap_config veml6030_regmap_config = {
207*4882a593Smuzhiyun 	.name = "veml6030_regmap",
208*4882a593Smuzhiyun 	.reg_bits = 8,
209*4882a593Smuzhiyun 	.val_bits = 16,
210*4882a593Smuzhiyun 	.max_register = VEML6030_REG_ALS_INT,
211*4882a593Smuzhiyun 	.val_format_endian = REGMAP_ENDIAN_LITTLE,
212*4882a593Smuzhiyun };
213*4882a593Smuzhiyun 
veml6030_get_intgrn_tm(struct iio_dev * indio_dev,int * val,int * val2)214*4882a593Smuzhiyun static int veml6030_get_intgrn_tm(struct iio_dev *indio_dev,
215*4882a593Smuzhiyun 						int *val, int *val2)
216*4882a593Smuzhiyun {
217*4882a593Smuzhiyun 	int ret, reg;
218*4882a593Smuzhiyun 	struct veml6030_data *data = iio_priv(indio_dev);
219*4882a593Smuzhiyun 
220*4882a593Smuzhiyun 	ret = regmap_read(data->regmap, VEML6030_REG_ALS_CONF, &reg);
221*4882a593Smuzhiyun 	if (ret) {
222*4882a593Smuzhiyun 		dev_err(&data->client->dev,
223*4882a593Smuzhiyun 				"can't read als conf register %d\n", ret);
224*4882a593Smuzhiyun 		return ret;
225*4882a593Smuzhiyun 	}
226*4882a593Smuzhiyun 
227*4882a593Smuzhiyun 	switch ((reg >> 6) & 0xF) {
228*4882a593Smuzhiyun 	case 0:
229*4882a593Smuzhiyun 		*val2 = 100000;
230*4882a593Smuzhiyun 		break;
231*4882a593Smuzhiyun 	case 1:
232*4882a593Smuzhiyun 		*val2 = 200000;
233*4882a593Smuzhiyun 		break;
234*4882a593Smuzhiyun 	case 2:
235*4882a593Smuzhiyun 		*val2 = 400000;
236*4882a593Smuzhiyun 		break;
237*4882a593Smuzhiyun 	case 3:
238*4882a593Smuzhiyun 		*val2 = 800000;
239*4882a593Smuzhiyun 		break;
240*4882a593Smuzhiyun 	case 8:
241*4882a593Smuzhiyun 		*val2 = 50000;
242*4882a593Smuzhiyun 		break;
243*4882a593Smuzhiyun 	case 12:
244*4882a593Smuzhiyun 		*val2 = 25000;
245*4882a593Smuzhiyun 		break;
246*4882a593Smuzhiyun 	default:
247*4882a593Smuzhiyun 		return -EINVAL;
248*4882a593Smuzhiyun 	}
249*4882a593Smuzhiyun 
250*4882a593Smuzhiyun 	*val = 0;
251*4882a593Smuzhiyun 	return IIO_VAL_INT_PLUS_MICRO;
252*4882a593Smuzhiyun }
253*4882a593Smuzhiyun 
veml6030_set_intgrn_tm(struct iio_dev * indio_dev,int val,int val2)254*4882a593Smuzhiyun static int veml6030_set_intgrn_tm(struct iio_dev *indio_dev,
255*4882a593Smuzhiyun 						int val, int val2)
256*4882a593Smuzhiyun {
257*4882a593Smuzhiyun 	int ret, new_int_time, int_idx;
258*4882a593Smuzhiyun 	struct veml6030_data *data = iio_priv(indio_dev);
259*4882a593Smuzhiyun 
260*4882a593Smuzhiyun 	if (val)
261*4882a593Smuzhiyun 		return -EINVAL;
262*4882a593Smuzhiyun 
263*4882a593Smuzhiyun 	switch (val2) {
264*4882a593Smuzhiyun 	case 25000:
265*4882a593Smuzhiyun 		new_int_time = 0x300;
266*4882a593Smuzhiyun 		int_idx = 5;
267*4882a593Smuzhiyun 		break;
268*4882a593Smuzhiyun 	case 50000:
269*4882a593Smuzhiyun 		new_int_time = 0x200;
270*4882a593Smuzhiyun 		int_idx = 4;
271*4882a593Smuzhiyun 		break;
272*4882a593Smuzhiyun 	case 100000:
273*4882a593Smuzhiyun 		new_int_time = 0x00;
274*4882a593Smuzhiyun 		int_idx = 3;
275*4882a593Smuzhiyun 		break;
276*4882a593Smuzhiyun 	case 200000:
277*4882a593Smuzhiyun 		new_int_time = 0x40;
278*4882a593Smuzhiyun 		int_idx = 2;
279*4882a593Smuzhiyun 		break;
280*4882a593Smuzhiyun 	case 400000:
281*4882a593Smuzhiyun 		new_int_time = 0x80;
282*4882a593Smuzhiyun 		int_idx = 1;
283*4882a593Smuzhiyun 		break;
284*4882a593Smuzhiyun 	case 800000:
285*4882a593Smuzhiyun 		new_int_time = 0xC0;
286*4882a593Smuzhiyun 		int_idx = 0;
287*4882a593Smuzhiyun 		break;
288*4882a593Smuzhiyun 	default:
289*4882a593Smuzhiyun 		return -EINVAL;
290*4882a593Smuzhiyun 	}
291*4882a593Smuzhiyun 
292*4882a593Smuzhiyun 	ret = regmap_update_bits(data->regmap, VEML6030_REG_ALS_CONF,
293*4882a593Smuzhiyun 					VEML6030_ALS_IT, new_int_time);
294*4882a593Smuzhiyun 	if (ret) {
295*4882a593Smuzhiyun 		dev_err(&data->client->dev,
296*4882a593Smuzhiyun 				"can't update als integration time %d\n", ret);
297*4882a593Smuzhiyun 		return ret;
298*4882a593Smuzhiyun 	}
299*4882a593Smuzhiyun 
300*4882a593Smuzhiyun 	/*
301*4882a593Smuzhiyun 	 * Cache current integration time and update resolution. For every
302*4882a593Smuzhiyun 	 * increase in integration time to next level, resolution is halved
303*4882a593Smuzhiyun 	 * and vice-versa.
304*4882a593Smuzhiyun 	 */
305*4882a593Smuzhiyun 	if (data->cur_integration_time < int_idx)
306*4882a593Smuzhiyun 		data->cur_resolution <<= int_idx - data->cur_integration_time;
307*4882a593Smuzhiyun 	else if (data->cur_integration_time > int_idx)
308*4882a593Smuzhiyun 		data->cur_resolution >>= data->cur_integration_time - int_idx;
309*4882a593Smuzhiyun 
310*4882a593Smuzhiyun 	data->cur_integration_time = int_idx;
311*4882a593Smuzhiyun 
312*4882a593Smuzhiyun 	return ret;
313*4882a593Smuzhiyun }
314*4882a593Smuzhiyun 
veml6030_read_persistence(struct iio_dev * indio_dev,int * val,int * val2)315*4882a593Smuzhiyun static int veml6030_read_persistence(struct iio_dev *indio_dev,
316*4882a593Smuzhiyun 						int *val, int *val2)
317*4882a593Smuzhiyun {
318*4882a593Smuzhiyun 	int ret, reg, period, x, y;
319*4882a593Smuzhiyun 	struct veml6030_data *data = iio_priv(indio_dev);
320*4882a593Smuzhiyun 
321*4882a593Smuzhiyun 	ret = veml6030_get_intgrn_tm(indio_dev, &x, &y);
322*4882a593Smuzhiyun 	if (ret < 0)
323*4882a593Smuzhiyun 		return ret;
324*4882a593Smuzhiyun 
325*4882a593Smuzhiyun 	ret = regmap_read(data->regmap, VEML6030_REG_ALS_CONF, &reg);
326*4882a593Smuzhiyun 	if (ret) {
327*4882a593Smuzhiyun 		dev_err(&data->client->dev,
328*4882a593Smuzhiyun 				"can't read als conf register %d\n", ret);
329*4882a593Smuzhiyun 	}
330*4882a593Smuzhiyun 
331*4882a593Smuzhiyun 	/* integration time multiplied by 1/2/4/8 */
332*4882a593Smuzhiyun 	period = y * (1 << ((reg >> 4) & 0x03));
333*4882a593Smuzhiyun 
334*4882a593Smuzhiyun 	*val = period / 1000000;
335*4882a593Smuzhiyun 	*val2 = period % 1000000;
336*4882a593Smuzhiyun 
337*4882a593Smuzhiyun 	return IIO_VAL_INT_PLUS_MICRO;
338*4882a593Smuzhiyun }
339*4882a593Smuzhiyun 
veml6030_write_persistence(struct iio_dev * indio_dev,int val,int val2)340*4882a593Smuzhiyun static int veml6030_write_persistence(struct iio_dev *indio_dev,
341*4882a593Smuzhiyun 						int val, int val2)
342*4882a593Smuzhiyun {
343*4882a593Smuzhiyun 	int ret, period, x, y;
344*4882a593Smuzhiyun 	struct veml6030_data *data = iio_priv(indio_dev);
345*4882a593Smuzhiyun 
346*4882a593Smuzhiyun 	ret = veml6030_get_intgrn_tm(indio_dev, &x, &y);
347*4882a593Smuzhiyun 	if (ret < 0)
348*4882a593Smuzhiyun 		return ret;
349*4882a593Smuzhiyun 
350*4882a593Smuzhiyun 	if (!val) {
351*4882a593Smuzhiyun 		period = val2 / y;
352*4882a593Smuzhiyun 	} else {
353*4882a593Smuzhiyun 		if ((val == 1) && (val2 == 600000))
354*4882a593Smuzhiyun 			period = 1600000 / y;
355*4882a593Smuzhiyun 		else if ((val == 3) && (val2 == 200000))
356*4882a593Smuzhiyun 			period = 3200000 / y;
357*4882a593Smuzhiyun 		else if ((val == 6) && (val2 == 400000))
358*4882a593Smuzhiyun 			period = 6400000 / y;
359*4882a593Smuzhiyun 		else
360*4882a593Smuzhiyun 			period = -1;
361*4882a593Smuzhiyun 	}
362*4882a593Smuzhiyun 
363*4882a593Smuzhiyun 	if (period <= 0 || period > 8 || hweight8(period) != 1)
364*4882a593Smuzhiyun 		return -EINVAL;
365*4882a593Smuzhiyun 
366*4882a593Smuzhiyun 	ret = regmap_update_bits(data->regmap, VEML6030_REG_ALS_CONF,
367*4882a593Smuzhiyun 				VEML6030_ALS_PERS, (ffs(period) - 1) << 4);
368*4882a593Smuzhiyun 	if (ret)
369*4882a593Smuzhiyun 		dev_err(&data->client->dev,
370*4882a593Smuzhiyun 				"can't set persistence value %d\n", ret);
371*4882a593Smuzhiyun 
372*4882a593Smuzhiyun 	return ret;
373*4882a593Smuzhiyun }
374*4882a593Smuzhiyun 
veml6030_set_als_gain(struct iio_dev * indio_dev,int val,int val2)375*4882a593Smuzhiyun static int veml6030_set_als_gain(struct iio_dev *indio_dev,
376*4882a593Smuzhiyun 						int val, int val2)
377*4882a593Smuzhiyun {
378*4882a593Smuzhiyun 	int ret, new_gain, gain_idx;
379*4882a593Smuzhiyun 	struct veml6030_data *data = iio_priv(indio_dev);
380*4882a593Smuzhiyun 
381*4882a593Smuzhiyun 	if (val == 0 && val2 == 125000) {
382*4882a593Smuzhiyun 		new_gain = 0x1000; /* 0x02 << 11 */
383*4882a593Smuzhiyun 		gain_idx = 3;
384*4882a593Smuzhiyun 	} else if (val == 0 && val2 == 250000) {
385*4882a593Smuzhiyun 		new_gain = 0x1800;
386*4882a593Smuzhiyun 		gain_idx = 2;
387*4882a593Smuzhiyun 	} else if (val == 1 && val2 == 0) {
388*4882a593Smuzhiyun 		new_gain = 0x00;
389*4882a593Smuzhiyun 		gain_idx = 1;
390*4882a593Smuzhiyun 	} else if (val == 2 && val2 == 0) {
391*4882a593Smuzhiyun 		new_gain = 0x800;
392*4882a593Smuzhiyun 		gain_idx = 0;
393*4882a593Smuzhiyun 	} else {
394*4882a593Smuzhiyun 		return -EINVAL;
395*4882a593Smuzhiyun 	}
396*4882a593Smuzhiyun 
397*4882a593Smuzhiyun 	ret = regmap_update_bits(data->regmap, VEML6030_REG_ALS_CONF,
398*4882a593Smuzhiyun 					VEML6030_ALS_GAIN, new_gain);
399*4882a593Smuzhiyun 	if (ret) {
400*4882a593Smuzhiyun 		dev_err(&data->client->dev,
401*4882a593Smuzhiyun 				"can't set als gain %d\n", ret);
402*4882a593Smuzhiyun 		return ret;
403*4882a593Smuzhiyun 	}
404*4882a593Smuzhiyun 
405*4882a593Smuzhiyun 	/*
406*4882a593Smuzhiyun 	 * Cache currently set gain & update resolution. For every
407*4882a593Smuzhiyun 	 * increase in the gain to next level, resolution is halved
408*4882a593Smuzhiyun 	 * and vice-versa.
409*4882a593Smuzhiyun 	 */
410*4882a593Smuzhiyun 	if (data->cur_gain < gain_idx)
411*4882a593Smuzhiyun 		data->cur_resolution <<= gain_idx - data->cur_gain;
412*4882a593Smuzhiyun 	else if (data->cur_gain > gain_idx)
413*4882a593Smuzhiyun 		data->cur_resolution >>= data->cur_gain - gain_idx;
414*4882a593Smuzhiyun 
415*4882a593Smuzhiyun 	data->cur_gain = gain_idx;
416*4882a593Smuzhiyun 
417*4882a593Smuzhiyun 	return ret;
418*4882a593Smuzhiyun }
419*4882a593Smuzhiyun 
veml6030_get_als_gain(struct iio_dev * indio_dev,int * val,int * val2)420*4882a593Smuzhiyun static int veml6030_get_als_gain(struct iio_dev *indio_dev,
421*4882a593Smuzhiyun 						int *val, int *val2)
422*4882a593Smuzhiyun {
423*4882a593Smuzhiyun 	int ret, reg;
424*4882a593Smuzhiyun 	struct veml6030_data *data = iio_priv(indio_dev);
425*4882a593Smuzhiyun 
426*4882a593Smuzhiyun 	ret = regmap_read(data->regmap, VEML6030_REG_ALS_CONF, &reg);
427*4882a593Smuzhiyun 	if (ret) {
428*4882a593Smuzhiyun 		dev_err(&data->client->dev,
429*4882a593Smuzhiyun 				"can't read als conf register %d\n", ret);
430*4882a593Smuzhiyun 		return ret;
431*4882a593Smuzhiyun 	}
432*4882a593Smuzhiyun 
433*4882a593Smuzhiyun 	switch ((reg >> 11) & 0x03) {
434*4882a593Smuzhiyun 	case 0:
435*4882a593Smuzhiyun 		*val = 1;
436*4882a593Smuzhiyun 		*val2 = 0;
437*4882a593Smuzhiyun 		break;
438*4882a593Smuzhiyun 	case 1:
439*4882a593Smuzhiyun 		*val = 2;
440*4882a593Smuzhiyun 		*val2 = 0;
441*4882a593Smuzhiyun 		break;
442*4882a593Smuzhiyun 	case 2:
443*4882a593Smuzhiyun 		*val = 0;
444*4882a593Smuzhiyun 		*val2 = 125000;
445*4882a593Smuzhiyun 		break;
446*4882a593Smuzhiyun 	case 3:
447*4882a593Smuzhiyun 		*val = 0;
448*4882a593Smuzhiyun 		*val2 = 250000;
449*4882a593Smuzhiyun 		break;
450*4882a593Smuzhiyun 	default:
451*4882a593Smuzhiyun 		return -EINVAL;
452*4882a593Smuzhiyun 	}
453*4882a593Smuzhiyun 
454*4882a593Smuzhiyun 	return IIO_VAL_INT_PLUS_MICRO;
455*4882a593Smuzhiyun }
456*4882a593Smuzhiyun 
veml6030_read_thresh(struct iio_dev * indio_dev,int * val,int * val2,int dir)457*4882a593Smuzhiyun static int veml6030_read_thresh(struct iio_dev *indio_dev,
458*4882a593Smuzhiyun 						int *val, int *val2, int dir)
459*4882a593Smuzhiyun {
460*4882a593Smuzhiyun 	int ret, reg;
461*4882a593Smuzhiyun 	struct veml6030_data *data = iio_priv(indio_dev);
462*4882a593Smuzhiyun 
463*4882a593Smuzhiyun 	if (dir == IIO_EV_DIR_RISING)
464*4882a593Smuzhiyun 		ret = regmap_read(data->regmap, VEML6030_REG_ALS_WH, &reg);
465*4882a593Smuzhiyun 	else
466*4882a593Smuzhiyun 		ret = regmap_read(data->regmap, VEML6030_REG_ALS_WL, &reg);
467*4882a593Smuzhiyun 	if (ret) {
468*4882a593Smuzhiyun 		dev_err(&data->client->dev,
469*4882a593Smuzhiyun 				"can't read als threshold value %d\n", ret);
470*4882a593Smuzhiyun 		return ret;
471*4882a593Smuzhiyun 	}
472*4882a593Smuzhiyun 
473*4882a593Smuzhiyun 	*val = reg & 0xffff;
474*4882a593Smuzhiyun 	return IIO_VAL_INT;
475*4882a593Smuzhiyun }
476*4882a593Smuzhiyun 
veml6030_write_thresh(struct iio_dev * indio_dev,int val,int val2,int dir)477*4882a593Smuzhiyun static int veml6030_write_thresh(struct iio_dev *indio_dev,
478*4882a593Smuzhiyun 						int val, int val2, int dir)
479*4882a593Smuzhiyun {
480*4882a593Smuzhiyun 	int ret;
481*4882a593Smuzhiyun 	struct veml6030_data *data = iio_priv(indio_dev);
482*4882a593Smuzhiyun 
483*4882a593Smuzhiyun 	if (val > 0xFFFF || val < 0 || val2)
484*4882a593Smuzhiyun 		return -EINVAL;
485*4882a593Smuzhiyun 
486*4882a593Smuzhiyun 	if (dir == IIO_EV_DIR_RISING) {
487*4882a593Smuzhiyun 		ret = regmap_write(data->regmap, VEML6030_REG_ALS_WH, val);
488*4882a593Smuzhiyun 		if (ret)
489*4882a593Smuzhiyun 			dev_err(&data->client->dev,
490*4882a593Smuzhiyun 					"can't set high threshold %d\n", ret);
491*4882a593Smuzhiyun 	} else {
492*4882a593Smuzhiyun 		ret = regmap_write(data->regmap, VEML6030_REG_ALS_WL, val);
493*4882a593Smuzhiyun 		if (ret)
494*4882a593Smuzhiyun 			dev_err(&data->client->dev,
495*4882a593Smuzhiyun 					"can't set low threshold %d\n", ret);
496*4882a593Smuzhiyun 	}
497*4882a593Smuzhiyun 
498*4882a593Smuzhiyun 	return ret;
499*4882a593Smuzhiyun }
500*4882a593Smuzhiyun 
501*4882a593Smuzhiyun /*
502*4882a593Smuzhiyun  * Provide both raw as well as light reading in lux.
503*4882a593Smuzhiyun  * light (in lux) = resolution * raw reading
504*4882a593Smuzhiyun  */
veml6030_read_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int * val,int * val2,long mask)505*4882a593Smuzhiyun static int veml6030_read_raw(struct iio_dev *indio_dev,
506*4882a593Smuzhiyun 			    struct iio_chan_spec const *chan, int *val,
507*4882a593Smuzhiyun 			    int *val2, long mask)
508*4882a593Smuzhiyun {
509*4882a593Smuzhiyun 	int ret, reg;
510*4882a593Smuzhiyun 	struct veml6030_data *data = iio_priv(indio_dev);
511*4882a593Smuzhiyun 	struct regmap *regmap = data->regmap;
512*4882a593Smuzhiyun 	struct device *dev = &data->client->dev;
513*4882a593Smuzhiyun 
514*4882a593Smuzhiyun 	switch (mask) {
515*4882a593Smuzhiyun 	case IIO_CHAN_INFO_RAW:
516*4882a593Smuzhiyun 	case IIO_CHAN_INFO_PROCESSED:
517*4882a593Smuzhiyun 		switch (chan->type) {
518*4882a593Smuzhiyun 		case IIO_LIGHT:
519*4882a593Smuzhiyun 			ret = regmap_read(regmap, VEML6030_REG_ALS_DATA, &reg);
520*4882a593Smuzhiyun 			if (ret < 0) {
521*4882a593Smuzhiyun 				dev_err(dev, "can't read als data %d\n", ret);
522*4882a593Smuzhiyun 				return ret;
523*4882a593Smuzhiyun 			}
524*4882a593Smuzhiyun 			if (mask == IIO_CHAN_INFO_PROCESSED) {
525*4882a593Smuzhiyun 				*val = (reg * data->cur_resolution) / 10000;
526*4882a593Smuzhiyun 				*val2 = (reg * data->cur_resolution) % 10000;
527*4882a593Smuzhiyun 				return IIO_VAL_INT_PLUS_MICRO;
528*4882a593Smuzhiyun 			}
529*4882a593Smuzhiyun 			*val = reg;
530*4882a593Smuzhiyun 			return IIO_VAL_INT;
531*4882a593Smuzhiyun 		case IIO_INTENSITY:
532*4882a593Smuzhiyun 			ret = regmap_read(regmap, VEML6030_REG_WH_DATA, &reg);
533*4882a593Smuzhiyun 			if (ret < 0) {
534*4882a593Smuzhiyun 				dev_err(dev, "can't read white data %d\n", ret);
535*4882a593Smuzhiyun 				return ret;
536*4882a593Smuzhiyun 			}
537*4882a593Smuzhiyun 			if (mask == IIO_CHAN_INFO_PROCESSED) {
538*4882a593Smuzhiyun 				*val = (reg * data->cur_resolution) / 10000;
539*4882a593Smuzhiyun 				*val2 = (reg * data->cur_resolution) % 10000;
540*4882a593Smuzhiyun 				return IIO_VAL_INT_PLUS_MICRO;
541*4882a593Smuzhiyun 			}
542*4882a593Smuzhiyun 			*val = reg;
543*4882a593Smuzhiyun 			return IIO_VAL_INT;
544*4882a593Smuzhiyun 		default:
545*4882a593Smuzhiyun 			return -EINVAL;
546*4882a593Smuzhiyun 		}
547*4882a593Smuzhiyun 	case IIO_CHAN_INFO_INT_TIME:
548*4882a593Smuzhiyun 		if (chan->type == IIO_LIGHT)
549*4882a593Smuzhiyun 			return veml6030_get_intgrn_tm(indio_dev, val, val2);
550*4882a593Smuzhiyun 		return -EINVAL;
551*4882a593Smuzhiyun 	case IIO_CHAN_INFO_SCALE:
552*4882a593Smuzhiyun 		if (chan->type == IIO_LIGHT)
553*4882a593Smuzhiyun 			return veml6030_get_als_gain(indio_dev, val, val2);
554*4882a593Smuzhiyun 		return -EINVAL;
555*4882a593Smuzhiyun 	default:
556*4882a593Smuzhiyun 		return -EINVAL;
557*4882a593Smuzhiyun 	}
558*4882a593Smuzhiyun }
559*4882a593Smuzhiyun 
veml6030_write_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int val,int val2,long mask)560*4882a593Smuzhiyun static int veml6030_write_raw(struct iio_dev *indio_dev,
561*4882a593Smuzhiyun 				struct iio_chan_spec const *chan,
562*4882a593Smuzhiyun 				int val, int val2, long mask)
563*4882a593Smuzhiyun {
564*4882a593Smuzhiyun 	switch (mask) {
565*4882a593Smuzhiyun 	case IIO_CHAN_INFO_INT_TIME:
566*4882a593Smuzhiyun 		switch (chan->type) {
567*4882a593Smuzhiyun 		case IIO_LIGHT:
568*4882a593Smuzhiyun 			return veml6030_set_intgrn_tm(indio_dev, val, val2);
569*4882a593Smuzhiyun 		default:
570*4882a593Smuzhiyun 			return -EINVAL;
571*4882a593Smuzhiyun 		}
572*4882a593Smuzhiyun 	case IIO_CHAN_INFO_SCALE:
573*4882a593Smuzhiyun 		switch (chan->type) {
574*4882a593Smuzhiyun 		case IIO_LIGHT:
575*4882a593Smuzhiyun 			return veml6030_set_als_gain(indio_dev, val, val2);
576*4882a593Smuzhiyun 		default:
577*4882a593Smuzhiyun 			return -EINVAL;
578*4882a593Smuzhiyun 		}
579*4882a593Smuzhiyun 	default:
580*4882a593Smuzhiyun 		return -EINVAL;
581*4882a593Smuzhiyun 	}
582*4882a593Smuzhiyun }
583*4882a593Smuzhiyun 
veml6030_read_event_val(struct iio_dev * indio_dev,const struct iio_chan_spec * chan,enum iio_event_type type,enum iio_event_direction dir,enum iio_event_info info,int * val,int * val2)584*4882a593Smuzhiyun static int veml6030_read_event_val(struct iio_dev *indio_dev,
585*4882a593Smuzhiyun 		const struct iio_chan_spec *chan, enum iio_event_type type,
586*4882a593Smuzhiyun 		enum iio_event_direction dir, enum iio_event_info info,
587*4882a593Smuzhiyun 		int *val, int *val2)
588*4882a593Smuzhiyun {
589*4882a593Smuzhiyun 	switch (info) {
590*4882a593Smuzhiyun 	case IIO_EV_INFO_VALUE:
591*4882a593Smuzhiyun 		switch (dir) {
592*4882a593Smuzhiyun 		case IIO_EV_DIR_RISING:
593*4882a593Smuzhiyun 		case IIO_EV_DIR_FALLING:
594*4882a593Smuzhiyun 			return veml6030_read_thresh(indio_dev, val, val2, dir);
595*4882a593Smuzhiyun 		default:
596*4882a593Smuzhiyun 			return -EINVAL;
597*4882a593Smuzhiyun 		}
598*4882a593Smuzhiyun 		break;
599*4882a593Smuzhiyun 	case IIO_EV_INFO_PERIOD:
600*4882a593Smuzhiyun 		return veml6030_read_persistence(indio_dev, val, val2);
601*4882a593Smuzhiyun 	default:
602*4882a593Smuzhiyun 		return -EINVAL;
603*4882a593Smuzhiyun 	}
604*4882a593Smuzhiyun }
605*4882a593Smuzhiyun 
veml6030_write_event_val(struct iio_dev * indio_dev,const struct iio_chan_spec * chan,enum iio_event_type type,enum iio_event_direction dir,enum iio_event_info info,int val,int val2)606*4882a593Smuzhiyun static int veml6030_write_event_val(struct iio_dev *indio_dev,
607*4882a593Smuzhiyun 		const struct iio_chan_spec *chan, enum iio_event_type type,
608*4882a593Smuzhiyun 		enum iio_event_direction dir, enum iio_event_info info,
609*4882a593Smuzhiyun 		int val, int val2)
610*4882a593Smuzhiyun {
611*4882a593Smuzhiyun 	switch (info) {
612*4882a593Smuzhiyun 	case IIO_EV_INFO_VALUE:
613*4882a593Smuzhiyun 		return veml6030_write_thresh(indio_dev, val, val2, dir);
614*4882a593Smuzhiyun 	case IIO_EV_INFO_PERIOD:
615*4882a593Smuzhiyun 		return veml6030_write_persistence(indio_dev, val, val2);
616*4882a593Smuzhiyun 	default:
617*4882a593Smuzhiyun 		return -EINVAL;
618*4882a593Smuzhiyun 	}
619*4882a593Smuzhiyun }
620*4882a593Smuzhiyun 
veml6030_read_interrupt_config(struct iio_dev * indio_dev,const struct iio_chan_spec * chan,enum iio_event_type type,enum iio_event_direction dir)621*4882a593Smuzhiyun static int veml6030_read_interrupt_config(struct iio_dev *indio_dev,
622*4882a593Smuzhiyun 		const struct iio_chan_spec *chan, enum iio_event_type type,
623*4882a593Smuzhiyun 		enum iio_event_direction dir)
624*4882a593Smuzhiyun {
625*4882a593Smuzhiyun 	int ret, reg;
626*4882a593Smuzhiyun 	struct veml6030_data *data = iio_priv(indio_dev);
627*4882a593Smuzhiyun 
628*4882a593Smuzhiyun 	ret = regmap_read(data->regmap, VEML6030_REG_ALS_CONF, &reg);
629*4882a593Smuzhiyun 	if (ret) {
630*4882a593Smuzhiyun 		dev_err(&data->client->dev,
631*4882a593Smuzhiyun 				"can't read als conf register %d\n", ret);
632*4882a593Smuzhiyun 		return ret;
633*4882a593Smuzhiyun 	}
634*4882a593Smuzhiyun 
635*4882a593Smuzhiyun 	if (reg & VEML6030_ALS_INT_EN)
636*4882a593Smuzhiyun 		return 1;
637*4882a593Smuzhiyun 	else
638*4882a593Smuzhiyun 		return 0;
639*4882a593Smuzhiyun }
640*4882a593Smuzhiyun 
641*4882a593Smuzhiyun /*
642*4882a593Smuzhiyun  * Sensor should not be measuring light when interrupt is configured.
643*4882a593Smuzhiyun  * Therefore correct sequence to configure interrupt functionality is:
644*4882a593Smuzhiyun  * shut down -> enable/disable interrupt -> power on
645*4882a593Smuzhiyun  *
646*4882a593Smuzhiyun  * state = 1 enables interrupt, state = 0 disables interrupt
647*4882a593Smuzhiyun  */
veml6030_write_interrupt_config(struct iio_dev * indio_dev,const struct iio_chan_spec * chan,enum iio_event_type type,enum iio_event_direction dir,int state)648*4882a593Smuzhiyun static int veml6030_write_interrupt_config(struct iio_dev *indio_dev,
649*4882a593Smuzhiyun 		const struct iio_chan_spec *chan, enum iio_event_type type,
650*4882a593Smuzhiyun 		enum iio_event_direction dir, int state)
651*4882a593Smuzhiyun {
652*4882a593Smuzhiyun 	int ret;
653*4882a593Smuzhiyun 	struct veml6030_data *data = iio_priv(indio_dev);
654*4882a593Smuzhiyun 
655*4882a593Smuzhiyun 	if (state < 0 || state > 1)
656*4882a593Smuzhiyun 		return -EINVAL;
657*4882a593Smuzhiyun 
658*4882a593Smuzhiyun 	ret = veml6030_als_shut_down(data);
659*4882a593Smuzhiyun 	if (ret < 0) {
660*4882a593Smuzhiyun 		dev_err(&data->client->dev,
661*4882a593Smuzhiyun 			"can't disable als to configure interrupt %d\n", ret);
662*4882a593Smuzhiyun 		return ret;
663*4882a593Smuzhiyun 	}
664*4882a593Smuzhiyun 
665*4882a593Smuzhiyun 	/* enable interrupt + power on */
666*4882a593Smuzhiyun 	ret = regmap_update_bits(data->regmap, VEML6030_REG_ALS_CONF,
667*4882a593Smuzhiyun 			VEML6030_ALS_INT_EN | VEML6030_ALS_SD, state << 1);
668*4882a593Smuzhiyun 	if (ret)
669*4882a593Smuzhiyun 		dev_err(&data->client->dev,
670*4882a593Smuzhiyun 			"can't enable interrupt & poweron als %d\n", ret);
671*4882a593Smuzhiyun 
672*4882a593Smuzhiyun 	return ret;
673*4882a593Smuzhiyun }
674*4882a593Smuzhiyun 
675*4882a593Smuzhiyun static const struct iio_info veml6030_info = {
676*4882a593Smuzhiyun 	.read_raw  = veml6030_read_raw,
677*4882a593Smuzhiyun 	.write_raw = veml6030_write_raw,
678*4882a593Smuzhiyun 	.read_event_value = veml6030_read_event_val,
679*4882a593Smuzhiyun 	.write_event_value	= veml6030_write_event_val,
680*4882a593Smuzhiyun 	.read_event_config = veml6030_read_interrupt_config,
681*4882a593Smuzhiyun 	.write_event_config	= veml6030_write_interrupt_config,
682*4882a593Smuzhiyun 	.attrs = &veml6030_attr_group,
683*4882a593Smuzhiyun 	.event_attrs = &veml6030_event_attr_group,
684*4882a593Smuzhiyun };
685*4882a593Smuzhiyun 
686*4882a593Smuzhiyun static const struct iio_info veml6030_info_no_irq = {
687*4882a593Smuzhiyun 	.read_raw  = veml6030_read_raw,
688*4882a593Smuzhiyun 	.write_raw = veml6030_write_raw,
689*4882a593Smuzhiyun 	.attrs = &veml6030_attr_group,
690*4882a593Smuzhiyun };
691*4882a593Smuzhiyun 
veml6030_event_handler(int irq,void * private)692*4882a593Smuzhiyun static irqreturn_t veml6030_event_handler(int irq, void *private)
693*4882a593Smuzhiyun {
694*4882a593Smuzhiyun 	int ret, reg, evtdir;
695*4882a593Smuzhiyun 	struct iio_dev *indio_dev = private;
696*4882a593Smuzhiyun 	struct veml6030_data *data = iio_priv(indio_dev);
697*4882a593Smuzhiyun 
698*4882a593Smuzhiyun 	ret = regmap_read(data->regmap, VEML6030_REG_ALS_INT, &reg);
699*4882a593Smuzhiyun 	if (ret) {
700*4882a593Smuzhiyun 		dev_err(&data->client->dev,
701*4882a593Smuzhiyun 				"can't read als interrupt register %d\n", ret);
702*4882a593Smuzhiyun 		return IRQ_HANDLED;
703*4882a593Smuzhiyun 	}
704*4882a593Smuzhiyun 
705*4882a593Smuzhiyun 	/* Spurious interrupt handling */
706*4882a593Smuzhiyun 	if (!(reg & (VEML6030_INT_TH_HIGH | VEML6030_INT_TH_LOW)))
707*4882a593Smuzhiyun 		return IRQ_NONE;
708*4882a593Smuzhiyun 
709*4882a593Smuzhiyun 	if (reg & VEML6030_INT_TH_HIGH)
710*4882a593Smuzhiyun 		evtdir = IIO_EV_DIR_RISING;
711*4882a593Smuzhiyun 	else
712*4882a593Smuzhiyun 		evtdir = IIO_EV_DIR_FALLING;
713*4882a593Smuzhiyun 
714*4882a593Smuzhiyun 	iio_push_event(indio_dev, IIO_UNMOD_EVENT_CODE(IIO_INTENSITY,
715*4882a593Smuzhiyun 					0, IIO_EV_TYPE_THRESH, evtdir),
716*4882a593Smuzhiyun 					iio_get_time_ns(indio_dev));
717*4882a593Smuzhiyun 
718*4882a593Smuzhiyun 	return IRQ_HANDLED;
719*4882a593Smuzhiyun }
720*4882a593Smuzhiyun 
721*4882a593Smuzhiyun /*
722*4882a593Smuzhiyun  * Set ALS gain to 1/8, integration time to 100 ms, PSM to mode 2,
723*4882a593Smuzhiyun  * persistence to 1 x integration time and the threshold
724*4882a593Smuzhiyun  * interrupt disabled by default. First shutdown the sensor,
725*4882a593Smuzhiyun  * update registers and then power on the sensor.
726*4882a593Smuzhiyun  */
veml6030_hw_init(struct iio_dev * indio_dev)727*4882a593Smuzhiyun static int veml6030_hw_init(struct iio_dev *indio_dev)
728*4882a593Smuzhiyun {
729*4882a593Smuzhiyun 	int ret, val;
730*4882a593Smuzhiyun 	struct veml6030_data *data = iio_priv(indio_dev);
731*4882a593Smuzhiyun 	struct i2c_client *client = data->client;
732*4882a593Smuzhiyun 
733*4882a593Smuzhiyun 	ret = veml6030_als_shut_down(data);
734*4882a593Smuzhiyun 	if (ret) {
735*4882a593Smuzhiyun 		dev_err(&client->dev, "can't shutdown als %d\n", ret);
736*4882a593Smuzhiyun 		return ret;
737*4882a593Smuzhiyun 	}
738*4882a593Smuzhiyun 
739*4882a593Smuzhiyun 	ret = regmap_write(data->regmap, VEML6030_REG_ALS_CONF, 0x1001);
740*4882a593Smuzhiyun 	if (ret) {
741*4882a593Smuzhiyun 		dev_err(&client->dev, "can't setup als configs %d\n", ret);
742*4882a593Smuzhiyun 		return ret;
743*4882a593Smuzhiyun 	}
744*4882a593Smuzhiyun 
745*4882a593Smuzhiyun 	ret = regmap_update_bits(data->regmap, VEML6030_REG_ALS_PSM,
746*4882a593Smuzhiyun 				 VEML6030_PSM | VEML6030_PSM_EN, 0x03);
747*4882a593Smuzhiyun 	if (ret) {
748*4882a593Smuzhiyun 		dev_err(&client->dev, "can't setup default PSM %d\n", ret);
749*4882a593Smuzhiyun 		return ret;
750*4882a593Smuzhiyun 	}
751*4882a593Smuzhiyun 
752*4882a593Smuzhiyun 	ret = regmap_write(data->regmap, VEML6030_REG_ALS_WH, 0xFFFF);
753*4882a593Smuzhiyun 	if (ret) {
754*4882a593Smuzhiyun 		dev_err(&client->dev, "can't setup high threshold %d\n", ret);
755*4882a593Smuzhiyun 		return ret;
756*4882a593Smuzhiyun 	}
757*4882a593Smuzhiyun 
758*4882a593Smuzhiyun 	ret = regmap_write(data->regmap, VEML6030_REG_ALS_WL, 0x0000);
759*4882a593Smuzhiyun 	if (ret) {
760*4882a593Smuzhiyun 		dev_err(&client->dev, "can't setup low threshold %d\n", ret);
761*4882a593Smuzhiyun 		return ret;
762*4882a593Smuzhiyun 	}
763*4882a593Smuzhiyun 
764*4882a593Smuzhiyun 	ret = veml6030_als_pwr_on(data);
765*4882a593Smuzhiyun 	if (ret) {
766*4882a593Smuzhiyun 		dev_err(&client->dev, "can't poweron als %d\n", ret);
767*4882a593Smuzhiyun 		return ret;
768*4882a593Smuzhiyun 	}
769*4882a593Smuzhiyun 
770*4882a593Smuzhiyun 	/* Wait 4 ms to let processor & oscillator start correctly */
771*4882a593Smuzhiyun 	usleep_range(4000, 4002);
772*4882a593Smuzhiyun 
773*4882a593Smuzhiyun 	/* Clear stale interrupt status bits if any during start */
774*4882a593Smuzhiyun 	ret = regmap_read(data->regmap, VEML6030_REG_ALS_INT, &val);
775*4882a593Smuzhiyun 	if (ret < 0) {
776*4882a593Smuzhiyun 		dev_err(&client->dev,
777*4882a593Smuzhiyun 			"can't clear als interrupt status %d\n", ret);
778*4882a593Smuzhiyun 		return ret;
779*4882a593Smuzhiyun 	}
780*4882a593Smuzhiyun 
781*4882a593Smuzhiyun 	/* Cache currently active measurement parameters */
782*4882a593Smuzhiyun 	data->cur_gain = 3;
783*4882a593Smuzhiyun 	data->cur_resolution = 4608;
784*4882a593Smuzhiyun 	data->cur_integration_time = 3;
785*4882a593Smuzhiyun 
786*4882a593Smuzhiyun 	return ret;
787*4882a593Smuzhiyun }
788*4882a593Smuzhiyun 
veml6030_probe(struct i2c_client * client,const struct i2c_device_id * id)789*4882a593Smuzhiyun static int veml6030_probe(struct i2c_client *client,
790*4882a593Smuzhiyun 			  const struct i2c_device_id *id)
791*4882a593Smuzhiyun {
792*4882a593Smuzhiyun 	int ret;
793*4882a593Smuzhiyun 	struct veml6030_data *data;
794*4882a593Smuzhiyun 	struct iio_dev *indio_dev;
795*4882a593Smuzhiyun 	struct regmap *regmap;
796*4882a593Smuzhiyun 
797*4882a593Smuzhiyun 	if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
798*4882a593Smuzhiyun 		dev_err(&client->dev, "i2c adapter doesn't support plain i2c\n");
799*4882a593Smuzhiyun 		return -EOPNOTSUPP;
800*4882a593Smuzhiyun 	}
801*4882a593Smuzhiyun 
802*4882a593Smuzhiyun 	regmap = devm_regmap_init_i2c(client, &veml6030_regmap_config);
803*4882a593Smuzhiyun 	if (IS_ERR(regmap)) {
804*4882a593Smuzhiyun 		dev_err(&client->dev, "can't setup regmap\n");
805*4882a593Smuzhiyun 		return PTR_ERR(regmap);
806*4882a593Smuzhiyun 	}
807*4882a593Smuzhiyun 
808*4882a593Smuzhiyun 	indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
809*4882a593Smuzhiyun 	if (!indio_dev)
810*4882a593Smuzhiyun 		return -ENOMEM;
811*4882a593Smuzhiyun 
812*4882a593Smuzhiyun 	data = iio_priv(indio_dev);
813*4882a593Smuzhiyun 	i2c_set_clientdata(client, indio_dev);
814*4882a593Smuzhiyun 	data->client = client;
815*4882a593Smuzhiyun 	data->regmap = regmap;
816*4882a593Smuzhiyun 
817*4882a593Smuzhiyun 	indio_dev->name = "veml6030";
818*4882a593Smuzhiyun 	indio_dev->channels = veml6030_channels;
819*4882a593Smuzhiyun 	indio_dev->num_channels = ARRAY_SIZE(veml6030_channels);
820*4882a593Smuzhiyun 	indio_dev->modes = INDIO_DIRECT_MODE;
821*4882a593Smuzhiyun 
822*4882a593Smuzhiyun 	if (client->irq) {
823*4882a593Smuzhiyun 		ret = devm_request_threaded_irq(&client->dev, client->irq,
824*4882a593Smuzhiyun 						NULL, veml6030_event_handler,
825*4882a593Smuzhiyun 						IRQF_TRIGGER_LOW | IRQF_ONESHOT,
826*4882a593Smuzhiyun 						"veml6030", indio_dev);
827*4882a593Smuzhiyun 		if (ret < 0) {
828*4882a593Smuzhiyun 			dev_err(&client->dev,
829*4882a593Smuzhiyun 					"irq %d request failed\n", client->irq);
830*4882a593Smuzhiyun 			return ret;
831*4882a593Smuzhiyun 		}
832*4882a593Smuzhiyun 		indio_dev->info = &veml6030_info;
833*4882a593Smuzhiyun 	} else {
834*4882a593Smuzhiyun 		indio_dev->info = &veml6030_info_no_irq;
835*4882a593Smuzhiyun 	}
836*4882a593Smuzhiyun 
837*4882a593Smuzhiyun 	ret = veml6030_hw_init(indio_dev);
838*4882a593Smuzhiyun 	if (ret < 0)
839*4882a593Smuzhiyun 		return ret;
840*4882a593Smuzhiyun 
841*4882a593Smuzhiyun 	ret = devm_add_action_or_reset(&client->dev,
842*4882a593Smuzhiyun 					veml6030_als_shut_down_action, data);
843*4882a593Smuzhiyun 	if (ret < 0)
844*4882a593Smuzhiyun 		return ret;
845*4882a593Smuzhiyun 
846*4882a593Smuzhiyun 	return devm_iio_device_register(&client->dev, indio_dev);
847*4882a593Smuzhiyun }
848*4882a593Smuzhiyun 
veml6030_runtime_suspend(struct device * dev)849*4882a593Smuzhiyun static int __maybe_unused veml6030_runtime_suspend(struct device *dev)
850*4882a593Smuzhiyun {
851*4882a593Smuzhiyun 	int ret;
852*4882a593Smuzhiyun 	struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
853*4882a593Smuzhiyun 	struct veml6030_data *data = iio_priv(indio_dev);
854*4882a593Smuzhiyun 
855*4882a593Smuzhiyun 	ret = veml6030_als_shut_down(data);
856*4882a593Smuzhiyun 	if (ret < 0)
857*4882a593Smuzhiyun 		dev_err(&data->client->dev, "can't suspend als %d\n", ret);
858*4882a593Smuzhiyun 
859*4882a593Smuzhiyun 	return ret;
860*4882a593Smuzhiyun }
861*4882a593Smuzhiyun 
veml6030_runtime_resume(struct device * dev)862*4882a593Smuzhiyun static int __maybe_unused veml6030_runtime_resume(struct device *dev)
863*4882a593Smuzhiyun {
864*4882a593Smuzhiyun 	int ret;
865*4882a593Smuzhiyun 	struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
866*4882a593Smuzhiyun 	struct veml6030_data *data = iio_priv(indio_dev);
867*4882a593Smuzhiyun 
868*4882a593Smuzhiyun 	ret = veml6030_als_pwr_on(data);
869*4882a593Smuzhiyun 	if (ret < 0)
870*4882a593Smuzhiyun 		dev_err(&data->client->dev, "can't resume als %d\n", ret);
871*4882a593Smuzhiyun 
872*4882a593Smuzhiyun 	return ret;
873*4882a593Smuzhiyun }
874*4882a593Smuzhiyun 
875*4882a593Smuzhiyun static const struct dev_pm_ops veml6030_pm_ops = {
876*4882a593Smuzhiyun 	SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
877*4882a593Smuzhiyun 				pm_runtime_force_resume)
878*4882a593Smuzhiyun 	SET_RUNTIME_PM_OPS(veml6030_runtime_suspend,
879*4882a593Smuzhiyun 				veml6030_runtime_resume, NULL)
880*4882a593Smuzhiyun };
881*4882a593Smuzhiyun 
882*4882a593Smuzhiyun static const struct of_device_id veml6030_of_match[] = {
883*4882a593Smuzhiyun 	{ .compatible = "vishay,veml6030" },
884*4882a593Smuzhiyun 	{ }
885*4882a593Smuzhiyun };
886*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, veml6030_of_match);
887*4882a593Smuzhiyun 
888*4882a593Smuzhiyun static const struct i2c_device_id veml6030_id[] = {
889*4882a593Smuzhiyun 	{ "veml6030", 0 },
890*4882a593Smuzhiyun 	{ }
891*4882a593Smuzhiyun };
892*4882a593Smuzhiyun MODULE_DEVICE_TABLE(i2c, veml6030_id);
893*4882a593Smuzhiyun 
894*4882a593Smuzhiyun static struct i2c_driver veml6030_driver = {
895*4882a593Smuzhiyun 	.driver = {
896*4882a593Smuzhiyun 		.name = "veml6030",
897*4882a593Smuzhiyun 		.of_match_table = veml6030_of_match,
898*4882a593Smuzhiyun 		.pm = &veml6030_pm_ops,
899*4882a593Smuzhiyun 	},
900*4882a593Smuzhiyun 	.probe = veml6030_probe,
901*4882a593Smuzhiyun 	.id_table = veml6030_id,
902*4882a593Smuzhiyun };
903*4882a593Smuzhiyun module_i2c_driver(veml6030_driver);
904*4882a593Smuzhiyun 
905*4882a593Smuzhiyun MODULE_AUTHOR("Rishi Gupta <gupt21@gmail.com>");
906*4882a593Smuzhiyun MODULE_DESCRIPTION("VEML6030 Ambient Light Sensor");
907*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
908