xref: /OK3568_Linux_fs/kernel/drivers/iio/light/us5182d.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Copyright (c) 2015 Intel Corporation
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Driver for UPISEMI us5182d Proximity and Ambient Light Sensor.
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * To do: Interrupt support.
8*4882a593Smuzhiyun  */
9*4882a593Smuzhiyun 
10*4882a593Smuzhiyun #include <linux/kernel.h>
11*4882a593Smuzhiyun #include <linux/module.h>
12*4882a593Smuzhiyun #include <linux/acpi.h>
13*4882a593Smuzhiyun #include <linux/delay.h>
14*4882a593Smuzhiyun #include <linux/i2c.h>
15*4882a593Smuzhiyun #include <linux/iio/events.h>
16*4882a593Smuzhiyun #include <linux/iio/iio.h>
17*4882a593Smuzhiyun #include <linux/interrupt.h>
18*4882a593Smuzhiyun #include <linux/irq.h>
19*4882a593Smuzhiyun #include <linux/iio/sysfs.h>
20*4882a593Smuzhiyun #include <linux/mutex.h>
21*4882a593Smuzhiyun #include <linux/pm.h>
22*4882a593Smuzhiyun #include <linux/pm_runtime.h>
23*4882a593Smuzhiyun 
24*4882a593Smuzhiyun #define US5182D_REG_CFG0				0x00
25*4882a593Smuzhiyun #define US5182D_CFG0_ONESHOT_EN				BIT(6)
26*4882a593Smuzhiyun #define US5182D_CFG0_SHUTDOWN_EN			BIT(7)
27*4882a593Smuzhiyun #define US5182D_CFG0_WORD_ENABLE			BIT(0)
28*4882a593Smuzhiyun #define US5182D_CFG0_PROX				BIT(3)
29*4882a593Smuzhiyun #define US5182D_CFG0_PX_IRQ				BIT(2)
30*4882a593Smuzhiyun 
31*4882a593Smuzhiyun #define US5182D_REG_CFG1				0x01
32*4882a593Smuzhiyun #define US5182D_CFG1_ALS_RES16				BIT(4)
33*4882a593Smuzhiyun #define US5182D_CFG1_AGAIN_DEFAULT			0x00
34*4882a593Smuzhiyun 
35*4882a593Smuzhiyun #define US5182D_REG_CFG2				0x02
36*4882a593Smuzhiyun #define US5182D_CFG2_PX_RES16				BIT(4)
37*4882a593Smuzhiyun #define US5182D_CFG2_PXGAIN_DEFAULT			BIT(2)
38*4882a593Smuzhiyun 
39*4882a593Smuzhiyun #define US5182D_REG_CFG3				0x03
40*4882a593Smuzhiyun #define US5182D_CFG3_LED_CURRENT100			(BIT(4) | BIT(5))
41*4882a593Smuzhiyun #define US5182D_CFG3_INT_SOURCE_PX			BIT(3)
42*4882a593Smuzhiyun 
43*4882a593Smuzhiyun #define US5182D_REG_CFG4				0x10
44*4882a593Smuzhiyun 
45*4882a593Smuzhiyun /*
46*4882a593Smuzhiyun  * Registers for tuning the auto dark current cancelling feature.
47*4882a593Smuzhiyun  * DARK_TH(reg 0x27,0x28) - threshold (counts) for auto dark cancelling.
48*4882a593Smuzhiyun  * when ALS  > DARK_TH --> ALS_Code = ALS - Upper(0x2A) * Dark
49*4882a593Smuzhiyun  * when ALS < DARK_TH --> ALS_Code = ALS - Lower(0x29) * Dark
50*4882a593Smuzhiyun  */
51*4882a593Smuzhiyun #define US5182D_REG_UDARK_TH			0x27
52*4882a593Smuzhiyun #define US5182D_REG_DARK_AUTO_EN		0x2b
53*4882a593Smuzhiyun #define US5182D_REG_AUTO_LDARK_GAIN		0x29
54*4882a593Smuzhiyun #define US5182D_REG_AUTO_HDARK_GAIN		0x2a
55*4882a593Smuzhiyun 
56*4882a593Smuzhiyun /* Thresholds for events: px low (0x08-l, 0x09-h), px high (0x0a-l 0x0b-h) */
57*4882a593Smuzhiyun #define US5182D_REG_PXL_TH			0x08
58*4882a593Smuzhiyun #define US5182D_REG_PXH_TH			0x0a
59*4882a593Smuzhiyun 
60*4882a593Smuzhiyun #define US5182D_REG_PXL_TH_DEFAULT		1000
61*4882a593Smuzhiyun #define US5182D_REG_PXH_TH_DEFAULT		30000
62*4882a593Smuzhiyun 
63*4882a593Smuzhiyun #define US5182D_OPMODE_ALS			0x01
64*4882a593Smuzhiyun #define US5182D_OPMODE_PX			0x02
65*4882a593Smuzhiyun #define US5182D_OPMODE_SHIFT			4
66*4882a593Smuzhiyun 
67*4882a593Smuzhiyun #define US5182D_REG_DARK_AUTO_EN_DEFAULT	0x80
68*4882a593Smuzhiyun #define US5182D_REG_AUTO_LDARK_GAIN_DEFAULT	0x16
69*4882a593Smuzhiyun #define US5182D_REG_AUTO_HDARK_GAIN_DEFAULT	0x00
70*4882a593Smuzhiyun 
71*4882a593Smuzhiyun #define US5182D_REG_ADL				0x0c
72*4882a593Smuzhiyun #define US5182D_REG_PDL				0x0e
73*4882a593Smuzhiyun 
74*4882a593Smuzhiyun #define US5182D_REG_MODE_STORE			0x21
75*4882a593Smuzhiyun #define US5182D_STORE_MODE			0x01
76*4882a593Smuzhiyun 
77*4882a593Smuzhiyun #define US5182D_REG_CHIPID			0xb2
78*4882a593Smuzhiyun 
79*4882a593Smuzhiyun #define US5182D_OPMODE_MASK			GENMASK(5, 4)
80*4882a593Smuzhiyun #define US5182D_AGAIN_MASK			0x07
81*4882a593Smuzhiyun #define US5182D_RESET_CHIP			0x01
82*4882a593Smuzhiyun 
83*4882a593Smuzhiyun #define US5182D_CHIPID				0x26
84*4882a593Smuzhiyun #define US5182D_DRV_NAME			"us5182d"
85*4882a593Smuzhiyun 
86*4882a593Smuzhiyun #define US5182D_GA_RESOLUTION			1000
87*4882a593Smuzhiyun 
88*4882a593Smuzhiyun #define US5182D_READ_BYTE			1
89*4882a593Smuzhiyun #define US5182D_READ_WORD			2
90*4882a593Smuzhiyun #define US5182D_OPSTORE_SLEEP_TIME		20 /* ms */
91*4882a593Smuzhiyun #define US5182D_SLEEP_MS			3000 /* ms */
92*4882a593Smuzhiyun #define US5182D_PXH_TH_DISABLE			0xffff
93*4882a593Smuzhiyun #define US5182D_PXL_TH_DISABLE			0x0000
94*4882a593Smuzhiyun 
95*4882a593Smuzhiyun /* Available ranges: [12354, 7065, 3998, 2202, 1285, 498, 256, 138] lux */
96*4882a593Smuzhiyun static const int us5182d_scales[] = {188500, 107800, 61000, 33600, 19600, 7600,
97*4882a593Smuzhiyun 				     3900, 2100};
98*4882a593Smuzhiyun 
99*4882a593Smuzhiyun /*
100*4882a593Smuzhiyun  * Experimental thresholds that work with US5182D sensor on evaluation board
101*4882a593Smuzhiyun  * roughly between 12-32 lux
102*4882a593Smuzhiyun  */
103*4882a593Smuzhiyun static u16 us5182d_dark_ths_vals[] = {170, 200, 512, 512, 800, 2000, 4000,
104*4882a593Smuzhiyun 				      8000};
105*4882a593Smuzhiyun 
106*4882a593Smuzhiyun enum mode {
107*4882a593Smuzhiyun 	US5182D_ALS_PX,
108*4882a593Smuzhiyun 	US5182D_ALS_ONLY,
109*4882a593Smuzhiyun 	US5182D_PX_ONLY
110*4882a593Smuzhiyun };
111*4882a593Smuzhiyun 
112*4882a593Smuzhiyun enum pmode {
113*4882a593Smuzhiyun 	US5182D_CONTINUOUS,
114*4882a593Smuzhiyun 	US5182D_ONESHOT
115*4882a593Smuzhiyun };
116*4882a593Smuzhiyun 
117*4882a593Smuzhiyun struct us5182d_data {
118*4882a593Smuzhiyun 	struct i2c_client *client;
119*4882a593Smuzhiyun 	struct mutex lock;
120*4882a593Smuzhiyun 
121*4882a593Smuzhiyun 	/* Glass attenuation factor */
122*4882a593Smuzhiyun 	u32 ga;
123*4882a593Smuzhiyun 
124*4882a593Smuzhiyun 	/* Dark gain tuning */
125*4882a593Smuzhiyun 	u8 lower_dark_gain;
126*4882a593Smuzhiyun 	u8 upper_dark_gain;
127*4882a593Smuzhiyun 	u16 *us5182d_dark_ths;
128*4882a593Smuzhiyun 
129*4882a593Smuzhiyun 	u16 px_low_th;
130*4882a593Smuzhiyun 	u16 px_high_th;
131*4882a593Smuzhiyun 
132*4882a593Smuzhiyun 	int rising_en;
133*4882a593Smuzhiyun 	int falling_en;
134*4882a593Smuzhiyun 
135*4882a593Smuzhiyun 	u8 opmode;
136*4882a593Smuzhiyun 	u8 power_mode;
137*4882a593Smuzhiyun 
138*4882a593Smuzhiyun 	bool als_enabled;
139*4882a593Smuzhiyun 	bool px_enabled;
140*4882a593Smuzhiyun 
141*4882a593Smuzhiyun 	bool default_continuous;
142*4882a593Smuzhiyun };
143*4882a593Smuzhiyun 
144*4882a593Smuzhiyun static IIO_CONST_ATTR(in_illuminance_scale_available,
145*4882a593Smuzhiyun 		      "0.0021 0.0039 0.0076 0.0196 0.0336 0.061 0.1078 0.1885");
146*4882a593Smuzhiyun 
147*4882a593Smuzhiyun static struct attribute *us5182d_attrs[] = {
148*4882a593Smuzhiyun 	&iio_const_attr_in_illuminance_scale_available.dev_attr.attr,
149*4882a593Smuzhiyun 	NULL
150*4882a593Smuzhiyun };
151*4882a593Smuzhiyun 
152*4882a593Smuzhiyun static const struct attribute_group us5182d_attr_group = {
153*4882a593Smuzhiyun 	.attrs = us5182d_attrs,
154*4882a593Smuzhiyun };
155*4882a593Smuzhiyun 
156*4882a593Smuzhiyun static const struct {
157*4882a593Smuzhiyun 	u8 reg;
158*4882a593Smuzhiyun 	u8 val;
159*4882a593Smuzhiyun } us5182d_regvals[] = {
160*4882a593Smuzhiyun 	{US5182D_REG_CFG0, US5182D_CFG0_WORD_ENABLE},
161*4882a593Smuzhiyun 	{US5182D_REG_CFG1, US5182D_CFG1_ALS_RES16},
162*4882a593Smuzhiyun 	{US5182D_REG_CFG2, (US5182D_CFG2_PX_RES16 |
163*4882a593Smuzhiyun 			    US5182D_CFG2_PXGAIN_DEFAULT)},
164*4882a593Smuzhiyun 	{US5182D_REG_CFG3, US5182D_CFG3_LED_CURRENT100 |
165*4882a593Smuzhiyun 			   US5182D_CFG3_INT_SOURCE_PX},
166*4882a593Smuzhiyun 	{US5182D_REG_CFG4, 0x00},
167*4882a593Smuzhiyun };
168*4882a593Smuzhiyun 
169*4882a593Smuzhiyun static const struct iio_event_spec us5182d_events[] = {
170*4882a593Smuzhiyun 	{
171*4882a593Smuzhiyun 		.type = IIO_EV_TYPE_THRESH,
172*4882a593Smuzhiyun 		.dir = IIO_EV_DIR_RISING,
173*4882a593Smuzhiyun 		.mask_separate = BIT(IIO_EV_INFO_VALUE) |
174*4882a593Smuzhiyun 				BIT(IIO_EV_INFO_ENABLE),
175*4882a593Smuzhiyun 	},
176*4882a593Smuzhiyun 	{
177*4882a593Smuzhiyun 		.type = IIO_EV_TYPE_THRESH,
178*4882a593Smuzhiyun 		.dir = IIO_EV_DIR_FALLING,
179*4882a593Smuzhiyun 		.mask_separate = BIT(IIO_EV_INFO_VALUE) |
180*4882a593Smuzhiyun 				BIT(IIO_EV_INFO_ENABLE),
181*4882a593Smuzhiyun 	},
182*4882a593Smuzhiyun };
183*4882a593Smuzhiyun 
184*4882a593Smuzhiyun static const struct iio_chan_spec us5182d_channels[] = {
185*4882a593Smuzhiyun 	{
186*4882a593Smuzhiyun 		.type = IIO_LIGHT,
187*4882a593Smuzhiyun 		.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
188*4882a593Smuzhiyun 				      BIT(IIO_CHAN_INFO_SCALE),
189*4882a593Smuzhiyun 	},
190*4882a593Smuzhiyun 	{
191*4882a593Smuzhiyun 		.type = IIO_PROXIMITY,
192*4882a593Smuzhiyun 		.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
193*4882a593Smuzhiyun 		.event_spec = us5182d_events,
194*4882a593Smuzhiyun 		.num_event_specs = ARRAY_SIZE(us5182d_events),
195*4882a593Smuzhiyun 	}
196*4882a593Smuzhiyun };
197*4882a593Smuzhiyun 
us5182d_oneshot_en(struct us5182d_data * data)198*4882a593Smuzhiyun static int us5182d_oneshot_en(struct us5182d_data *data)
199*4882a593Smuzhiyun {
200*4882a593Smuzhiyun 	int ret;
201*4882a593Smuzhiyun 
202*4882a593Smuzhiyun 	ret = i2c_smbus_read_byte_data(data->client, US5182D_REG_CFG0);
203*4882a593Smuzhiyun 	if (ret < 0)
204*4882a593Smuzhiyun 		return ret;
205*4882a593Smuzhiyun 
206*4882a593Smuzhiyun 	/*
207*4882a593Smuzhiyun 	 * In oneshot mode the chip will power itself down after taking the
208*4882a593Smuzhiyun 	 * required measurement.
209*4882a593Smuzhiyun 	 */
210*4882a593Smuzhiyun 	ret = ret | US5182D_CFG0_ONESHOT_EN;
211*4882a593Smuzhiyun 
212*4882a593Smuzhiyun 	return i2c_smbus_write_byte_data(data->client, US5182D_REG_CFG0, ret);
213*4882a593Smuzhiyun }
214*4882a593Smuzhiyun 
us5182d_set_opmode(struct us5182d_data * data,u8 mode)215*4882a593Smuzhiyun static int us5182d_set_opmode(struct us5182d_data *data, u8 mode)
216*4882a593Smuzhiyun {
217*4882a593Smuzhiyun 	int ret;
218*4882a593Smuzhiyun 
219*4882a593Smuzhiyun 	if (mode == data->opmode)
220*4882a593Smuzhiyun 		return 0;
221*4882a593Smuzhiyun 
222*4882a593Smuzhiyun 	ret = i2c_smbus_read_byte_data(data->client, US5182D_REG_CFG0);
223*4882a593Smuzhiyun 	if (ret < 0)
224*4882a593Smuzhiyun 		return ret;
225*4882a593Smuzhiyun 
226*4882a593Smuzhiyun 	/* update mode */
227*4882a593Smuzhiyun 	ret = ret & ~US5182D_OPMODE_MASK;
228*4882a593Smuzhiyun 	ret = ret | (mode << US5182D_OPMODE_SHIFT);
229*4882a593Smuzhiyun 
230*4882a593Smuzhiyun 	/*
231*4882a593Smuzhiyun 	 * After updating the operating mode, the chip requires that
232*4882a593Smuzhiyun 	 * the operation is stored, by writing 1 in the STORE_MODE
233*4882a593Smuzhiyun 	 * register (auto-clearing).
234*4882a593Smuzhiyun 	 */
235*4882a593Smuzhiyun 	ret = i2c_smbus_write_byte_data(data->client, US5182D_REG_CFG0, ret);
236*4882a593Smuzhiyun 	if (ret < 0)
237*4882a593Smuzhiyun 		return ret;
238*4882a593Smuzhiyun 
239*4882a593Smuzhiyun 	ret = i2c_smbus_write_byte_data(data->client, US5182D_REG_MODE_STORE,
240*4882a593Smuzhiyun 					US5182D_STORE_MODE);
241*4882a593Smuzhiyun 	if (ret < 0)
242*4882a593Smuzhiyun 		return ret;
243*4882a593Smuzhiyun 
244*4882a593Smuzhiyun 	data->opmode = mode;
245*4882a593Smuzhiyun 	msleep(US5182D_OPSTORE_SLEEP_TIME);
246*4882a593Smuzhiyun 
247*4882a593Smuzhiyun 	return 0;
248*4882a593Smuzhiyun }
249*4882a593Smuzhiyun 
us5182d_als_enable(struct us5182d_data * data)250*4882a593Smuzhiyun static int us5182d_als_enable(struct us5182d_data *data)
251*4882a593Smuzhiyun {
252*4882a593Smuzhiyun 	int ret;
253*4882a593Smuzhiyun 	u8 mode;
254*4882a593Smuzhiyun 
255*4882a593Smuzhiyun 	if (data->power_mode == US5182D_ONESHOT) {
256*4882a593Smuzhiyun 		ret = us5182d_set_opmode(data, US5182D_ALS_ONLY);
257*4882a593Smuzhiyun 		if (ret < 0)
258*4882a593Smuzhiyun 			return ret;
259*4882a593Smuzhiyun 		data->px_enabled = false;
260*4882a593Smuzhiyun 	}
261*4882a593Smuzhiyun 
262*4882a593Smuzhiyun 	if (data->als_enabled)
263*4882a593Smuzhiyun 		return 0;
264*4882a593Smuzhiyun 
265*4882a593Smuzhiyun 	mode = data->px_enabled ? US5182D_ALS_PX : US5182D_ALS_ONLY;
266*4882a593Smuzhiyun 
267*4882a593Smuzhiyun 	ret = us5182d_set_opmode(data, mode);
268*4882a593Smuzhiyun 	if (ret < 0)
269*4882a593Smuzhiyun 		return ret;
270*4882a593Smuzhiyun 
271*4882a593Smuzhiyun 	data->als_enabled = true;
272*4882a593Smuzhiyun 
273*4882a593Smuzhiyun 	return 0;
274*4882a593Smuzhiyun }
275*4882a593Smuzhiyun 
us5182d_px_enable(struct us5182d_data * data)276*4882a593Smuzhiyun static int us5182d_px_enable(struct us5182d_data *data)
277*4882a593Smuzhiyun {
278*4882a593Smuzhiyun 	int ret;
279*4882a593Smuzhiyun 	u8 mode;
280*4882a593Smuzhiyun 
281*4882a593Smuzhiyun 	if (data->power_mode == US5182D_ONESHOT) {
282*4882a593Smuzhiyun 		ret = us5182d_set_opmode(data, US5182D_PX_ONLY);
283*4882a593Smuzhiyun 		if (ret < 0)
284*4882a593Smuzhiyun 			return ret;
285*4882a593Smuzhiyun 		data->als_enabled = false;
286*4882a593Smuzhiyun 	}
287*4882a593Smuzhiyun 
288*4882a593Smuzhiyun 	if (data->px_enabled)
289*4882a593Smuzhiyun 		return 0;
290*4882a593Smuzhiyun 
291*4882a593Smuzhiyun 	mode = data->als_enabled ? US5182D_ALS_PX : US5182D_PX_ONLY;
292*4882a593Smuzhiyun 
293*4882a593Smuzhiyun 	ret = us5182d_set_opmode(data, mode);
294*4882a593Smuzhiyun 	if (ret < 0)
295*4882a593Smuzhiyun 		return ret;
296*4882a593Smuzhiyun 
297*4882a593Smuzhiyun 	data->px_enabled = true;
298*4882a593Smuzhiyun 
299*4882a593Smuzhiyun 	return 0;
300*4882a593Smuzhiyun }
301*4882a593Smuzhiyun 
us5182d_get_als(struct us5182d_data * data)302*4882a593Smuzhiyun static int us5182d_get_als(struct us5182d_data *data)
303*4882a593Smuzhiyun {
304*4882a593Smuzhiyun 	int ret;
305*4882a593Smuzhiyun 	unsigned long result;
306*4882a593Smuzhiyun 
307*4882a593Smuzhiyun 	ret = us5182d_als_enable(data);
308*4882a593Smuzhiyun 	if (ret < 0)
309*4882a593Smuzhiyun 		return ret;
310*4882a593Smuzhiyun 
311*4882a593Smuzhiyun 	ret = i2c_smbus_read_word_data(data->client,
312*4882a593Smuzhiyun 				       US5182D_REG_ADL);
313*4882a593Smuzhiyun 	if (ret < 0)
314*4882a593Smuzhiyun 		return ret;
315*4882a593Smuzhiyun 
316*4882a593Smuzhiyun 	result = ret * data->ga / US5182D_GA_RESOLUTION;
317*4882a593Smuzhiyun 	if (result > 0xffff)
318*4882a593Smuzhiyun 		result = 0xffff;
319*4882a593Smuzhiyun 
320*4882a593Smuzhiyun 	return result;
321*4882a593Smuzhiyun }
322*4882a593Smuzhiyun 
us5182d_get_px(struct us5182d_data * data)323*4882a593Smuzhiyun static int us5182d_get_px(struct us5182d_data *data)
324*4882a593Smuzhiyun {
325*4882a593Smuzhiyun 	int ret;
326*4882a593Smuzhiyun 
327*4882a593Smuzhiyun 	ret = us5182d_px_enable(data);
328*4882a593Smuzhiyun 	if (ret < 0)
329*4882a593Smuzhiyun 		return ret;
330*4882a593Smuzhiyun 
331*4882a593Smuzhiyun 	return i2c_smbus_read_word_data(data->client,
332*4882a593Smuzhiyun 					US5182D_REG_PDL);
333*4882a593Smuzhiyun }
334*4882a593Smuzhiyun 
us5182d_shutdown_en(struct us5182d_data * data,u8 state)335*4882a593Smuzhiyun static int us5182d_shutdown_en(struct us5182d_data *data, u8 state)
336*4882a593Smuzhiyun {
337*4882a593Smuzhiyun 	int ret;
338*4882a593Smuzhiyun 
339*4882a593Smuzhiyun 	if (data->power_mode == US5182D_ONESHOT)
340*4882a593Smuzhiyun 		return 0;
341*4882a593Smuzhiyun 
342*4882a593Smuzhiyun 	ret = i2c_smbus_read_byte_data(data->client, US5182D_REG_CFG0);
343*4882a593Smuzhiyun 	if (ret < 0)
344*4882a593Smuzhiyun 		return ret;
345*4882a593Smuzhiyun 
346*4882a593Smuzhiyun 	ret = ret & ~US5182D_CFG0_SHUTDOWN_EN;
347*4882a593Smuzhiyun 	ret = ret | state;
348*4882a593Smuzhiyun 
349*4882a593Smuzhiyun 	ret = i2c_smbus_write_byte_data(data->client, US5182D_REG_CFG0, ret);
350*4882a593Smuzhiyun 	if (ret < 0)
351*4882a593Smuzhiyun 		return ret;
352*4882a593Smuzhiyun 
353*4882a593Smuzhiyun 	if (state & US5182D_CFG0_SHUTDOWN_EN) {
354*4882a593Smuzhiyun 		data->als_enabled = false;
355*4882a593Smuzhiyun 		data->px_enabled = false;
356*4882a593Smuzhiyun 	}
357*4882a593Smuzhiyun 
358*4882a593Smuzhiyun 	return ret;
359*4882a593Smuzhiyun }
360*4882a593Smuzhiyun 
361*4882a593Smuzhiyun 
us5182d_set_power_state(struct us5182d_data * data,bool on)362*4882a593Smuzhiyun static int us5182d_set_power_state(struct us5182d_data *data, bool on)
363*4882a593Smuzhiyun {
364*4882a593Smuzhiyun 	int ret;
365*4882a593Smuzhiyun 
366*4882a593Smuzhiyun 	if (data->power_mode == US5182D_ONESHOT)
367*4882a593Smuzhiyun 		return 0;
368*4882a593Smuzhiyun 
369*4882a593Smuzhiyun 	if (on) {
370*4882a593Smuzhiyun 		ret = pm_runtime_get_sync(&data->client->dev);
371*4882a593Smuzhiyun 		if (ret < 0)
372*4882a593Smuzhiyun 			pm_runtime_put_noidle(&data->client->dev);
373*4882a593Smuzhiyun 	} else {
374*4882a593Smuzhiyun 		pm_runtime_mark_last_busy(&data->client->dev);
375*4882a593Smuzhiyun 		ret = pm_runtime_put_autosuspend(&data->client->dev);
376*4882a593Smuzhiyun 	}
377*4882a593Smuzhiyun 
378*4882a593Smuzhiyun 	return ret;
379*4882a593Smuzhiyun }
380*4882a593Smuzhiyun 
us5182d_read_value(struct us5182d_data * data,struct iio_chan_spec const * chan)381*4882a593Smuzhiyun static int us5182d_read_value(struct us5182d_data *data,
382*4882a593Smuzhiyun 			      struct iio_chan_spec const *chan)
383*4882a593Smuzhiyun {
384*4882a593Smuzhiyun 	int ret, value;
385*4882a593Smuzhiyun 
386*4882a593Smuzhiyun 	mutex_lock(&data->lock);
387*4882a593Smuzhiyun 
388*4882a593Smuzhiyun 	if (data->power_mode == US5182D_ONESHOT) {
389*4882a593Smuzhiyun 		ret = us5182d_oneshot_en(data);
390*4882a593Smuzhiyun 		if (ret < 0)
391*4882a593Smuzhiyun 			goto out_err;
392*4882a593Smuzhiyun 	}
393*4882a593Smuzhiyun 
394*4882a593Smuzhiyun 	ret = us5182d_set_power_state(data, true);
395*4882a593Smuzhiyun 	if (ret < 0)
396*4882a593Smuzhiyun 		goto out_err;
397*4882a593Smuzhiyun 
398*4882a593Smuzhiyun 	if (chan->type == IIO_LIGHT)
399*4882a593Smuzhiyun 		ret = us5182d_get_als(data);
400*4882a593Smuzhiyun 	else
401*4882a593Smuzhiyun 		ret = us5182d_get_px(data);
402*4882a593Smuzhiyun 	if (ret < 0)
403*4882a593Smuzhiyun 		goto out_poweroff;
404*4882a593Smuzhiyun 
405*4882a593Smuzhiyun 	value = ret;
406*4882a593Smuzhiyun 
407*4882a593Smuzhiyun 	ret = us5182d_set_power_state(data, false);
408*4882a593Smuzhiyun 	if (ret < 0)
409*4882a593Smuzhiyun 		goto out_err;
410*4882a593Smuzhiyun 
411*4882a593Smuzhiyun 	mutex_unlock(&data->lock);
412*4882a593Smuzhiyun 	return value;
413*4882a593Smuzhiyun 
414*4882a593Smuzhiyun out_poweroff:
415*4882a593Smuzhiyun 	us5182d_set_power_state(data, false);
416*4882a593Smuzhiyun out_err:
417*4882a593Smuzhiyun 	mutex_unlock(&data->lock);
418*4882a593Smuzhiyun 	return ret;
419*4882a593Smuzhiyun }
420*4882a593Smuzhiyun 
us5182d_read_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int * val,int * val2,long mask)421*4882a593Smuzhiyun static int us5182d_read_raw(struct iio_dev *indio_dev,
422*4882a593Smuzhiyun 			    struct iio_chan_spec const *chan, int *val,
423*4882a593Smuzhiyun 			    int *val2, long mask)
424*4882a593Smuzhiyun {
425*4882a593Smuzhiyun 	struct us5182d_data *data = iio_priv(indio_dev);
426*4882a593Smuzhiyun 	int ret;
427*4882a593Smuzhiyun 
428*4882a593Smuzhiyun 	switch (mask) {
429*4882a593Smuzhiyun 	case IIO_CHAN_INFO_RAW:
430*4882a593Smuzhiyun 		ret = us5182d_read_value(data, chan);
431*4882a593Smuzhiyun 		if (ret < 0)
432*4882a593Smuzhiyun 			return ret;
433*4882a593Smuzhiyun 		*val = ret;
434*4882a593Smuzhiyun 		return IIO_VAL_INT;
435*4882a593Smuzhiyun 	case IIO_CHAN_INFO_SCALE:
436*4882a593Smuzhiyun 		ret = i2c_smbus_read_byte_data(data->client, US5182D_REG_CFG1);
437*4882a593Smuzhiyun 		if (ret < 0)
438*4882a593Smuzhiyun 			return ret;
439*4882a593Smuzhiyun 		*val = 0;
440*4882a593Smuzhiyun 		*val2 = us5182d_scales[ret & US5182D_AGAIN_MASK];
441*4882a593Smuzhiyun 		return IIO_VAL_INT_PLUS_MICRO;
442*4882a593Smuzhiyun 	default:
443*4882a593Smuzhiyun 		return -EINVAL;
444*4882a593Smuzhiyun 	}
445*4882a593Smuzhiyun }
446*4882a593Smuzhiyun 
447*4882a593Smuzhiyun /**
448*4882a593Smuzhiyun  * us5182d_update_dark_th - update Darh_Th registers
449*4882a593Smuzhiyun  * @data:	us5182d_data structure
450*4882a593Smuzhiyun  * @index:	index in us5182d_dark_ths array to use for the updated value
451*4882a593Smuzhiyun  *
452*4882a593Smuzhiyun  * Function needs to be called with a lock held because it needs two i2c write
453*4882a593Smuzhiyun  * byte operations as these registers (0x27 0x28) don't work in word mode
454*4882a593Smuzhiyun  * accessing.
455*4882a593Smuzhiyun  */
us5182d_update_dark_th(struct us5182d_data * data,int index)456*4882a593Smuzhiyun static int us5182d_update_dark_th(struct us5182d_data *data, int index)
457*4882a593Smuzhiyun {
458*4882a593Smuzhiyun 	__be16 dark_th = cpu_to_be16(data->us5182d_dark_ths[index]);
459*4882a593Smuzhiyun 	int ret;
460*4882a593Smuzhiyun 
461*4882a593Smuzhiyun 	ret = i2c_smbus_write_byte_data(data->client, US5182D_REG_UDARK_TH,
462*4882a593Smuzhiyun 					((u8 *)&dark_th)[0]);
463*4882a593Smuzhiyun 	if (ret < 0)
464*4882a593Smuzhiyun 		return ret;
465*4882a593Smuzhiyun 
466*4882a593Smuzhiyun 	return i2c_smbus_write_byte_data(data->client, US5182D_REG_UDARK_TH + 1,
467*4882a593Smuzhiyun 					((u8 *)&dark_th)[1]);
468*4882a593Smuzhiyun }
469*4882a593Smuzhiyun 
470*4882a593Smuzhiyun /**
471*4882a593Smuzhiyun  * us5182d_apply_scale - update the ALS scale
472*4882a593Smuzhiyun  * @data:	us5182d_data structure
473*4882a593Smuzhiyun  * @index:	index in us5182d_scales array to use for the updated value
474*4882a593Smuzhiyun  *
475*4882a593Smuzhiyun  * Function needs to be called with a lock held as we're having more than one
476*4882a593Smuzhiyun  * i2c operation.
477*4882a593Smuzhiyun  */
us5182d_apply_scale(struct us5182d_data * data,int index)478*4882a593Smuzhiyun static int us5182d_apply_scale(struct us5182d_data *data, int index)
479*4882a593Smuzhiyun {
480*4882a593Smuzhiyun 	int ret;
481*4882a593Smuzhiyun 
482*4882a593Smuzhiyun 	ret = i2c_smbus_read_byte_data(data->client, US5182D_REG_CFG1);
483*4882a593Smuzhiyun 	if (ret < 0)
484*4882a593Smuzhiyun 		return ret;
485*4882a593Smuzhiyun 
486*4882a593Smuzhiyun 	ret = ret & (~US5182D_AGAIN_MASK);
487*4882a593Smuzhiyun 	ret |= index;
488*4882a593Smuzhiyun 
489*4882a593Smuzhiyun 	ret = i2c_smbus_write_byte_data(data->client, US5182D_REG_CFG1, ret);
490*4882a593Smuzhiyun 	if (ret < 0)
491*4882a593Smuzhiyun 		return ret;
492*4882a593Smuzhiyun 
493*4882a593Smuzhiyun 	return us5182d_update_dark_th(data, index);
494*4882a593Smuzhiyun }
495*4882a593Smuzhiyun 
us5182d_write_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int val,int val2,long mask)496*4882a593Smuzhiyun static int us5182d_write_raw(struct iio_dev *indio_dev,
497*4882a593Smuzhiyun 			     struct iio_chan_spec const *chan, int val,
498*4882a593Smuzhiyun 			     int val2, long mask)
499*4882a593Smuzhiyun {
500*4882a593Smuzhiyun 	struct us5182d_data *data = iio_priv(indio_dev);
501*4882a593Smuzhiyun 	int ret, i;
502*4882a593Smuzhiyun 
503*4882a593Smuzhiyun 	switch (mask) {
504*4882a593Smuzhiyun 	case IIO_CHAN_INFO_SCALE:
505*4882a593Smuzhiyun 		if (val != 0)
506*4882a593Smuzhiyun 			return -EINVAL;
507*4882a593Smuzhiyun 		for (i = 0; i < ARRAY_SIZE(us5182d_scales); i++)
508*4882a593Smuzhiyun 			if (val2 == us5182d_scales[i]) {
509*4882a593Smuzhiyun 				mutex_lock(&data->lock);
510*4882a593Smuzhiyun 				ret = us5182d_apply_scale(data, i);
511*4882a593Smuzhiyun 				mutex_unlock(&data->lock);
512*4882a593Smuzhiyun 				return ret;
513*4882a593Smuzhiyun 			}
514*4882a593Smuzhiyun 		break;
515*4882a593Smuzhiyun 	default:
516*4882a593Smuzhiyun 		return -EINVAL;
517*4882a593Smuzhiyun 	}
518*4882a593Smuzhiyun 
519*4882a593Smuzhiyun 	return -EINVAL;
520*4882a593Smuzhiyun }
521*4882a593Smuzhiyun 
us5182d_setup_prox(struct iio_dev * indio_dev,enum iio_event_direction dir,u16 val)522*4882a593Smuzhiyun static int us5182d_setup_prox(struct iio_dev *indio_dev,
523*4882a593Smuzhiyun 			      enum iio_event_direction dir, u16 val)
524*4882a593Smuzhiyun {
525*4882a593Smuzhiyun 	struct us5182d_data *data = iio_priv(indio_dev);
526*4882a593Smuzhiyun 
527*4882a593Smuzhiyun 	if (dir == IIO_EV_DIR_FALLING)
528*4882a593Smuzhiyun 		return i2c_smbus_write_word_data(data->client,
529*4882a593Smuzhiyun 						 US5182D_REG_PXL_TH, val);
530*4882a593Smuzhiyun 	else if (dir == IIO_EV_DIR_RISING)
531*4882a593Smuzhiyun 		return i2c_smbus_write_word_data(data->client,
532*4882a593Smuzhiyun 						 US5182D_REG_PXH_TH, val);
533*4882a593Smuzhiyun 
534*4882a593Smuzhiyun 	return 0;
535*4882a593Smuzhiyun }
536*4882a593Smuzhiyun 
us5182d_read_thresh(struct iio_dev * indio_dev,const struct iio_chan_spec * chan,enum iio_event_type type,enum iio_event_direction dir,enum iio_event_info info,int * val,int * val2)537*4882a593Smuzhiyun static int us5182d_read_thresh(struct iio_dev *indio_dev,
538*4882a593Smuzhiyun 	const struct iio_chan_spec *chan, enum iio_event_type type,
539*4882a593Smuzhiyun 	enum iio_event_direction dir, enum iio_event_info info, int *val,
540*4882a593Smuzhiyun 	int *val2)
541*4882a593Smuzhiyun {
542*4882a593Smuzhiyun 	struct us5182d_data *data = iio_priv(indio_dev);
543*4882a593Smuzhiyun 
544*4882a593Smuzhiyun 	switch (dir) {
545*4882a593Smuzhiyun 	case IIO_EV_DIR_RISING:
546*4882a593Smuzhiyun 		mutex_lock(&data->lock);
547*4882a593Smuzhiyun 		*val = data->px_high_th;
548*4882a593Smuzhiyun 		mutex_unlock(&data->lock);
549*4882a593Smuzhiyun 		break;
550*4882a593Smuzhiyun 	case IIO_EV_DIR_FALLING:
551*4882a593Smuzhiyun 		mutex_lock(&data->lock);
552*4882a593Smuzhiyun 		*val = data->px_low_th;
553*4882a593Smuzhiyun 		mutex_unlock(&data->lock);
554*4882a593Smuzhiyun 		break;
555*4882a593Smuzhiyun 	default:
556*4882a593Smuzhiyun 		return -EINVAL;
557*4882a593Smuzhiyun 	}
558*4882a593Smuzhiyun 
559*4882a593Smuzhiyun 	return IIO_VAL_INT;
560*4882a593Smuzhiyun }
561*4882a593Smuzhiyun 
us5182d_write_thresh(struct iio_dev * indio_dev,const struct iio_chan_spec * chan,enum iio_event_type type,enum iio_event_direction dir,enum iio_event_info info,int val,int val2)562*4882a593Smuzhiyun static int us5182d_write_thresh(struct iio_dev *indio_dev,
563*4882a593Smuzhiyun 	const struct iio_chan_spec *chan, enum iio_event_type type,
564*4882a593Smuzhiyun 	enum iio_event_direction dir, enum iio_event_info info, int val,
565*4882a593Smuzhiyun 	int val2)
566*4882a593Smuzhiyun {
567*4882a593Smuzhiyun 	struct us5182d_data *data = iio_priv(indio_dev);
568*4882a593Smuzhiyun 	int ret;
569*4882a593Smuzhiyun 
570*4882a593Smuzhiyun 	if (val < 0 || val > USHRT_MAX || val2 != 0)
571*4882a593Smuzhiyun 		return -EINVAL;
572*4882a593Smuzhiyun 
573*4882a593Smuzhiyun 	switch (dir) {
574*4882a593Smuzhiyun 	case IIO_EV_DIR_RISING:
575*4882a593Smuzhiyun 		mutex_lock(&data->lock);
576*4882a593Smuzhiyun 		if (data->rising_en) {
577*4882a593Smuzhiyun 			ret = us5182d_setup_prox(indio_dev, dir, val);
578*4882a593Smuzhiyun 			if (ret < 0)
579*4882a593Smuzhiyun 				goto err;
580*4882a593Smuzhiyun 		}
581*4882a593Smuzhiyun 		data->px_high_th = val;
582*4882a593Smuzhiyun 		mutex_unlock(&data->lock);
583*4882a593Smuzhiyun 		break;
584*4882a593Smuzhiyun 	case IIO_EV_DIR_FALLING:
585*4882a593Smuzhiyun 		mutex_lock(&data->lock);
586*4882a593Smuzhiyun 		if (data->falling_en) {
587*4882a593Smuzhiyun 			ret = us5182d_setup_prox(indio_dev, dir, val);
588*4882a593Smuzhiyun 			if (ret < 0)
589*4882a593Smuzhiyun 				goto err;
590*4882a593Smuzhiyun 		}
591*4882a593Smuzhiyun 		data->px_low_th = val;
592*4882a593Smuzhiyun 		mutex_unlock(&data->lock);
593*4882a593Smuzhiyun 		break;
594*4882a593Smuzhiyun 	default:
595*4882a593Smuzhiyun 		return -EINVAL;
596*4882a593Smuzhiyun 	}
597*4882a593Smuzhiyun 
598*4882a593Smuzhiyun 	return 0;
599*4882a593Smuzhiyun err:
600*4882a593Smuzhiyun 	mutex_unlock(&data->lock);
601*4882a593Smuzhiyun 	return ret;
602*4882a593Smuzhiyun }
603*4882a593Smuzhiyun 
us5182d_read_event_config(struct iio_dev * indio_dev,const struct iio_chan_spec * chan,enum iio_event_type type,enum iio_event_direction dir)604*4882a593Smuzhiyun static int us5182d_read_event_config(struct iio_dev *indio_dev,
605*4882a593Smuzhiyun 	const struct iio_chan_spec *chan, enum iio_event_type type,
606*4882a593Smuzhiyun 	enum iio_event_direction dir)
607*4882a593Smuzhiyun {
608*4882a593Smuzhiyun 	struct us5182d_data *data = iio_priv(indio_dev);
609*4882a593Smuzhiyun 	int ret;
610*4882a593Smuzhiyun 
611*4882a593Smuzhiyun 	switch (dir) {
612*4882a593Smuzhiyun 	case IIO_EV_DIR_RISING:
613*4882a593Smuzhiyun 		mutex_lock(&data->lock);
614*4882a593Smuzhiyun 		ret = data->rising_en;
615*4882a593Smuzhiyun 		mutex_unlock(&data->lock);
616*4882a593Smuzhiyun 		break;
617*4882a593Smuzhiyun 	case IIO_EV_DIR_FALLING:
618*4882a593Smuzhiyun 		mutex_lock(&data->lock);
619*4882a593Smuzhiyun 		ret = data->falling_en;
620*4882a593Smuzhiyun 		mutex_unlock(&data->lock);
621*4882a593Smuzhiyun 		break;
622*4882a593Smuzhiyun 	default:
623*4882a593Smuzhiyun 		ret = -EINVAL;
624*4882a593Smuzhiyun 		break;
625*4882a593Smuzhiyun 	}
626*4882a593Smuzhiyun 
627*4882a593Smuzhiyun 	return ret;
628*4882a593Smuzhiyun }
629*4882a593Smuzhiyun 
us5182d_write_event_config(struct iio_dev * indio_dev,const struct iio_chan_spec * chan,enum iio_event_type type,enum iio_event_direction dir,int state)630*4882a593Smuzhiyun static int us5182d_write_event_config(struct iio_dev *indio_dev,
631*4882a593Smuzhiyun 	const struct iio_chan_spec *chan, enum iio_event_type type,
632*4882a593Smuzhiyun 	enum iio_event_direction dir, int state)
633*4882a593Smuzhiyun {
634*4882a593Smuzhiyun 	struct us5182d_data *data = iio_priv(indio_dev);
635*4882a593Smuzhiyun 	int ret;
636*4882a593Smuzhiyun 	u16 new_th;
637*4882a593Smuzhiyun 
638*4882a593Smuzhiyun 	mutex_lock(&data->lock);
639*4882a593Smuzhiyun 
640*4882a593Smuzhiyun 	switch (dir) {
641*4882a593Smuzhiyun 	case IIO_EV_DIR_RISING:
642*4882a593Smuzhiyun 		if (data->rising_en == state) {
643*4882a593Smuzhiyun 			mutex_unlock(&data->lock);
644*4882a593Smuzhiyun 			return 0;
645*4882a593Smuzhiyun 		}
646*4882a593Smuzhiyun 		new_th = US5182D_PXH_TH_DISABLE;
647*4882a593Smuzhiyun 		if (state) {
648*4882a593Smuzhiyun 			data->power_mode = US5182D_CONTINUOUS;
649*4882a593Smuzhiyun 			ret = us5182d_set_power_state(data, true);
650*4882a593Smuzhiyun 			if (ret < 0)
651*4882a593Smuzhiyun 				goto err;
652*4882a593Smuzhiyun 			ret = us5182d_px_enable(data);
653*4882a593Smuzhiyun 			if (ret < 0)
654*4882a593Smuzhiyun 				goto err_poweroff;
655*4882a593Smuzhiyun 			new_th = data->px_high_th;
656*4882a593Smuzhiyun 		}
657*4882a593Smuzhiyun 		ret = us5182d_setup_prox(indio_dev, dir, new_th);
658*4882a593Smuzhiyun 		if (ret < 0)
659*4882a593Smuzhiyun 			goto err_poweroff;
660*4882a593Smuzhiyun 		data->rising_en = state;
661*4882a593Smuzhiyun 		break;
662*4882a593Smuzhiyun 	case IIO_EV_DIR_FALLING:
663*4882a593Smuzhiyun 		if (data->falling_en == state) {
664*4882a593Smuzhiyun 			mutex_unlock(&data->lock);
665*4882a593Smuzhiyun 			return 0;
666*4882a593Smuzhiyun 		}
667*4882a593Smuzhiyun 		new_th =  US5182D_PXL_TH_DISABLE;
668*4882a593Smuzhiyun 		if (state) {
669*4882a593Smuzhiyun 			data->power_mode = US5182D_CONTINUOUS;
670*4882a593Smuzhiyun 			ret = us5182d_set_power_state(data, true);
671*4882a593Smuzhiyun 			if (ret < 0)
672*4882a593Smuzhiyun 				goto err;
673*4882a593Smuzhiyun 			ret = us5182d_px_enable(data);
674*4882a593Smuzhiyun 			if (ret < 0)
675*4882a593Smuzhiyun 				goto err_poweroff;
676*4882a593Smuzhiyun 			new_th = data->px_low_th;
677*4882a593Smuzhiyun 		}
678*4882a593Smuzhiyun 		ret = us5182d_setup_prox(indio_dev, dir, new_th);
679*4882a593Smuzhiyun 		if (ret < 0)
680*4882a593Smuzhiyun 			goto err_poweroff;
681*4882a593Smuzhiyun 		data->falling_en = state;
682*4882a593Smuzhiyun 		break;
683*4882a593Smuzhiyun 	default:
684*4882a593Smuzhiyun 		ret = -EINVAL;
685*4882a593Smuzhiyun 		goto err;
686*4882a593Smuzhiyun 	}
687*4882a593Smuzhiyun 
688*4882a593Smuzhiyun 	if (!state) {
689*4882a593Smuzhiyun 		ret = us5182d_set_power_state(data, false);
690*4882a593Smuzhiyun 		if (ret < 0)
691*4882a593Smuzhiyun 			goto err;
692*4882a593Smuzhiyun 	}
693*4882a593Smuzhiyun 
694*4882a593Smuzhiyun 	if (!data->falling_en && !data->rising_en && !data->default_continuous)
695*4882a593Smuzhiyun 		data->power_mode = US5182D_ONESHOT;
696*4882a593Smuzhiyun 
697*4882a593Smuzhiyun 	mutex_unlock(&data->lock);
698*4882a593Smuzhiyun 	return 0;
699*4882a593Smuzhiyun 
700*4882a593Smuzhiyun err_poweroff:
701*4882a593Smuzhiyun 	if (state)
702*4882a593Smuzhiyun 		us5182d_set_power_state(data, false);
703*4882a593Smuzhiyun err:
704*4882a593Smuzhiyun 	mutex_unlock(&data->lock);
705*4882a593Smuzhiyun 	return ret;
706*4882a593Smuzhiyun }
707*4882a593Smuzhiyun 
708*4882a593Smuzhiyun static const struct iio_info us5182d_info = {
709*4882a593Smuzhiyun 	.read_raw = us5182d_read_raw,
710*4882a593Smuzhiyun 	.write_raw = us5182d_write_raw,
711*4882a593Smuzhiyun 	.attrs = &us5182d_attr_group,
712*4882a593Smuzhiyun 	.read_event_value = &us5182d_read_thresh,
713*4882a593Smuzhiyun 	.write_event_value = &us5182d_write_thresh,
714*4882a593Smuzhiyun 	.read_event_config = &us5182d_read_event_config,
715*4882a593Smuzhiyun 	.write_event_config = &us5182d_write_event_config,
716*4882a593Smuzhiyun };
717*4882a593Smuzhiyun 
us5182d_reset(struct iio_dev * indio_dev)718*4882a593Smuzhiyun static int us5182d_reset(struct iio_dev *indio_dev)
719*4882a593Smuzhiyun {
720*4882a593Smuzhiyun 	struct us5182d_data *data = iio_priv(indio_dev);
721*4882a593Smuzhiyun 
722*4882a593Smuzhiyun 	return i2c_smbus_write_byte_data(data->client, US5182D_REG_CFG3,
723*4882a593Smuzhiyun 					 US5182D_RESET_CHIP);
724*4882a593Smuzhiyun }
725*4882a593Smuzhiyun 
us5182d_init(struct iio_dev * indio_dev)726*4882a593Smuzhiyun static int us5182d_init(struct iio_dev *indio_dev)
727*4882a593Smuzhiyun {
728*4882a593Smuzhiyun 	struct us5182d_data *data = iio_priv(indio_dev);
729*4882a593Smuzhiyun 	int i, ret;
730*4882a593Smuzhiyun 
731*4882a593Smuzhiyun 	ret = us5182d_reset(indio_dev);
732*4882a593Smuzhiyun 	if (ret < 0)
733*4882a593Smuzhiyun 		return ret;
734*4882a593Smuzhiyun 
735*4882a593Smuzhiyun 	data->opmode = 0;
736*4882a593Smuzhiyun 	data->power_mode = US5182D_CONTINUOUS;
737*4882a593Smuzhiyun 	data->px_low_th = US5182D_REG_PXL_TH_DEFAULT;
738*4882a593Smuzhiyun 	data->px_high_th = US5182D_REG_PXH_TH_DEFAULT;
739*4882a593Smuzhiyun 
740*4882a593Smuzhiyun 	for (i = 0; i < ARRAY_SIZE(us5182d_regvals); i++) {
741*4882a593Smuzhiyun 		ret = i2c_smbus_write_byte_data(data->client,
742*4882a593Smuzhiyun 						us5182d_regvals[i].reg,
743*4882a593Smuzhiyun 						us5182d_regvals[i].val);
744*4882a593Smuzhiyun 		if (ret < 0)
745*4882a593Smuzhiyun 			return ret;
746*4882a593Smuzhiyun 	}
747*4882a593Smuzhiyun 
748*4882a593Smuzhiyun 	data->als_enabled = true;
749*4882a593Smuzhiyun 	data->px_enabled = true;
750*4882a593Smuzhiyun 
751*4882a593Smuzhiyun 	if (!data->default_continuous) {
752*4882a593Smuzhiyun 		ret = us5182d_shutdown_en(data, US5182D_CFG0_SHUTDOWN_EN);
753*4882a593Smuzhiyun 		if (ret < 0)
754*4882a593Smuzhiyun 			return ret;
755*4882a593Smuzhiyun 		data->power_mode = US5182D_ONESHOT;
756*4882a593Smuzhiyun 	}
757*4882a593Smuzhiyun 
758*4882a593Smuzhiyun 	return ret;
759*4882a593Smuzhiyun }
760*4882a593Smuzhiyun 
us5182d_get_platform_data(struct iio_dev * indio_dev)761*4882a593Smuzhiyun static void us5182d_get_platform_data(struct iio_dev *indio_dev)
762*4882a593Smuzhiyun {
763*4882a593Smuzhiyun 	struct us5182d_data *data = iio_priv(indio_dev);
764*4882a593Smuzhiyun 
765*4882a593Smuzhiyun 	if (device_property_read_u32(&data->client->dev, "upisemi,glass-coef",
766*4882a593Smuzhiyun 				     &data->ga))
767*4882a593Smuzhiyun 		data->ga = US5182D_GA_RESOLUTION;
768*4882a593Smuzhiyun 	if (device_property_read_u16_array(&data->client->dev,
769*4882a593Smuzhiyun 					   "upisemi,dark-ths",
770*4882a593Smuzhiyun 					   data->us5182d_dark_ths,
771*4882a593Smuzhiyun 					   ARRAY_SIZE(us5182d_dark_ths_vals)))
772*4882a593Smuzhiyun 		data->us5182d_dark_ths = us5182d_dark_ths_vals;
773*4882a593Smuzhiyun 	if (device_property_read_u8(&data->client->dev,
774*4882a593Smuzhiyun 				    "upisemi,upper-dark-gain",
775*4882a593Smuzhiyun 				    &data->upper_dark_gain))
776*4882a593Smuzhiyun 		data->upper_dark_gain = US5182D_REG_AUTO_HDARK_GAIN_DEFAULT;
777*4882a593Smuzhiyun 	if (device_property_read_u8(&data->client->dev,
778*4882a593Smuzhiyun 				    "upisemi,lower-dark-gain",
779*4882a593Smuzhiyun 				    &data->lower_dark_gain))
780*4882a593Smuzhiyun 		data->lower_dark_gain = US5182D_REG_AUTO_LDARK_GAIN_DEFAULT;
781*4882a593Smuzhiyun 	data->default_continuous = device_property_read_bool(&data->client->dev,
782*4882a593Smuzhiyun 							     "upisemi,continuous");
783*4882a593Smuzhiyun }
784*4882a593Smuzhiyun 
us5182d_dark_gain_config(struct iio_dev * indio_dev)785*4882a593Smuzhiyun static int  us5182d_dark_gain_config(struct iio_dev *indio_dev)
786*4882a593Smuzhiyun {
787*4882a593Smuzhiyun 	struct us5182d_data *data = iio_priv(indio_dev);
788*4882a593Smuzhiyun 	int ret;
789*4882a593Smuzhiyun 
790*4882a593Smuzhiyun 	ret = us5182d_update_dark_th(data, US5182D_CFG1_AGAIN_DEFAULT);
791*4882a593Smuzhiyun 	if (ret < 0)
792*4882a593Smuzhiyun 		return ret;
793*4882a593Smuzhiyun 
794*4882a593Smuzhiyun 	ret = i2c_smbus_write_byte_data(data->client,
795*4882a593Smuzhiyun 					US5182D_REG_AUTO_LDARK_GAIN,
796*4882a593Smuzhiyun 					data->lower_dark_gain);
797*4882a593Smuzhiyun 	if (ret < 0)
798*4882a593Smuzhiyun 		return ret;
799*4882a593Smuzhiyun 
800*4882a593Smuzhiyun 	ret = i2c_smbus_write_byte_data(data->client,
801*4882a593Smuzhiyun 					US5182D_REG_AUTO_HDARK_GAIN,
802*4882a593Smuzhiyun 					data->upper_dark_gain);
803*4882a593Smuzhiyun 	if (ret < 0)
804*4882a593Smuzhiyun 		return ret;
805*4882a593Smuzhiyun 
806*4882a593Smuzhiyun 	return i2c_smbus_write_byte_data(data->client, US5182D_REG_DARK_AUTO_EN,
807*4882a593Smuzhiyun 					 US5182D_REG_DARK_AUTO_EN_DEFAULT);
808*4882a593Smuzhiyun }
809*4882a593Smuzhiyun 
us5182d_irq_thread_handler(int irq,void * private)810*4882a593Smuzhiyun static irqreturn_t us5182d_irq_thread_handler(int irq, void *private)
811*4882a593Smuzhiyun {
812*4882a593Smuzhiyun 	struct iio_dev *indio_dev = private;
813*4882a593Smuzhiyun 	struct us5182d_data *data = iio_priv(indio_dev);
814*4882a593Smuzhiyun 	enum iio_event_direction dir;
815*4882a593Smuzhiyun 	int ret;
816*4882a593Smuzhiyun 	u64 ev;
817*4882a593Smuzhiyun 
818*4882a593Smuzhiyun 	ret = i2c_smbus_read_byte_data(data->client, US5182D_REG_CFG0);
819*4882a593Smuzhiyun 	if (ret < 0) {
820*4882a593Smuzhiyun 		dev_err(&data->client->dev, "i2c transfer error in irq\n");
821*4882a593Smuzhiyun 		return IRQ_HANDLED;
822*4882a593Smuzhiyun 	}
823*4882a593Smuzhiyun 
824*4882a593Smuzhiyun 	dir = ret & US5182D_CFG0_PROX ? IIO_EV_DIR_RISING : IIO_EV_DIR_FALLING;
825*4882a593Smuzhiyun 	ev = IIO_UNMOD_EVENT_CODE(IIO_PROXIMITY, 1, IIO_EV_TYPE_THRESH, dir);
826*4882a593Smuzhiyun 
827*4882a593Smuzhiyun 	iio_push_event(indio_dev, ev, iio_get_time_ns(indio_dev));
828*4882a593Smuzhiyun 
829*4882a593Smuzhiyun 	ret = i2c_smbus_write_byte_data(data->client, US5182D_REG_CFG0,
830*4882a593Smuzhiyun 					ret & ~US5182D_CFG0_PX_IRQ);
831*4882a593Smuzhiyun 	if (ret < 0)
832*4882a593Smuzhiyun 		dev_err(&data->client->dev, "i2c transfer error in irq\n");
833*4882a593Smuzhiyun 
834*4882a593Smuzhiyun 	return IRQ_HANDLED;
835*4882a593Smuzhiyun }
836*4882a593Smuzhiyun 
us5182d_probe(struct i2c_client * client,const struct i2c_device_id * id)837*4882a593Smuzhiyun static int us5182d_probe(struct i2c_client *client,
838*4882a593Smuzhiyun 			 const struct i2c_device_id *id)
839*4882a593Smuzhiyun {
840*4882a593Smuzhiyun 	struct us5182d_data *data;
841*4882a593Smuzhiyun 	struct iio_dev *indio_dev;
842*4882a593Smuzhiyun 	int ret;
843*4882a593Smuzhiyun 
844*4882a593Smuzhiyun 	indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
845*4882a593Smuzhiyun 	if (!indio_dev)
846*4882a593Smuzhiyun 		return -ENOMEM;
847*4882a593Smuzhiyun 
848*4882a593Smuzhiyun 	data = iio_priv(indio_dev);
849*4882a593Smuzhiyun 	i2c_set_clientdata(client, indio_dev);
850*4882a593Smuzhiyun 	data->client = client;
851*4882a593Smuzhiyun 
852*4882a593Smuzhiyun 	mutex_init(&data->lock);
853*4882a593Smuzhiyun 
854*4882a593Smuzhiyun 	indio_dev->info = &us5182d_info;
855*4882a593Smuzhiyun 	indio_dev->name = US5182D_DRV_NAME;
856*4882a593Smuzhiyun 	indio_dev->channels = us5182d_channels;
857*4882a593Smuzhiyun 	indio_dev->num_channels = ARRAY_SIZE(us5182d_channels);
858*4882a593Smuzhiyun 	indio_dev->modes = INDIO_DIRECT_MODE;
859*4882a593Smuzhiyun 
860*4882a593Smuzhiyun 	ret = i2c_smbus_read_byte_data(data->client, US5182D_REG_CHIPID);
861*4882a593Smuzhiyun 	if (ret != US5182D_CHIPID) {
862*4882a593Smuzhiyun 		dev_err(&data->client->dev,
863*4882a593Smuzhiyun 			"Failed to detect US5182 light chip\n");
864*4882a593Smuzhiyun 		return (ret < 0) ? ret : -ENODEV;
865*4882a593Smuzhiyun 	}
866*4882a593Smuzhiyun 
867*4882a593Smuzhiyun 	if (client->irq > 0) {
868*4882a593Smuzhiyun 		ret = devm_request_threaded_irq(&client->dev, client->irq, NULL,
869*4882a593Smuzhiyun 						us5182d_irq_thread_handler,
870*4882a593Smuzhiyun 						IRQF_TRIGGER_LOW | IRQF_ONESHOT,
871*4882a593Smuzhiyun 						"us5182d-irq", indio_dev);
872*4882a593Smuzhiyun 		if (ret < 0)
873*4882a593Smuzhiyun 			return ret;
874*4882a593Smuzhiyun 	} else
875*4882a593Smuzhiyun 		dev_warn(&client->dev, "no valid irq found\n");
876*4882a593Smuzhiyun 
877*4882a593Smuzhiyun 	us5182d_get_platform_data(indio_dev);
878*4882a593Smuzhiyun 	ret = us5182d_init(indio_dev);
879*4882a593Smuzhiyun 	if (ret < 0)
880*4882a593Smuzhiyun 		return ret;
881*4882a593Smuzhiyun 
882*4882a593Smuzhiyun 	ret = us5182d_dark_gain_config(indio_dev);
883*4882a593Smuzhiyun 	if (ret < 0)
884*4882a593Smuzhiyun 		goto out_err;
885*4882a593Smuzhiyun 
886*4882a593Smuzhiyun 	if (data->default_continuous) {
887*4882a593Smuzhiyun 		ret = pm_runtime_set_active(&client->dev);
888*4882a593Smuzhiyun 		if (ret < 0)
889*4882a593Smuzhiyun 			goto out_err;
890*4882a593Smuzhiyun 	}
891*4882a593Smuzhiyun 
892*4882a593Smuzhiyun 	pm_runtime_enable(&client->dev);
893*4882a593Smuzhiyun 	pm_runtime_set_autosuspend_delay(&client->dev,
894*4882a593Smuzhiyun 					 US5182D_SLEEP_MS);
895*4882a593Smuzhiyun 	pm_runtime_use_autosuspend(&client->dev);
896*4882a593Smuzhiyun 
897*4882a593Smuzhiyun 	ret = iio_device_register(indio_dev);
898*4882a593Smuzhiyun 	if (ret < 0)
899*4882a593Smuzhiyun 		goto out_err;
900*4882a593Smuzhiyun 
901*4882a593Smuzhiyun 	return 0;
902*4882a593Smuzhiyun 
903*4882a593Smuzhiyun out_err:
904*4882a593Smuzhiyun 	us5182d_shutdown_en(data, US5182D_CFG0_SHUTDOWN_EN);
905*4882a593Smuzhiyun 	return ret;
906*4882a593Smuzhiyun 
907*4882a593Smuzhiyun }
908*4882a593Smuzhiyun 
us5182d_remove(struct i2c_client * client)909*4882a593Smuzhiyun static int us5182d_remove(struct i2c_client *client)
910*4882a593Smuzhiyun {
911*4882a593Smuzhiyun 	struct us5182d_data *data = iio_priv(i2c_get_clientdata(client));
912*4882a593Smuzhiyun 
913*4882a593Smuzhiyun 	iio_device_unregister(i2c_get_clientdata(client));
914*4882a593Smuzhiyun 
915*4882a593Smuzhiyun 	pm_runtime_disable(&client->dev);
916*4882a593Smuzhiyun 	pm_runtime_set_suspended(&client->dev);
917*4882a593Smuzhiyun 
918*4882a593Smuzhiyun 	return us5182d_shutdown_en(data, US5182D_CFG0_SHUTDOWN_EN);
919*4882a593Smuzhiyun }
920*4882a593Smuzhiyun 
921*4882a593Smuzhiyun #if defined(CONFIG_PM_SLEEP) || defined(CONFIG_PM)
us5182d_suspend(struct device * dev)922*4882a593Smuzhiyun static int us5182d_suspend(struct device *dev)
923*4882a593Smuzhiyun {
924*4882a593Smuzhiyun 	struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
925*4882a593Smuzhiyun 	struct us5182d_data *data = iio_priv(indio_dev);
926*4882a593Smuzhiyun 
927*4882a593Smuzhiyun 	if (data->power_mode == US5182D_CONTINUOUS)
928*4882a593Smuzhiyun 		return us5182d_shutdown_en(data, US5182D_CFG0_SHUTDOWN_EN);
929*4882a593Smuzhiyun 
930*4882a593Smuzhiyun 	return 0;
931*4882a593Smuzhiyun }
932*4882a593Smuzhiyun 
us5182d_resume(struct device * dev)933*4882a593Smuzhiyun static int us5182d_resume(struct device *dev)
934*4882a593Smuzhiyun {
935*4882a593Smuzhiyun 	struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
936*4882a593Smuzhiyun 	struct us5182d_data *data = iio_priv(indio_dev);
937*4882a593Smuzhiyun 
938*4882a593Smuzhiyun 	if (data->power_mode == US5182D_CONTINUOUS)
939*4882a593Smuzhiyun 		return us5182d_shutdown_en(data,
940*4882a593Smuzhiyun 					   ~US5182D_CFG0_SHUTDOWN_EN & 0xff);
941*4882a593Smuzhiyun 
942*4882a593Smuzhiyun 	return 0;
943*4882a593Smuzhiyun }
944*4882a593Smuzhiyun #endif
945*4882a593Smuzhiyun 
946*4882a593Smuzhiyun static const struct dev_pm_ops us5182d_pm_ops = {
947*4882a593Smuzhiyun 	SET_SYSTEM_SLEEP_PM_OPS(us5182d_suspend, us5182d_resume)
948*4882a593Smuzhiyun 	SET_RUNTIME_PM_OPS(us5182d_suspend, us5182d_resume, NULL)
949*4882a593Smuzhiyun };
950*4882a593Smuzhiyun 
951*4882a593Smuzhiyun static const struct acpi_device_id us5182d_acpi_match[] = {
952*4882a593Smuzhiyun 	{ "USD5182", 0},
953*4882a593Smuzhiyun 	{}
954*4882a593Smuzhiyun };
955*4882a593Smuzhiyun 
956*4882a593Smuzhiyun MODULE_DEVICE_TABLE(acpi, us5182d_acpi_match);
957*4882a593Smuzhiyun 
958*4882a593Smuzhiyun static const struct i2c_device_id us5182d_id[] = {
959*4882a593Smuzhiyun 		{"usd5182", 0},
960*4882a593Smuzhiyun 		{}
961*4882a593Smuzhiyun };
962*4882a593Smuzhiyun 
963*4882a593Smuzhiyun MODULE_DEVICE_TABLE(i2c, us5182d_id);
964*4882a593Smuzhiyun 
965*4882a593Smuzhiyun static const struct of_device_id us5182d_of_match[] = {
966*4882a593Smuzhiyun 	{ .compatible = "upisemi,usd5182" },
967*4882a593Smuzhiyun 	{}
968*4882a593Smuzhiyun };
969*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, us5182d_of_match);
970*4882a593Smuzhiyun 
971*4882a593Smuzhiyun static struct i2c_driver us5182d_driver = {
972*4882a593Smuzhiyun 	.driver = {
973*4882a593Smuzhiyun 		.name = US5182D_DRV_NAME,
974*4882a593Smuzhiyun 		.pm = &us5182d_pm_ops,
975*4882a593Smuzhiyun 		.of_match_table = us5182d_of_match,
976*4882a593Smuzhiyun 		.acpi_match_table = ACPI_PTR(us5182d_acpi_match),
977*4882a593Smuzhiyun 	},
978*4882a593Smuzhiyun 	.probe = us5182d_probe,
979*4882a593Smuzhiyun 	.remove = us5182d_remove,
980*4882a593Smuzhiyun 	.id_table = us5182d_id,
981*4882a593Smuzhiyun 
982*4882a593Smuzhiyun };
983*4882a593Smuzhiyun module_i2c_driver(us5182d_driver);
984*4882a593Smuzhiyun 
985*4882a593Smuzhiyun MODULE_AUTHOR("Adriana Reus <adriana.reus@intel.com>");
986*4882a593Smuzhiyun MODULE_DESCRIPTION("Driver for us5182d Proximity and Light Sensor");
987*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
988