1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0+
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Support for ON Semiconductor NOA1305 ambient light sensor
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2016 Emcraft Systems
6*4882a593Smuzhiyun * Copyright (C) 2019 Collabora Ltd.
7*4882a593Smuzhiyun */
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun #include <linux/delay.h>
10*4882a593Smuzhiyun #include <linux/err.h>
11*4882a593Smuzhiyun #include <linux/i2c.h>
12*4882a593Smuzhiyun #include <linux/iio/iio.h>
13*4882a593Smuzhiyun #include <linux/iio/sysfs.h>
14*4882a593Smuzhiyun #include <linux/module.h>
15*4882a593Smuzhiyun #include <linux/regmap.h>
16*4882a593Smuzhiyun #include <linux/regulator/consumer.h>
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun #define NOA1305_REG_POWER_CONTROL 0x0
19*4882a593Smuzhiyun #define NOA1305_POWER_CONTROL_DOWN 0x00
20*4882a593Smuzhiyun #define NOA1305_POWER_CONTROL_ON 0x08
21*4882a593Smuzhiyun #define NOA1305_REG_RESET 0x1
22*4882a593Smuzhiyun #define NOA1305_RESET_RESET 0x10
23*4882a593Smuzhiyun #define NOA1305_REG_INTEGRATION_TIME 0x2
24*4882a593Smuzhiyun #define NOA1305_INTEGR_TIME_800MS 0x00
25*4882a593Smuzhiyun #define NOA1305_INTEGR_TIME_400MS 0x01
26*4882a593Smuzhiyun #define NOA1305_INTEGR_TIME_200MS 0x02
27*4882a593Smuzhiyun #define NOA1305_INTEGR_TIME_100MS 0x03
28*4882a593Smuzhiyun #define NOA1305_INTEGR_TIME_50MS 0x04
29*4882a593Smuzhiyun #define NOA1305_INTEGR_TIME_25MS 0x05
30*4882a593Smuzhiyun #define NOA1305_INTEGR_TIME_12_5MS 0x06
31*4882a593Smuzhiyun #define NOA1305_INTEGR_TIME_6_25MS 0x07
32*4882a593Smuzhiyun #define NOA1305_REG_INT_SELECT 0x3
33*4882a593Smuzhiyun #define NOA1305_INT_SEL_ACTIVE_HIGH 0x01
34*4882a593Smuzhiyun #define NOA1305_INT_SEL_ACTIVE_LOW 0x02
35*4882a593Smuzhiyun #define NOA1305_INT_SEL_INACTIVE 0x03
36*4882a593Smuzhiyun #define NOA1305_REG_INT_THRESH_LSB 0x4
37*4882a593Smuzhiyun #define NOA1305_REG_INT_THRESH_MSB 0x5
38*4882a593Smuzhiyun #define NOA1305_REG_ALS_DATA_LSB 0x6
39*4882a593Smuzhiyun #define NOA1305_REG_ALS_DATA_MSB 0x7
40*4882a593Smuzhiyun #define NOA1305_REG_DEVICE_ID_LSB 0x8
41*4882a593Smuzhiyun #define NOA1305_REG_DEVICE_ID_MSB 0x9
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun #define NOA1305_DEVICE_ID 0x0519
44*4882a593Smuzhiyun #define NOA1305_DRIVER_NAME "noa1305"
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun struct noa1305_priv {
47*4882a593Smuzhiyun struct i2c_client *client;
48*4882a593Smuzhiyun struct regmap *regmap;
49*4882a593Smuzhiyun struct regulator *vin_reg;
50*4882a593Smuzhiyun };
51*4882a593Smuzhiyun
noa1305_measure(struct noa1305_priv * priv)52*4882a593Smuzhiyun static int noa1305_measure(struct noa1305_priv *priv)
53*4882a593Smuzhiyun {
54*4882a593Smuzhiyun __le16 data;
55*4882a593Smuzhiyun int ret;
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun ret = regmap_bulk_read(priv->regmap, NOA1305_REG_ALS_DATA_LSB, &data,
58*4882a593Smuzhiyun 2);
59*4882a593Smuzhiyun if (ret < 0)
60*4882a593Smuzhiyun return ret;
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun return le16_to_cpu(data);
63*4882a593Smuzhiyun }
64*4882a593Smuzhiyun
noa1305_scale(struct noa1305_priv * priv,int * val,int * val2)65*4882a593Smuzhiyun static int noa1305_scale(struct noa1305_priv *priv, int *val, int *val2)
66*4882a593Smuzhiyun {
67*4882a593Smuzhiyun int data;
68*4882a593Smuzhiyun int ret;
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun ret = regmap_read(priv->regmap, NOA1305_REG_INTEGRATION_TIME, &data);
71*4882a593Smuzhiyun if (ret < 0)
72*4882a593Smuzhiyun return ret;
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun /*
75*4882a593Smuzhiyun * Lux = count / (<Integration Constant> * <Integration Time>)
76*4882a593Smuzhiyun *
77*4882a593Smuzhiyun * Integration Constant = 7.7
78*4882a593Smuzhiyun * Integration Time in Seconds
79*4882a593Smuzhiyun */
80*4882a593Smuzhiyun switch (data) {
81*4882a593Smuzhiyun case NOA1305_INTEGR_TIME_800MS:
82*4882a593Smuzhiyun *val = 100;
83*4882a593Smuzhiyun *val2 = 77 * 8;
84*4882a593Smuzhiyun break;
85*4882a593Smuzhiyun case NOA1305_INTEGR_TIME_400MS:
86*4882a593Smuzhiyun *val = 100;
87*4882a593Smuzhiyun *val2 = 77 * 4;
88*4882a593Smuzhiyun break;
89*4882a593Smuzhiyun case NOA1305_INTEGR_TIME_200MS:
90*4882a593Smuzhiyun *val = 100;
91*4882a593Smuzhiyun *val2 = 77 * 2;
92*4882a593Smuzhiyun break;
93*4882a593Smuzhiyun case NOA1305_INTEGR_TIME_100MS:
94*4882a593Smuzhiyun *val = 100;
95*4882a593Smuzhiyun *val2 = 77;
96*4882a593Smuzhiyun break;
97*4882a593Smuzhiyun case NOA1305_INTEGR_TIME_50MS:
98*4882a593Smuzhiyun *val = 1000;
99*4882a593Smuzhiyun *val2 = 77 * 5;
100*4882a593Smuzhiyun break;
101*4882a593Smuzhiyun case NOA1305_INTEGR_TIME_25MS:
102*4882a593Smuzhiyun *val = 10000;
103*4882a593Smuzhiyun *val2 = 77 * 25;
104*4882a593Smuzhiyun break;
105*4882a593Smuzhiyun case NOA1305_INTEGR_TIME_12_5MS:
106*4882a593Smuzhiyun *val = 100000;
107*4882a593Smuzhiyun *val2 = 77 * 125;
108*4882a593Smuzhiyun break;
109*4882a593Smuzhiyun case NOA1305_INTEGR_TIME_6_25MS:
110*4882a593Smuzhiyun *val = 1000000;
111*4882a593Smuzhiyun *val2 = 77 * 625;
112*4882a593Smuzhiyun break;
113*4882a593Smuzhiyun default:
114*4882a593Smuzhiyun return -EINVAL;
115*4882a593Smuzhiyun }
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun return IIO_VAL_FRACTIONAL;
118*4882a593Smuzhiyun }
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun static const struct iio_chan_spec noa1305_channels[] = {
121*4882a593Smuzhiyun {
122*4882a593Smuzhiyun .type = IIO_LIGHT,
123*4882a593Smuzhiyun .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
124*4882a593Smuzhiyun .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),
125*4882a593Smuzhiyun }
126*4882a593Smuzhiyun };
127*4882a593Smuzhiyun
noa1305_read_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int * val,int * val2,long mask)128*4882a593Smuzhiyun static int noa1305_read_raw(struct iio_dev *indio_dev,
129*4882a593Smuzhiyun struct iio_chan_spec const *chan,
130*4882a593Smuzhiyun int *val, int *val2, long mask)
131*4882a593Smuzhiyun {
132*4882a593Smuzhiyun int ret = -EINVAL;
133*4882a593Smuzhiyun struct noa1305_priv *priv = iio_priv(indio_dev);
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun switch (mask) {
136*4882a593Smuzhiyun case IIO_CHAN_INFO_RAW:
137*4882a593Smuzhiyun switch (chan->type) {
138*4882a593Smuzhiyun case IIO_LIGHT:
139*4882a593Smuzhiyun ret = noa1305_measure(priv);
140*4882a593Smuzhiyun if (ret < 0)
141*4882a593Smuzhiyun return ret;
142*4882a593Smuzhiyun *val = ret;
143*4882a593Smuzhiyun return IIO_VAL_INT;
144*4882a593Smuzhiyun default:
145*4882a593Smuzhiyun break;
146*4882a593Smuzhiyun }
147*4882a593Smuzhiyun break;
148*4882a593Smuzhiyun case IIO_CHAN_INFO_SCALE:
149*4882a593Smuzhiyun switch (chan->type) {
150*4882a593Smuzhiyun case IIO_LIGHT:
151*4882a593Smuzhiyun return noa1305_scale(priv, val, val2);
152*4882a593Smuzhiyun default:
153*4882a593Smuzhiyun break;
154*4882a593Smuzhiyun }
155*4882a593Smuzhiyun break;
156*4882a593Smuzhiyun default:
157*4882a593Smuzhiyun break;
158*4882a593Smuzhiyun }
159*4882a593Smuzhiyun
160*4882a593Smuzhiyun return ret;
161*4882a593Smuzhiyun }
162*4882a593Smuzhiyun
163*4882a593Smuzhiyun static const struct iio_info noa1305_info = {
164*4882a593Smuzhiyun .read_raw = noa1305_read_raw,
165*4882a593Smuzhiyun };
166*4882a593Smuzhiyun
noa1305_writable_reg(struct device * dev,unsigned int reg)167*4882a593Smuzhiyun static bool noa1305_writable_reg(struct device *dev, unsigned int reg)
168*4882a593Smuzhiyun {
169*4882a593Smuzhiyun switch (reg) {
170*4882a593Smuzhiyun case NOA1305_REG_POWER_CONTROL:
171*4882a593Smuzhiyun case NOA1305_REG_RESET:
172*4882a593Smuzhiyun case NOA1305_REG_INTEGRATION_TIME:
173*4882a593Smuzhiyun case NOA1305_REG_INT_SELECT:
174*4882a593Smuzhiyun case NOA1305_REG_INT_THRESH_LSB:
175*4882a593Smuzhiyun case NOA1305_REG_INT_THRESH_MSB:
176*4882a593Smuzhiyun return true;
177*4882a593Smuzhiyun default:
178*4882a593Smuzhiyun return false;
179*4882a593Smuzhiyun }
180*4882a593Smuzhiyun }
181*4882a593Smuzhiyun
182*4882a593Smuzhiyun static const struct regmap_config noa1305_regmap_config = {
183*4882a593Smuzhiyun .name = NOA1305_DRIVER_NAME,
184*4882a593Smuzhiyun .reg_bits = 8,
185*4882a593Smuzhiyun .val_bits = 8,
186*4882a593Smuzhiyun .max_register = NOA1305_REG_DEVICE_ID_MSB,
187*4882a593Smuzhiyun .writeable_reg = noa1305_writable_reg,
188*4882a593Smuzhiyun };
189*4882a593Smuzhiyun
noa1305_reg_remove(void * data)190*4882a593Smuzhiyun static void noa1305_reg_remove(void *data)
191*4882a593Smuzhiyun {
192*4882a593Smuzhiyun struct noa1305_priv *priv = data;
193*4882a593Smuzhiyun
194*4882a593Smuzhiyun regulator_disable(priv->vin_reg);
195*4882a593Smuzhiyun }
196*4882a593Smuzhiyun
noa1305_probe(struct i2c_client * client,const struct i2c_device_id * id)197*4882a593Smuzhiyun static int noa1305_probe(struct i2c_client *client,
198*4882a593Smuzhiyun const struct i2c_device_id *id)
199*4882a593Smuzhiyun {
200*4882a593Smuzhiyun struct noa1305_priv *priv;
201*4882a593Smuzhiyun struct iio_dev *indio_dev;
202*4882a593Smuzhiyun struct regmap *regmap;
203*4882a593Smuzhiyun __le16 data;
204*4882a593Smuzhiyun unsigned int dev_id;
205*4882a593Smuzhiyun int ret;
206*4882a593Smuzhiyun
207*4882a593Smuzhiyun indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*priv));
208*4882a593Smuzhiyun if (!indio_dev)
209*4882a593Smuzhiyun return -ENOMEM;
210*4882a593Smuzhiyun
211*4882a593Smuzhiyun regmap = devm_regmap_init_i2c(client, &noa1305_regmap_config);
212*4882a593Smuzhiyun if (IS_ERR(regmap)) {
213*4882a593Smuzhiyun dev_err(&client->dev, "Regmap initialization failed.\n");
214*4882a593Smuzhiyun return PTR_ERR(regmap);
215*4882a593Smuzhiyun }
216*4882a593Smuzhiyun
217*4882a593Smuzhiyun priv = iio_priv(indio_dev);
218*4882a593Smuzhiyun
219*4882a593Smuzhiyun priv->vin_reg = devm_regulator_get(&client->dev, "vin");
220*4882a593Smuzhiyun if (IS_ERR(priv->vin_reg)) {
221*4882a593Smuzhiyun dev_err(&client->dev, "get regulator vin failed\n");
222*4882a593Smuzhiyun return PTR_ERR(priv->vin_reg);
223*4882a593Smuzhiyun }
224*4882a593Smuzhiyun
225*4882a593Smuzhiyun ret = regulator_enable(priv->vin_reg);
226*4882a593Smuzhiyun if (ret) {
227*4882a593Smuzhiyun dev_err(&client->dev, "enable regulator vin failed\n");
228*4882a593Smuzhiyun return ret;
229*4882a593Smuzhiyun }
230*4882a593Smuzhiyun
231*4882a593Smuzhiyun ret = devm_add_action_or_reset(&client->dev, noa1305_reg_remove, priv);
232*4882a593Smuzhiyun if (ret) {
233*4882a593Smuzhiyun dev_err(&client->dev, "addition of devm action failed\n");
234*4882a593Smuzhiyun return ret;
235*4882a593Smuzhiyun }
236*4882a593Smuzhiyun
237*4882a593Smuzhiyun i2c_set_clientdata(client, indio_dev);
238*4882a593Smuzhiyun priv->client = client;
239*4882a593Smuzhiyun priv->regmap = regmap;
240*4882a593Smuzhiyun
241*4882a593Smuzhiyun ret = regmap_bulk_read(regmap, NOA1305_REG_DEVICE_ID_LSB, &data, 2);
242*4882a593Smuzhiyun if (ret < 0) {
243*4882a593Smuzhiyun dev_err(&client->dev, "ID reading failed: %d\n", ret);
244*4882a593Smuzhiyun return ret;
245*4882a593Smuzhiyun }
246*4882a593Smuzhiyun
247*4882a593Smuzhiyun dev_id = le16_to_cpu(data);
248*4882a593Smuzhiyun if (dev_id != NOA1305_DEVICE_ID) {
249*4882a593Smuzhiyun dev_err(&client->dev, "Unknown device ID: 0x%x\n", dev_id);
250*4882a593Smuzhiyun return -ENODEV;
251*4882a593Smuzhiyun }
252*4882a593Smuzhiyun
253*4882a593Smuzhiyun ret = regmap_write(regmap, NOA1305_REG_POWER_CONTROL,
254*4882a593Smuzhiyun NOA1305_POWER_CONTROL_ON);
255*4882a593Smuzhiyun if (ret < 0) {
256*4882a593Smuzhiyun dev_err(&client->dev, "Enabling power control failed\n");
257*4882a593Smuzhiyun return ret;
258*4882a593Smuzhiyun }
259*4882a593Smuzhiyun
260*4882a593Smuzhiyun ret = regmap_write(regmap, NOA1305_REG_RESET, NOA1305_RESET_RESET);
261*4882a593Smuzhiyun if (ret < 0) {
262*4882a593Smuzhiyun dev_err(&client->dev, "Device reset failed\n");
263*4882a593Smuzhiyun return ret;
264*4882a593Smuzhiyun }
265*4882a593Smuzhiyun
266*4882a593Smuzhiyun ret = regmap_write(regmap, NOA1305_REG_INTEGRATION_TIME,
267*4882a593Smuzhiyun NOA1305_INTEGR_TIME_800MS);
268*4882a593Smuzhiyun if (ret < 0) {
269*4882a593Smuzhiyun dev_err(&client->dev, "Setting integration time failed\n");
270*4882a593Smuzhiyun return ret;
271*4882a593Smuzhiyun }
272*4882a593Smuzhiyun
273*4882a593Smuzhiyun indio_dev->info = &noa1305_info;
274*4882a593Smuzhiyun indio_dev->channels = noa1305_channels;
275*4882a593Smuzhiyun indio_dev->num_channels = ARRAY_SIZE(noa1305_channels);
276*4882a593Smuzhiyun indio_dev->name = NOA1305_DRIVER_NAME;
277*4882a593Smuzhiyun indio_dev->modes = INDIO_DIRECT_MODE;
278*4882a593Smuzhiyun
279*4882a593Smuzhiyun ret = devm_iio_device_register(&client->dev, indio_dev);
280*4882a593Smuzhiyun if (ret)
281*4882a593Smuzhiyun dev_err(&client->dev, "registering device failed\n");
282*4882a593Smuzhiyun
283*4882a593Smuzhiyun return ret;
284*4882a593Smuzhiyun }
285*4882a593Smuzhiyun
286*4882a593Smuzhiyun static const struct of_device_id noa1305_of_match[] = {
287*4882a593Smuzhiyun { .compatible = "onnn,noa1305" },
288*4882a593Smuzhiyun { }
289*4882a593Smuzhiyun };
290*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, noa1305_of_match);
291*4882a593Smuzhiyun
292*4882a593Smuzhiyun static const struct i2c_device_id noa1305_ids[] = {
293*4882a593Smuzhiyun { "noa1305", 0 },
294*4882a593Smuzhiyun { }
295*4882a593Smuzhiyun };
296*4882a593Smuzhiyun MODULE_DEVICE_TABLE(i2c, noa1305_ids);
297*4882a593Smuzhiyun
298*4882a593Smuzhiyun static struct i2c_driver noa1305_driver = {
299*4882a593Smuzhiyun .driver = {
300*4882a593Smuzhiyun .name = NOA1305_DRIVER_NAME,
301*4882a593Smuzhiyun .of_match_table = noa1305_of_match,
302*4882a593Smuzhiyun },
303*4882a593Smuzhiyun .probe = noa1305_probe,
304*4882a593Smuzhiyun .id_table = noa1305_ids,
305*4882a593Smuzhiyun };
306*4882a593Smuzhiyun
307*4882a593Smuzhiyun module_i2c_driver(noa1305_driver);
308*4882a593Smuzhiyun
309*4882a593Smuzhiyun MODULE_AUTHOR("Sergei Miroshnichenko <sergeimir@emcraft.com>");
310*4882a593Smuzhiyun MODULE_AUTHOR("Martyn Welch <martyn.welch@collabora.com");
311*4882a593Smuzhiyun MODULE_DESCRIPTION("ON Semiconductor NOA1305 ambient light sensor");
312*4882a593Smuzhiyun MODULE_LICENSE("GPL");
313