1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * lm3533-als.c -- LM3533 Ambient Light Sensor driver
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2011-2012 Texas Instruments
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Author: Johan Hovold <jhovold@gmail.com>
8*4882a593Smuzhiyun */
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun #include <linux/atomic.h>
11*4882a593Smuzhiyun #include <linux/fs.h>
12*4882a593Smuzhiyun #include <linux/interrupt.h>
13*4882a593Smuzhiyun #include <linux/io.h>
14*4882a593Smuzhiyun #include <linux/iio/events.h>
15*4882a593Smuzhiyun #include <linux/iio/iio.h>
16*4882a593Smuzhiyun #include <linux/module.h>
17*4882a593Smuzhiyun #include <linux/mutex.h>
18*4882a593Smuzhiyun #include <linux/mfd/core.h>
19*4882a593Smuzhiyun #include <linux/platform_device.h>
20*4882a593Smuzhiyun #include <linux/slab.h>
21*4882a593Smuzhiyun #include <linux/uaccess.h>
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun #include <linux/mfd/lm3533.h>
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun #define LM3533_ALS_RESISTOR_MIN 1
27*4882a593Smuzhiyun #define LM3533_ALS_RESISTOR_MAX 127
28*4882a593Smuzhiyun #define LM3533_ALS_CHANNEL_CURRENT_MAX 2
29*4882a593Smuzhiyun #define LM3533_ALS_THRESH_MAX 3
30*4882a593Smuzhiyun #define LM3533_ALS_ZONE_MAX 4
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun #define LM3533_REG_ALS_RESISTOR_SELECT 0x30
33*4882a593Smuzhiyun #define LM3533_REG_ALS_CONF 0x31
34*4882a593Smuzhiyun #define LM3533_REG_ALS_ZONE_INFO 0x34
35*4882a593Smuzhiyun #define LM3533_REG_ALS_READ_ADC_RAW 0x37
36*4882a593Smuzhiyun #define LM3533_REG_ALS_READ_ADC_AVERAGE 0x38
37*4882a593Smuzhiyun #define LM3533_REG_ALS_BOUNDARY_BASE 0x50
38*4882a593Smuzhiyun #define LM3533_REG_ALS_TARGET_BASE 0x60
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun #define LM3533_ALS_ENABLE_MASK 0x01
41*4882a593Smuzhiyun #define LM3533_ALS_INPUT_MODE_MASK 0x02
42*4882a593Smuzhiyun #define LM3533_ALS_INT_ENABLE_MASK 0x01
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun #define LM3533_ALS_ZONE_SHIFT 2
45*4882a593Smuzhiyun #define LM3533_ALS_ZONE_MASK 0x1c
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun #define LM3533_ALS_FLAG_INT_ENABLED 1
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun struct lm3533_als {
51*4882a593Smuzhiyun struct lm3533 *lm3533;
52*4882a593Smuzhiyun struct platform_device *pdev;
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun unsigned long flags;
55*4882a593Smuzhiyun int irq;
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun atomic_t zone;
58*4882a593Smuzhiyun struct mutex thresh_mutex;
59*4882a593Smuzhiyun };
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun
lm3533_als_get_adc(struct iio_dev * indio_dev,bool average,int * adc)62*4882a593Smuzhiyun static int lm3533_als_get_adc(struct iio_dev *indio_dev, bool average,
63*4882a593Smuzhiyun int *adc)
64*4882a593Smuzhiyun {
65*4882a593Smuzhiyun struct lm3533_als *als = iio_priv(indio_dev);
66*4882a593Smuzhiyun u8 reg;
67*4882a593Smuzhiyun u8 val;
68*4882a593Smuzhiyun int ret;
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun if (average)
71*4882a593Smuzhiyun reg = LM3533_REG_ALS_READ_ADC_AVERAGE;
72*4882a593Smuzhiyun else
73*4882a593Smuzhiyun reg = LM3533_REG_ALS_READ_ADC_RAW;
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun ret = lm3533_read(als->lm3533, reg, &val);
76*4882a593Smuzhiyun if (ret) {
77*4882a593Smuzhiyun dev_err(&indio_dev->dev, "failed to read adc\n");
78*4882a593Smuzhiyun return ret;
79*4882a593Smuzhiyun }
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun *adc = val;
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun return 0;
84*4882a593Smuzhiyun }
85*4882a593Smuzhiyun
_lm3533_als_get_zone(struct iio_dev * indio_dev,u8 * zone)86*4882a593Smuzhiyun static int _lm3533_als_get_zone(struct iio_dev *indio_dev, u8 *zone)
87*4882a593Smuzhiyun {
88*4882a593Smuzhiyun struct lm3533_als *als = iio_priv(indio_dev);
89*4882a593Smuzhiyun u8 val;
90*4882a593Smuzhiyun int ret;
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun ret = lm3533_read(als->lm3533, LM3533_REG_ALS_ZONE_INFO, &val);
93*4882a593Smuzhiyun if (ret) {
94*4882a593Smuzhiyun dev_err(&indio_dev->dev, "failed to read zone\n");
95*4882a593Smuzhiyun return ret;
96*4882a593Smuzhiyun }
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun val = (val & LM3533_ALS_ZONE_MASK) >> LM3533_ALS_ZONE_SHIFT;
99*4882a593Smuzhiyun *zone = min_t(u8, val, LM3533_ALS_ZONE_MAX);
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun return 0;
102*4882a593Smuzhiyun }
103*4882a593Smuzhiyun
lm3533_als_get_zone(struct iio_dev * indio_dev,u8 * zone)104*4882a593Smuzhiyun static int lm3533_als_get_zone(struct iio_dev *indio_dev, u8 *zone)
105*4882a593Smuzhiyun {
106*4882a593Smuzhiyun struct lm3533_als *als = iio_priv(indio_dev);
107*4882a593Smuzhiyun int ret;
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun if (test_bit(LM3533_ALS_FLAG_INT_ENABLED, &als->flags)) {
110*4882a593Smuzhiyun *zone = atomic_read(&als->zone);
111*4882a593Smuzhiyun } else {
112*4882a593Smuzhiyun ret = _lm3533_als_get_zone(indio_dev, zone);
113*4882a593Smuzhiyun if (ret)
114*4882a593Smuzhiyun return ret;
115*4882a593Smuzhiyun }
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun return 0;
118*4882a593Smuzhiyun }
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun /*
121*4882a593Smuzhiyun * channel output channel 0..2
122*4882a593Smuzhiyun * zone zone 0..4
123*4882a593Smuzhiyun */
lm3533_als_get_target_reg(unsigned channel,unsigned zone)124*4882a593Smuzhiyun static inline u8 lm3533_als_get_target_reg(unsigned channel, unsigned zone)
125*4882a593Smuzhiyun {
126*4882a593Smuzhiyun return LM3533_REG_ALS_TARGET_BASE + 5 * channel + zone;
127*4882a593Smuzhiyun }
128*4882a593Smuzhiyun
lm3533_als_get_target(struct iio_dev * indio_dev,unsigned channel,unsigned zone,u8 * val)129*4882a593Smuzhiyun static int lm3533_als_get_target(struct iio_dev *indio_dev, unsigned channel,
130*4882a593Smuzhiyun unsigned zone, u8 *val)
131*4882a593Smuzhiyun {
132*4882a593Smuzhiyun struct lm3533_als *als = iio_priv(indio_dev);
133*4882a593Smuzhiyun u8 reg;
134*4882a593Smuzhiyun int ret;
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun if (channel > LM3533_ALS_CHANNEL_CURRENT_MAX)
137*4882a593Smuzhiyun return -EINVAL;
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun if (zone > LM3533_ALS_ZONE_MAX)
140*4882a593Smuzhiyun return -EINVAL;
141*4882a593Smuzhiyun
142*4882a593Smuzhiyun reg = lm3533_als_get_target_reg(channel, zone);
143*4882a593Smuzhiyun ret = lm3533_read(als->lm3533, reg, val);
144*4882a593Smuzhiyun if (ret)
145*4882a593Smuzhiyun dev_err(&indio_dev->dev, "failed to get target current\n");
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun return ret;
148*4882a593Smuzhiyun }
149*4882a593Smuzhiyun
lm3533_als_set_target(struct iio_dev * indio_dev,unsigned channel,unsigned zone,u8 val)150*4882a593Smuzhiyun static int lm3533_als_set_target(struct iio_dev *indio_dev, unsigned channel,
151*4882a593Smuzhiyun unsigned zone, u8 val)
152*4882a593Smuzhiyun {
153*4882a593Smuzhiyun struct lm3533_als *als = iio_priv(indio_dev);
154*4882a593Smuzhiyun u8 reg;
155*4882a593Smuzhiyun int ret;
156*4882a593Smuzhiyun
157*4882a593Smuzhiyun if (channel > LM3533_ALS_CHANNEL_CURRENT_MAX)
158*4882a593Smuzhiyun return -EINVAL;
159*4882a593Smuzhiyun
160*4882a593Smuzhiyun if (zone > LM3533_ALS_ZONE_MAX)
161*4882a593Smuzhiyun return -EINVAL;
162*4882a593Smuzhiyun
163*4882a593Smuzhiyun reg = lm3533_als_get_target_reg(channel, zone);
164*4882a593Smuzhiyun ret = lm3533_write(als->lm3533, reg, val);
165*4882a593Smuzhiyun if (ret)
166*4882a593Smuzhiyun dev_err(&indio_dev->dev, "failed to set target current\n");
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun return ret;
169*4882a593Smuzhiyun }
170*4882a593Smuzhiyun
lm3533_als_get_current(struct iio_dev * indio_dev,unsigned channel,int * val)171*4882a593Smuzhiyun static int lm3533_als_get_current(struct iio_dev *indio_dev, unsigned channel,
172*4882a593Smuzhiyun int *val)
173*4882a593Smuzhiyun {
174*4882a593Smuzhiyun u8 zone;
175*4882a593Smuzhiyun u8 target;
176*4882a593Smuzhiyun int ret;
177*4882a593Smuzhiyun
178*4882a593Smuzhiyun ret = lm3533_als_get_zone(indio_dev, &zone);
179*4882a593Smuzhiyun if (ret)
180*4882a593Smuzhiyun return ret;
181*4882a593Smuzhiyun
182*4882a593Smuzhiyun ret = lm3533_als_get_target(indio_dev, channel, zone, &target);
183*4882a593Smuzhiyun if (ret)
184*4882a593Smuzhiyun return ret;
185*4882a593Smuzhiyun
186*4882a593Smuzhiyun *val = target;
187*4882a593Smuzhiyun
188*4882a593Smuzhiyun return 0;
189*4882a593Smuzhiyun }
190*4882a593Smuzhiyun
lm3533_als_read_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int * val,int * val2,long mask)191*4882a593Smuzhiyun static int lm3533_als_read_raw(struct iio_dev *indio_dev,
192*4882a593Smuzhiyun struct iio_chan_spec const *chan,
193*4882a593Smuzhiyun int *val, int *val2, long mask)
194*4882a593Smuzhiyun {
195*4882a593Smuzhiyun int ret;
196*4882a593Smuzhiyun
197*4882a593Smuzhiyun switch (mask) {
198*4882a593Smuzhiyun case IIO_CHAN_INFO_RAW:
199*4882a593Smuzhiyun switch (chan->type) {
200*4882a593Smuzhiyun case IIO_LIGHT:
201*4882a593Smuzhiyun ret = lm3533_als_get_adc(indio_dev, false, val);
202*4882a593Smuzhiyun break;
203*4882a593Smuzhiyun case IIO_CURRENT:
204*4882a593Smuzhiyun ret = lm3533_als_get_current(indio_dev, chan->channel,
205*4882a593Smuzhiyun val);
206*4882a593Smuzhiyun break;
207*4882a593Smuzhiyun default:
208*4882a593Smuzhiyun return -EINVAL;
209*4882a593Smuzhiyun }
210*4882a593Smuzhiyun break;
211*4882a593Smuzhiyun case IIO_CHAN_INFO_AVERAGE_RAW:
212*4882a593Smuzhiyun ret = lm3533_als_get_adc(indio_dev, true, val);
213*4882a593Smuzhiyun break;
214*4882a593Smuzhiyun default:
215*4882a593Smuzhiyun return -EINVAL;
216*4882a593Smuzhiyun }
217*4882a593Smuzhiyun
218*4882a593Smuzhiyun if (ret)
219*4882a593Smuzhiyun return ret;
220*4882a593Smuzhiyun
221*4882a593Smuzhiyun return IIO_VAL_INT;
222*4882a593Smuzhiyun }
223*4882a593Smuzhiyun
224*4882a593Smuzhiyun #define CHANNEL_CURRENT(_channel) \
225*4882a593Smuzhiyun { \
226*4882a593Smuzhiyun .type = IIO_CURRENT, \
227*4882a593Smuzhiyun .channel = _channel, \
228*4882a593Smuzhiyun .indexed = true, \
229*4882a593Smuzhiyun .output = true, \
230*4882a593Smuzhiyun .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
231*4882a593Smuzhiyun }
232*4882a593Smuzhiyun
233*4882a593Smuzhiyun static const struct iio_chan_spec lm3533_als_channels[] = {
234*4882a593Smuzhiyun {
235*4882a593Smuzhiyun .type = IIO_LIGHT,
236*4882a593Smuzhiyun .channel = 0,
237*4882a593Smuzhiyun .indexed = true,
238*4882a593Smuzhiyun .info_mask_separate = BIT(IIO_CHAN_INFO_AVERAGE_RAW) |
239*4882a593Smuzhiyun BIT(IIO_CHAN_INFO_RAW),
240*4882a593Smuzhiyun },
241*4882a593Smuzhiyun CHANNEL_CURRENT(0),
242*4882a593Smuzhiyun CHANNEL_CURRENT(1),
243*4882a593Smuzhiyun CHANNEL_CURRENT(2),
244*4882a593Smuzhiyun };
245*4882a593Smuzhiyun
lm3533_als_isr(int irq,void * dev_id)246*4882a593Smuzhiyun static irqreturn_t lm3533_als_isr(int irq, void *dev_id)
247*4882a593Smuzhiyun {
248*4882a593Smuzhiyun
249*4882a593Smuzhiyun struct iio_dev *indio_dev = dev_id;
250*4882a593Smuzhiyun struct lm3533_als *als = iio_priv(indio_dev);
251*4882a593Smuzhiyun u8 zone;
252*4882a593Smuzhiyun int ret;
253*4882a593Smuzhiyun
254*4882a593Smuzhiyun /* Clear interrupt by reading the ALS zone register. */
255*4882a593Smuzhiyun ret = _lm3533_als_get_zone(indio_dev, &zone);
256*4882a593Smuzhiyun if (ret)
257*4882a593Smuzhiyun goto out;
258*4882a593Smuzhiyun
259*4882a593Smuzhiyun atomic_set(&als->zone, zone);
260*4882a593Smuzhiyun
261*4882a593Smuzhiyun iio_push_event(indio_dev,
262*4882a593Smuzhiyun IIO_UNMOD_EVENT_CODE(IIO_LIGHT,
263*4882a593Smuzhiyun 0,
264*4882a593Smuzhiyun IIO_EV_TYPE_THRESH,
265*4882a593Smuzhiyun IIO_EV_DIR_EITHER),
266*4882a593Smuzhiyun iio_get_time_ns(indio_dev));
267*4882a593Smuzhiyun out:
268*4882a593Smuzhiyun return IRQ_HANDLED;
269*4882a593Smuzhiyun }
270*4882a593Smuzhiyun
lm3533_als_set_int_mode(struct iio_dev * indio_dev,int enable)271*4882a593Smuzhiyun static int lm3533_als_set_int_mode(struct iio_dev *indio_dev, int enable)
272*4882a593Smuzhiyun {
273*4882a593Smuzhiyun struct lm3533_als *als = iio_priv(indio_dev);
274*4882a593Smuzhiyun u8 mask = LM3533_ALS_INT_ENABLE_MASK;
275*4882a593Smuzhiyun u8 val;
276*4882a593Smuzhiyun int ret;
277*4882a593Smuzhiyun
278*4882a593Smuzhiyun if (enable)
279*4882a593Smuzhiyun val = mask;
280*4882a593Smuzhiyun else
281*4882a593Smuzhiyun val = 0;
282*4882a593Smuzhiyun
283*4882a593Smuzhiyun ret = lm3533_update(als->lm3533, LM3533_REG_ALS_ZONE_INFO, val, mask);
284*4882a593Smuzhiyun if (ret) {
285*4882a593Smuzhiyun dev_err(&indio_dev->dev, "failed to set int mode %d\n",
286*4882a593Smuzhiyun enable);
287*4882a593Smuzhiyun return ret;
288*4882a593Smuzhiyun }
289*4882a593Smuzhiyun
290*4882a593Smuzhiyun return 0;
291*4882a593Smuzhiyun }
292*4882a593Smuzhiyun
lm3533_als_get_int_mode(struct iio_dev * indio_dev,int * enable)293*4882a593Smuzhiyun static int lm3533_als_get_int_mode(struct iio_dev *indio_dev, int *enable)
294*4882a593Smuzhiyun {
295*4882a593Smuzhiyun struct lm3533_als *als = iio_priv(indio_dev);
296*4882a593Smuzhiyun u8 mask = LM3533_ALS_INT_ENABLE_MASK;
297*4882a593Smuzhiyun u8 val;
298*4882a593Smuzhiyun int ret;
299*4882a593Smuzhiyun
300*4882a593Smuzhiyun ret = lm3533_read(als->lm3533, LM3533_REG_ALS_ZONE_INFO, &val);
301*4882a593Smuzhiyun if (ret) {
302*4882a593Smuzhiyun dev_err(&indio_dev->dev, "failed to get int mode\n");
303*4882a593Smuzhiyun return ret;
304*4882a593Smuzhiyun }
305*4882a593Smuzhiyun
306*4882a593Smuzhiyun *enable = !!(val & mask);
307*4882a593Smuzhiyun
308*4882a593Smuzhiyun return 0;
309*4882a593Smuzhiyun }
310*4882a593Smuzhiyun
lm3533_als_get_threshold_reg(unsigned nr,bool raising)311*4882a593Smuzhiyun static inline u8 lm3533_als_get_threshold_reg(unsigned nr, bool raising)
312*4882a593Smuzhiyun {
313*4882a593Smuzhiyun u8 offset = !raising;
314*4882a593Smuzhiyun
315*4882a593Smuzhiyun return LM3533_REG_ALS_BOUNDARY_BASE + 2 * nr + offset;
316*4882a593Smuzhiyun }
317*4882a593Smuzhiyun
lm3533_als_get_threshold(struct iio_dev * indio_dev,unsigned nr,bool raising,u8 * val)318*4882a593Smuzhiyun static int lm3533_als_get_threshold(struct iio_dev *indio_dev, unsigned nr,
319*4882a593Smuzhiyun bool raising, u8 *val)
320*4882a593Smuzhiyun {
321*4882a593Smuzhiyun struct lm3533_als *als = iio_priv(indio_dev);
322*4882a593Smuzhiyun u8 reg;
323*4882a593Smuzhiyun int ret;
324*4882a593Smuzhiyun
325*4882a593Smuzhiyun if (nr > LM3533_ALS_THRESH_MAX)
326*4882a593Smuzhiyun return -EINVAL;
327*4882a593Smuzhiyun
328*4882a593Smuzhiyun reg = lm3533_als_get_threshold_reg(nr, raising);
329*4882a593Smuzhiyun ret = lm3533_read(als->lm3533, reg, val);
330*4882a593Smuzhiyun if (ret)
331*4882a593Smuzhiyun dev_err(&indio_dev->dev, "failed to get threshold\n");
332*4882a593Smuzhiyun
333*4882a593Smuzhiyun return ret;
334*4882a593Smuzhiyun }
335*4882a593Smuzhiyun
lm3533_als_set_threshold(struct iio_dev * indio_dev,unsigned nr,bool raising,u8 val)336*4882a593Smuzhiyun static int lm3533_als_set_threshold(struct iio_dev *indio_dev, unsigned nr,
337*4882a593Smuzhiyun bool raising, u8 val)
338*4882a593Smuzhiyun {
339*4882a593Smuzhiyun struct lm3533_als *als = iio_priv(indio_dev);
340*4882a593Smuzhiyun u8 val2;
341*4882a593Smuzhiyun u8 reg, reg2;
342*4882a593Smuzhiyun int ret;
343*4882a593Smuzhiyun
344*4882a593Smuzhiyun if (nr > LM3533_ALS_THRESH_MAX)
345*4882a593Smuzhiyun return -EINVAL;
346*4882a593Smuzhiyun
347*4882a593Smuzhiyun reg = lm3533_als_get_threshold_reg(nr, raising);
348*4882a593Smuzhiyun reg2 = lm3533_als_get_threshold_reg(nr, !raising);
349*4882a593Smuzhiyun
350*4882a593Smuzhiyun mutex_lock(&als->thresh_mutex);
351*4882a593Smuzhiyun ret = lm3533_read(als->lm3533, reg2, &val2);
352*4882a593Smuzhiyun if (ret) {
353*4882a593Smuzhiyun dev_err(&indio_dev->dev, "failed to get threshold\n");
354*4882a593Smuzhiyun goto out;
355*4882a593Smuzhiyun }
356*4882a593Smuzhiyun /*
357*4882a593Smuzhiyun * This device does not allow negative hysteresis (in fact, it uses
358*4882a593Smuzhiyun * whichever value is smaller as the lower bound) so we need to make
359*4882a593Smuzhiyun * sure that thresh_falling <= thresh_raising.
360*4882a593Smuzhiyun */
361*4882a593Smuzhiyun if ((raising && (val < val2)) || (!raising && (val > val2))) {
362*4882a593Smuzhiyun ret = -EINVAL;
363*4882a593Smuzhiyun goto out;
364*4882a593Smuzhiyun }
365*4882a593Smuzhiyun
366*4882a593Smuzhiyun ret = lm3533_write(als->lm3533, reg, val);
367*4882a593Smuzhiyun if (ret) {
368*4882a593Smuzhiyun dev_err(&indio_dev->dev, "failed to set threshold\n");
369*4882a593Smuzhiyun goto out;
370*4882a593Smuzhiyun }
371*4882a593Smuzhiyun out:
372*4882a593Smuzhiyun mutex_unlock(&als->thresh_mutex);
373*4882a593Smuzhiyun
374*4882a593Smuzhiyun return ret;
375*4882a593Smuzhiyun }
376*4882a593Smuzhiyun
lm3533_als_get_hysteresis(struct iio_dev * indio_dev,unsigned nr,u8 * val)377*4882a593Smuzhiyun static int lm3533_als_get_hysteresis(struct iio_dev *indio_dev, unsigned nr,
378*4882a593Smuzhiyun u8 *val)
379*4882a593Smuzhiyun {
380*4882a593Smuzhiyun struct lm3533_als *als = iio_priv(indio_dev);
381*4882a593Smuzhiyun u8 falling;
382*4882a593Smuzhiyun u8 raising;
383*4882a593Smuzhiyun int ret;
384*4882a593Smuzhiyun
385*4882a593Smuzhiyun if (nr > LM3533_ALS_THRESH_MAX)
386*4882a593Smuzhiyun return -EINVAL;
387*4882a593Smuzhiyun
388*4882a593Smuzhiyun mutex_lock(&als->thresh_mutex);
389*4882a593Smuzhiyun ret = lm3533_als_get_threshold(indio_dev, nr, false, &falling);
390*4882a593Smuzhiyun if (ret)
391*4882a593Smuzhiyun goto out;
392*4882a593Smuzhiyun ret = lm3533_als_get_threshold(indio_dev, nr, true, &raising);
393*4882a593Smuzhiyun if (ret)
394*4882a593Smuzhiyun goto out;
395*4882a593Smuzhiyun
396*4882a593Smuzhiyun *val = raising - falling;
397*4882a593Smuzhiyun out:
398*4882a593Smuzhiyun mutex_unlock(&als->thresh_mutex);
399*4882a593Smuzhiyun
400*4882a593Smuzhiyun return ret;
401*4882a593Smuzhiyun }
402*4882a593Smuzhiyun
show_thresh_either_en(struct device * dev,struct device_attribute * attr,char * buf)403*4882a593Smuzhiyun static ssize_t show_thresh_either_en(struct device *dev,
404*4882a593Smuzhiyun struct device_attribute *attr,
405*4882a593Smuzhiyun char *buf)
406*4882a593Smuzhiyun {
407*4882a593Smuzhiyun struct iio_dev *indio_dev = dev_to_iio_dev(dev);
408*4882a593Smuzhiyun struct lm3533_als *als = iio_priv(indio_dev);
409*4882a593Smuzhiyun int enable;
410*4882a593Smuzhiyun int ret;
411*4882a593Smuzhiyun
412*4882a593Smuzhiyun if (als->irq) {
413*4882a593Smuzhiyun ret = lm3533_als_get_int_mode(indio_dev, &enable);
414*4882a593Smuzhiyun if (ret)
415*4882a593Smuzhiyun return ret;
416*4882a593Smuzhiyun } else {
417*4882a593Smuzhiyun enable = 0;
418*4882a593Smuzhiyun }
419*4882a593Smuzhiyun
420*4882a593Smuzhiyun return scnprintf(buf, PAGE_SIZE, "%u\n", enable);
421*4882a593Smuzhiyun }
422*4882a593Smuzhiyun
store_thresh_either_en(struct device * dev,struct device_attribute * attr,const char * buf,size_t len)423*4882a593Smuzhiyun static ssize_t store_thresh_either_en(struct device *dev,
424*4882a593Smuzhiyun struct device_attribute *attr,
425*4882a593Smuzhiyun const char *buf, size_t len)
426*4882a593Smuzhiyun {
427*4882a593Smuzhiyun struct iio_dev *indio_dev = dev_to_iio_dev(dev);
428*4882a593Smuzhiyun struct lm3533_als *als = iio_priv(indio_dev);
429*4882a593Smuzhiyun unsigned long enable;
430*4882a593Smuzhiyun bool int_enabled;
431*4882a593Smuzhiyun u8 zone;
432*4882a593Smuzhiyun int ret;
433*4882a593Smuzhiyun
434*4882a593Smuzhiyun if (!als->irq)
435*4882a593Smuzhiyun return -EBUSY;
436*4882a593Smuzhiyun
437*4882a593Smuzhiyun if (kstrtoul(buf, 0, &enable))
438*4882a593Smuzhiyun return -EINVAL;
439*4882a593Smuzhiyun
440*4882a593Smuzhiyun int_enabled = test_bit(LM3533_ALS_FLAG_INT_ENABLED, &als->flags);
441*4882a593Smuzhiyun
442*4882a593Smuzhiyun if (enable && !int_enabled) {
443*4882a593Smuzhiyun ret = lm3533_als_get_zone(indio_dev, &zone);
444*4882a593Smuzhiyun if (ret)
445*4882a593Smuzhiyun return ret;
446*4882a593Smuzhiyun
447*4882a593Smuzhiyun atomic_set(&als->zone, zone);
448*4882a593Smuzhiyun
449*4882a593Smuzhiyun set_bit(LM3533_ALS_FLAG_INT_ENABLED, &als->flags);
450*4882a593Smuzhiyun }
451*4882a593Smuzhiyun
452*4882a593Smuzhiyun ret = lm3533_als_set_int_mode(indio_dev, enable);
453*4882a593Smuzhiyun if (ret) {
454*4882a593Smuzhiyun if (!int_enabled)
455*4882a593Smuzhiyun clear_bit(LM3533_ALS_FLAG_INT_ENABLED, &als->flags);
456*4882a593Smuzhiyun
457*4882a593Smuzhiyun return ret;
458*4882a593Smuzhiyun }
459*4882a593Smuzhiyun
460*4882a593Smuzhiyun if (!enable)
461*4882a593Smuzhiyun clear_bit(LM3533_ALS_FLAG_INT_ENABLED, &als->flags);
462*4882a593Smuzhiyun
463*4882a593Smuzhiyun return len;
464*4882a593Smuzhiyun }
465*4882a593Smuzhiyun
show_zone(struct device * dev,struct device_attribute * attr,char * buf)466*4882a593Smuzhiyun static ssize_t show_zone(struct device *dev,
467*4882a593Smuzhiyun struct device_attribute *attr, char *buf)
468*4882a593Smuzhiyun {
469*4882a593Smuzhiyun struct iio_dev *indio_dev = dev_to_iio_dev(dev);
470*4882a593Smuzhiyun u8 zone;
471*4882a593Smuzhiyun int ret;
472*4882a593Smuzhiyun
473*4882a593Smuzhiyun ret = lm3533_als_get_zone(indio_dev, &zone);
474*4882a593Smuzhiyun if (ret)
475*4882a593Smuzhiyun return ret;
476*4882a593Smuzhiyun
477*4882a593Smuzhiyun return scnprintf(buf, PAGE_SIZE, "%u\n", zone);
478*4882a593Smuzhiyun }
479*4882a593Smuzhiyun
480*4882a593Smuzhiyun enum lm3533_als_attribute_type {
481*4882a593Smuzhiyun LM3533_ATTR_TYPE_HYSTERESIS,
482*4882a593Smuzhiyun LM3533_ATTR_TYPE_TARGET,
483*4882a593Smuzhiyun LM3533_ATTR_TYPE_THRESH_FALLING,
484*4882a593Smuzhiyun LM3533_ATTR_TYPE_THRESH_RAISING,
485*4882a593Smuzhiyun };
486*4882a593Smuzhiyun
487*4882a593Smuzhiyun struct lm3533_als_attribute {
488*4882a593Smuzhiyun struct device_attribute dev_attr;
489*4882a593Smuzhiyun enum lm3533_als_attribute_type type;
490*4882a593Smuzhiyun u8 val1;
491*4882a593Smuzhiyun u8 val2;
492*4882a593Smuzhiyun };
493*4882a593Smuzhiyun
494*4882a593Smuzhiyun static inline struct lm3533_als_attribute *
to_lm3533_als_attr(struct device_attribute * attr)495*4882a593Smuzhiyun to_lm3533_als_attr(struct device_attribute *attr)
496*4882a593Smuzhiyun {
497*4882a593Smuzhiyun return container_of(attr, struct lm3533_als_attribute, dev_attr);
498*4882a593Smuzhiyun }
499*4882a593Smuzhiyun
show_als_attr(struct device * dev,struct device_attribute * attr,char * buf)500*4882a593Smuzhiyun static ssize_t show_als_attr(struct device *dev,
501*4882a593Smuzhiyun struct device_attribute *attr,
502*4882a593Smuzhiyun char *buf)
503*4882a593Smuzhiyun {
504*4882a593Smuzhiyun struct iio_dev *indio_dev = dev_to_iio_dev(dev);
505*4882a593Smuzhiyun struct lm3533_als_attribute *als_attr = to_lm3533_als_attr(attr);
506*4882a593Smuzhiyun u8 val;
507*4882a593Smuzhiyun int ret;
508*4882a593Smuzhiyun
509*4882a593Smuzhiyun switch (als_attr->type) {
510*4882a593Smuzhiyun case LM3533_ATTR_TYPE_HYSTERESIS:
511*4882a593Smuzhiyun ret = lm3533_als_get_hysteresis(indio_dev, als_attr->val1,
512*4882a593Smuzhiyun &val);
513*4882a593Smuzhiyun break;
514*4882a593Smuzhiyun case LM3533_ATTR_TYPE_TARGET:
515*4882a593Smuzhiyun ret = lm3533_als_get_target(indio_dev, als_attr->val1,
516*4882a593Smuzhiyun als_attr->val2, &val);
517*4882a593Smuzhiyun break;
518*4882a593Smuzhiyun case LM3533_ATTR_TYPE_THRESH_FALLING:
519*4882a593Smuzhiyun ret = lm3533_als_get_threshold(indio_dev, als_attr->val1,
520*4882a593Smuzhiyun false, &val);
521*4882a593Smuzhiyun break;
522*4882a593Smuzhiyun case LM3533_ATTR_TYPE_THRESH_RAISING:
523*4882a593Smuzhiyun ret = lm3533_als_get_threshold(indio_dev, als_attr->val1,
524*4882a593Smuzhiyun true, &val);
525*4882a593Smuzhiyun break;
526*4882a593Smuzhiyun default:
527*4882a593Smuzhiyun ret = -ENXIO;
528*4882a593Smuzhiyun }
529*4882a593Smuzhiyun
530*4882a593Smuzhiyun if (ret)
531*4882a593Smuzhiyun return ret;
532*4882a593Smuzhiyun
533*4882a593Smuzhiyun return scnprintf(buf, PAGE_SIZE, "%u\n", val);
534*4882a593Smuzhiyun }
535*4882a593Smuzhiyun
store_als_attr(struct device * dev,struct device_attribute * attr,const char * buf,size_t len)536*4882a593Smuzhiyun static ssize_t store_als_attr(struct device *dev,
537*4882a593Smuzhiyun struct device_attribute *attr,
538*4882a593Smuzhiyun const char *buf, size_t len)
539*4882a593Smuzhiyun {
540*4882a593Smuzhiyun struct iio_dev *indio_dev = dev_to_iio_dev(dev);
541*4882a593Smuzhiyun struct lm3533_als_attribute *als_attr = to_lm3533_als_attr(attr);
542*4882a593Smuzhiyun u8 val;
543*4882a593Smuzhiyun int ret;
544*4882a593Smuzhiyun
545*4882a593Smuzhiyun if (kstrtou8(buf, 0, &val))
546*4882a593Smuzhiyun return -EINVAL;
547*4882a593Smuzhiyun
548*4882a593Smuzhiyun switch (als_attr->type) {
549*4882a593Smuzhiyun case LM3533_ATTR_TYPE_TARGET:
550*4882a593Smuzhiyun ret = lm3533_als_set_target(indio_dev, als_attr->val1,
551*4882a593Smuzhiyun als_attr->val2, val);
552*4882a593Smuzhiyun break;
553*4882a593Smuzhiyun case LM3533_ATTR_TYPE_THRESH_FALLING:
554*4882a593Smuzhiyun ret = lm3533_als_set_threshold(indio_dev, als_attr->val1,
555*4882a593Smuzhiyun false, val);
556*4882a593Smuzhiyun break;
557*4882a593Smuzhiyun case LM3533_ATTR_TYPE_THRESH_RAISING:
558*4882a593Smuzhiyun ret = lm3533_als_set_threshold(indio_dev, als_attr->val1,
559*4882a593Smuzhiyun true, val);
560*4882a593Smuzhiyun break;
561*4882a593Smuzhiyun default:
562*4882a593Smuzhiyun ret = -ENXIO;
563*4882a593Smuzhiyun }
564*4882a593Smuzhiyun
565*4882a593Smuzhiyun if (ret)
566*4882a593Smuzhiyun return ret;
567*4882a593Smuzhiyun
568*4882a593Smuzhiyun return len;
569*4882a593Smuzhiyun }
570*4882a593Smuzhiyun
571*4882a593Smuzhiyun #define ALS_ATTR(_name, _mode, _show, _store, _type, _val1, _val2) \
572*4882a593Smuzhiyun { .dev_attr = __ATTR(_name, _mode, _show, _store), \
573*4882a593Smuzhiyun .type = _type, \
574*4882a593Smuzhiyun .val1 = _val1, \
575*4882a593Smuzhiyun .val2 = _val2 }
576*4882a593Smuzhiyun
577*4882a593Smuzhiyun #define LM3533_ALS_ATTR(_name, _mode, _show, _store, _type, _val1, _val2) \
578*4882a593Smuzhiyun struct lm3533_als_attribute lm3533_als_attr_##_name = \
579*4882a593Smuzhiyun ALS_ATTR(_name, _mode, _show, _store, _type, _val1, _val2)
580*4882a593Smuzhiyun
581*4882a593Smuzhiyun #define ALS_TARGET_ATTR_RW(_channel, _zone) \
582*4882a593Smuzhiyun LM3533_ALS_ATTR(out_current##_channel##_current##_zone##_raw, \
583*4882a593Smuzhiyun S_IRUGO | S_IWUSR, \
584*4882a593Smuzhiyun show_als_attr, store_als_attr, \
585*4882a593Smuzhiyun LM3533_ATTR_TYPE_TARGET, _channel, _zone)
586*4882a593Smuzhiyun /*
587*4882a593Smuzhiyun * ALS output current values (ALS mapper targets)
588*4882a593Smuzhiyun *
589*4882a593Smuzhiyun * out_current[0-2]_current[0-4]_raw 0-255
590*4882a593Smuzhiyun */
591*4882a593Smuzhiyun static ALS_TARGET_ATTR_RW(0, 0);
592*4882a593Smuzhiyun static ALS_TARGET_ATTR_RW(0, 1);
593*4882a593Smuzhiyun static ALS_TARGET_ATTR_RW(0, 2);
594*4882a593Smuzhiyun static ALS_TARGET_ATTR_RW(0, 3);
595*4882a593Smuzhiyun static ALS_TARGET_ATTR_RW(0, 4);
596*4882a593Smuzhiyun
597*4882a593Smuzhiyun static ALS_TARGET_ATTR_RW(1, 0);
598*4882a593Smuzhiyun static ALS_TARGET_ATTR_RW(1, 1);
599*4882a593Smuzhiyun static ALS_TARGET_ATTR_RW(1, 2);
600*4882a593Smuzhiyun static ALS_TARGET_ATTR_RW(1, 3);
601*4882a593Smuzhiyun static ALS_TARGET_ATTR_RW(1, 4);
602*4882a593Smuzhiyun
603*4882a593Smuzhiyun static ALS_TARGET_ATTR_RW(2, 0);
604*4882a593Smuzhiyun static ALS_TARGET_ATTR_RW(2, 1);
605*4882a593Smuzhiyun static ALS_TARGET_ATTR_RW(2, 2);
606*4882a593Smuzhiyun static ALS_TARGET_ATTR_RW(2, 3);
607*4882a593Smuzhiyun static ALS_TARGET_ATTR_RW(2, 4);
608*4882a593Smuzhiyun
609*4882a593Smuzhiyun #define ALS_THRESH_FALLING_ATTR_RW(_nr) \
610*4882a593Smuzhiyun LM3533_ALS_ATTR(in_illuminance0_thresh##_nr##_falling_value, \
611*4882a593Smuzhiyun S_IRUGO | S_IWUSR, \
612*4882a593Smuzhiyun show_als_attr, store_als_attr, \
613*4882a593Smuzhiyun LM3533_ATTR_TYPE_THRESH_FALLING, _nr, 0)
614*4882a593Smuzhiyun
615*4882a593Smuzhiyun #define ALS_THRESH_RAISING_ATTR_RW(_nr) \
616*4882a593Smuzhiyun LM3533_ALS_ATTR(in_illuminance0_thresh##_nr##_raising_value, \
617*4882a593Smuzhiyun S_IRUGO | S_IWUSR, \
618*4882a593Smuzhiyun show_als_attr, store_als_attr, \
619*4882a593Smuzhiyun LM3533_ATTR_TYPE_THRESH_RAISING, _nr, 0)
620*4882a593Smuzhiyun /*
621*4882a593Smuzhiyun * ALS Zone thresholds (boundaries)
622*4882a593Smuzhiyun *
623*4882a593Smuzhiyun * in_illuminance0_thresh[0-3]_falling_value 0-255
624*4882a593Smuzhiyun * in_illuminance0_thresh[0-3]_raising_value 0-255
625*4882a593Smuzhiyun */
626*4882a593Smuzhiyun static ALS_THRESH_FALLING_ATTR_RW(0);
627*4882a593Smuzhiyun static ALS_THRESH_FALLING_ATTR_RW(1);
628*4882a593Smuzhiyun static ALS_THRESH_FALLING_ATTR_RW(2);
629*4882a593Smuzhiyun static ALS_THRESH_FALLING_ATTR_RW(3);
630*4882a593Smuzhiyun
631*4882a593Smuzhiyun static ALS_THRESH_RAISING_ATTR_RW(0);
632*4882a593Smuzhiyun static ALS_THRESH_RAISING_ATTR_RW(1);
633*4882a593Smuzhiyun static ALS_THRESH_RAISING_ATTR_RW(2);
634*4882a593Smuzhiyun static ALS_THRESH_RAISING_ATTR_RW(3);
635*4882a593Smuzhiyun
636*4882a593Smuzhiyun #define ALS_HYSTERESIS_ATTR_RO(_nr) \
637*4882a593Smuzhiyun LM3533_ALS_ATTR(in_illuminance0_thresh##_nr##_hysteresis, \
638*4882a593Smuzhiyun S_IRUGO, show_als_attr, NULL, \
639*4882a593Smuzhiyun LM3533_ATTR_TYPE_HYSTERESIS, _nr, 0)
640*4882a593Smuzhiyun /*
641*4882a593Smuzhiyun * ALS Zone threshold hysteresis
642*4882a593Smuzhiyun *
643*4882a593Smuzhiyun * threshY_hysteresis = threshY_raising - threshY_falling
644*4882a593Smuzhiyun *
645*4882a593Smuzhiyun * in_illuminance0_thresh[0-3]_hysteresis 0-255
646*4882a593Smuzhiyun * in_illuminance0_thresh[0-3]_hysteresis 0-255
647*4882a593Smuzhiyun */
648*4882a593Smuzhiyun static ALS_HYSTERESIS_ATTR_RO(0);
649*4882a593Smuzhiyun static ALS_HYSTERESIS_ATTR_RO(1);
650*4882a593Smuzhiyun static ALS_HYSTERESIS_ATTR_RO(2);
651*4882a593Smuzhiyun static ALS_HYSTERESIS_ATTR_RO(3);
652*4882a593Smuzhiyun
653*4882a593Smuzhiyun #define ILLUMINANCE_ATTR_RO(_name) \
654*4882a593Smuzhiyun DEVICE_ATTR(in_illuminance0_##_name, S_IRUGO, show_##_name, NULL)
655*4882a593Smuzhiyun #define ILLUMINANCE_ATTR_RW(_name) \
656*4882a593Smuzhiyun DEVICE_ATTR(in_illuminance0_##_name, S_IRUGO | S_IWUSR, \
657*4882a593Smuzhiyun show_##_name, store_##_name)
658*4882a593Smuzhiyun /*
659*4882a593Smuzhiyun * ALS Zone threshold-event enable
660*4882a593Smuzhiyun *
661*4882a593Smuzhiyun * in_illuminance0_thresh_either_en 0,1
662*4882a593Smuzhiyun */
663*4882a593Smuzhiyun static ILLUMINANCE_ATTR_RW(thresh_either_en);
664*4882a593Smuzhiyun
665*4882a593Smuzhiyun /*
666*4882a593Smuzhiyun * ALS Current Zone
667*4882a593Smuzhiyun *
668*4882a593Smuzhiyun * in_illuminance0_zone 0-4
669*4882a593Smuzhiyun */
670*4882a593Smuzhiyun static ILLUMINANCE_ATTR_RO(zone);
671*4882a593Smuzhiyun
672*4882a593Smuzhiyun static struct attribute *lm3533_als_event_attributes[] = {
673*4882a593Smuzhiyun &dev_attr_in_illuminance0_thresh_either_en.attr,
674*4882a593Smuzhiyun &lm3533_als_attr_in_illuminance0_thresh0_falling_value.dev_attr.attr,
675*4882a593Smuzhiyun &lm3533_als_attr_in_illuminance0_thresh0_hysteresis.dev_attr.attr,
676*4882a593Smuzhiyun &lm3533_als_attr_in_illuminance0_thresh0_raising_value.dev_attr.attr,
677*4882a593Smuzhiyun &lm3533_als_attr_in_illuminance0_thresh1_falling_value.dev_attr.attr,
678*4882a593Smuzhiyun &lm3533_als_attr_in_illuminance0_thresh1_hysteresis.dev_attr.attr,
679*4882a593Smuzhiyun &lm3533_als_attr_in_illuminance0_thresh1_raising_value.dev_attr.attr,
680*4882a593Smuzhiyun &lm3533_als_attr_in_illuminance0_thresh2_falling_value.dev_attr.attr,
681*4882a593Smuzhiyun &lm3533_als_attr_in_illuminance0_thresh2_hysteresis.dev_attr.attr,
682*4882a593Smuzhiyun &lm3533_als_attr_in_illuminance0_thresh2_raising_value.dev_attr.attr,
683*4882a593Smuzhiyun &lm3533_als_attr_in_illuminance0_thresh3_falling_value.dev_attr.attr,
684*4882a593Smuzhiyun &lm3533_als_attr_in_illuminance0_thresh3_hysteresis.dev_attr.attr,
685*4882a593Smuzhiyun &lm3533_als_attr_in_illuminance0_thresh3_raising_value.dev_attr.attr,
686*4882a593Smuzhiyun NULL
687*4882a593Smuzhiyun };
688*4882a593Smuzhiyun
689*4882a593Smuzhiyun static const struct attribute_group lm3533_als_event_attribute_group = {
690*4882a593Smuzhiyun .attrs = lm3533_als_event_attributes
691*4882a593Smuzhiyun };
692*4882a593Smuzhiyun
693*4882a593Smuzhiyun static struct attribute *lm3533_als_attributes[] = {
694*4882a593Smuzhiyun &dev_attr_in_illuminance0_zone.attr,
695*4882a593Smuzhiyun &lm3533_als_attr_out_current0_current0_raw.dev_attr.attr,
696*4882a593Smuzhiyun &lm3533_als_attr_out_current0_current1_raw.dev_attr.attr,
697*4882a593Smuzhiyun &lm3533_als_attr_out_current0_current2_raw.dev_attr.attr,
698*4882a593Smuzhiyun &lm3533_als_attr_out_current0_current3_raw.dev_attr.attr,
699*4882a593Smuzhiyun &lm3533_als_attr_out_current0_current4_raw.dev_attr.attr,
700*4882a593Smuzhiyun &lm3533_als_attr_out_current1_current0_raw.dev_attr.attr,
701*4882a593Smuzhiyun &lm3533_als_attr_out_current1_current1_raw.dev_attr.attr,
702*4882a593Smuzhiyun &lm3533_als_attr_out_current1_current2_raw.dev_attr.attr,
703*4882a593Smuzhiyun &lm3533_als_attr_out_current1_current3_raw.dev_attr.attr,
704*4882a593Smuzhiyun &lm3533_als_attr_out_current1_current4_raw.dev_attr.attr,
705*4882a593Smuzhiyun &lm3533_als_attr_out_current2_current0_raw.dev_attr.attr,
706*4882a593Smuzhiyun &lm3533_als_attr_out_current2_current1_raw.dev_attr.attr,
707*4882a593Smuzhiyun &lm3533_als_attr_out_current2_current2_raw.dev_attr.attr,
708*4882a593Smuzhiyun &lm3533_als_attr_out_current2_current3_raw.dev_attr.attr,
709*4882a593Smuzhiyun &lm3533_als_attr_out_current2_current4_raw.dev_attr.attr,
710*4882a593Smuzhiyun NULL
711*4882a593Smuzhiyun };
712*4882a593Smuzhiyun
713*4882a593Smuzhiyun static const struct attribute_group lm3533_als_attribute_group = {
714*4882a593Smuzhiyun .attrs = lm3533_als_attributes
715*4882a593Smuzhiyun };
716*4882a593Smuzhiyun
lm3533_als_set_input_mode(struct lm3533_als * als,bool pwm_mode)717*4882a593Smuzhiyun static int lm3533_als_set_input_mode(struct lm3533_als *als, bool pwm_mode)
718*4882a593Smuzhiyun {
719*4882a593Smuzhiyun u8 mask = LM3533_ALS_INPUT_MODE_MASK;
720*4882a593Smuzhiyun u8 val;
721*4882a593Smuzhiyun int ret;
722*4882a593Smuzhiyun
723*4882a593Smuzhiyun if (pwm_mode)
724*4882a593Smuzhiyun val = mask; /* pwm input */
725*4882a593Smuzhiyun else
726*4882a593Smuzhiyun val = 0; /* analog input */
727*4882a593Smuzhiyun
728*4882a593Smuzhiyun ret = lm3533_update(als->lm3533, LM3533_REG_ALS_CONF, val, mask);
729*4882a593Smuzhiyun if (ret) {
730*4882a593Smuzhiyun dev_err(&als->pdev->dev, "failed to set input mode %d\n",
731*4882a593Smuzhiyun pwm_mode);
732*4882a593Smuzhiyun return ret;
733*4882a593Smuzhiyun }
734*4882a593Smuzhiyun
735*4882a593Smuzhiyun return 0;
736*4882a593Smuzhiyun }
737*4882a593Smuzhiyun
lm3533_als_set_resistor(struct lm3533_als * als,u8 val)738*4882a593Smuzhiyun static int lm3533_als_set_resistor(struct lm3533_als *als, u8 val)
739*4882a593Smuzhiyun {
740*4882a593Smuzhiyun int ret;
741*4882a593Smuzhiyun
742*4882a593Smuzhiyun if (val < LM3533_ALS_RESISTOR_MIN || val > LM3533_ALS_RESISTOR_MAX) {
743*4882a593Smuzhiyun dev_err(&als->pdev->dev, "invalid resistor value\n");
744*4882a593Smuzhiyun return -EINVAL;
745*4882a593Smuzhiyun }
746*4882a593Smuzhiyun
747*4882a593Smuzhiyun ret = lm3533_write(als->lm3533, LM3533_REG_ALS_RESISTOR_SELECT, val);
748*4882a593Smuzhiyun if (ret) {
749*4882a593Smuzhiyun dev_err(&als->pdev->dev, "failed to set resistor\n");
750*4882a593Smuzhiyun return ret;
751*4882a593Smuzhiyun }
752*4882a593Smuzhiyun
753*4882a593Smuzhiyun return 0;
754*4882a593Smuzhiyun }
755*4882a593Smuzhiyun
lm3533_als_setup(struct lm3533_als * als,struct lm3533_als_platform_data * pdata)756*4882a593Smuzhiyun static int lm3533_als_setup(struct lm3533_als *als,
757*4882a593Smuzhiyun struct lm3533_als_platform_data *pdata)
758*4882a593Smuzhiyun {
759*4882a593Smuzhiyun int ret;
760*4882a593Smuzhiyun
761*4882a593Smuzhiyun ret = lm3533_als_set_input_mode(als, pdata->pwm_mode);
762*4882a593Smuzhiyun if (ret)
763*4882a593Smuzhiyun return ret;
764*4882a593Smuzhiyun
765*4882a593Smuzhiyun /* ALS input is always high impedance in PWM-mode. */
766*4882a593Smuzhiyun if (!pdata->pwm_mode) {
767*4882a593Smuzhiyun ret = lm3533_als_set_resistor(als, pdata->r_select);
768*4882a593Smuzhiyun if (ret)
769*4882a593Smuzhiyun return ret;
770*4882a593Smuzhiyun }
771*4882a593Smuzhiyun
772*4882a593Smuzhiyun return 0;
773*4882a593Smuzhiyun }
774*4882a593Smuzhiyun
lm3533_als_setup_irq(struct lm3533_als * als,void * dev)775*4882a593Smuzhiyun static int lm3533_als_setup_irq(struct lm3533_als *als, void *dev)
776*4882a593Smuzhiyun {
777*4882a593Smuzhiyun u8 mask = LM3533_ALS_INT_ENABLE_MASK;
778*4882a593Smuzhiyun int ret;
779*4882a593Smuzhiyun
780*4882a593Smuzhiyun /* Make sure interrupts are disabled. */
781*4882a593Smuzhiyun ret = lm3533_update(als->lm3533, LM3533_REG_ALS_ZONE_INFO, 0, mask);
782*4882a593Smuzhiyun if (ret) {
783*4882a593Smuzhiyun dev_err(&als->pdev->dev, "failed to disable interrupts\n");
784*4882a593Smuzhiyun return ret;
785*4882a593Smuzhiyun }
786*4882a593Smuzhiyun
787*4882a593Smuzhiyun ret = request_threaded_irq(als->irq, NULL, lm3533_als_isr,
788*4882a593Smuzhiyun IRQF_TRIGGER_LOW | IRQF_ONESHOT,
789*4882a593Smuzhiyun dev_name(&als->pdev->dev), dev);
790*4882a593Smuzhiyun if (ret) {
791*4882a593Smuzhiyun dev_err(&als->pdev->dev, "failed to request irq %d\n",
792*4882a593Smuzhiyun als->irq);
793*4882a593Smuzhiyun return ret;
794*4882a593Smuzhiyun }
795*4882a593Smuzhiyun
796*4882a593Smuzhiyun return 0;
797*4882a593Smuzhiyun }
798*4882a593Smuzhiyun
lm3533_als_enable(struct lm3533_als * als)799*4882a593Smuzhiyun static int lm3533_als_enable(struct lm3533_als *als)
800*4882a593Smuzhiyun {
801*4882a593Smuzhiyun u8 mask = LM3533_ALS_ENABLE_MASK;
802*4882a593Smuzhiyun int ret;
803*4882a593Smuzhiyun
804*4882a593Smuzhiyun ret = lm3533_update(als->lm3533, LM3533_REG_ALS_CONF, mask, mask);
805*4882a593Smuzhiyun if (ret)
806*4882a593Smuzhiyun dev_err(&als->pdev->dev, "failed to enable ALS\n");
807*4882a593Smuzhiyun
808*4882a593Smuzhiyun return ret;
809*4882a593Smuzhiyun }
810*4882a593Smuzhiyun
lm3533_als_disable(struct lm3533_als * als)811*4882a593Smuzhiyun static int lm3533_als_disable(struct lm3533_als *als)
812*4882a593Smuzhiyun {
813*4882a593Smuzhiyun u8 mask = LM3533_ALS_ENABLE_MASK;
814*4882a593Smuzhiyun int ret;
815*4882a593Smuzhiyun
816*4882a593Smuzhiyun ret = lm3533_update(als->lm3533, LM3533_REG_ALS_CONF, 0, mask);
817*4882a593Smuzhiyun if (ret)
818*4882a593Smuzhiyun dev_err(&als->pdev->dev, "failed to disable ALS\n");
819*4882a593Smuzhiyun
820*4882a593Smuzhiyun return ret;
821*4882a593Smuzhiyun }
822*4882a593Smuzhiyun
823*4882a593Smuzhiyun static const struct iio_info lm3533_als_info = {
824*4882a593Smuzhiyun .attrs = &lm3533_als_attribute_group,
825*4882a593Smuzhiyun .event_attrs = &lm3533_als_event_attribute_group,
826*4882a593Smuzhiyun .read_raw = &lm3533_als_read_raw,
827*4882a593Smuzhiyun };
828*4882a593Smuzhiyun
lm3533_als_probe(struct platform_device * pdev)829*4882a593Smuzhiyun static int lm3533_als_probe(struct platform_device *pdev)
830*4882a593Smuzhiyun {
831*4882a593Smuzhiyun struct lm3533 *lm3533;
832*4882a593Smuzhiyun struct lm3533_als_platform_data *pdata;
833*4882a593Smuzhiyun struct lm3533_als *als;
834*4882a593Smuzhiyun struct iio_dev *indio_dev;
835*4882a593Smuzhiyun int ret;
836*4882a593Smuzhiyun
837*4882a593Smuzhiyun lm3533 = dev_get_drvdata(pdev->dev.parent);
838*4882a593Smuzhiyun if (!lm3533)
839*4882a593Smuzhiyun return -EINVAL;
840*4882a593Smuzhiyun
841*4882a593Smuzhiyun pdata = pdev->dev.platform_data;
842*4882a593Smuzhiyun if (!pdata) {
843*4882a593Smuzhiyun dev_err(&pdev->dev, "no platform data\n");
844*4882a593Smuzhiyun return -EINVAL;
845*4882a593Smuzhiyun }
846*4882a593Smuzhiyun
847*4882a593Smuzhiyun indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*als));
848*4882a593Smuzhiyun if (!indio_dev)
849*4882a593Smuzhiyun return -ENOMEM;
850*4882a593Smuzhiyun
851*4882a593Smuzhiyun indio_dev->info = &lm3533_als_info;
852*4882a593Smuzhiyun indio_dev->channels = lm3533_als_channels;
853*4882a593Smuzhiyun indio_dev->num_channels = ARRAY_SIZE(lm3533_als_channels);
854*4882a593Smuzhiyun indio_dev->name = dev_name(&pdev->dev);
855*4882a593Smuzhiyun iio_device_set_parent(indio_dev, pdev->dev.parent);
856*4882a593Smuzhiyun indio_dev->modes = INDIO_DIRECT_MODE;
857*4882a593Smuzhiyun
858*4882a593Smuzhiyun als = iio_priv(indio_dev);
859*4882a593Smuzhiyun als->lm3533 = lm3533;
860*4882a593Smuzhiyun als->pdev = pdev;
861*4882a593Smuzhiyun als->irq = lm3533->irq;
862*4882a593Smuzhiyun atomic_set(&als->zone, 0);
863*4882a593Smuzhiyun mutex_init(&als->thresh_mutex);
864*4882a593Smuzhiyun
865*4882a593Smuzhiyun platform_set_drvdata(pdev, indio_dev);
866*4882a593Smuzhiyun
867*4882a593Smuzhiyun if (als->irq) {
868*4882a593Smuzhiyun ret = lm3533_als_setup_irq(als, indio_dev);
869*4882a593Smuzhiyun if (ret)
870*4882a593Smuzhiyun return ret;
871*4882a593Smuzhiyun }
872*4882a593Smuzhiyun
873*4882a593Smuzhiyun ret = lm3533_als_setup(als, pdata);
874*4882a593Smuzhiyun if (ret)
875*4882a593Smuzhiyun goto err_free_irq;
876*4882a593Smuzhiyun
877*4882a593Smuzhiyun ret = lm3533_als_enable(als);
878*4882a593Smuzhiyun if (ret)
879*4882a593Smuzhiyun goto err_free_irq;
880*4882a593Smuzhiyun
881*4882a593Smuzhiyun ret = iio_device_register(indio_dev);
882*4882a593Smuzhiyun if (ret) {
883*4882a593Smuzhiyun dev_err(&pdev->dev, "failed to register ALS\n");
884*4882a593Smuzhiyun goto err_disable;
885*4882a593Smuzhiyun }
886*4882a593Smuzhiyun
887*4882a593Smuzhiyun return 0;
888*4882a593Smuzhiyun
889*4882a593Smuzhiyun err_disable:
890*4882a593Smuzhiyun lm3533_als_disable(als);
891*4882a593Smuzhiyun err_free_irq:
892*4882a593Smuzhiyun if (als->irq)
893*4882a593Smuzhiyun free_irq(als->irq, indio_dev);
894*4882a593Smuzhiyun
895*4882a593Smuzhiyun return ret;
896*4882a593Smuzhiyun }
897*4882a593Smuzhiyun
lm3533_als_remove(struct platform_device * pdev)898*4882a593Smuzhiyun static int lm3533_als_remove(struct platform_device *pdev)
899*4882a593Smuzhiyun {
900*4882a593Smuzhiyun struct iio_dev *indio_dev = platform_get_drvdata(pdev);
901*4882a593Smuzhiyun struct lm3533_als *als = iio_priv(indio_dev);
902*4882a593Smuzhiyun
903*4882a593Smuzhiyun lm3533_als_set_int_mode(indio_dev, false);
904*4882a593Smuzhiyun iio_device_unregister(indio_dev);
905*4882a593Smuzhiyun lm3533_als_disable(als);
906*4882a593Smuzhiyun if (als->irq)
907*4882a593Smuzhiyun free_irq(als->irq, indio_dev);
908*4882a593Smuzhiyun
909*4882a593Smuzhiyun return 0;
910*4882a593Smuzhiyun }
911*4882a593Smuzhiyun
912*4882a593Smuzhiyun static struct platform_driver lm3533_als_driver = {
913*4882a593Smuzhiyun .driver = {
914*4882a593Smuzhiyun .name = "lm3533-als",
915*4882a593Smuzhiyun },
916*4882a593Smuzhiyun .probe = lm3533_als_probe,
917*4882a593Smuzhiyun .remove = lm3533_als_remove,
918*4882a593Smuzhiyun };
919*4882a593Smuzhiyun module_platform_driver(lm3533_als_driver);
920*4882a593Smuzhiyun
921*4882a593Smuzhiyun MODULE_AUTHOR("Johan Hovold <jhovold@gmail.com>");
922*4882a593Smuzhiyun MODULE_DESCRIPTION("LM3533 Ambient Light Sensor driver");
923*4882a593Smuzhiyun MODULE_LICENSE("GPL");
924*4882a593Smuzhiyun MODULE_ALIAS("platform:lm3533-als");
925