xref: /OK3568_Linux_fs/kernel/drivers/iio/light/jsa1212.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * JSA1212 Ambient Light & Proximity Sensor Driver
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (c) 2014, Intel Corporation.
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * JSA1212 I2C slave address: 0x44(ADDR tied to GND), 0x45(ADDR tied to VDD)
8*4882a593Smuzhiyun  *
9*4882a593Smuzhiyun  * TODO: Interrupt support, thresholds, range support.
10*4882a593Smuzhiyun  */
11*4882a593Smuzhiyun 
12*4882a593Smuzhiyun #include <linux/kernel.h>
13*4882a593Smuzhiyun #include <linux/slab.h>
14*4882a593Smuzhiyun #include <linux/module.h>
15*4882a593Smuzhiyun #include <linux/delay.h>
16*4882a593Smuzhiyun #include <linux/i2c.h>
17*4882a593Smuzhiyun #include <linux/mutex.h>
18*4882a593Smuzhiyun #include <linux/acpi.h>
19*4882a593Smuzhiyun #include <linux/regmap.h>
20*4882a593Smuzhiyun #include <linux/iio/iio.h>
21*4882a593Smuzhiyun #include <linux/iio/sysfs.h>
22*4882a593Smuzhiyun 
23*4882a593Smuzhiyun /* JSA1212 reg address */
24*4882a593Smuzhiyun #define JSA1212_CONF_REG		0x01
25*4882a593Smuzhiyun #define JSA1212_INT_REG			0x02
26*4882a593Smuzhiyun #define JSA1212_PXS_LT_REG		0x03
27*4882a593Smuzhiyun #define JSA1212_PXS_HT_REG		0x04
28*4882a593Smuzhiyun #define JSA1212_ALS_TH1_REG		0x05
29*4882a593Smuzhiyun #define JSA1212_ALS_TH2_REG		0x06
30*4882a593Smuzhiyun #define JSA1212_ALS_TH3_REG		0x07
31*4882a593Smuzhiyun #define JSA1212_PXS_DATA_REG		0x08
32*4882a593Smuzhiyun #define JSA1212_ALS_DT1_REG		0x09
33*4882a593Smuzhiyun #define JSA1212_ALS_DT2_REG		0x0A
34*4882a593Smuzhiyun #define JSA1212_ALS_RNG_REG		0x0B
35*4882a593Smuzhiyun #define JSA1212_MAX_REG			0x0C
36*4882a593Smuzhiyun 
37*4882a593Smuzhiyun /* JSA1212 reg masks */
38*4882a593Smuzhiyun #define JSA1212_CONF_MASK		0xFF
39*4882a593Smuzhiyun #define JSA1212_INT_MASK		0xFF
40*4882a593Smuzhiyun #define JSA1212_PXS_LT_MASK		0xFF
41*4882a593Smuzhiyun #define JSA1212_PXS_HT_MASK		0xFF
42*4882a593Smuzhiyun #define JSA1212_ALS_TH1_MASK		0xFF
43*4882a593Smuzhiyun #define JSA1212_ALS_TH2_LT_MASK		0x0F
44*4882a593Smuzhiyun #define JSA1212_ALS_TH2_HT_MASK		0xF0
45*4882a593Smuzhiyun #define JSA1212_ALS_TH3_MASK		0xFF
46*4882a593Smuzhiyun #define JSA1212_PXS_DATA_MASK		0xFF
47*4882a593Smuzhiyun #define JSA1212_ALS_DATA_MASK		0x0FFF
48*4882a593Smuzhiyun #define JSA1212_ALS_DT1_MASK		0xFF
49*4882a593Smuzhiyun #define JSA1212_ALS_DT2_MASK		0x0F
50*4882a593Smuzhiyun #define JSA1212_ALS_RNG_MASK		0x07
51*4882a593Smuzhiyun 
52*4882a593Smuzhiyun /* JSA1212 CONF REG bits */
53*4882a593Smuzhiyun #define JSA1212_CONF_PXS_MASK		0x80
54*4882a593Smuzhiyun #define JSA1212_CONF_PXS_ENABLE		0x80
55*4882a593Smuzhiyun #define JSA1212_CONF_PXS_DISABLE	0x00
56*4882a593Smuzhiyun #define JSA1212_CONF_ALS_MASK		0x04
57*4882a593Smuzhiyun #define JSA1212_CONF_ALS_ENABLE		0x04
58*4882a593Smuzhiyun #define JSA1212_CONF_ALS_DISABLE	0x00
59*4882a593Smuzhiyun #define JSA1212_CONF_IRDR_MASK		0x08
60*4882a593Smuzhiyun /* Proxmity sensing IRDR current sink settings */
61*4882a593Smuzhiyun #define JSA1212_CONF_IRDR_200MA		0x08
62*4882a593Smuzhiyun #define JSA1212_CONF_IRDR_100MA		0x00
63*4882a593Smuzhiyun #define JSA1212_CONF_PXS_SLP_MASK	0x70
64*4882a593Smuzhiyun #define JSA1212_CONF_PXS_SLP_0MS	0x70
65*4882a593Smuzhiyun #define JSA1212_CONF_PXS_SLP_12MS	0x60
66*4882a593Smuzhiyun #define JSA1212_CONF_PXS_SLP_50MS	0x50
67*4882a593Smuzhiyun #define JSA1212_CONF_PXS_SLP_75MS	0x40
68*4882a593Smuzhiyun #define JSA1212_CONF_PXS_SLP_100MS	0x30
69*4882a593Smuzhiyun #define JSA1212_CONF_PXS_SLP_200MS	0x20
70*4882a593Smuzhiyun #define JSA1212_CONF_PXS_SLP_400MS	0x10
71*4882a593Smuzhiyun #define JSA1212_CONF_PXS_SLP_800MS	0x00
72*4882a593Smuzhiyun 
73*4882a593Smuzhiyun /* JSA1212 INT REG bits */
74*4882a593Smuzhiyun #define JSA1212_INT_CTRL_MASK		0x01
75*4882a593Smuzhiyun #define JSA1212_INT_CTRL_EITHER		0x00
76*4882a593Smuzhiyun #define JSA1212_INT_CTRL_BOTH		0x01
77*4882a593Smuzhiyun #define JSA1212_INT_ALS_PRST_MASK	0x06
78*4882a593Smuzhiyun #define JSA1212_INT_ALS_PRST_1CONV	0x00
79*4882a593Smuzhiyun #define JSA1212_INT_ALS_PRST_4CONV	0x02
80*4882a593Smuzhiyun #define JSA1212_INT_ALS_PRST_8CONV	0x04
81*4882a593Smuzhiyun #define JSA1212_INT_ALS_PRST_16CONV	0x06
82*4882a593Smuzhiyun #define JSA1212_INT_ALS_FLAG_MASK	0x08
83*4882a593Smuzhiyun #define JSA1212_INT_ALS_FLAG_CLR	0x00
84*4882a593Smuzhiyun #define JSA1212_INT_PXS_PRST_MASK	0x60
85*4882a593Smuzhiyun #define JSA1212_INT_PXS_PRST_1CONV	0x00
86*4882a593Smuzhiyun #define JSA1212_INT_PXS_PRST_4CONV	0x20
87*4882a593Smuzhiyun #define JSA1212_INT_PXS_PRST_8CONV	0x40
88*4882a593Smuzhiyun #define JSA1212_INT_PXS_PRST_16CONV	0x60
89*4882a593Smuzhiyun #define JSA1212_INT_PXS_FLAG_MASK	0x80
90*4882a593Smuzhiyun #define JSA1212_INT_PXS_FLAG_CLR	0x00
91*4882a593Smuzhiyun 
92*4882a593Smuzhiyun /* JSA1212 ALS RNG REG bits */
93*4882a593Smuzhiyun #define JSA1212_ALS_RNG_0_2048		0x00
94*4882a593Smuzhiyun #define JSA1212_ALS_RNG_0_1024		0x01
95*4882a593Smuzhiyun #define JSA1212_ALS_RNG_0_512		0x02
96*4882a593Smuzhiyun #define JSA1212_ALS_RNG_0_256		0x03
97*4882a593Smuzhiyun #define JSA1212_ALS_RNG_0_128		0x04
98*4882a593Smuzhiyun 
99*4882a593Smuzhiyun /* JSA1212 INT threshold range */
100*4882a593Smuzhiyun #define JSA1212_ALS_TH_MIN	0x0000
101*4882a593Smuzhiyun #define JSA1212_ALS_TH_MAX	0x0FFF
102*4882a593Smuzhiyun #define JSA1212_PXS_TH_MIN	0x00
103*4882a593Smuzhiyun #define JSA1212_PXS_TH_MAX	0xFF
104*4882a593Smuzhiyun 
105*4882a593Smuzhiyun #define JSA1212_ALS_DELAY_MS	200
106*4882a593Smuzhiyun #define JSA1212_PXS_DELAY_MS	100
107*4882a593Smuzhiyun 
108*4882a593Smuzhiyun #define JSA1212_DRIVER_NAME	"jsa1212"
109*4882a593Smuzhiyun #define JSA1212_REGMAP_NAME	"jsa1212_regmap"
110*4882a593Smuzhiyun 
111*4882a593Smuzhiyun enum jsa1212_op_mode {
112*4882a593Smuzhiyun 	JSA1212_OPMODE_ALS_EN,
113*4882a593Smuzhiyun 	JSA1212_OPMODE_PXS_EN,
114*4882a593Smuzhiyun };
115*4882a593Smuzhiyun 
116*4882a593Smuzhiyun struct jsa1212_data {
117*4882a593Smuzhiyun 	struct i2c_client *client;
118*4882a593Smuzhiyun 	struct mutex lock;
119*4882a593Smuzhiyun 	u8 als_rng_idx;
120*4882a593Smuzhiyun 	bool als_en; /* ALS enable status */
121*4882a593Smuzhiyun 	bool pxs_en; /* proximity enable status */
122*4882a593Smuzhiyun 	struct regmap *regmap;
123*4882a593Smuzhiyun };
124*4882a593Smuzhiyun 
125*4882a593Smuzhiyun /* ALS range idx to val mapping */
126*4882a593Smuzhiyun static const int jsa1212_als_range_val[] = {2048, 1024, 512, 256, 128,
127*4882a593Smuzhiyun 						128, 128, 128};
128*4882a593Smuzhiyun 
129*4882a593Smuzhiyun /* Enables or disables ALS function based on status */
jsa1212_als_enable(struct jsa1212_data * data,u8 status)130*4882a593Smuzhiyun static int jsa1212_als_enable(struct jsa1212_data *data, u8 status)
131*4882a593Smuzhiyun {
132*4882a593Smuzhiyun 	int ret;
133*4882a593Smuzhiyun 
134*4882a593Smuzhiyun 	ret = regmap_update_bits(data->regmap, JSA1212_CONF_REG,
135*4882a593Smuzhiyun 				JSA1212_CONF_ALS_MASK,
136*4882a593Smuzhiyun 				status);
137*4882a593Smuzhiyun 	if (ret < 0)
138*4882a593Smuzhiyun 		return ret;
139*4882a593Smuzhiyun 
140*4882a593Smuzhiyun 	data->als_en = !!status;
141*4882a593Smuzhiyun 
142*4882a593Smuzhiyun 	return 0;
143*4882a593Smuzhiyun }
144*4882a593Smuzhiyun 
145*4882a593Smuzhiyun /* Enables or disables PXS function based on status */
jsa1212_pxs_enable(struct jsa1212_data * data,u8 status)146*4882a593Smuzhiyun static int jsa1212_pxs_enable(struct jsa1212_data *data, u8 status)
147*4882a593Smuzhiyun {
148*4882a593Smuzhiyun 	int ret;
149*4882a593Smuzhiyun 
150*4882a593Smuzhiyun 	ret = regmap_update_bits(data->regmap, JSA1212_CONF_REG,
151*4882a593Smuzhiyun 				JSA1212_CONF_PXS_MASK,
152*4882a593Smuzhiyun 				status);
153*4882a593Smuzhiyun 	if (ret < 0)
154*4882a593Smuzhiyun 		return ret;
155*4882a593Smuzhiyun 
156*4882a593Smuzhiyun 	data->pxs_en = !!status;
157*4882a593Smuzhiyun 
158*4882a593Smuzhiyun 	return 0;
159*4882a593Smuzhiyun }
160*4882a593Smuzhiyun 
jsa1212_read_als_data(struct jsa1212_data * data,unsigned int * val)161*4882a593Smuzhiyun static int jsa1212_read_als_data(struct jsa1212_data *data,
162*4882a593Smuzhiyun 				unsigned int *val)
163*4882a593Smuzhiyun {
164*4882a593Smuzhiyun 	int ret;
165*4882a593Smuzhiyun 	__le16 als_data;
166*4882a593Smuzhiyun 
167*4882a593Smuzhiyun 	ret = jsa1212_als_enable(data, JSA1212_CONF_ALS_ENABLE);
168*4882a593Smuzhiyun 	if (ret < 0)
169*4882a593Smuzhiyun 		return ret;
170*4882a593Smuzhiyun 
171*4882a593Smuzhiyun 	/* Delay for data output */
172*4882a593Smuzhiyun 	msleep(JSA1212_ALS_DELAY_MS);
173*4882a593Smuzhiyun 
174*4882a593Smuzhiyun 	/* Read 12 bit data */
175*4882a593Smuzhiyun 	ret = regmap_bulk_read(data->regmap, JSA1212_ALS_DT1_REG, &als_data, 2);
176*4882a593Smuzhiyun 	if (ret < 0) {
177*4882a593Smuzhiyun 		dev_err(&data->client->dev, "als data read err\n");
178*4882a593Smuzhiyun 		goto als_data_read_err;
179*4882a593Smuzhiyun 	}
180*4882a593Smuzhiyun 
181*4882a593Smuzhiyun 	*val = le16_to_cpu(als_data);
182*4882a593Smuzhiyun 
183*4882a593Smuzhiyun als_data_read_err:
184*4882a593Smuzhiyun 	return jsa1212_als_enable(data, JSA1212_CONF_ALS_DISABLE);
185*4882a593Smuzhiyun }
186*4882a593Smuzhiyun 
jsa1212_read_pxs_data(struct jsa1212_data * data,unsigned int * val)187*4882a593Smuzhiyun static int jsa1212_read_pxs_data(struct jsa1212_data *data,
188*4882a593Smuzhiyun 				unsigned int *val)
189*4882a593Smuzhiyun {
190*4882a593Smuzhiyun 	int ret;
191*4882a593Smuzhiyun 	unsigned int pxs_data;
192*4882a593Smuzhiyun 
193*4882a593Smuzhiyun 	ret = jsa1212_pxs_enable(data, JSA1212_CONF_PXS_ENABLE);
194*4882a593Smuzhiyun 	if (ret < 0)
195*4882a593Smuzhiyun 		return ret;
196*4882a593Smuzhiyun 
197*4882a593Smuzhiyun 	/* Delay for data output */
198*4882a593Smuzhiyun 	msleep(JSA1212_PXS_DELAY_MS);
199*4882a593Smuzhiyun 
200*4882a593Smuzhiyun 	/* Read out all data */
201*4882a593Smuzhiyun 	ret = regmap_read(data->regmap, JSA1212_PXS_DATA_REG, &pxs_data);
202*4882a593Smuzhiyun 	if (ret < 0) {
203*4882a593Smuzhiyun 		dev_err(&data->client->dev, "pxs data read err\n");
204*4882a593Smuzhiyun 		goto pxs_data_read_err;
205*4882a593Smuzhiyun 	}
206*4882a593Smuzhiyun 
207*4882a593Smuzhiyun 	*val = pxs_data & JSA1212_PXS_DATA_MASK;
208*4882a593Smuzhiyun 
209*4882a593Smuzhiyun pxs_data_read_err:
210*4882a593Smuzhiyun 	return jsa1212_pxs_enable(data, JSA1212_CONF_PXS_DISABLE);
211*4882a593Smuzhiyun }
212*4882a593Smuzhiyun 
jsa1212_read_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int * val,int * val2,long mask)213*4882a593Smuzhiyun static int jsa1212_read_raw(struct iio_dev *indio_dev,
214*4882a593Smuzhiyun 				struct iio_chan_spec const *chan,
215*4882a593Smuzhiyun 				int *val, int *val2, long mask)
216*4882a593Smuzhiyun {
217*4882a593Smuzhiyun 	int ret;
218*4882a593Smuzhiyun 	struct jsa1212_data *data = iio_priv(indio_dev);
219*4882a593Smuzhiyun 
220*4882a593Smuzhiyun 	switch (mask) {
221*4882a593Smuzhiyun 	case IIO_CHAN_INFO_RAW:
222*4882a593Smuzhiyun 		mutex_lock(&data->lock);
223*4882a593Smuzhiyun 		switch (chan->type) {
224*4882a593Smuzhiyun 		case IIO_LIGHT:
225*4882a593Smuzhiyun 			ret = jsa1212_read_als_data(data, val);
226*4882a593Smuzhiyun 			break;
227*4882a593Smuzhiyun 		case IIO_PROXIMITY:
228*4882a593Smuzhiyun 			ret = jsa1212_read_pxs_data(data, val);
229*4882a593Smuzhiyun 			break;
230*4882a593Smuzhiyun 		default:
231*4882a593Smuzhiyun 			ret = -EINVAL;
232*4882a593Smuzhiyun 			break;
233*4882a593Smuzhiyun 		}
234*4882a593Smuzhiyun 		mutex_unlock(&data->lock);
235*4882a593Smuzhiyun 		return ret < 0 ? ret : IIO_VAL_INT;
236*4882a593Smuzhiyun 	case IIO_CHAN_INFO_SCALE:
237*4882a593Smuzhiyun 		switch (chan->type) {
238*4882a593Smuzhiyun 		case IIO_LIGHT:
239*4882a593Smuzhiyun 			*val = jsa1212_als_range_val[data->als_rng_idx];
240*4882a593Smuzhiyun 			*val2 = BIT(12); /* Max 12 bit value */
241*4882a593Smuzhiyun 			return IIO_VAL_FRACTIONAL;
242*4882a593Smuzhiyun 		default:
243*4882a593Smuzhiyun 			break;
244*4882a593Smuzhiyun 		}
245*4882a593Smuzhiyun 		break;
246*4882a593Smuzhiyun 	default:
247*4882a593Smuzhiyun 		break;
248*4882a593Smuzhiyun 	}
249*4882a593Smuzhiyun 
250*4882a593Smuzhiyun 	return -EINVAL;
251*4882a593Smuzhiyun }
252*4882a593Smuzhiyun 
253*4882a593Smuzhiyun static const struct iio_chan_spec jsa1212_channels[] = {
254*4882a593Smuzhiyun 	{
255*4882a593Smuzhiyun 		.type = IIO_LIGHT,
256*4882a593Smuzhiyun 		.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
257*4882a593Smuzhiyun 			BIT(IIO_CHAN_INFO_SCALE),
258*4882a593Smuzhiyun 	},
259*4882a593Smuzhiyun 	{
260*4882a593Smuzhiyun 		.type = IIO_PROXIMITY,
261*4882a593Smuzhiyun 		.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
262*4882a593Smuzhiyun 	}
263*4882a593Smuzhiyun };
264*4882a593Smuzhiyun 
265*4882a593Smuzhiyun static const struct iio_info jsa1212_info = {
266*4882a593Smuzhiyun 	.read_raw		= &jsa1212_read_raw,
267*4882a593Smuzhiyun };
268*4882a593Smuzhiyun 
jsa1212_chip_init(struct jsa1212_data * data)269*4882a593Smuzhiyun static int jsa1212_chip_init(struct jsa1212_data *data)
270*4882a593Smuzhiyun {
271*4882a593Smuzhiyun 	int ret;
272*4882a593Smuzhiyun 
273*4882a593Smuzhiyun 	ret = regmap_write(data->regmap, JSA1212_CONF_REG,
274*4882a593Smuzhiyun 				(JSA1212_CONF_PXS_SLP_50MS |
275*4882a593Smuzhiyun 				JSA1212_CONF_IRDR_200MA));
276*4882a593Smuzhiyun 	if (ret < 0)
277*4882a593Smuzhiyun 		return ret;
278*4882a593Smuzhiyun 
279*4882a593Smuzhiyun 	ret = regmap_write(data->regmap, JSA1212_INT_REG,
280*4882a593Smuzhiyun 				JSA1212_INT_ALS_PRST_4CONV);
281*4882a593Smuzhiyun 	if (ret < 0)
282*4882a593Smuzhiyun 		return ret;
283*4882a593Smuzhiyun 
284*4882a593Smuzhiyun 	data->als_rng_idx = JSA1212_ALS_RNG_0_2048;
285*4882a593Smuzhiyun 
286*4882a593Smuzhiyun 	return 0;
287*4882a593Smuzhiyun }
288*4882a593Smuzhiyun 
jsa1212_is_volatile_reg(struct device * dev,unsigned int reg)289*4882a593Smuzhiyun static bool jsa1212_is_volatile_reg(struct device *dev, unsigned int reg)
290*4882a593Smuzhiyun {
291*4882a593Smuzhiyun 	switch (reg) {
292*4882a593Smuzhiyun 	case JSA1212_PXS_DATA_REG:
293*4882a593Smuzhiyun 	case JSA1212_ALS_DT1_REG:
294*4882a593Smuzhiyun 	case JSA1212_ALS_DT2_REG:
295*4882a593Smuzhiyun 	case JSA1212_INT_REG:
296*4882a593Smuzhiyun 		return true;
297*4882a593Smuzhiyun 	default:
298*4882a593Smuzhiyun 		return false;
299*4882a593Smuzhiyun 	}
300*4882a593Smuzhiyun }
301*4882a593Smuzhiyun 
302*4882a593Smuzhiyun static const struct regmap_config jsa1212_regmap_config = {
303*4882a593Smuzhiyun 	.name =  JSA1212_REGMAP_NAME,
304*4882a593Smuzhiyun 	.reg_bits = 8,
305*4882a593Smuzhiyun 	.val_bits = 8,
306*4882a593Smuzhiyun 	.max_register = JSA1212_MAX_REG,
307*4882a593Smuzhiyun 	.cache_type = REGCACHE_RBTREE,
308*4882a593Smuzhiyun 	.volatile_reg = jsa1212_is_volatile_reg,
309*4882a593Smuzhiyun };
310*4882a593Smuzhiyun 
jsa1212_probe(struct i2c_client * client,const struct i2c_device_id * id)311*4882a593Smuzhiyun static int jsa1212_probe(struct i2c_client *client,
312*4882a593Smuzhiyun 			 const struct i2c_device_id *id)
313*4882a593Smuzhiyun {
314*4882a593Smuzhiyun 	struct jsa1212_data *data;
315*4882a593Smuzhiyun 	struct iio_dev *indio_dev;
316*4882a593Smuzhiyun 	struct regmap *regmap;
317*4882a593Smuzhiyun 	int ret;
318*4882a593Smuzhiyun 
319*4882a593Smuzhiyun 	indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
320*4882a593Smuzhiyun 	if (!indio_dev)
321*4882a593Smuzhiyun 		return -ENOMEM;
322*4882a593Smuzhiyun 
323*4882a593Smuzhiyun 	regmap = devm_regmap_init_i2c(client, &jsa1212_regmap_config);
324*4882a593Smuzhiyun 	if (IS_ERR(regmap)) {
325*4882a593Smuzhiyun 		dev_err(&client->dev, "Regmap initialization failed.\n");
326*4882a593Smuzhiyun 		return PTR_ERR(regmap);
327*4882a593Smuzhiyun 	}
328*4882a593Smuzhiyun 
329*4882a593Smuzhiyun 	data = iio_priv(indio_dev);
330*4882a593Smuzhiyun 
331*4882a593Smuzhiyun 	i2c_set_clientdata(client, indio_dev);
332*4882a593Smuzhiyun 	data->client = client;
333*4882a593Smuzhiyun 	data->regmap = regmap;
334*4882a593Smuzhiyun 
335*4882a593Smuzhiyun 	mutex_init(&data->lock);
336*4882a593Smuzhiyun 
337*4882a593Smuzhiyun 	ret = jsa1212_chip_init(data);
338*4882a593Smuzhiyun 	if (ret < 0)
339*4882a593Smuzhiyun 		return ret;
340*4882a593Smuzhiyun 
341*4882a593Smuzhiyun 	indio_dev->channels = jsa1212_channels;
342*4882a593Smuzhiyun 	indio_dev->num_channels = ARRAY_SIZE(jsa1212_channels);
343*4882a593Smuzhiyun 	indio_dev->name = JSA1212_DRIVER_NAME;
344*4882a593Smuzhiyun 	indio_dev->modes = INDIO_DIRECT_MODE;
345*4882a593Smuzhiyun 
346*4882a593Smuzhiyun 	indio_dev->info = &jsa1212_info;
347*4882a593Smuzhiyun 
348*4882a593Smuzhiyun 	ret = iio_device_register(indio_dev);
349*4882a593Smuzhiyun 	if (ret < 0)
350*4882a593Smuzhiyun 		dev_err(&client->dev, "%s: register device failed\n", __func__);
351*4882a593Smuzhiyun 
352*4882a593Smuzhiyun 	return ret;
353*4882a593Smuzhiyun }
354*4882a593Smuzhiyun 
355*4882a593Smuzhiyun  /* power off the device */
jsa1212_power_off(struct jsa1212_data * data)356*4882a593Smuzhiyun static int jsa1212_power_off(struct jsa1212_data *data)
357*4882a593Smuzhiyun {
358*4882a593Smuzhiyun 	int ret;
359*4882a593Smuzhiyun 
360*4882a593Smuzhiyun 	mutex_lock(&data->lock);
361*4882a593Smuzhiyun 
362*4882a593Smuzhiyun 	ret = regmap_update_bits(data->regmap, JSA1212_CONF_REG,
363*4882a593Smuzhiyun 				JSA1212_CONF_ALS_MASK |
364*4882a593Smuzhiyun 				JSA1212_CONF_PXS_MASK,
365*4882a593Smuzhiyun 				JSA1212_CONF_ALS_DISABLE |
366*4882a593Smuzhiyun 				JSA1212_CONF_PXS_DISABLE);
367*4882a593Smuzhiyun 
368*4882a593Smuzhiyun 	if (ret < 0)
369*4882a593Smuzhiyun 		dev_err(&data->client->dev, "power off cmd failed\n");
370*4882a593Smuzhiyun 
371*4882a593Smuzhiyun 	mutex_unlock(&data->lock);
372*4882a593Smuzhiyun 
373*4882a593Smuzhiyun 	return ret;
374*4882a593Smuzhiyun }
375*4882a593Smuzhiyun 
jsa1212_remove(struct i2c_client * client)376*4882a593Smuzhiyun static int jsa1212_remove(struct i2c_client *client)
377*4882a593Smuzhiyun {
378*4882a593Smuzhiyun 	struct iio_dev *indio_dev = i2c_get_clientdata(client);
379*4882a593Smuzhiyun 	struct jsa1212_data *data = iio_priv(indio_dev);
380*4882a593Smuzhiyun 
381*4882a593Smuzhiyun 	iio_device_unregister(indio_dev);
382*4882a593Smuzhiyun 
383*4882a593Smuzhiyun 	return jsa1212_power_off(data);
384*4882a593Smuzhiyun }
385*4882a593Smuzhiyun 
386*4882a593Smuzhiyun #ifdef CONFIG_PM_SLEEP
jsa1212_suspend(struct device * dev)387*4882a593Smuzhiyun static int jsa1212_suspend(struct device *dev)
388*4882a593Smuzhiyun {
389*4882a593Smuzhiyun 	struct jsa1212_data *data;
390*4882a593Smuzhiyun 
391*4882a593Smuzhiyun 	data = iio_priv(i2c_get_clientdata(to_i2c_client(dev)));
392*4882a593Smuzhiyun 
393*4882a593Smuzhiyun 	return jsa1212_power_off(data);
394*4882a593Smuzhiyun }
395*4882a593Smuzhiyun 
jsa1212_resume(struct device * dev)396*4882a593Smuzhiyun static int jsa1212_resume(struct device *dev)
397*4882a593Smuzhiyun {
398*4882a593Smuzhiyun 	int ret = 0;
399*4882a593Smuzhiyun 	struct jsa1212_data *data;
400*4882a593Smuzhiyun 
401*4882a593Smuzhiyun 	data = iio_priv(i2c_get_clientdata(to_i2c_client(dev)));
402*4882a593Smuzhiyun 
403*4882a593Smuzhiyun 	mutex_lock(&data->lock);
404*4882a593Smuzhiyun 
405*4882a593Smuzhiyun 	if (data->als_en) {
406*4882a593Smuzhiyun 		ret = jsa1212_als_enable(data, JSA1212_CONF_ALS_ENABLE);
407*4882a593Smuzhiyun 		if (ret < 0) {
408*4882a593Smuzhiyun 			dev_err(dev, "als resume failed\n");
409*4882a593Smuzhiyun 			goto unlock_and_ret;
410*4882a593Smuzhiyun 		}
411*4882a593Smuzhiyun 	}
412*4882a593Smuzhiyun 
413*4882a593Smuzhiyun 	if (data->pxs_en) {
414*4882a593Smuzhiyun 		ret = jsa1212_pxs_enable(data, JSA1212_CONF_PXS_ENABLE);
415*4882a593Smuzhiyun 		if (ret < 0)
416*4882a593Smuzhiyun 			dev_err(dev, "pxs resume failed\n");
417*4882a593Smuzhiyun 	}
418*4882a593Smuzhiyun 
419*4882a593Smuzhiyun unlock_and_ret:
420*4882a593Smuzhiyun 	mutex_unlock(&data->lock);
421*4882a593Smuzhiyun 	return ret;
422*4882a593Smuzhiyun }
423*4882a593Smuzhiyun 
424*4882a593Smuzhiyun static SIMPLE_DEV_PM_OPS(jsa1212_pm_ops, jsa1212_suspend, jsa1212_resume);
425*4882a593Smuzhiyun 
426*4882a593Smuzhiyun #define JSA1212_PM_OPS (&jsa1212_pm_ops)
427*4882a593Smuzhiyun #else
428*4882a593Smuzhiyun #define JSA1212_PM_OPS NULL
429*4882a593Smuzhiyun #endif
430*4882a593Smuzhiyun 
431*4882a593Smuzhiyun static const struct acpi_device_id jsa1212_acpi_match[] = {
432*4882a593Smuzhiyun 	{"JSA1212", 0},
433*4882a593Smuzhiyun 	{ },
434*4882a593Smuzhiyun };
435*4882a593Smuzhiyun MODULE_DEVICE_TABLE(acpi, jsa1212_acpi_match);
436*4882a593Smuzhiyun 
437*4882a593Smuzhiyun static const struct i2c_device_id jsa1212_id[] = {
438*4882a593Smuzhiyun 	{ JSA1212_DRIVER_NAME, 0 },
439*4882a593Smuzhiyun 	{ }
440*4882a593Smuzhiyun };
441*4882a593Smuzhiyun MODULE_DEVICE_TABLE(i2c, jsa1212_id);
442*4882a593Smuzhiyun 
443*4882a593Smuzhiyun static struct i2c_driver jsa1212_driver = {
444*4882a593Smuzhiyun 	.driver = {
445*4882a593Smuzhiyun 		.name	= JSA1212_DRIVER_NAME,
446*4882a593Smuzhiyun 		.pm	= JSA1212_PM_OPS,
447*4882a593Smuzhiyun 		.acpi_match_table = ACPI_PTR(jsa1212_acpi_match),
448*4882a593Smuzhiyun 	},
449*4882a593Smuzhiyun 	.probe		= jsa1212_probe,
450*4882a593Smuzhiyun 	.remove		= jsa1212_remove,
451*4882a593Smuzhiyun 	.id_table	= jsa1212_id,
452*4882a593Smuzhiyun };
453*4882a593Smuzhiyun module_i2c_driver(jsa1212_driver);
454*4882a593Smuzhiyun 
455*4882a593Smuzhiyun MODULE_AUTHOR("Sathya Kuppuswamy <sathyanarayanan.kuppuswamy@linux.intel.com>");
456*4882a593Smuzhiyun MODULE_DESCRIPTION("JSA1212 proximity/ambient light sensor driver");
457*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
458