xref: /OK3568_Linux_fs/kernel/drivers/iio/light/isl29028.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * IIO driver for the light sensor ISL29028.
4*4882a593Smuzhiyun  * ISL29028 is Concurrent Ambient Light and Proximity Sensor
5*4882a593Smuzhiyun  *
6*4882a593Smuzhiyun  * Copyright (c) 2012, NVIDIA CORPORATION.  All rights reserved.
7*4882a593Smuzhiyun  * Copyright (c) 2016-2017 Brian Masney <masneyb@onstation.org>
8*4882a593Smuzhiyun  *
9*4882a593Smuzhiyun  * Datasheets:
10*4882a593Smuzhiyun  *  - http://www.intersil.com/content/dam/Intersil/documents/isl2/isl29028.pdf
11*4882a593Smuzhiyun  *  - http://www.intersil.com/content/dam/Intersil/documents/isl2/isl29030.pdf
12*4882a593Smuzhiyun  */
13*4882a593Smuzhiyun 
14*4882a593Smuzhiyun #include <linux/module.h>
15*4882a593Smuzhiyun #include <linux/i2c.h>
16*4882a593Smuzhiyun #include <linux/err.h>
17*4882a593Smuzhiyun #include <linux/mutex.h>
18*4882a593Smuzhiyun #include <linux/delay.h>
19*4882a593Smuzhiyun #include <linux/slab.h>
20*4882a593Smuzhiyun #include <linux/regmap.h>
21*4882a593Smuzhiyun #include <linux/iio/iio.h>
22*4882a593Smuzhiyun #include <linux/iio/sysfs.h>
23*4882a593Smuzhiyun #include <linux/pm_runtime.h>
24*4882a593Smuzhiyun 
25*4882a593Smuzhiyun #define ISL29028_CONV_TIME_MS			100
26*4882a593Smuzhiyun 
27*4882a593Smuzhiyun #define ISL29028_REG_CONFIGURE			0x01
28*4882a593Smuzhiyun 
29*4882a593Smuzhiyun #define ISL29028_CONF_ALS_IR_MODE_ALS		0
30*4882a593Smuzhiyun #define ISL29028_CONF_ALS_IR_MODE_IR		BIT(0)
31*4882a593Smuzhiyun #define ISL29028_CONF_ALS_IR_MODE_MASK		BIT(0)
32*4882a593Smuzhiyun 
33*4882a593Smuzhiyun #define ISL29028_CONF_ALS_RANGE_LOW_LUX		0
34*4882a593Smuzhiyun #define ISL29028_CONF_ALS_RANGE_HIGH_LUX	BIT(1)
35*4882a593Smuzhiyun #define ISL29028_CONF_ALS_RANGE_MASK		BIT(1)
36*4882a593Smuzhiyun 
37*4882a593Smuzhiyun #define ISL29028_CONF_ALS_DIS			0
38*4882a593Smuzhiyun #define ISL29028_CONF_ALS_EN			BIT(2)
39*4882a593Smuzhiyun #define ISL29028_CONF_ALS_EN_MASK		BIT(2)
40*4882a593Smuzhiyun 
41*4882a593Smuzhiyun #define ISL29028_CONF_PROX_SLP_SH		4
42*4882a593Smuzhiyun #define ISL29028_CONF_PROX_SLP_MASK		(7 << ISL29028_CONF_PROX_SLP_SH)
43*4882a593Smuzhiyun 
44*4882a593Smuzhiyun #define ISL29028_CONF_PROX_EN			BIT(7)
45*4882a593Smuzhiyun #define ISL29028_CONF_PROX_EN_MASK		BIT(7)
46*4882a593Smuzhiyun 
47*4882a593Smuzhiyun #define ISL29028_REG_INTERRUPT			0x02
48*4882a593Smuzhiyun 
49*4882a593Smuzhiyun #define ISL29028_REG_PROX_DATA			0x08
50*4882a593Smuzhiyun #define ISL29028_REG_ALSIR_L			0x09
51*4882a593Smuzhiyun #define ISL29028_REG_ALSIR_U			0x0A
52*4882a593Smuzhiyun 
53*4882a593Smuzhiyun #define ISL29028_REG_TEST1_MODE			0x0E
54*4882a593Smuzhiyun #define ISL29028_REG_TEST2_MODE			0x0F
55*4882a593Smuzhiyun 
56*4882a593Smuzhiyun #define ISL29028_NUM_REGS			(ISL29028_REG_TEST2_MODE + 1)
57*4882a593Smuzhiyun 
58*4882a593Smuzhiyun #define ISL29028_POWER_OFF_DELAY_MS		2000
59*4882a593Smuzhiyun 
60*4882a593Smuzhiyun struct isl29028_prox_data {
61*4882a593Smuzhiyun 	int sampling_int;
62*4882a593Smuzhiyun 	int sampling_fract;
63*4882a593Smuzhiyun 	int sleep_time;
64*4882a593Smuzhiyun };
65*4882a593Smuzhiyun 
66*4882a593Smuzhiyun static const struct isl29028_prox_data isl29028_prox_data[] = {
67*4882a593Smuzhiyun 	{   1, 250000, 800 },
68*4882a593Smuzhiyun 	{   2, 500000, 400 },
69*4882a593Smuzhiyun 	{   5,      0, 200 },
70*4882a593Smuzhiyun 	{  10,      0, 100 },
71*4882a593Smuzhiyun 	{  13, 300000,  75 },
72*4882a593Smuzhiyun 	{  20,      0,  50 },
73*4882a593Smuzhiyun 	{  80,      0,  13 }, /*
74*4882a593Smuzhiyun 			       * Note: Data sheet lists 12.5 ms sleep time.
75*4882a593Smuzhiyun 			       * Round up a half millisecond for msleep().
76*4882a593Smuzhiyun 			       */
77*4882a593Smuzhiyun 	{ 100,  0,   0 }
78*4882a593Smuzhiyun };
79*4882a593Smuzhiyun 
80*4882a593Smuzhiyun enum isl29028_als_ir_mode {
81*4882a593Smuzhiyun 	ISL29028_MODE_NONE = 0,
82*4882a593Smuzhiyun 	ISL29028_MODE_ALS,
83*4882a593Smuzhiyun 	ISL29028_MODE_IR,
84*4882a593Smuzhiyun };
85*4882a593Smuzhiyun 
86*4882a593Smuzhiyun struct isl29028_chip {
87*4882a593Smuzhiyun 	struct mutex			lock;
88*4882a593Smuzhiyun 	struct regmap			*regmap;
89*4882a593Smuzhiyun 	int				prox_sampling_int;
90*4882a593Smuzhiyun 	int				prox_sampling_frac;
91*4882a593Smuzhiyun 	bool				enable_prox;
92*4882a593Smuzhiyun 	int				lux_scale;
93*4882a593Smuzhiyun 	enum isl29028_als_ir_mode	als_ir_mode;
94*4882a593Smuzhiyun };
95*4882a593Smuzhiyun 
isl29028_find_prox_sleep_index(int sampling_int,int sampling_fract)96*4882a593Smuzhiyun static int isl29028_find_prox_sleep_index(int sampling_int, int sampling_fract)
97*4882a593Smuzhiyun {
98*4882a593Smuzhiyun 	int i;
99*4882a593Smuzhiyun 
100*4882a593Smuzhiyun 	for (i = 0; i < ARRAY_SIZE(isl29028_prox_data); ++i) {
101*4882a593Smuzhiyun 		if (isl29028_prox_data[i].sampling_int == sampling_int &&
102*4882a593Smuzhiyun 		    isl29028_prox_data[i].sampling_fract == sampling_fract)
103*4882a593Smuzhiyun 			return i;
104*4882a593Smuzhiyun 	}
105*4882a593Smuzhiyun 
106*4882a593Smuzhiyun 	return -EINVAL;
107*4882a593Smuzhiyun }
108*4882a593Smuzhiyun 
isl29028_set_proxim_sampling(struct isl29028_chip * chip,int sampling_int,int sampling_fract)109*4882a593Smuzhiyun static int isl29028_set_proxim_sampling(struct isl29028_chip *chip,
110*4882a593Smuzhiyun 					int sampling_int, int sampling_fract)
111*4882a593Smuzhiyun {
112*4882a593Smuzhiyun 	struct device *dev = regmap_get_device(chip->regmap);
113*4882a593Smuzhiyun 	int sleep_index, ret;
114*4882a593Smuzhiyun 
115*4882a593Smuzhiyun 	sleep_index = isl29028_find_prox_sleep_index(sampling_int,
116*4882a593Smuzhiyun 						     sampling_fract);
117*4882a593Smuzhiyun 	if (sleep_index < 0)
118*4882a593Smuzhiyun 		return sleep_index;
119*4882a593Smuzhiyun 
120*4882a593Smuzhiyun 	ret = regmap_update_bits(chip->regmap, ISL29028_REG_CONFIGURE,
121*4882a593Smuzhiyun 				 ISL29028_CONF_PROX_SLP_MASK,
122*4882a593Smuzhiyun 				 sleep_index << ISL29028_CONF_PROX_SLP_SH);
123*4882a593Smuzhiyun 
124*4882a593Smuzhiyun 	if (ret < 0) {
125*4882a593Smuzhiyun 		dev_err(dev, "%s(): Error %d setting the proximity sampling\n",
126*4882a593Smuzhiyun 			__func__, ret);
127*4882a593Smuzhiyun 		return ret;
128*4882a593Smuzhiyun 	}
129*4882a593Smuzhiyun 
130*4882a593Smuzhiyun 	chip->prox_sampling_int = sampling_int;
131*4882a593Smuzhiyun 	chip->prox_sampling_frac = sampling_fract;
132*4882a593Smuzhiyun 
133*4882a593Smuzhiyun 	return ret;
134*4882a593Smuzhiyun }
135*4882a593Smuzhiyun 
isl29028_enable_proximity(struct isl29028_chip * chip)136*4882a593Smuzhiyun static int isl29028_enable_proximity(struct isl29028_chip *chip)
137*4882a593Smuzhiyun {
138*4882a593Smuzhiyun 	int prox_index, ret;
139*4882a593Smuzhiyun 
140*4882a593Smuzhiyun 	ret = isl29028_set_proxim_sampling(chip, chip->prox_sampling_int,
141*4882a593Smuzhiyun 					   chip->prox_sampling_frac);
142*4882a593Smuzhiyun 	if (ret < 0)
143*4882a593Smuzhiyun 		return ret;
144*4882a593Smuzhiyun 
145*4882a593Smuzhiyun 	ret = regmap_update_bits(chip->regmap, ISL29028_REG_CONFIGURE,
146*4882a593Smuzhiyun 				 ISL29028_CONF_PROX_EN_MASK,
147*4882a593Smuzhiyun 				 ISL29028_CONF_PROX_EN);
148*4882a593Smuzhiyun 	if (ret < 0)
149*4882a593Smuzhiyun 		return ret;
150*4882a593Smuzhiyun 
151*4882a593Smuzhiyun 	/* Wait for conversion to be complete for first sample */
152*4882a593Smuzhiyun 	prox_index = isl29028_find_prox_sleep_index(chip->prox_sampling_int,
153*4882a593Smuzhiyun 						    chip->prox_sampling_frac);
154*4882a593Smuzhiyun 	if (prox_index < 0)
155*4882a593Smuzhiyun 		return prox_index;
156*4882a593Smuzhiyun 
157*4882a593Smuzhiyun 	msleep(isl29028_prox_data[prox_index].sleep_time);
158*4882a593Smuzhiyun 
159*4882a593Smuzhiyun 	return 0;
160*4882a593Smuzhiyun }
161*4882a593Smuzhiyun 
isl29028_set_als_scale(struct isl29028_chip * chip,int lux_scale)162*4882a593Smuzhiyun static int isl29028_set_als_scale(struct isl29028_chip *chip, int lux_scale)
163*4882a593Smuzhiyun {
164*4882a593Smuzhiyun 	struct device *dev = regmap_get_device(chip->regmap);
165*4882a593Smuzhiyun 	int val = (lux_scale == 2000) ? ISL29028_CONF_ALS_RANGE_HIGH_LUX :
166*4882a593Smuzhiyun 					ISL29028_CONF_ALS_RANGE_LOW_LUX;
167*4882a593Smuzhiyun 	int ret;
168*4882a593Smuzhiyun 
169*4882a593Smuzhiyun 	ret = regmap_update_bits(chip->regmap, ISL29028_REG_CONFIGURE,
170*4882a593Smuzhiyun 				 ISL29028_CONF_ALS_RANGE_MASK, val);
171*4882a593Smuzhiyun 	if (ret < 0) {
172*4882a593Smuzhiyun 		dev_err(dev, "%s(): Error %d setting the ALS scale\n", __func__,
173*4882a593Smuzhiyun 			ret);
174*4882a593Smuzhiyun 		return ret;
175*4882a593Smuzhiyun 	}
176*4882a593Smuzhiyun 
177*4882a593Smuzhiyun 	chip->lux_scale = lux_scale;
178*4882a593Smuzhiyun 
179*4882a593Smuzhiyun 	return ret;
180*4882a593Smuzhiyun }
181*4882a593Smuzhiyun 
isl29028_set_als_ir_mode(struct isl29028_chip * chip,enum isl29028_als_ir_mode mode)182*4882a593Smuzhiyun static int isl29028_set_als_ir_mode(struct isl29028_chip *chip,
183*4882a593Smuzhiyun 				    enum isl29028_als_ir_mode mode)
184*4882a593Smuzhiyun {
185*4882a593Smuzhiyun 	int ret;
186*4882a593Smuzhiyun 
187*4882a593Smuzhiyun 	if (chip->als_ir_mode == mode)
188*4882a593Smuzhiyun 		return 0;
189*4882a593Smuzhiyun 
190*4882a593Smuzhiyun 	ret = isl29028_set_als_scale(chip, chip->lux_scale);
191*4882a593Smuzhiyun 	if (ret < 0)
192*4882a593Smuzhiyun 		return ret;
193*4882a593Smuzhiyun 
194*4882a593Smuzhiyun 	switch (mode) {
195*4882a593Smuzhiyun 	case ISL29028_MODE_ALS:
196*4882a593Smuzhiyun 		ret = regmap_update_bits(chip->regmap, ISL29028_REG_CONFIGURE,
197*4882a593Smuzhiyun 					 ISL29028_CONF_ALS_IR_MODE_MASK,
198*4882a593Smuzhiyun 					 ISL29028_CONF_ALS_IR_MODE_ALS);
199*4882a593Smuzhiyun 		if (ret < 0)
200*4882a593Smuzhiyun 			return ret;
201*4882a593Smuzhiyun 
202*4882a593Smuzhiyun 		ret = regmap_update_bits(chip->regmap, ISL29028_REG_CONFIGURE,
203*4882a593Smuzhiyun 					 ISL29028_CONF_ALS_RANGE_MASK,
204*4882a593Smuzhiyun 					 ISL29028_CONF_ALS_RANGE_HIGH_LUX);
205*4882a593Smuzhiyun 		break;
206*4882a593Smuzhiyun 	case ISL29028_MODE_IR:
207*4882a593Smuzhiyun 		ret = regmap_update_bits(chip->regmap, ISL29028_REG_CONFIGURE,
208*4882a593Smuzhiyun 					 ISL29028_CONF_ALS_IR_MODE_MASK,
209*4882a593Smuzhiyun 					 ISL29028_CONF_ALS_IR_MODE_IR);
210*4882a593Smuzhiyun 		break;
211*4882a593Smuzhiyun 	case ISL29028_MODE_NONE:
212*4882a593Smuzhiyun 		return regmap_update_bits(chip->regmap, ISL29028_REG_CONFIGURE,
213*4882a593Smuzhiyun 					  ISL29028_CONF_ALS_EN_MASK,
214*4882a593Smuzhiyun 					  ISL29028_CONF_ALS_DIS);
215*4882a593Smuzhiyun 	}
216*4882a593Smuzhiyun 
217*4882a593Smuzhiyun 	if (ret < 0)
218*4882a593Smuzhiyun 		return ret;
219*4882a593Smuzhiyun 
220*4882a593Smuzhiyun 	/* Enable the ALS/IR */
221*4882a593Smuzhiyun 	ret = regmap_update_bits(chip->regmap, ISL29028_REG_CONFIGURE,
222*4882a593Smuzhiyun 				 ISL29028_CONF_ALS_EN_MASK,
223*4882a593Smuzhiyun 				 ISL29028_CONF_ALS_EN);
224*4882a593Smuzhiyun 	if (ret < 0)
225*4882a593Smuzhiyun 		return ret;
226*4882a593Smuzhiyun 
227*4882a593Smuzhiyun 	/* Need to wait for conversion time if ALS/IR mode enabled */
228*4882a593Smuzhiyun 	msleep(ISL29028_CONV_TIME_MS);
229*4882a593Smuzhiyun 
230*4882a593Smuzhiyun 	chip->als_ir_mode = mode;
231*4882a593Smuzhiyun 
232*4882a593Smuzhiyun 	return 0;
233*4882a593Smuzhiyun }
234*4882a593Smuzhiyun 
isl29028_read_als_ir(struct isl29028_chip * chip,int * als_ir)235*4882a593Smuzhiyun static int isl29028_read_als_ir(struct isl29028_chip *chip, int *als_ir)
236*4882a593Smuzhiyun {
237*4882a593Smuzhiyun 	struct device *dev = regmap_get_device(chip->regmap);
238*4882a593Smuzhiyun 	unsigned int lsb;
239*4882a593Smuzhiyun 	unsigned int msb;
240*4882a593Smuzhiyun 	int ret;
241*4882a593Smuzhiyun 
242*4882a593Smuzhiyun 	ret = regmap_read(chip->regmap, ISL29028_REG_ALSIR_L, &lsb);
243*4882a593Smuzhiyun 	if (ret < 0) {
244*4882a593Smuzhiyun 		dev_err(dev,
245*4882a593Smuzhiyun 			"%s(): Error %d reading register ALSIR_L\n",
246*4882a593Smuzhiyun 			__func__, ret);
247*4882a593Smuzhiyun 		return ret;
248*4882a593Smuzhiyun 	}
249*4882a593Smuzhiyun 
250*4882a593Smuzhiyun 	ret = regmap_read(chip->regmap, ISL29028_REG_ALSIR_U, &msb);
251*4882a593Smuzhiyun 	if (ret < 0) {
252*4882a593Smuzhiyun 		dev_err(dev,
253*4882a593Smuzhiyun 			"%s(): Error %d reading register ALSIR_U\n",
254*4882a593Smuzhiyun 			__func__, ret);
255*4882a593Smuzhiyun 		return ret;
256*4882a593Smuzhiyun 	}
257*4882a593Smuzhiyun 
258*4882a593Smuzhiyun 	*als_ir = ((msb & 0xF) << 8) | (lsb & 0xFF);
259*4882a593Smuzhiyun 
260*4882a593Smuzhiyun 	return 0;
261*4882a593Smuzhiyun }
262*4882a593Smuzhiyun 
isl29028_read_proxim(struct isl29028_chip * chip,int * prox)263*4882a593Smuzhiyun static int isl29028_read_proxim(struct isl29028_chip *chip, int *prox)
264*4882a593Smuzhiyun {
265*4882a593Smuzhiyun 	struct device *dev = regmap_get_device(chip->regmap);
266*4882a593Smuzhiyun 	unsigned int data;
267*4882a593Smuzhiyun 	int ret;
268*4882a593Smuzhiyun 
269*4882a593Smuzhiyun 	if (!chip->enable_prox) {
270*4882a593Smuzhiyun 		ret = isl29028_enable_proximity(chip);
271*4882a593Smuzhiyun 		if (ret < 0)
272*4882a593Smuzhiyun 			return ret;
273*4882a593Smuzhiyun 
274*4882a593Smuzhiyun 		chip->enable_prox = true;
275*4882a593Smuzhiyun 	}
276*4882a593Smuzhiyun 
277*4882a593Smuzhiyun 	ret = regmap_read(chip->regmap, ISL29028_REG_PROX_DATA, &data);
278*4882a593Smuzhiyun 	if (ret < 0) {
279*4882a593Smuzhiyun 		dev_err(dev, "%s(): Error %d reading register PROX_DATA\n",
280*4882a593Smuzhiyun 			__func__, ret);
281*4882a593Smuzhiyun 		return ret;
282*4882a593Smuzhiyun 	}
283*4882a593Smuzhiyun 
284*4882a593Smuzhiyun 	*prox = data;
285*4882a593Smuzhiyun 
286*4882a593Smuzhiyun 	return 0;
287*4882a593Smuzhiyun }
288*4882a593Smuzhiyun 
isl29028_als_get(struct isl29028_chip * chip,int * als_data)289*4882a593Smuzhiyun static int isl29028_als_get(struct isl29028_chip *chip, int *als_data)
290*4882a593Smuzhiyun {
291*4882a593Smuzhiyun 	struct device *dev = regmap_get_device(chip->regmap);
292*4882a593Smuzhiyun 	int ret;
293*4882a593Smuzhiyun 	int als_ir_data;
294*4882a593Smuzhiyun 
295*4882a593Smuzhiyun 	ret = isl29028_set_als_ir_mode(chip, ISL29028_MODE_ALS);
296*4882a593Smuzhiyun 	if (ret < 0) {
297*4882a593Smuzhiyun 		dev_err(dev, "%s(): Error %d enabling ALS mode\n", __func__,
298*4882a593Smuzhiyun 			ret);
299*4882a593Smuzhiyun 		return ret;
300*4882a593Smuzhiyun 	}
301*4882a593Smuzhiyun 
302*4882a593Smuzhiyun 	ret = isl29028_read_als_ir(chip, &als_ir_data);
303*4882a593Smuzhiyun 	if (ret < 0)
304*4882a593Smuzhiyun 		return ret;
305*4882a593Smuzhiyun 
306*4882a593Smuzhiyun 	/*
307*4882a593Smuzhiyun 	 * convert als data count to lux.
308*4882a593Smuzhiyun 	 * if lux_scale = 125,  lux = count * 0.031
309*4882a593Smuzhiyun 	 * if lux_scale = 2000, lux = count * 0.49
310*4882a593Smuzhiyun 	 */
311*4882a593Smuzhiyun 	if (chip->lux_scale == 125)
312*4882a593Smuzhiyun 		als_ir_data = (als_ir_data * 31) / 1000;
313*4882a593Smuzhiyun 	else
314*4882a593Smuzhiyun 		als_ir_data = (als_ir_data * 49) / 100;
315*4882a593Smuzhiyun 
316*4882a593Smuzhiyun 	*als_data = als_ir_data;
317*4882a593Smuzhiyun 
318*4882a593Smuzhiyun 	return 0;
319*4882a593Smuzhiyun }
320*4882a593Smuzhiyun 
isl29028_ir_get(struct isl29028_chip * chip,int * ir_data)321*4882a593Smuzhiyun static int isl29028_ir_get(struct isl29028_chip *chip, int *ir_data)
322*4882a593Smuzhiyun {
323*4882a593Smuzhiyun 	struct device *dev = regmap_get_device(chip->regmap);
324*4882a593Smuzhiyun 	int ret;
325*4882a593Smuzhiyun 
326*4882a593Smuzhiyun 	ret = isl29028_set_als_ir_mode(chip, ISL29028_MODE_IR);
327*4882a593Smuzhiyun 	if (ret < 0) {
328*4882a593Smuzhiyun 		dev_err(dev, "%s(): Error %d enabling IR mode\n", __func__,
329*4882a593Smuzhiyun 			ret);
330*4882a593Smuzhiyun 		return ret;
331*4882a593Smuzhiyun 	}
332*4882a593Smuzhiyun 
333*4882a593Smuzhiyun 	return isl29028_read_als_ir(chip, ir_data);
334*4882a593Smuzhiyun }
335*4882a593Smuzhiyun 
isl29028_set_pm_runtime_busy(struct isl29028_chip * chip,bool on)336*4882a593Smuzhiyun static int isl29028_set_pm_runtime_busy(struct isl29028_chip *chip, bool on)
337*4882a593Smuzhiyun {
338*4882a593Smuzhiyun 	struct device *dev = regmap_get_device(chip->regmap);
339*4882a593Smuzhiyun 	int ret;
340*4882a593Smuzhiyun 
341*4882a593Smuzhiyun 	if (on) {
342*4882a593Smuzhiyun 		ret = pm_runtime_get_sync(dev);
343*4882a593Smuzhiyun 		if (ret < 0)
344*4882a593Smuzhiyun 			pm_runtime_put_noidle(dev);
345*4882a593Smuzhiyun 	} else {
346*4882a593Smuzhiyun 		pm_runtime_mark_last_busy(dev);
347*4882a593Smuzhiyun 		ret = pm_runtime_put_autosuspend(dev);
348*4882a593Smuzhiyun 	}
349*4882a593Smuzhiyun 
350*4882a593Smuzhiyun 	return ret;
351*4882a593Smuzhiyun }
352*4882a593Smuzhiyun 
353*4882a593Smuzhiyun /* Channel IO */
isl29028_write_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int val,int val2,long mask)354*4882a593Smuzhiyun static int isl29028_write_raw(struct iio_dev *indio_dev,
355*4882a593Smuzhiyun 			      struct iio_chan_spec const *chan,
356*4882a593Smuzhiyun 			      int val, int val2, long mask)
357*4882a593Smuzhiyun {
358*4882a593Smuzhiyun 	struct isl29028_chip *chip = iio_priv(indio_dev);
359*4882a593Smuzhiyun 	struct device *dev = regmap_get_device(chip->regmap);
360*4882a593Smuzhiyun 	int ret;
361*4882a593Smuzhiyun 
362*4882a593Smuzhiyun 	ret = isl29028_set_pm_runtime_busy(chip, true);
363*4882a593Smuzhiyun 	if (ret < 0)
364*4882a593Smuzhiyun 		return ret;
365*4882a593Smuzhiyun 
366*4882a593Smuzhiyun 	mutex_lock(&chip->lock);
367*4882a593Smuzhiyun 
368*4882a593Smuzhiyun 	ret = -EINVAL;
369*4882a593Smuzhiyun 	switch (chan->type) {
370*4882a593Smuzhiyun 	case IIO_PROXIMITY:
371*4882a593Smuzhiyun 		if (mask != IIO_CHAN_INFO_SAMP_FREQ) {
372*4882a593Smuzhiyun 			dev_err(dev,
373*4882a593Smuzhiyun 				"%s(): proximity: Mask value 0x%08lx is not supported\n",
374*4882a593Smuzhiyun 				__func__, mask);
375*4882a593Smuzhiyun 			break;
376*4882a593Smuzhiyun 		}
377*4882a593Smuzhiyun 
378*4882a593Smuzhiyun 		if (val < 1 || val > 100) {
379*4882a593Smuzhiyun 			dev_err(dev,
380*4882a593Smuzhiyun 				"%s(): proximity: Sampling frequency %d is not in the range [1:100]\n",
381*4882a593Smuzhiyun 				__func__, val);
382*4882a593Smuzhiyun 			break;
383*4882a593Smuzhiyun 		}
384*4882a593Smuzhiyun 
385*4882a593Smuzhiyun 		ret = isl29028_set_proxim_sampling(chip, val, val2);
386*4882a593Smuzhiyun 		break;
387*4882a593Smuzhiyun 	case IIO_LIGHT:
388*4882a593Smuzhiyun 		if (mask != IIO_CHAN_INFO_SCALE) {
389*4882a593Smuzhiyun 			dev_err(dev,
390*4882a593Smuzhiyun 				"%s(): light: Mask value 0x%08lx is not supported\n",
391*4882a593Smuzhiyun 				__func__, mask);
392*4882a593Smuzhiyun 			break;
393*4882a593Smuzhiyun 		}
394*4882a593Smuzhiyun 
395*4882a593Smuzhiyun 		if (val != 125 && val != 2000) {
396*4882a593Smuzhiyun 			dev_err(dev,
397*4882a593Smuzhiyun 				"%s(): light: Lux scale %d is not in the set {125, 2000}\n",
398*4882a593Smuzhiyun 				__func__, val);
399*4882a593Smuzhiyun 			break;
400*4882a593Smuzhiyun 		}
401*4882a593Smuzhiyun 
402*4882a593Smuzhiyun 		ret = isl29028_set_als_scale(chip, val);
403*4882a593Smuzhiyun 		break;
404*4882a593Smuzhiyun 	default:
405*4882a593Smuzhiyun 		dev_err(dev, "%s(): Unsupported channel type %x\n",
406*4882a593Smuzhiyun 			__func__, chan->type);
407*4882a593Smuzhiyun 		break;
408*4882a593Smuzhiyun 	}
409*4882a593Smuzhiyun 
410*4882a593Smuzhiyun 	mutex_unlock(&chip->lock);
411*4882a593Smuzhiyun 
412*4882a593Smuzhiyun 	if (ret < 0)
413*4882a593Smuzhiyun 		return ret;
414*4882a593Smuzhiyun 
415*4882a593Smuzhiyun 	ret = isl29028_set_pm_runtime_busy(chip, false);
416*4882a593Smuzhiyun 	if (ret < 0)
417*4882a593Smuzhiyun 		return ret;
418*4882a593Smuzhiyun 
419*4882a593Smuzhiyun 	return ret;
420*4882a593Smuzhiyun }
421*4882a593Smuzhiyun 
isl29028_read_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int * val,int * val2,long mask)422*4882a593Smuzhiyun static int isl29028_read_raw(struct iio_dev *indio_dev,
423*4882a593Smuzhiyun 			     struct iio_chan_spec const *chan,
424*4882a593Smuzhiyun 			     int *val, int *val2, long mask)
425*4882a593Smuzhiyun {
426*4882a593Smuzhiyun 	struct isl29028_chip *chip = iio_priv(indio_dev);
427*4882a593Smuzhiyun 	struct device *dev = regmap_get_device(chip->regmap);
428*4882a593Smuzhiyun 	int ret, pm_ret;
429*4882a593Smuzhiyun 
430*4882a593Smuzhiyun 	ret = isl29028_set_pm_runtime_busy(chip, true);
431*4882a593Smuzhiyun 	if (ret < 0)
432*4882a593Smuzhiyun 		return ret;
433*4882a593Smuzhiyun 
434*4882a593Smuzhiyun 	mutex_lock(&chip->lock);
435*4882a593Smuzhiyun 
436*4882a593Smuzhiyun 	ret = -EINVAL;
437*4882a593Smuzhiyun 	switch (mask) {
438*4882a593Smuzhiyun 	case IIO_CHAN_INFO_RAW:
439*4882a593Smuzhiyun 	case IIO_CHAN_INFO_PROCESSED:
440*4882a593Smuzhiyun 		switch (chan->type) {
441*4882a593Smuzhiyun 		case IIO_LIGHT:
442*4882a593Smuzhiyun 			ret = isl29028_als_get(chip, val);
443*4882a593Smuzhiyun 			break;
444*4882a593Smuzhiyun 		case IIO_INTENSITY:
445*4882a593Smuzhiyun 			ret = isl29028_ir_get(chip, val);
446*4882a593Smuzhiyun 			break;
447*4882a593Smuzhiyun 		case IIO_PROXIMITY:
448*4882a593Smuzhiyun 			ret = isl29028_read_proxim(chip, val);
449*4882a593Smuzhiyun 			break;
450*4882a593Smuzhiyun 		default:
451*4882a593Smuzhiyun 			break;
452*4882a593Smuzhiyun 		}
453*4882a593Smuzhiyun 
454*4882a593Smuzhiyun 		if (ret < 0)
455*4882a593Smuzhiyun 			break;
456*4882a593Smuzhiyun 
457*4882a593Smuzhiyun 		ret = IIO_VAL_INT;
458*4882a593Smuzhiyun 		break;
459*4882a593Smuzhiyun 	case IIO_CHAN_INFO_SAMP_FREQ:
460*4882a593Smuzhiyun 		if (chan->type != IIO_PROXIMITY)
461*4882a593Smuzhiyun 			break;
462*4882a593Smuzhiyun 
463*4882a593Smuzhiyun 		*val = chip->prox_sampling_int;
464*4882a593Smuzhiyun 		*val2 = chip->prox_sampling_frac;
465*4882a593Smuzhiyun 		ret = IIO_VAL_INT;
466*4882a593Smuzhiyun 		break;
467*4882a593Smuzhiyun 	case IIO_CHAN_INFO_SCALE:
468*4882a593Smuzhiyun 		if (chan->type != IIO_LIGHT)
469*4882a593Smuzhiyun 			break;
470*4882a593Smuzhiyun 		*val = chip->lux_scale;
471*4882a593Smuzhiyun 		ret = IIO_VAL_INT;
472*4882a593Smuzhiyun 		break;
473*4882a593Smuzhiyun 	default:
474*4882a593Smuzhiyun 		dev_err(dev, "%s(): mask value 0x%08lx is not supported\n",
475*4882a593Smuzhiyun 			__func__, mask);
476*4882a593Smuzhiyun 		break;
477*4882a593Smuzhiyun 	}
478*4882a593Smuzhiyun 
479*4882a593Smuzhiyun 	mutex_unlock(&chip->lock);
480*4882a593Smuzhiyun 
481*4882a593Smuzhiyun 	if (ret < 0)
482*4882a593Smuzhiyun 		return ret;
483*4882a593Smuzhiyun 
484*4882a593Smuzhiyun 	/**
485*4882a593Smuzhiyun 	 * Preserve the ret variable if the call to
486*4882a593Smuzhiyun 	 * isl29028_set_pm_runtime_busy() is successful so the reading
487*4882a593Smuzhiyun 	 * (if applicable) is returned to user space.
488*4882a593Smuzhiyun 	 */
489*4882a593Smuzhiyun 	pm_ret = isl29028_set_pm_runtime_busy(chip, false);
490*4882a593Smuzhiyun 	if (pm_ret < 0)
491*4882a593Smuzhiyun 		return pm_ret;
492*4882a593Smuzhiyun 
493*4882a593Smuzhiyun 	return ret;
494*4882a593Smuzhiyun }
495*4882a593Smuzhiyun 
496*4882a593Smuzhiyun static IIO_CONST_ATTR(in_proximity_sampling_frequency_available,
497*4882a593Smuzhiyun 				"1.25 2.5 5 10 13.3 20 80 100");
498*4882a593Smuzhiyun static IIO_CONST_ATTR(in_illuminance_scale_available, "125 2000");
499*4882a593Smuzhiyun 
500*4882a593Smuzhiyun #define ISL29028_CONST_ATTR(name) (&iio_const_attr_##name.dev_attr.attr)
501*4882a593Smuzhiyun static struct attribute *isl29028_attributes[] = {
502*4882a593Smuzhiyun 	ISL29028_CONST_ATTR(in_proximity_sampling_frequency_available),
503*4882a593Smuzhiyun 	ISL29028_CONST_ATTR(in_illuminance_scale_available),
504*4882a593Smuzhiyun 	NULL,
505*4882a593Smuzhiyun };
506*4882a593Smuzhiyun 
507*4882a593Smuzhiyun static const struct attribute_group isl29108_group = {
508*4882a593Smuzhiyun 	.attrs = isl29028_attributes,
509*4882a593Smuzhiyun };
510*4882a593Smuzhiyun 
511*4882a593Smuzhiyun static const struct iio_chan_spec isl29028_channels[] = {
512*4882a593Smuzhiyun 	{
513*4882a593Smuzhiyun 		.type = IIO_LIGHT,
514*4882a593Smuzhiyun 		.info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED) |
515*4882a593Smuzhiyun 		BIT(IIO_CHAN_INFO_SCALE),
516*4882a593Smuzhiyun 	}, {
517*4882a593Smuzhiyun 		.type = IIO_INTENSITY,
518*4882a593Smuzhiyun 		.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
519*4882a593Smuzhiyun 	}, {
520*4882a593Smuzhiyun 		.type = IIO_PROXIMITY,
521*4882a593Smuzhiyun 		.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
522*4882a593Smuzhiyun 		BIT(IIO_CHAN_INFO_SAMP_FREQ),
523*4882a593Smuzhiyun 	}
524*4882a593Smuzhiyun };
525*4882a593Smuzhiyun 
526*4882a593Smuzhiyun static const struct iio_info isl29028_info = {
527*4882a593Smuzhiyun 	.attrs = &isl29108_group,
528*4882a593Smuzhiyun 	.read_raw = isl29028_read_raw,
529*4882a593Smuzhiyun 	.write_raw = isl29028_write_raw,
530*4882a593Smuzhiyun };
531*4882a593Smuzhiyun 
isl29028_clear_configure_reg(struct isl29028_chip * chip)532*4882a593Smuzhiyun static int isl29028_clear_configure_reg(struct isl29028_chip *chip)
533*4882a593Smuzhiyun {
534*4882a593Smuzhiyun 	struct device *dev = regmap_get_device(chip->regmap);
535*4882a593Smuzhiyun 	int ret;
536*4882a593Smuzhiyun 
537*4882a593Smuzhiyun 	ret = regmap_write(chip->regmap, ISL29028_REG_CONFIGURE, 0x0);
538*4882a593Smuzhiyun 	if (ret < 0)
539*4882a593Smuzhiyun 		dev_err(dev, "%s(): Error %d clearing the CONFIGURE register\n",
540*4882a593Smuzhiyun 			__func__, ret);
541*4882a593Smuzhiyun 
542*4882a593Smuzhiyun 	chip->als_ir_mode = ISL29028_MODE_NONE;
543*4882a593Smuzhiyun 	chip->enable_prox = false;
544*4882a593Smuzhiyun 
545*4882a593Smuzhiyun 	return ret;
546*4882a593Smuzhiyun }
547*4882a593Smuzhiyun 
isl29028_is_volatile_reg(struct device * dev,unsigned int reg)548*4882a593Smuzhiyun static bool isl29028_is_volatile_reg(struct device *dev, unsigned int reg)
549*4882a593Smuzhiyun {
550*4882a593Smuzhiyun 	switch (reg) {
551*4882a593Smuzhiyun 	case ISL29028_REG_INTERRUPT:
552*4882a593Smuzhiyun 	case ISL29028_REG_PROX_DATA:
553*4882a593Smuzhiyun 	case ISL29028_REG_ALSIR_L:
554*4882a593Smuzhiyun 	case ISL29028_REG_ALSIR_U:
555*4882a593Smuzhiyun 		return true;
556*4882a593Smuzhiyun 	default:
557*4882a593Smuzhiyun 		return false;
558*4882a593Smuzhiyun 	}
559*4882a593Smuzhiyun }
560*4882a593Smuzhiyun 
561*4882a593Smuzhiyun static const struct regmap_config isl29028_regmap_config = {
562*4882a593Smuzhiyun 	.reg_bits = 8,
563*4882a593Smuzhiyun 	.val_bits = 8,
564*4882a593Smuzhiyun 	.volatile_reg = isl29028_is_volatile_reg,
565*4882a593Smuzhiyun 	.max_register = ISL29028_NUM_REGS - 1,
566*4882a593Smuzhiyun 	.num_reg_defaults_raw = ISL29028_NUM_REGS,
567*4882a593Smuzhiyun 	.cache_type = REGCACHE_RBTREE,
568*4882a593Smuzhiyun };
569*4882a593Smuzhiyun 
isl29028_probe(struct i2c_client * client,const struct i2c_device_id * id)570*4882a593Smuzhiyun static int isl29028_probe(struct i2c_client *client,
571*4882a593Smuzhiyun 			  const struct i2c_device_id *id)
572*4882a593Smuzhiyun {
573*4882a593Smuzhiyun 	struct isl29028_chip *chip;
574*4882a593Smuzhiyun 	struct iio_dev *indio_dev;
575*4882a593Smuzhiyun 	int ret;
576*4882a593Smuzhiyun 
577*4882a593Smuzhiyun 	indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*chip));
578*4882a593Smuzhiyun 	if (!indio_dev)
579*4882a593Smuzhiyun 		return -ENOMEM;
580*4882a593Smuzhiyun 
581*4882a593Smuzhiyun 	chip = iio_priv(indio_dev);
582*4882a593Smuzhiyun 
583*4882a593Smuzhiyun 	i2c_set_clientdata(client, indio_dev);
584*4882a593Smuzhiyun 	mutex_init(&chip->lock);
585*4882a593Smuzhiyun 
586*4882a593Smuzhiyun 	chip->regmap = devm_regmap_init_i2c(client, &isl29028_regmap_config);
587*4882a593Smuzhiyun 	if (IS_ERR(chip->regmap)) {
588*4882a593Smuzhiyun 		ret = PTR_ERR(chip->regmap);
589*4882a593Smuzhiyun 		dev_err(&client->dev, "%s: Error %d initializing regmap\n",
590*4882a593Smuzhiyun 			__func__, ret);
591*4882a593Smuzhiyun 		return ret;
592*4882a593Smuzhiyun 	}
593*4882a593Smuzhiyun 
594*4882a593Smuzhiyun 	chip->enable_prox  = false;
595*4882a593Smuzhiyun 	chip->prox_sampling_int = 20;
596*4882a593Smuzhiyun 	chip->prox_sampling_frac = 0;
597*4882a593Smuzhiyun 	chip->lux_scale = 2000;
598*4882a593Smuzhiyun 
599*4882a593Smuzhiyun 	ret = regmap_write(chip->regmap, ISL29028_REG_TEST1_MODE, 0x0);
600*4882a593Smuzhiyun 	if (ret < 0) {
601*4882a593Smuzhiyun 		dev_err(&client->dev,
602*4882a593Smuzhiyun 			"%s(): Error %d writing to TEST1_MODE register\n",
603*4882a593Smuzhiyun 			__func__, ret);
604*4882a593Smuzhiyun 		return ret;
605*4882a593Smuzhiyun 	}
606*4882a593Smuzhiyun 
607*4882a593Smuzhiyun 	ret = regmap_write(chip->regmap, ISL29028_REG_TEST2_MODE, 0x0);
608*4882a593Smuzhiyun 	if (ret < 0) {
609*4882a593Smuzhiyun 		dev_err(&client->dev,
610*4882a593Smuzhiyun 			"%s(): Error %d writing to TEST2_MODE register\n",
611*4882a593Smuzhiyun 			__func__, ret);
612*4882a593Smuzhiyun 		return ret;
613*4882a593Smuzhiyun 	}
614*4882a593Smuzhiyun 
615*4882a593Smuzhiyun 	ret = isl29028_clear_configure_reg(chip);
616*4882a593Smuzhiyun 	if (ret < 0)
617*4882a593Smuzhiyun 		return ret;
618*4882a593Smuzhiyun 
619*4882a593Smuzhiyun 	indio_dev->info = &isl29028_info;
620*4882a593Smuzhiyun 	indio_dev->channels = isl29028_channels;
621*4882a593Smuzhiyun 	indio_dev->num_channels = ARRAY_SIZE(isl29028_channels);
622*4882a593Smuzhiyun 	indio_dev->name = id->name;
623*4882a593Smuzhiyun 	indio_dev->modes = INDIO_DIRECT_MODE;
624*4882a593Smuzhiyun 
625*4882a593Smuzhiyun 	pm_runtime_enable(&client->dev);
626*4882a593Smuzhiyun 	pm_runtime_set_autosuspend_delay(&client->dev,
627*4882a593Smuzhiyun 					 ISL29028_POWER_OFF_DELAY_MS);
628*4882a593Smuzhiyun 	pm_runtime_use_autosuspend(&client->dev);
629*4882a593Smuzhiyun 
630*4882a593Smuzhiyun 	ret = iio_device_register(indio_dev);
631*4882a593Smuzhiyun 	if (ret < 0) {
632*4882a593Smuzhiyun 		dev_err(&client->dev,
633*4882a593Smuzhiyun 			"%s(): iio registration failed with error %d\n",
634*4882a593Smuzhiyun 			__func__, ret);
635*4882a593Smuzhiyun 		return ret;
636*4882a593Smuzhiyun 	}
637*4882a593Smuzhiyun 
638*4882a593Smuzhiyun 	return 0;
639*4882a593Smuzhiyun }
640*4882a593Smuzhiyun 
isl29028_remove(struct i2c_client * client)641*4882a593Smuzhiyun static int isl29028_remove(struct i2c_client *client)
642*4882a593Smuzhiyun {
643*4882a593Smuzhiyun 	struct iio_dev *indio_dev = i2c_get_clientdata(client);
644*4882a593Smuzhiyun 	struct isl29028_chip *chip = iio_priv(indio_dev);
645*4882a593Smuzhiyun 
646*4882a593Smuzhiyun 	iio_device_unregister(indio_dev);
647*4882a593Smuzhiyun 
648*4882a593Smuzhiyun 	pm_runtime_disable(&client->dev);
649*4882a593Smuzhiyun 	pm_runtime_set_suspended(&client->dev);
650*4882a593Smuzhiyun 	pm_runtime_put_noidle(&client->dev);
651*4882a593Smuzhiyun 
652*4882a593Smuzhiyun 	return isl29028_clear_configure_reg(chip);
653*4882a593Smuzhiyun }
654*4882a593Smuzhiyun 
isl29028_suspend(struct device * dev)655*4882a593Smuzhiyun static int __maybe_unused isl29028_suspend(struct device *dev)
656*4882a593Smuzhiyun {
657*4882a593Smuzhiyun 	struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
658*4882a593Smuzhiyun 	struct isl29028_chip *chip = iio_priv(indio_dev);
659*4882a593Smuzhiyun 	int ret;
660*4882a593Smuzhiyun 
661*4882a593Smuzhiyun 	mutex_lock(&chip->lock);
662*4882a593Smuzhiyun 
663*4882a593Smuzhiyun 	ret = isl29028_clear_configure_reg(chip);
664*4882a593Smuzhiyun 
665*4882a593Smuzhiyun 	mutex_unlock(&chip->lock);
666*4882a593Smuzhiyun 
667*4882a593Smuzhiyun 	return ret;
668*4882a593Smuzhiyun }
669*4882a593Smuzhiyun 
isl29028_resume(struct device * dev)670*4882a593Smuzhiyun static int __maybe_unused isl29028_resume(struct device *dev)
671*4882a593Smuzhiyun {
672*4882a593Smuzhiyun 	/**
673*4882a593Smuzhiyun 	 * The specific component (ALS/IR or proximity) will enable itself as
674*4882a593Smuzhiyun 	 * needed the next time that the user requests a reading. This is done
675*4882a593Smuzhiyun 	 * above in isl29028_set_als_ir_mode() and isl29028_enable_proximity().
676*4882a593Smuzhiyun 	 */
677*4882a593Smuzhiyun 	return 0;
678*4882a593Smuzhiyun }
679*4882a593Smuzhiyun 
680*4882a593Smuzhiyun static const struct dev_pm_ops isl29028_pm_ops = {
681*4882a593Smuzhiyun 	SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
682*4882a593Smuzhiyun 				pm_runtime_force_resume)
683*4882a593Smuzhiyun 	SET_RUNTIME_PM_OPS(isl29028_suspend, isl29028_resume, NULL)
684*4882a593Smuzhiyun };
685*4882a593Smuzhiyun 
686*4882a593Smuzhiyun static const struct i2c_device_id isl29028_id[] = {
687*4882a593Smuzhiyun 	{"isl29028", 0},
688*4882a593Smuzhiyun 	{"isl29030", 0},
689*4882a593Smuzhiyun 	{}
690*4882a593Smuzhiyun };
691*4882a593Smuzhiyun MODULE_DEVICE_TABLE(i2c, isl29028_id);
692*4882a593Smuzhiyun 
693*4882a593Smuzhiyun static const struct of_device_id isl29028_of_match[] = {
694*4882a593Smuzhiyun 	{ .compatible = "isl,isl29028", }, /* for backward compat., don't use */
695*4882a593Smuzhiyun 	{ .compatible = "isil,isl29028", },
696*4882a593Smuzhiyun 	{ .compatible = "isil,isl29030", },
697*4882a593Smuzhiyun 	{ },
698*4882a593Smuzhiyun };
699*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, isl29028_of_match);
700*4882a593Smuzhiyun 
701*4882a593Smuzhiyun static struct i2c_driver isl29028_driver = {
702*4882a593Smuzhiyun 	.driver  = {
703*4882a593Smuzhiyun 		.name = "isl29028",
704*4882a593Smuzhiyun 		.pm = &isl29028_pm_ops,
705*4882a593Smuzhiyun 		.of_match_table = isl29028_of_match,
706*4882a593Smuzhiyun 	},
707*4882a593Smuzhiyun 	.probe	 = isl29028_probe,
708*4882a593Smuzhiyun 	.remove  = isl29028_remove,
709*4882a593Smuzhiyun 	.id_table = isl29028_id,
710*4882a593Smuzhiyun };
711*4882a593Smuzhiyun 
712*4882a593Smuzhiyun module_i2c_driver(isl29028_driver);
713*4882a593Smuzhiyun 
714*4882a593Smuzhiyun MODULE_DESCRIPTION("ISL29028 Ambient Light and Proximity Sensor driver");
715*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
716*4882a593Smuzhiyun MODULE_AUTHOR("Laxman Dewangan <ldewangan@nvidia.com>");
717