1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright (C) 2013 Samsung Electronics Co., Ltd.
4*4882a593Smuzhiyun * Author: Beomho Seo <beomho.seo@samsung.com>
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun #include <linux/delay.h>
8*4882a593Smuzhiyun #include <linux/err.h>
9*4882a593Smuzhiyun #include <linux/i2c.h>
10*4882a593Smuzhiyun #include <linux/mutex.h>
11*4882a593Smuzhiyun #include <linux/module.h>
12*4882a593Smuzhiyun #include <linux/interrupt.h>
13*4882a593Smuzhiyun #include <linux/regulator/consumer.h>
14*4882a593Smuzhiyun #include <linux/iio/iio.h>
15*4882a593Smuzhiyun #include <linux/iio/sysfs.h>
16*4882a593Smuzhiyun #include <linux/iio/events.h>
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun /* Slave address 0x19 for PS of 7 bit addressing protocol for I2C */
19*4882a593Smuzhiyun #define CM36651_I2C_ADDR_PS 0x19
20*4882a593Smuzhiyun /* Alert Response Address */
21*4882a593Smuzhiyun #define CM36651_ARA 0x0C
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun /* Ambient light sensor */
24*4882a593Smuzhiyun #define CM36651_CS_CONF1 0x00
25*4882a593Smuzhiyun #define CM36651_CS_CONF2 0x01
26*4882a593Smuzhiyun #define CM36651_ALS_WH_M 0x02
27*4882a593Smuzhiyun #define CM36651_ALS_WH_L 0x03
28*4882a593Smuzhiyun #define CM36651_ALS_WL_M 0x04
29*4882a593Smuzhiyun #define CM36651_ALS_WL_L 0x05
30*4882a593Smuzhiyun #define CM36651_CS_CONF3 0x06
31*4882a593Smuzhiyun #define CM36651_CS_CONF_REG_NUM 0x02
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun /* Proximity sensor */
34*4882a593Smuzhiyun #define CM36651_PS_CONF1 0x00
35*4882a593Smuzhiyun #define CM36651_PS_THD 0x01
36*4882a593Smuzhiyun #define CM36651_PS_CANC 0x02
37*4882a593Smuzhiyun #define CM36651_PS_CONF2 0x03
38*4882a593Smuzhiyun #define CM36651_PS_REG_NUM 0x04
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun /* CS_CONF1 command code */
41*4882a593Smuzhiyun #define CM36651_ALS_ENABLE 0x00
42*4882a593Smuzhiyun #define CM36651_ALS_DISABLE 0x01
43*4882a593Smuzhiyun #define CM36651_ALS_INT_EN 0x02
44*4882a593Smuzhiyun #define CM36651_ALS_THRES 0x04
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun /* CS_CONF2 command code */
47*4882a593Smuzhiyun #define CM36651_CS_CONF2_DEFAULT_BIT 0x08
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun /* CS_CONF3 channel integration time */
50*4882a593Smuzhiyun #define CM36651_CS_IT1 0x00 /* Integration time 80 msec */
51*4882a593Smuzhiyun #define CM36651_CS_IT2 0x40 /* Integration time 160 msec */
52*4882a593Smuzhiyun #define CM36651_CS_IT3 0x80 /* Integration time 320 msec */
53*4882a593Smuzhiyun #define CM36651_CS_IT4 0xC0 /* Integration time 640 msec */
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun /* PS_CONF1 command code */
56*4882a593Smuzhiyun #define CM36651_PS_ENABLE 0x00
57*4882a593Smuzhiyun #define CM36651_PS_DISABLE 0x01
58*4882a593Smuzhiyun #define CM36651_PS_INT_EN 0x02
59*4882a593Smuzhiyun #define CM36651_PS_PERS2 0x04
60*4882a593Smuzhiyun #define CM36651_PS_PERS3 0x08
61*4882a593Smuzhiyun #define CM36651_PS_PERS4 0x0C
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun /* PS_CONF1 command code: integration time */
64*4882a593Smuzhiyun #define CM36651_PS_IT1 0x00 /* Integration time 0.32 msec */
65*4882a593Smuzhiyun #define CM36651_PS_IT2 0x10 /* Integration time 0.42 msec */
66*4882a593Smuzhiyun #define CM36651_PS_IT3 0x20 /* Integration time 0.52 msec */
67*4882a593Smuzhiyun #define CM36651_PS_IT4 0x30 /* Integration time 0.64 msec */
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun /* PS_CONF1 command code: duty ratio */
70*4882a593Smuzhiyun #define CM36651_PS_DR1 0x00 /* Duty ratio 1/80 */
71*4882a593Smuzhiyun #define CM36651_PS_DR2 0x40 /* Duty ratio 1/160 */
72*4882a593Smuzhiyun #define CM36651_PS_DR3 0x80 /* Duty ratio 1/320 */
73*4882a593Smuzhiyun #define CM36651_PS_DR4 0xC0 /* Duty ratio 1/640 */
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun /* PS_THD command code */
76*4882a593Smuzhiyun #define CM36651_PS_INITIAL_THD 0x05
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun /* PS_CANC command code */
79*4882a593Smuzhiyun #define CM36651_PS_CANC_DEFAULT 0x00
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun /* PS_CONF2 command code */
82*4882a593Smuzhiyun #define CM36651_PS_HYS1 0x00
83*4882a593Smuzhiyun #define CM36651_PS_HYS2 0x01
84*4882a593Smuzhiyun #define CM36651_PS_SMART_PERS_EN 0x02
85*4882a593Smuzhiyun #define CM36651_PS_DIR_INT 0x04
86*4882a593Smuzhiyun #define CM36651_PS_MS 0x10
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun #define CM36651_CS_COLOR_NUM 4
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun #define CM36651_CLOSE_PROXIMITY 0x32
91*4882a593Smuzhiyun #define CM36651_FAR_PROXIMITY 0x33
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun #define CM36651_CS_INT_TIME_AVAIL "0.08 0.16 0.32 0.64"
94*4882a593Smuzhiyun #define CM36651_PS_INT_TIME_AVAIL "0.000320 0.000420 0.000520 0.000640"
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun enum cm36651_operation_mode {
97*4882a593Smuzhiyun CM36651_LIGHT_EN,
98*4882a593Smuzhiyun CM36651_PROXIMITY_EN,
99*4882a593Smuzhiyun CM36651_PROXIMITY_EV_EN,
100*4882a593Smuzhiyun };
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun enum cm36651_light_channel_idx {
103*4882a593Smuzhiyun CM36651_LIGHT_CHANNEL_IDX_RED,
104*4882a593Smuzhiyun CM36651_LIGHT_CHANNEL_IDX_GREEN,
105*4882a593Smuzhiyun CM36651_LIGHT_CHANNEL_IDX_BLUE,
106*4882a593Smuzhiyun CM36651_LIGHT_CHANNEL_IDX_CLEAR,
107*4882a593Smuzhiyun };
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun enum cm36651_command {
110*4882a593Smuzhiyun CM36651_CMD_READ_RAW_LIGHT,
111*4882a593Smuzhiyun CM36651_CMD_READ_RAW_PROXIMITY,
112*4882a593Smuzhiyun CM36651_CMD_PROX_EV_EN,
113*4882a593Smuzhiyun CM36651_CMD_PROX_EV_DIS,
114*4882a593Smuzhiyun };
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun static const u8 cm36651_cs_reg[CM36651_CS_CONF_REG_NUM] = {
117*4882a593Smuzhiyun CM36651_CS_CONF1,
118*4882a593Smuzhiyun CM36651_CS_CONF2,
119*4882a593Smuzhiyun };
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun static const u8 cm36651_ps_reg[CM36651_PS_REG_NUM] = {
122*4882a593Smuzhiyun CM36651_PS_CONF1,
123*4882a593Smuzhiyun CM36651_PS_THD,
124*4882a593Smuzhiyun CM36651_PS_CANC,
125*4882a593Smuzhiyun CM36651_PS_CONF2,
126*4882a593Smuzhiyun };
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun struct cm36651_data {
129*4882a593Smuzhiyun const struct cm36651_platform_data *pdata;
130*4882a593Smuzhiyun struct i2c_client *client;
131*4882a593Smuzhiyun struct i2c_client *ps_client;
132*4882a593Smuzhiyun struct i2c_client *ara_client;
133*4882a593Smuzhiyun struct mutex lock;
134*4882a593Smuzhiyun struct regulator *vled_reg;
135*4882a593Smuzhiyun unsigned long flags;
136*4882a593Smuzhiyun int cs_int_time[CM36651_CS_COLOR_NUM];
137*4882a593Smuzhiyun int ps_int_time;
138*4882a593Smuzhiyun u8 cs_ctrl_regs[CM36651_CS_CONF_REG_NUM];
139*4882a593Smuzhiyun u8 ps_ctrl_regs[CM36651_PS_REG_NUM];
140*4882a593Smuzhiyun u16 color[CM36651_CS_COLOR_NUM];
141*4882a593Smuzhiyun };
142*4882a593Smuzhiyun
cm36651_setup_reg(struct cm36651_data * cm36651)143*4882a593Smuzhiyun static int cm36651_setup_reg(struct cm36651_data *cm36651)
144*4882a593Smuzhiyun {
145*4882a593Smuzhiyun struct i2c_client *client = cm36651->client;
146*4882a593Smuzhiyun struct i2c_client *ps_client = cm36651->ps_client;
147*4882a593Smuzhiyun int i, ret;
148*4882a593Smuzhiyun
149*4882a593Smuzhiyun /* CS initialization */
150*4882a593Smuzhiyun cm36651->cs_ctrl_regs[CM36651_CS_CONF1] = CM36651_ALS_ENABLE |
151*4882a593Smuzhiyun CM36651_ALS_THRES;
152*4882a593Smuzhiyun cm36651->cs_ctrl_regs[CM36651_CS_CONF2] = CM36651_CS_CONF2_DEFAULT_BIT;
153*4882a593Smuzhiyun
154*4882a593Smuzhiyun for (i = 0; i < CM36651_CS_CONF_REG_NUM; i++) {
155*4882a593Smuzhiyun ret = i2c_smbus_write_byte_data(client, cm36651_cs_reg[i],
156*4882a593Smuzhiyun cm36651->cs_ctrl_regs[i]);
157*4882a593Smuzhiyun if (ret < 0)
158*4882a593Smuzhiyun return ret;
159*4882a593Smuzhiyun }
160*4882a593Smuzhiyun
161*4882a593Smuzhiyun /* PS initialization */
162*4882a593Smuzhiyun cm36651->ps_ctrl_regs[CM36651_PS_CONF1] = CM36651_PS_ENABLE |
163*4882a593Smuzhiyun CM36651_PS_IT2;
164*4882a593Smuzhiyun cm36651->ps_ctrl_regs[CM36651_PS_THD] = CM36651_PS_INITIAL_THD;
165*4882a593Smuzhiyun cm36651->ps_ctrl_regs[CM36651_PS_CANC] = CM36651_PS_CANC_DEFAULT;
166*4882a593Smuzhiyun cm36651->ps_ctrl_regs[CM36651_PS_CONF2] = CM36651_PS_HYS2 |
167*4882a593Smuzhiyun CM36651_PS_DIR_INT | CM36651_PS_SMART_PERS_EN;
168*4882a593Smuzhiyun
169*4882a593Smuzhiyun for (i = 0; i < CM36651_PS_REG_NUM; i++) {
170*4882a593Smuzhiyun ret = i2c_smbus_write_byte_data(ps_client, cm36651_ps_reg[i],
171*4882a593Smuzhiyun cm36651->ps_ctrl_regs[i]);
172*4882a593Smuzhiyun if (ret < 0)
173*4882a593Smuzhiyun return ret;
174*4882a593Smuzhiyun }
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun /* Set shutdown mode */
177*4882a593Smuzhiyun ret = i2c_smbus_write_byte_data(client, CM36651_CS_CONF1,
178*4882a593Smuzhiyun CM36651_ALS_DISABLE);
179*4882a593Smuzhiyun if (ret < 0)
180*4882a593Smuzhiyun return ret;
181*4882a593Smuzhiyun
182*4882a593Smuzhiyun ret = i2c_smbus_write_byte_data(cm36651->ps_client,
183*4882a593Smuzhiyun CM36651_PS_CONF1, CM36651_PS_DISABLE);
184*4882a593Smuzhiyun if (ret < 0)
185*4882a593Smuzhiyun return ret;
186*4882a593Smuzhiyun
187*4882a593Smuzhiyun return 0;
188*4882a593Smuzhiyun }
189*4882a593Smuzhiyun
cm36651_read_output(struct cm36651_data * cm36651,struct iio_chan_spec const * chan,int * val)190*4882a593Smuzhiyun static int cm36651_read_output(struct cm36651_data *cm36651,
191*4882a593Smuzhiyun struct iio_chan_spec const *chan, int *val)
192*4882a593Smuzhiyun {
193*4882a593Smuzhiyun struct i2c_client *client = cm36651->client;
194*4882a593Smuzhiyun int ret = -EINVAL;
195*4882a593Smuzhiyun
196*4882a593Smuzhiyun switch (chan->type) {
197*4882a593Smuzhiyun case IIO_LIGHT:
198*4882a593Smuzhiyun *val = i2c_smbus_read_word_data(client, chan->address);
199*4882a593Smuzhiyun if (*val < 0)
200*4882a593Smuzhiyun return ret;
201*4882a593Smuzhiyun
202*4882a593Smuzhiyun ret = i2c_smbus_write_byte_data(client, CM36651_CS_CONF1,
203*4882a593Smuzhiyun CM36651_ALS_DISABLE);
204*4882a593Smuzhiyun if (ret < 0)
205*4882a593Smuzhiyun return ret;
206*4882a593Smuzhiyun
207*4882a593Smuzhiyun ret = IIO_VAL_INT;
208*4882a593Smuzhiyun break;
209*4882a593Smuzhiyun case IIO_PROXIMITY:
210*4882a593Smuzhiyun *val = i2c_smbus_read_byte(cm36651->ps_client);
211*4882a593Smuzhiyun if (*val < 0)
212*4882a593Smuzhiyun return ret;
213*4882a593Smuzhiyun
214*4882a593Smuzhiyun if (!test_bit(CM36651_PROXIMITY_EV_EN, &cm36651->flags)) {
215*4882a593Smuzhiyun ret = i2c_smbus_write_byte_data(cm36651->ps_client,
216*4882a593Smuzhiyun CM36651_PS_CONF1, CM36651_PS_DISABLE);
217*4882a593Smuzhiyun if (ret < 0)
218*4882a593Smuzhiyun return ret;
219*4882a593Smuzhiyun }
220*4882a593Smuzhiyun
221*4882a593Smuzhiyun ret = IIO_VAL_INT;
222*4882a593Smuzhiyun break;
223*4882a593Smuzhiyun default:
224*4882a593Smuzhiyun break;
225*4882a593Smuzhiyun }
226*4882a593Smuzhiyun
227*4882a593Smuzhiyun return ret;
228*4882a593Smuzhiyun }
229*4882a593Smuzhiyun
cm36651_irq_handler(int irq,void * data)230*4882a593Smuzhiyun static irqreturn_t cm36651_irq_handler(int irq, void *data)
231*4882a593Smuzhiyun {
232*4882a593Smuzhiyun struct iio_dev *indio_dev = data;
233*4882a593Smuzhiyun struct cm36651_data *cm36651 = iio_priv(indio_dev);
234*4882a593Smuzhiyun struct i2c_client *client = cm36651->client;
235*4882a593Smuzhiyun int ev_dir, ret;
236*4882a593Smuzhiyun u64 ev_code;
237*4882a593Smuzhiyun
238*4882a593Smuzhiyun /*
239*4882a593Smuzhiyun * The PS INT pin is an active low signal that PS INT move logic low
240*4882a593Smuzhiyun * when the object is detect. Once the MCU host received the PS INT
241*4882a593Smuzhiyun * "LOW" signal, the Host needs to read the data at Alert Response
242*4882a593Smuzhiyun * Address(ARA) to clear the PS INT signal. After clearing the PS
243*4882a593Smuzhiyun * INT pin, the PS INT signal toggles from low to high.
244*4882a593Smuzhiyun */
245*4882a593Smuzhiyun ret = i2c_smbus_read_byte(cm36651->ara_client);
246*4882a593Smuzhiyun if (ret < 0) {
247*4882a593Smuzhiyun dev_err(&client->dev,
248*4882a593Smuzhiyun "%s: Data read failed: %d\n", __func__, ret);
249*4882a593Smuzhiyun return IRQ_HANDLED;
250*4882a593Smuzhiyun }
251*4882a593Smuzhiyun switch (ret) {
252*4882a593Smuzhiyun case CM36651_CLOSE_PROXIMITY:
253*4882a593Smuzhiyun ev_dir = IIO_EV_DIR_RISING;
254*4882a593Smuzhiyun break;
255*4882a593Smuzhiyun case CM36651_FAR_PROXIMITY:
256*4882a593Smuzhiyun ev_dir = IIO_EV_DIR_FALLING;
257*4882a593Smuzhiyun break;
258*4882a593Smuzhiyun default:
259*4882a593Smuzhiyun dev_err(&client->dev,
260*4882a593Smuzhiyun "%s: Data read wrong: %d\n", __func__, ret);
261*4882a593Smuzhiyun return IRQ_HANDLED;
262*4882a593Smuzhiyun }
263*4882a593Smuzhiyun
264*4882a593Smuzhiyun ev_code = IIO_UNMOD_EVENT_CODE(IIO_PROXIMITY,
265*4882a593Smuzhiyun CM36651_CMD_READ_RAW_PROXIMITY,
266*4882a593Smuzhiyun IIO_EV_TYPE_THRESH, ev_dir);
267*4882a593Smuzhiyun
268*4882a593Smuzhiyun iio_push_event(indio_dev, ev_code, iio_get_time_ns(indio_dev));
269*4882a593Smuzhiyun
270*4882a593Smuzhiyun return IRQ_HANDLED;
271*4882a593Smuzhiyun }
272*4882a593Smuzhiyun
cm36651_set_operation_mode(struct cm36651_data * cm36651,int cmd)273*4882a593Smuzhiyun static int cm36651_set_operation_mode(struct cm36651_data *cm36651, int cmd)
274*4882a593Smuzhiyun {
275*4882a593Smuzhiyun struct i2c_client *client = cm36651->client;
276*4882a593Smuzhiyun struct i2c_client *ps_client = cm36651->ps_client;
277*4882a593Smuzhiyun int ret = -EINVAL;
278*4882a593Smuzhiyun
279*4882a593Smuzhiyun switch (cmd) {
280*4882a593Smuzhiyun case CM36651_CMD_READ_RAW_LIGHT:
281*4882a593Smuzhiyun ret = i2c_smbus_write_byte_data(client, CM36651_CS_CONF1,
282*4882a593Smuzhiyun cm36651->cs_ctrl_regs[CM36651_CS_CONF1]);
283*4882a593Smuzhiyun break;
284*4882a593Smuzhiyun case CM36651_CMD_READ_RAW_PROXIMITY:
285*4882a593Smuzhiyun if (test_bit(CM36651_PROXIMITY_EV_EN, &cm36651->flags))
286*4882a593Smuzhiyun return CM36651_PROXIMITY_EV_EN;
287*4882a593Smuzhiyun
288*4882a593Smuzhiyun ret = i2c_smbus_write_byte_data(ps_client, CM36651_PS_CONF1,
289*4882a593Smuzhiyun cm36651->ps_ctrl_regs[CM36651_PS_CONF1]);
290*4882a593Smuzhiyun break;
291*4882a593Smuzhiyun case CM36651_CMD_PROX_EV_EN:
292*4882a593Smuzhiyun if (test_bit(CM36651_PROXIMITY_EV_EN, &cm36651->flags)) {
293*4882a593Smuzhiyun dev_err(&client->dev,
294*4882a593Smuzhiyun "Already proximity event enable state\n");
295*4882a593Smuzhiyun return ret;
296*4882a593Smuzhiyun }
297*4882a593Smuzhiyun set_bit(CM36651_PROXIMITY_EV_EN, &cm36651->flags);
298*4882a593Smuzhiyun
299*4882a593Smuzhiyun ret = i2c_smbus_write_byte_data(ps_client,
300*4882a593Smuzhiyun cm36651_ps_reg[CM36651_PS_CONF1],
301*4882a593Smuzhiyun CM36651_PS_INT_EN | CM36651_PS_PERS2 | CM36651_PS_IT2);
302*4882a593Smuzhiyun
303*4882a593Smuzhiyun if (ret < 0) {
304*4882a593Smuzhiyun dev_err(&client->dev, "Proximity enable event failed\n");
305*4882a593Smuzhiyun return ret;
306*4882a593Smuzhiyun }
307*4882a593Smuzhiyun break;
308*4882a593Smuzhiyun case CM36651_CMD_PROX_EV_DIS:
309*4882a593Smuzhiyun if (!test_bit(CM36651_PROXIMITY_EV_EN, &cm36651->flags)) {
310*4882a593Smuzhiyun dev_err(&client->dev,
311*4882a593Smuzhiyun "Already proximity event disable state\n");
312*4882a593Smuzhiyun return ret;
313*4882a593Smuzhiyun }
314*4882a593Smuzhiyun clear_bit(CM36651_PROXIMITY_EV_EN, &cm36651->flags);
315*4882a593Smuzhiyun ret = i2c_smbus_write_byte_data(ps_client,
316*4882a593Smuzhiyun CM36651_PS_CONF1, CM36651_PS_DISABLE);
317*4882a593Smuzhiyun break;
318*4882a593Smuzhiyun }
319*4882a593Smuzhiyun
320*4882a593Smuzhiyun if (ret < 0)
321*4882a593Smuzhiyun dev_err(&client->dev, "Write register failed\n");
322*4882a593Smuzhiyun
323*4882a593Smuzhiyun return ret;
324*4882a593Smuzhiyun }
325*4882a593Smuzhiyun
cm36651_read_channel(struct cm36651_data * cm36651,struct iio_chan_spec const * chan,int * val)326*4882a593Smuzhiyun static int cm36651_read_channel(struct cm36651_data *cm36651,
327*4882a593Smuzhiyun struct iio_chan_spec const *chan, int *val)
328*4882a593Smuzhiyun {
329*4882a593Smuzhiyun struct i2c_client *client = cm36651->client;
330*4882a593Smuzhiyun int cmd, ret;
331*4882a593Smuzhiyun
332*4882a593Smuzhiyun if (chan->type == IIO_LIGHT)
333*4882a593Smuzhiyun cmd = CM36651_CMD_READ_RAW_LIGHT;
334*4882a593Smuzhiyun else if (chan->type == IIO_PROXIMITY)
335*4882a593Smuzhiyun cmd = CM36651_CMD_READ_RAW_PROXIMITY;
336*4882a593Smuzhiyun else
337*4882a593Smuzhiyun return -EINVAL;
338*4882a593Smuzhiyun
339*4882a593Smuzhiyun ret = cm36651_set_operation_mode(cm36651, cmd);
340*4882a593Smuzhiyun if (ret < 0) {
341*4882a593Smuzhiyun dev_err(&client->dev, "CM36651 set operation mode failed\n");
342*4882a593Smuzhiyun return ret;
343*4882a593Smuzhiyun }
344*4882a593Smuzhiyun /* Delay for work after enable operation */
345*4882a593Smuzhiyun msleep(50);
346*4882a593Smuzhiyun ret = cm36651_read_output(cm36651, chan, val);
347*4882a593Smuzhiyun if (ret < 0) {
348*4882a593Smuzhiyun dev_err(&client->dev, "CM36651 read output failed\n");
349*4882a593Smuzhiyun return ret;
350*4882a593Smuzhiyun }
351*4882a593Smuzhiyun
352*4882a593Smuzhiyun return ret;
353*4882a593Smuzhiyun }
354*4882a593Smuzhiyun
cm36651_read_int_time(struct cm36651_data * cm36651,struct iio_chan_spec const * chan,int * val2)355*4882a593Smuzhiyun static int cm36651_read_int_time(struct cm36651_data *cm36651,
356*4882a593Smuzhiyun struct iio_chan_spec const *chan, int *val2)
357*4882a593Smuzhiyun {
358*4882a593Smuzhiyun switch (chan->type) {
359*4882a593Smuzhiyun case IIO_LIGHT:
360*4882a593Smuzhiyun if (cm36651->cs_int_time[chan->address] == CM36651_CS_IT1)
361*4882a593Smuzhiyun *val2 = 80000;
362*4882a593Smuzhiyun else if (cm36651->cs_int_time[chan->address] == CM36651_CS_IT2)
363*4882a593Smuzhiyun *val2 = 160000;
364*4882a593Smuzhiyun else if (cm36651->cs_int_time[chan->address] == CM36651_CS_IT3)
365*4882a593Smuzhiyun *val2 = 320000;
366*4882a593Smuzhiyun else if (cm36651->cs_int_time[chan->address] == CM36651_CS_IT4)
367*4882a593Smuzhiyun *val2 = 640000;
368*4882a593Smuzhiyun else
369*4882a593Smuzhiyun return -EINVAL;
370*4882a593Smuzhiyun break;
371*4882a593Smuzhiyun case IIO_PROXIMITY:
372*4882a593Smuzhiyun if (cm36651->ps_int_time == CM36651_PS_IT1)
373*4882a593Smuzhiyun *val2 = 320;
374*4882a593Smuzhiyun else if (cm36651->ps_int_time == CM36651_PS_IT2)
375*4882a593Smuzhiyun *val2 = 420;
376*4882a593Smuzhiyun else if (cm36651->ps_int_time == CM36651_PS_IT3)
377*4882a593Smuzhiyun *val2 = 520;
378*4882a593Smuzhiyun else if (cm36651->ps_int_time == CM36651_PS_IT4)
379*4882a593Smuzhiyun *val2 = 640;
380*4882a593Smuzhiyun else
381*4882a593Smuzhiyun return -EINVAL;
382*4882a593Smuzhiyun break;
383*4882a593Smuzhiyun default:
384*4882a593Smuzhiyun return -EINVAL;
385*4882a593Smuzhiyun }
386*4882a593Smuzhiyun
387*4882a593Smuzhiyun return IIO_VAL_INT_PLUS_MICRO;
388*4882a593Smuzhiyun }
389*4882a593Smuzhiyun
cm36651_write_int_time(struct cm36651_data * cm36651,struct iio_chan_spec const * chan,int val)390*4882a593Smuzhiyun static int cm36651_write_int_time(struct cm36651_data *cm36651,
391*4882a593Smuzhiyun struct iio_chan_spec const *chan, int val)
392*4882a593Smuzhiyun {
393*4882a593Smuzhiyun struct i2c_client *client = cm36651->client;
394*4882a593Smuzhiyun struct i2c_client *ps_client = cm36651->ps_client;
395*4882a593Smuzhiyun int int_time, ret;
396*4882a593Smuzhiyun
397*4882a593Smuzhiyun switch (chan->type) {
398*4882a593Smuzhiyun case IIO_LIGHT:
399*4882a593Smuzhiyun if (val == 80000)
400*4882a593Smuzhiyun int_time = CM36651_CS_IT1;
401*4882a593Smuzhiyun else if (val == 160000)
402*4882a593Smuzhiyun int_time = CM36651_CS_IT2;
403*4882a593Smuzhiyun else if (val == 320000)
404*4882a593Smuzhiyun int_time = CM36651_CS_IT3;
405*4882a593Smuzhiyun else if (val == 640000)
406*4882a593Smuzhiyun int_time = CM36651_CS_IT4;
407*4882a593Smuzhiyun else
408*4882a593Smuzhiyun return -EINVAL;
409*4882a593Smuzhiyun
410*4882a593Smuzhiyun ret = i2c_smbus_write_byte_data(client, CM36651_CS_CONF3,
411*4882a593Smuzhiyun int_time >> 2 * (chan->address));
412*4882a593Smuzhiyun if (ret < 0) {
413*4882a593Smuzhiyun dev_err(&client->dev, "CS integration time write failed\n");
414*4882a593Smuzhiyun return ret;
415*4882a593Smuzhiyun }
416*4882a593Smuzhiyun cm36651->cs_int_time[chan->address] = int_time;
417*4882a593Smuzhiyun break;
418*4882a593Smuzhiyun case IIO_PROXIMITY:
419*4882a593Smuzhiyun if (val == 320)
420*4882a593Smuzhiyun int_time = CM36651_PS_IT1;
421*4882a593Smuzhiyun else if (val == 420)
422*4882a593Smuzhiyun int_time = CM36651_PS_IT2;
423*4882a593Smuzhiyun else if (val == 520)
424*4882a593Smuzhiyun int_time = CM36651_PS_IT3;
425*4882a593Smuzhiyun else if (val == 640)
426*4882a593Smuzhiyun int_time = CM36651_PS_IT4;
427*4882a593Smuzhiyun else
428*4882a593Smuzhiyun return -EINVAL;
429*4882a593Smuzhiyun
430*4882a593Smuzhiyun ret = i2c_smbus_write_byte_data(ps_client,
431*4882a593Smuzhiyun CM36651_PS_CONF1, int_time);
432*4882a593Smuzhiyun if (ret < 0) {
433*4882a593Smuzhiyun dev_err(&client->dev, "PS integration time write failed\n");
434*4882a593Smuzhiyun return ret;
435*4882a593Smuzhiyun }
436*4882a593Smuzhiyun cm36651->ps_int_time = int_time;
437*4882a593Smuzhiyun break;
438*4882a593Smuzhiyun default:
439*4882a593Smuzhiyun return -EINVAL;
440*4882a593Smuzhiyun }
441*4882a593Smuzhiyun
442*4882a593Smuzhiyun return ret;
443*4882a593Smuzhiyun }
444*4882a593Smuzhiyun
cm36651_read_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int * val,int * val2,long mask)445*4882a593Smuzhiyun static int cm36651_read_raw(struct iio_dev *indio_dev,
446*4882a593Smuzhiyun struct iio_chan_spec const *chan,
447*4882a593Smuzhiyun int *val, int *val2, long mask)
448*4882a593Smuzhiyun {
449*4882a593Smuzhiyun struct cm36651_data *cm36651 = iio_priv(indio_dev);
450*4882a593Smuzhiyun int ret;
451*4882a593Smuzhiyun
452*4882a593Smuzhiyun mutex_lock(&cm36651->lock);
453*4882a593Smuzhiyun
454*4882a593Smuzhiyun switch (mask) {
455*4882a593Smuzhiyun case IIO_CHAN_INFO_RAW:
456*4882a593Smuzhiyun ret = cm36651_read_channel(cm36651, chan, val);
457*4882a593Smuzhiyun break;
458*4882a593Smuzhiyun case IIO_CHAN_INFO_INT_TIME:
459*4882a593Smuzhiyun *val = 0;
460*4882a593Smuzhiyun ret = cm36651_read_int_time(cm36651, chan, val2);
461*4882a593Smuzhiyun break;
462*4882a593Smuzhiyun default:
463*4882a593Smuzhiyun ret = -EINVAL;
464*4882a593Smuzhiyun }
465*4882a593Smuzhiyun
466*4882a593Smuzhiyun mutex_unlock(&cm36651->lock);
467*4882a593Smuzhiyun
468*4882a593Smuzhiyun return ret;
469*4882a593Smuzhiyun }
470*4882a593Smuzhiyun
cm36651_write_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int val,int val2,long mask)471*4882a593Smuzhiyun static int cm36651_write_raw(struct iio_dev *indio_dev,
472*4882a593Smuzhiyun struct iio_chan_spec const *chan,
473*4882a593Smuzhiyun int val, int val2, long mask)
474*4882a593Smuzhiyun {
475*4882a593Smuzhiyun struct cm36651_data *cm36651 = iio_priv(indio_dev);
476*4882a593Smuzhiyun struct i2c_client *client = cm36651->client;
477*4882a593Smuzhiyun int ret = -EINVAL;
478*4882a593Smuzhiyun
479*4882a593Smuzhiyun if (mask == IIO_CHAN_INFO_INT_TIME) {
480*4882a593Smuzhiyun ret = cm36651_write_int_time(cm36651, chan, val2);
481*4882a593Smuzhiyun if (ret < 0)
482*4882a593Smuzhiyun dev_err(&client->dev, "Integration time write failed\n");
483*4882a593Smuzhiyun }
484*4882a593Smuzhiyun
485*4882a593Smuzhiyun return ret;
486*4882a593Smuzhiyun }
487*4882a593Smuzhiyun
cm36651_read_prox_thresh(struct iio_dev * indio_dev,const struct iio_chan_spec * chan,enum iio_event_type type,enum iio_event_direction dir,enum iio_event_info info,int * val,int * val2)488*4882a593Smuzhiyun static int cm36651_read_prox_thresh(struct iio_dev *indio_dev,
489*4882a593Smuzhiyun const struct iio_chan_spec *chan,
490*4882a593Smuzhiyun enum iio_event_type type,
491*4882a593Smuzhiyun enum iio_event_direction dir,
492*4882a593Smuzhiyun enum iio_event_info info,
493*4882a593Smuzhiyun int *val, int *val2)
494*4882a593Smuzhiyun {
495*4882a593Smuzhiyun struct cm36651_data *cm36651 = iio_priv(indio_dev);
496*4882a593Smuzhiyun
497*4882a593Smuzhiyun *val = cm36651->ps_ctrl_regs[CM36651_PS_THD];
498*4882a593Smuzhiyun
499*4882a593Smuzhiyun return 0;
500*4882a593Smuzhiyun }
501*4882a593Smuzhiyun
cm36651_write_prox_thresh(struct iio_dev * indio_dev,const struct iio_chan_spec * chan,enum iio_event_type type,enum iio_event_direction dir,enum iio_event_info info,int val,int val2)502*4882a593Smuzhiyun static int cm36651_write_prox_thresh(struct iio_dev *indio_dev,
503*4882a593Smuzhiyun const struct iio_chan_spec *chan,
504*4882a593Smuzhiyun enum iio_event_type type,
505*4882a593Smuzhiyun enum iio_event_direction dir,
506*4882a593Smuzhiyun enum iio_event_info info,
507*4882a593Smuzhiyun int val, int val2)
508*4882a593Smuzhiyun {
509*4882a593Smuzhiyun struct cm36651_data *cm36651 = iio_priv(indio_dev);
510*4882a593Smuzhiyun struct i2c_client *client = cm36651->client;
511*4882a593Smuzhiyun int ret;
512*4882a593Smuzhiyun
513*4882a593Smuzhiyun if (val < 3 || val > 255)
514*4882a593Smuzhiyun return -EINVAL;
515*4882a593Smuzhiyun
516*4882a593Smuzhiyun cm36651->ps_ctrl_regs[CM36651_PS_THD] = val;
517*4882a593Smuzhiyun ret = i2c_smbus_write_byte_data(cm36651->ps_client, CM36651_PS_THD,
518*4882a593Smuzhiyun cm36651->ps_ctrl_regs[CM36651_PS_THD]);
519*4882a593Smuzhiyun
520*4882a593Smuzhiyun if (ret < 0) {
521*4882a593Smuzhiyun dev_err(&client->dev, "PS threshold write failed: %d\n", ret);
522*4882a593Smuzhiyun return ret;
523*4882a593Smuzhiyun }
524*4882a593Smuzhiyun
525*4882a593Smuzhiyun return 0;
526*4882a593Smuzhiyun }
527*4882a593Smuzhiyun
cm36651_write_prox_event_config(struct iio_dev * indio_dev,const struct iio_chan_spec * chan,enum iio_event_type type,enum iio_event_direction dir,int state)528*4882a593Smuzhiyun static int cm36651_write_prox_event_config(struct iio_dev *indio_dev,
529*4882a593Smuzhiyun const struct iio_chan_spec *chan,
530*4882a593Smuzhiyun enum iio_event_type type,
531*4882a593Smuzhiyun enum iio_event_direction dir,
532*4882a593Smuzhiyun int state)
533*4882a593Smuzhiyun {
534*4882a593Smuzhiyun struct cm36651_data *cm36651 = iio_priv(indio_dev);
535*4882a593Smuzhiyun int cmd, ret;
536*4882a593Smuzhiyun
537*4882a593Smuzhiyun mutex_lock(&cm36651->lock);
538*4882a593Smuzhiyun
539*4882a593Smuzhiyun cmd = state ? CM36651_CMD_PROX_EV_EN : CM36651_CMD_PROX_EV_DIS;
540*4882a593Smuzhiyun ret = cm36651_set_operation_mode(cm36651, cmd);
541*4882a593Smuzhiyun
542*4882a593Smuzhiyun mutex_unlock(&cm36651->lock);
543*4882a593Smuzhiyun
544*4882a593Smuzhiyun return ret;
545*4882a593Smuzhiyun }
546*4882a593Smuzhiyun
cm36651_read_prox_event_config(struct iio_dev * indio_dev,const struct iio_chan_spec * chan,enum iio_event_type type,enum iio_event_direction dir)547*4882a593Smuzhiyun static int cm36651_read_prox_event_config(struct iio_dev *indio_dev,
548*4882a593Smuzhiyun const struct iio_chan_spec *chan,
549*4882a593Smuzhiyun enum iio_event_type type,
550*4882a593Smuzhiyun enum iio_event_direction dir)
551*4882a593Smuzhiyun {
552*4882a593Smuzhiyun struct cm36651_data *cm36651 = iio_priv(indio_dev);
553*4882a593Smuzhiyun int event_en;
554*4882a593Smuzhiyun
555*4882a593Smuzhiyun mutex_lock(&cm36651->lock);
556*4882a593Smuzhiyun
557*4882a593Smuzhiyun event_en = test_bit(CM36651_PROXIMITY_EV_EN, &cm36651->flags);
558*4882a593Smuzhiyun
559*4882a593Smuzhiyun mutex_unlock(&cm36651->lock);
560*4882a593Smuzhiyun
561*4882a593Smuzhiyun return event_en;
562*4882a593Smuzhiyun }
563*4882a593Smuzhiyun
564*4882a593Smuzhiyun #define CM36651_LIGHT_CHANNEL(_color, _idx) { \
565*4882a593Smuzhiyun .type = IIO_LIGHT, \
566*4882a593Smuzhiyun .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
567*4882a593Smuzhiyun BIT(IIO_CHAN_INFO_INT_TIME), \
568*4882a593Smuzhiyun .address = _idx, \
569*4882a593Smuzhiyun .modified = 1, \
570*4882a593Smuzhiyun .channel2 = IIO_MOD_LIGHT_##_color, \
571*4882a593Smuzhiyun } \
572*4882a593Smuzhiyun
573*4882a593Smuzhiyun static const struct iio_event_spec cm36651_event_spec[] = {
574*4882a593Smuzhiyun {
575*4882a593Smuzhiyun .type = IIO_EV_TYPE_THRESH,
576*4882a593Smuzhiyun .dir = IIO_EV_DIR_EITHER,
577*4882a593Smuzhiyun .mask_separate = BIT(IIO_EV_INFO_VALUE) |
578*4882a593Smuzhiyun BIT(IIO_EV_INFO_ENABLE),
579*4882a593Smuzhiyun }
580*4882a593Smuzhiyun };
581*4882a593Smuzhiyun
582*4882a593Smuzhiyun static const struct iio_chan_spec cm36651_channels[] = {
583*4882a593Smuzhiyun {
584*4882a593Smuzhiyun .type = IIO_PROXIMITY,
585*4882a593Smuzhiyun .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
586*4882a593Smuzhiyun BIT(IIO_CHAN_INFO_INT_TIME),
587*4882a593Smuzhiyun .event_spec = cm36651_event_spec,
588*4882a593Smuzhiyun .num_event_specs = ARRAY_SIZE(cm36651_event_spec),
589*4882a593Smuzhiyun },
590*4882a593Smuzhiyun CM36651_LIGHT_CHANNEL(RED, CM36651_LIGHT_CHANNEL_IDX_RED),
591*4882a593Smuzhiyun CM36651_LIGHT_CHANNEL(GREEN, CM36651_LIGHT_CHANNEL_IDX_GREEN),
592*4882a593Smuzhiyun CM36651_LIGHT_CHANNEL(BLUE, CM36651_LIGHT_CHANNEL_IDX_BLUE),
593*4882a593Smuzhiyun CM36651_LIGHT_CHANNEL(CLEAR, CM36651_LIGHT_CHANNEL_IDX_CLEAR),
594*4882a593Smuzhiyun };
595*4882a593Smuzhiyun
596*4882a593Smuzhiyun static IIO_CONST_ATTR(in_illuminance_integration_time_available,
597*4882a593Smuzhiyun CM36651_CS_INT_TIME_AVAIL);
598*4882a593Smuzhiyun static IIO_CONST_ATTR(in_proximity_integration_time_available,
599*4882a593Smuzhiyun CM36651_PS_INT_TIME_AVAIL);
600*4882a593Smuzhiyun
601*4882a593Smuzhiyun static struct attribute *cm36651_attributes[] = {
602*4882a593Smuzhiyun &iio_const_attr_in_illuminance_integration_time_available.dev_attr.attr,
603*4882a593Smuzhiyun &iio_const_attr_in_proximity_integration_time_available.dev_attr.attr,
604*4882a593Smuzhiyun NULL,
605*4882a593Smuzhiyun };
606*4882a593Smuzhiyun
607*4882a593Smuzhiyun static const struct attribute_group cm36651_attribute_group = {
608*4882a593Smuzhiyun .attrs = cm36651_attributes
609*4882a593Smuzhiyun };
610*4882a593Smuzhiyun
611*4882a593Smuzhiyun static const struct iio_info cm36651_info = {
612*4882a593Smuzhiyun .read_raw = &cm36651_read_raw,
613*4882a593Smuzhiyun .write_raw = &cm36651_write_raw,
614*4882a593Smuzhiyun .read_event_value = &cm36651_read_prox_thresh,
615*4882a593Smuzhiyun .write_event_value = &cm36651_write_prox_thresh,
616*4882a593Smuzhiyun .read_event_config = &cm36651_read_prox_event_config,
617*4882a593Smuzhiyun .write_event_config = &cm36651_write_prox_event_config,
618*4882a593Smuzhiyun .attrs = &cm36651_attribute_group,
619*4882a593Smuzhiyun };
620*4882a593Smuzhiyun
cm36651_probe(struct i2c_client * client,const struct i2c_device_id * id)621*4882a593Smuzhiyun static int cm36651_probe(struct i2c_client *client,
622*4882a593Smuzhiyun const struct i2c_device_id *id)
623*4882a593Smuzhiyun {
624*4882a593Smuzhiyun struct cm36651_data *cm36651;
625*4882a593Smuzhiyun struct iio_dev *indio_dev;
626*4882a593Smuzhiyun int ret;
627*4882a593Smuzhiyun
628*4882a593Smuzhiyun indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*cm36651));
629*4882a593Smuzhiyun if (!indio_dev)
630*4882a593Smuzhiyun return -ENOMEM;
631*4882a593Smuzhiyun
632*4882a593Smuzhiyun cm36651 = iio_priv(indio_dev);
633*4882a593Smuzhiyun
634*4882a593Smuzhiyun cm36651->vled_reg = devm_regulator_get(&client->dev, "vled");
635*4882a593Smuzhiyun if (IS_ERR(cm36651->vled_reg)) {
636*4882a593Smuzhiyun dev_err(&client->dev, "get regulator vled failed\n");
637*4882a593Smuzhiyun return PTR_ERR(cm36651->vled_reg);
638*4882a593Smuzhiyun }
639*4882a593Smuzhiyun
640*4882a593Smuzhiyun ret = regulator_enable(cm36651->vled_reg);
641*4882a593Smuzhiyun if (ret) {
642*4882a593Smuzhiyun dev_err(&client->dev, "enable regulator vled failed\n");
643*4882a593Smuzhiyun return ret;
644*4882a593Smuzhiyun }
645*4882a593Smuzhiyun
646*4882a593Smuzhiyun i2c_set_clientdata(client, indio_dev);
647*4882a593Smuzhiyun
648*4882a593Smuzhiyun cm36651->client = client;
649*4882a593Smuzhiyun cm36651->ps_client = i2c_new_dummy_device(client->adapter,
650*4882a593Smuzhiyun CM36651_I2C_ADDR_PS);
651*4882a593Smuzhiyun if (IS_ERR(cm36651->ps_client)) {
652*4882a593Smuzhiyun dev_err(&client->dev, "%s: new i2c device failed\n", __func__);
653*4882a593Smuzhiyun ret = PTR_ERR(cm36651->ps_client);
654*4882a593Smuzhiyun goto error_disable_reg;
655*4882a593Smuzhiyun }
656*4882a593Smuzhiyun
657*4882a593Smuzhiyun cm36651->ara_client = i2c_new_dummy_device(client->adapter, CM36651_ARA);
658*4882a593Smuzhiyun if (IS_ERR(cm36651->ara_client)) {
659*4882a593Smuzhiyun dev_err(&client->dev, "%s: new i2c device failed\n", __func__);
660*4882a593Smuzhiyun ret = PTR_ERR(cm36651->ara_client);
661*4882a593Smuzhiyun goto error_i2c_unregister_ps;
662*4882a593Smuzhiyun }
663*4882a593Smuzhiyun
664*4882a593Smuzhiyun mutex_init(&cm36651->lock);
665*4882a593Smuzhiyun indio_dev->channels = cm36651_channels;
666*4882a593Smuzhiyun indio_dev->num_channels = ARRAY_SIZE(cm36651_channels);
667*4882a593Smuzhiyun indio_dev->info = &cm36651_info;
668*4882a593Smuzhiyun indio_dev->name = id->name;
669*4882a593Smuzhiyun indio_dev->modes = INDIO_DIRECT_MODE;
670*4882a593Smuzhiyun
671*4882a593Smuzhiyun ret = cm36651_setup_reg(cm36651);
672*4882a593Smuzhiyun if (ret) {
673*4882a593Smuzhiyun dev_err(&client->dev, "%s: register setup failed\n", __func__);
674*4882a593Smuzhiyun goto error_i2c_unregister_ara;
675*4882a593Smuzhiyun }
676*4882a593Smuzhiyun
677*4882a593Smuzhiyun ret = request_threaded_irq(client->irq, NULL, cm36651_irq_handler,
678*4882a593Smuzhiyun IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
679*4882a593Smuzhiyun "cm36651", indio_dev);
680*4882a593Smuzhiyun if (ret) {
681*4882a593Smuzhiyun dev_err(&client->dev, "%s: request irq failed\n", __func__);
682*4882a593Smuzhiyun goto error_i2c_unregister_ara;
683*4882a593Smuzhiyun }
684*4882a593Smuzhiyun
685*4882a593Smuzhiyun ret = iio_device_register(indio_dev);
686*4882a593Smuzhiyun if (ret) {
687*4882a593Smuzhiyun dev_err(&client->dev, "%s: regist device failed\n", __func__);
688*4882a593Smuzhiyun goto error_free_irq;
689*4882a593Smuzhiyun }
690*4882a593Smuzhiyun
691*4882a593Smuzhiyun return 0;
692*4882a593Smuzhiyun
693*4882a593Smuzhiyun error_free_irq:
694*4882a593Smuzhiyun free_irq(client->irq, indio_dev);
695*4882a593Smuzhiyun error_i2c_unregister_ara:
696*4882a593Smuzhiyun i2c_unregister_device(cm36651->ara_client);
697*4882a593Smuzhiyun error_i2c_unregister_ps:
698*4882a593Smuzhiyun i2c_unregister_device(cm36651->ps_client);
699*4882a593Smuzhiyun error_disable_reg:
700*4882a593Smuzhiyun regulator_disable(cm36651->vled_reg);
701*4882a593Smuzhiyun return ret;
702*4882a593Smuzhiyun }
703*4882a593Smuzhiyun
cm36651_remove(struct i2c_client * client)704*4882a593Smuzhiyun static int cm36651_remove(struct i2c_client *client)
705*4882a593Smuzhiyun {
706*4882a593Smuzhiyun struct iio_dev *indio_dev = i2c_get_clientdata(client);
707*4882a593Smuzhiyun struct cm36651_data *cm36651 = iio_priv(indio_dev);
708*4882a593Smuzhiyun
709*4882a593Smuzhiyun iio_device_unregister(indio_dev);
710*4882a593Smuzhiyun regulator_disable(cm36651->vled_reg);
711*4882a593Smuzhiyun free_irq(client->irq, indio_dev);
712*4882a593Smuzhiyun i2c_unregister_device(cm36651->ps_client);
713*4882a593Smuzhiyun i2c_unregister_device(cm36651->ara_client);
714*4882a593Smuzhiyun
715*4882a593Smuzhiyun return 0;
716*4882a593Smuzhiyun }
717*4882a593Smuzhiyun
718*4882a593Smuzhiyun static const struct i2c_device_id cm36651_id[] = {
719*4882a593Smuzhiyun { "cm36651", 0 },
720*4882a593Smuzhiyun { }
721*4882a593Smuzhiyun };
722*4882a593Smuzhiyun
723*4882a593Smuzhiyun MODULE_DEVICE_TABLE(i2c, cm36651_id);
724*4882a593Smuzhiyun
725*4882a593Smuzhiyun static const struct of_device_id cm36651_of_match[] = {
726*4882a593Smuzhiyun { .compatible = "capella,cm36651" },
727*4882a593Smuzhiyun { }
728*4882a593Smuzhiyun };
729*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, cm36651_of_match);
730*4882a593Smuzhiyun
731*4882a593Smuzhiyun static struct i2c_driver cm36651_driver = {
732*4882a593Smuzhiyun .driver = {
733*4882a593Smuzhiyun .name = "cm36651",
734*4882a593Smuzhiyun .of_match_table = cm36651_of_match,
735*4882a593Smuzhiyun },
736*4882a593Smuzhiyun .probe = cm36651_probe,
737*4882a593Smuzhiyun .remove = cm36651_remove,
738*4882a593Smuzhiyun .id_table = cm36651_id,
739*4882a593Smuzhiyun };
740*4882a593Smuzhiyun
741*4882a593Smuzhiyun module_i2c_driver(cm36651_driver);
742*4882a593Smuzhiyun
743*4882a593Smuzhiyun MODULE_AUTHOR("Beomho Seo <beomho.seo@samsung.com>");
744*4882a593Smuzhiyun MODULE_DESCRIPTION("CM36651 proximity/ambient light sensor driver");
745*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
746