1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0+
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * hdc100x.c - Support for the TI HDC100x temperature + humidity sensors
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2015, 2018
6*4882a593Smuzhiyun * Author: Matt Ranostay <matt.ranostay@konsulko.com>
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * Datasheets:
9*4882a593Smuzhiyun * https://www.ti.com/product/HDC1000/datasheet
10*4882a593Smuzhiyun * https://www.ti.com/product/HDC1008/datasheet
11*4882a593Smuzhiyun * https://www.ti.com/product/HDC1010/datasheet
12*4882a593Smuzhiyun * https://www.ti.com/product/HDC1050/datasheet
13*4882a593Smuzhiyun * https://www.ti.com/product/HDC1080/datasheet
14*4882a593Smuzhiyun */
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun #include <linux/delay.h>
17*4882a593Smuzhiyun #include <linux/module.h>
18*4882a593Smuzhiyun #include <linux/mod_devicetable.h>
19*4882a593Smuzhiyun #include <linux/init.h>
20*4882a593Smuzhiyun #include <linux/i2c.h>
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun #include <linux/iio/iio.h>
23*4882a593Smuzhiyun #include <linux/iio/sysfs.h>
24*4882a593Smuzhiyun #include <linux/iio/buffer.h>
25*4882a593Smuzhiyun #include <linux/iio/trigger_consumer.h>
26*4882a593Smuzhiyun #include <linux/iio/triggered_buffer.h>
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun #include <linux/time.h>
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun #define HDC100X_REG_TEMP 0x00
31*4882a593Smuzhiyun #define HDC100X_REG_HUMIDITY 0x01
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun #define HDC100X_REG_CONFIG 0x02
34*4882a593Smuzhiyun #define HDC100X_REG_CONFIG_ACQ_MODE BIT(12)
35*4882a593Smuzhiyun #define HDC100X_REG_CONFIG_HEATER_EN BIT(13)
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun struct hdc100x_data {
38*4882a593Smuzhiyun struct i2c_client *client;
39*4882a593Smuzhiyun struct mutex lock;
40*4882a593Smuzhiyun u16 config;
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun /* integration time of the sensor */
43*4882a593Smuzhiyun int adc_int_us[2];
44*4882a593Smuzhiyun /* Ensure natural alignment of timestamp */
45*4882a593Smuzhiyun struct {
46*4882a593Smuzhiyun __be16 channels[2];
47*4882a593Smuzhiyun s64 ts __aligned(8);
48*4882a593Smuzhiyun } scan;
49*4882a593Smuzhiyun };
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun /* integration time in us */
52*4882a593Smuzhiyun static const int hdc100x_int_time[][3] = {
53*4882a593Smuzhiyun { 6350, 3650, 0 }, /* IIO_TEMP channel*/
54*4882a593Smuzhiyun { 6500, 3850, 2500 }, /* IIO_HUMIDITYRELATIVE channel */
55*4882a593Smuzhiyun };
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun /* HDC100X_REG_CONFIG shift and mask values */
58*4882a593Smuzhiyun static const struct {
59*4882a593Smuzhiyun int shift;
60*4882a593Smuzhiyun int mask;
61*4882a593Smuzhiyun } hdc100x_resolution_shift[2] = {
62*4882a593Smuzhiyun { /* IIO_TEMP channel */
63*4882a593Smuzhiyun .shift = 10,
64*4882a593Smuzhiyun .mask = 1
65*4882a593Smuzhiyun },
66*4882a593Smuzhiyun { /* IIO_HUMIDITYRELATIVE channel */
67*4882a593Smuzhiyun .shift = 8,
68*4882a593Smuzhiyun .mask = 3,
69*4882a593Smuzhiyun },
70*4882a593Smuzhiyun };
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun static IIO_CONST_ATTR(temp_integration_time_available,
73*4882a593Smuzhiyun "0.00365 0.00635");
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun static IIO_CONST_ATTR(humidityrelative_integration_time_available,
76*4882a593Smuzhiyun "0.0025 0.00385 0.0065");
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun static IIO_CONST_ATTR(out_current_heater_raw_available,
79*4882a593Smuzhiyun "0 1");
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun static struct attribute *hdc100x_attributes[] = {
82*4882a593Smuzhiyun &iio_const_attr_temp_integration_time_available.dev_attr.attr,
83*4882a593Smuzhiyun &iio_const_attr_humidityrelative_integration_time_available.dev_attr.attr,
84*4882a593Smuzhiyun &iio_const_attr_out_current_heater_raw_available.dev_attr.attr,
85*4882a593Smuzhiyun NULL
86*4882a593Smuzhiyun };
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun static const struct attribute_group hdc100x_attribute_group = {
89*4882a593Smuzhiyun .attrs = hdc100x_attributes,
90*4882a593Smuzhiyun };
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun static const struct iio_chan_spec hdc100x_channels[] = {
93*4882a593Smuzhiyun {
94*4882a593Smuzhiyun .type = IIO_TEMP,
95*4882a593Smuzhiyun .address = HDC100X_REG_TEMP,
96*4882a593Smuzhiyun .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
97*4882a593Smuzhiyun BIT(IIO_CHAN_INFO_SCALE) |
98*4882a593Smuzhiyun BIT(IIO_CHAN_INFO_INT_TIME) |
99*4882a593Smuzhiyun BIT(IIO_CHAN_INFO_OFFSET),
100*4882a593Smuzhiyun .scan_index = 0,
101*4882a593Smuzhiyun .scan_type = {
102*4882a593Smuzhiyun .sign = 's',
103*4882a593Smuzhiyun .realbits = 16,
104*4882a593Smuzhiyun .storagebits = 16,
105*4882a593Smuzhiyun .endianness = IIO_BE,
106*4882a593Smuzhiyun },
107*4882a593Smuzhiyun },
108*4882a593Smuzhiyun {
109*4882a593Smuzhiyun .type = IIO_HUMIDITYRELATIVE,
110*4882a593Smuzhiyun .address = HDC100X_REG_HUMIDITY,
111*4882a593Smuzhiyun .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
112*4882a593Smuzhiyun BIT(IIO_CHAN_INFO_SCALE) |
113*4882a593Smuzhiyun BIT(IIO_CHAN_INFO_INT_TIME),
114*4882a593Smuzhiyun .scan_index = 1,
115*4882a593Smuzhiyun .scan_type = {
116*4882a593Smuzhiyun .sign = 'u',
117*4882a593Smuzhiyun .realbits = 16,
118*4882a593Smuzhiyun .storagebits = 16,
119*4882a593Smuzhiyun .endianness = IIO_BE,
120*4882a593Smuzhiyun },
121*4882a593Smuzhiyun },
122*4882a593Smuzhiyun {
123*4882a593Smuzhiyun .type = IIO_CURRENT,
124*4882a593Smuzhiyun .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
125*4882a593Smuzhiyun .extend_name = "heater",
126*4882a593Smuzhiyun .output = 1,
127*4882a593Smuzhiyun .scan_index = -1,
128*4882a593Smuzhiyun },
129*4882a593Smuzhiyun IIO_CHAN_SOFT_TIMESTAMP(2),
130*4882a593Smuzhiyun };
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun static const unsigned long hdc100x_scan_masks[] = {0x3, 0};
133*4882a593Smuzhiyun
hdc100x_update_config(struct hdc100x_data * data,int mask,int val)134*4882a593Smuzhiyun static int hdc100x_update_config(struct hdc100x_data *data, int mask, int val)
135*4882a593Smuzhiyun {
136*4882a593Smuzhiyun int tmp = (~mask & data->config) | val;
137*4882a593Smuzhiyun int ret;
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun ret = i2c_smbus_write_word_swapped(data->client,
140*4882a593Smuzhiyun HDC100X_REG_CONFIG, tmp);
141*4882a593Smuzhiyun if (!ret)
142*4882a593Smuzhiyun data->config = tmp;
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun return ret;
145*4882a593Smuzhiyun }
146*4882a593Smuzhiyun
hdc100x_set_it_time(struct hdc100x_data * data,int chan,int val2)147*4882a593Smuzhiyun static int hdc100x_set_it_time(struct hdc100x_data *data, int chan, int val2)
148*4882a593Smuzhiyun {
149*4882a593Smuzhiyun int shift = hdc100x_resolution_shift[chan].shift;
150*4882a593Smuzhiyun int ret = -EINVAL;
151*4882a593Smuzhiyun int i;
152*4882a593Smuzhiyun
153*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(hdc100x_int_time[chan]); i++) {
154*4882a593Smuzhiyun if (val2 && val2 == hdc100x_int_time[chan][i]) {
155*4882a593Smuzhiyun ret = hdc100x_update_config(data,
156*4882a593Smuzhiyun hdc100x_resolution_shift[chan].mask << shift,
157*4882a593Smuzhiyun i << shift);
158*4882a593Smuzhiyun if (!ret)
159*4882a593Smuzhiyun data->adc_int_us[chan] = val2;
160*4882a593Smuzhiyun break;
161*4882a593Smuzhiyun }
162*4882a593Smuzhiyun }
163*4882a593Smuzhiyun
164*4882a593Smuzhiyun return ret;
165*4882a593Smuzhiyun }
166*4882a593Smuzhiyun
hdc100x_get_measurement(struct hdc100x_data * data,struct iio_chan_spec const * chan)167*4882a593Smuzhiyun static int hdc100x_get_measurement(struct hdc100x_data *data,
168*4882a593Smuzhiyun struct iio_chan_spec const *chan)
169*4882a593Smuzhiyun {
170*4882a593Smuzhiyun struct i2c_client *client = data->client;
171*4882a593Smuzhiyun int delay = data->adc_int_us[chan->address] + 1*USEC_PER_MSEC;
172*4882a593Smuzhiyun int ret;
173*4882a593Smuzhiyun __be16 val;
174*4882a593Smuzhiyun
175*4882a593Smuzhiyun /* start measurement */
176*4882a593Smuzhiyun ret = i2c_smbus_write_byte(client, chan->address);
177*4882a593Smuzhiyun if (ret < 0) {
178*4882a593Smuzhiyun dev_err(&client->dev, "cannot start measurement");
179*4882a593Smuzhiyun return ret;
180*4882a593Smuzhiyun }
181*4882a593Smuzhiyun
182*4882a593Smuzhiyun /* wait for integration time to pass */
183*4882a593Smuzhiyun usleep_range(delay, delay + 1000);
184*4882a593Smuzhiyun
185*4882a593Smuzhiyun /* read measurement */
186*4882a593Smuzhiyun ret = i2c_master_recv(data->client, (char *)&val, sizeof(val));
187*4882a593Smuzhiyun if (ret < 0) {
188*4882a593Smuzhiyun dev_err(&client->dev, "cannot read sensor data\n");
189*4882a593Smuzhiyun return ret;
190*4882a593Smuzhiyun }
191*4882a593Smuzhiyun return be16_to_cpu(val);
192*4882a593Smuzhiyun }
193*4882a593Smuzhiyun
hdc100x_get_heater_status(struct hdc100x_data * data)194*4882a593Smuzhiyun static int hdc100x_get_heater_status(struct hdc100x_data *data)
195*4882a593Smuzhiyun {
196*4882a593Smuzhiyun return !!(data->config & HDC100X_REG_CONFIG_HEATER_EN);
197*4882a593Smuzhiyun }
198*4882a593Smuzhiyun
hdc100x_read_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int * val,int * val2,long mask)199*4882a593Smuzhiyun static int hdc100x_read_raw(struct iio_dev *indio_dev,
200*4882a593Smuzhiyun struct iio_chan_spec const *chan, int *val,
201*4882a593Smuzhiyun int *val2, long mask)
202*4882a593Smuzhiyun {
203*4882a593Smuzhiyun struct hdc100x_data *data = iio_priv(indio_dev);
204*4882a593Smuzhiyun
205*4882a593Smuzhiyun switch (mask) {
206*4882a593Smuzhiyun case IIO_CHAN_INFO_RAW: {
207*4882a593Smuzhiyun int ret;
208*4882a593Smuzhiyun
209*4882a593Smuzhiyun mutex_lock(&data->lock);
210*4882a593Smuzhiyun if (chan->type == IIO_CURRENT) {
211*4882a593Smuzhiyun *val = hdc100x_get_heater_status(data);
212*4882a593Smuzhiyun ret = IIO_VAL_INT;
213*4882a593Smuzhiyun } else {
214*4882a593Smuzhiyun ret = iio_device_claim_direct_mode(indio_dev);
215*4882a593Smuzhiyun if (ret) {
216*4882a593Smuzhiyun mutex_unlock(&data->lock);
217*4882a593Smuzhiyun return ret;
218*4882a593Smuzhiyun }
219*4882a593Smuzhiyun
220*4882a593Smuzhiyun ret = hdc100x_get_measurement(data, chan);
221*4882a593Smuzhiyun iio_device_release_direct_mode(indio_dev);
222*4882a593Smuzhiyun if (ret >= 0) {
223*4882a593Smuzhiyun *val = ret;
224*4882a593Smuzhiyun ret = IIO_VAL_INT;
225*4882a593Smuzhiyun }
226*4882a593Smuzhiyun }
227*4882a593Smuzhiyun mutex_unlock(&data->lock);
228*4882a593Smuzhiyun return ret;
229*4882a593Smuzhiyun }
230*4882a593Smuzhiyun case IIO_CHAN_INFO_INT_TIME:
231*4882a593Smuzhiyun *val = 0;
232*4882a593Smuzhiyun *val2 = data->adc_int_us[chan->address];
233*4882a593Smuzhiyun return IIO_VAL_INT_PLUS_MICRO;
234*4882a593Smuzhiyun case IIO_CHAN_INFO_SCALE:
235*4882a593Smuzhiyun if (chan->type == IIO_TEMP) {
236*4882a593Smuzhiyun *val = 165000;
237*4882a593Smuzhiyun *val2 = 65536;
238*4882a593Smuzhiyun return IIO_VAL_FRACTIONAL;
239*4882a593Smuzhiyun } else {
240*4882a593Smuzhiyun *val = 100000;
241*4882a593Smuzhiyun *val2 = 65536;
242*4882a593Smuzhiyun return IIO_VAL_FRACTIONAL;
243*4882a593Smuzhiyun }
244*4882a593Smuzhiyun break;
245*4882a593Smuzhiyun case IIO_CHAN_INFO_OFFSET:
246*4882a593Smuzhiyun *val = -15887;
247*4882a593Smuzhiyun *val2 = 515151;
248*4882a593Smuzhiyun return IIO_VAL_INT_PLUS_MICRO;
249*4882a593Smuzhiyun default:
250*4882a593Smuzhiyun return -EINVAL;
251*4882a593Smuzhiyun }
252*4882a593Smuzhiyun }
253*4882a593Smuzhiyun
hdc100x_write_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int val,int val2,long mask)254*4882a593Smuzhiyun static int hdc100x_write_raw(struct iio_dev *indio_dev,
255*4882a593Smuzhiyun struct iio_chan_spec const *chan,
256*4882a593Smuzhiyun int val, int val2, long mask)
257*4882a593Smuzhiyun {
258*4882a593Smuzhiyun struct hdc100x_data *data = iio_priv(indio_dev);
259*4882a593Smuzhiyun int ret = -EINVAL;
260*4882a593Smuzhiyun
261*4882a593Smuzhiyun switch (mask) {
262*4882a593Smuzhiyun case IIO_CHAN_INFO_INT_TIME:
263*4882a593Smuzhiyun if (val != 0)
264*4882a593Smuzhiyun return -EINVAL;
265*4882a593Smuzhiyun
266*4882a593Smuzhiyun mutex_lock(&data->lock);
267*4882a593Smuzhiyun ret = hdc100x_set_it_time(data, chan->address, val2);
268*4882a593Smuzhiyun mutex_unlock(&data->lock);
269*4882a593Smuzhiyun return ret;
270*4882a593Smuzhiyun case IIO_CHAN_INFO_RAW:
271*4882a593Smuzhiyun if (chan->type != IIO_CURRENT || val2 != 0)
272*4882a593Smuzhiyun return -EINVAL;
273*4882a593Smuzhiyun
274*4882a593Smuzhiyun mutex_lock(&data->lock);
275*4882a593Smuzhiyun ret = hdc100x_update_config(data, HDC100X_REG_CONFIG_HEATER_EN,
276*4882a593Smuzhiyun val ? HDC100X_REG_CONFIG_HEATER_EN : 0);
277*4882a593Smuzhiyun mutex_unlock(&data->lock);
278*4882a593Smuzhiyun return ret;
279*4882a593Smuzhiyun default:
280*4882a593Smuzhiyun return -EINVAL;
281*4882a593Smuzhiyun }
282*4882a593Smuzhiyun }
283*4882a593Smuzhiyun
hdc100x_buffer_postenable(struct iio_dev * indio_dev)284*4882a593Smuzhiyun static int hdc100x_buffer_postenable(struct iio_dev *indio_dev)
285*4882a593Smuzhiyun {
286*4882a593Smuzhiyun struct hdc100x_data *data = iio_priv(indio_dev);
287*4882a593Smuzhiyun int ret;
288*4882a593Smuzhiyun
289*4882a593Smuzhiyun /* Buffer is enabled. First set ACQ Mode, then attach poll func */
290*4882a593Smuzhiyun mutex_lock(&data->lock);
291*4882a593Smuzhiyun ret = hdc100x_update_config(data, HDC100X_REG_CONFIG_ACQ_MODE,
292*4882a593Smuzhiyun HDC100X_REG_CONFIG_ACQ_MODE);
293*4882a593Smuzhiyun mutex_unlock(&data->lock);
294*4882a593Smuzhiyun
295*4882a593Smuzhiyun return ret;
296*4882a593Smuzhiyun }
297*4882a593Smuzhiyun
hdc100x_buffer_predisable(struct iio_dev * indio_dev)298*4882a593Smuzhiyun static int hdc100x_buffer_predisable(struct iio_dev *indio_dev)
299*4882a593Smuzhiyun {
300*4882a593Smuzhiyun struct hdc100x_data *data = iio_priv(indio_dev);
301*4882a593Smuzhiyun int ret;
302*4882a593Smuzhiyun
303*4882a593Smuzhiyun mutex_lock(&data->lock);
304*4882a593Smuzhiyun ret = hdc100x_update_config(data, HDC100X_REG_CONFIG_ACQ_MODE, 0);
305*4882a593Smuzhiyun mutex_unlock(&data->lock);
306*4882a593Smuzhiyun
307*4882a593Smuzhiyun return ret;
308*4882a593Smuzhiyun }
309*4882a593Smuzhiyun
310*4882a593Smuzhiyun static const struct iio_buffer_setup_ops hdc_buffer_setup_ops = {
311*4882a593Smuzhiyun .postenable = hdc100x_buffer_postenable,
312*4882a593Smuzhiyun .predisable = hdc100x_buffer_predisable,
313*4882a593Smuzhiyun };
314*4882a593Smuzhiyun
hdc100x_trigger_handler(int irq,void * p)315*4882a593Smuzhiyun static irqreturn_t hdc100x_trigger_handler(int irq, void *p)
316*4882a593Smuzhiyun {
317*4882a593Smuzhiyun struct iio_poll_func *pf = p;
318*4882a593Smuzhiyun struct iio_dev *indio_dev = pf->indio_dev;
319*4882a593Smuzhiyun struct hdc100x_data *data = iio_priv(indio_dev);
320*4882a593Smuzhiyun struct i2c_client *client = data->client;
321*4882a593Smuzhiyun int delay = data->adc_int_us[0] + data->adc_int_us[1] + 2*USEC_PER_MSEC;
322*4882a593Smuzhiyun int ret;
323*4882a593Smuzhiyun
324*4882a593Smuzhiyun /* dual read starts at temp register */
325*4882a593Smuzhiyun mutex_lock(&data->lock);
326*4882a593Smuzhiyun ret = i2c_smbus_write_byte(client, HDC100X_REG_TEMP);
327*4882a593Smuzhiyun if (ret < 0) {
328*4882a593Smuzhiyun dev_err(&client->dev, "cannot start measurement\n");
329*4882a593Smuzhiyun goto err;
330*4882a593Smuzhiyun }
331*4882a593Smuzhiyun usleep_range(delay, delay + 1000);
332*4882a593Smuzhiyun
333*4882a593Smuzhiyun ret = i2c_master_recv(client, (u8 *)data->scan.channels, 4);
334*4882a593Smuzhiyun if (ret < 0) {
335*4882a593Smuzhiyun dev_err(&client->dev, "cannot read sensor data\n");
336*4882a593Smuzhiyun goto err;
337*4882a593Smuzhiyun }
338*4882a593Smuzhiyun
339*4882a593Smuzhiyun iio_push_to_buffers_with_timestamp(indio_dev, &data->scan,
340*4882a593Smuzhiyun iio_get_time_ns(indio_dev));
341*4882a593Smuzhiyun err:
342*4882a593Smuzhiyun mutex_unlock(&data->lock);
343*4882a593Smuzhiyun iio_trigger_notify_done(indio_dev->trig);
344*4882a593Smuzhiyun
345*4882a593Smuzhiyun return IRQ_HANDLED;
346*4882a593Smuzhiyun }
347*4882a593Smuzhiyun
348*4882a593Smuzhiyun static const struct iio_info hdc100x_info = {
349*4882a593Smuzhiyun .read_raw = hdc100x_read_raw,
350*4882a593Smuzhiyun .write_raw = hdc100x_write_raw,
351*4882a593Smuzhiyun .attrs = &hdc100x_attribute_group,
352*4882a593Smuzhiyun };
353*4882a593Smuzhiyun
hdc100x_probe(struct i2c_client * client,const struct i2c_device_id * id)354*4882a593Smuzhiyun static int hdc100x_probe(struct i2c_client *client,
355*4882a593Smuzhiyun const struct i2c_device_id *id)
356*4882a593Smuzhiyun {
357*4882a593Smuzhiyun struct iio_dev *indio_dev;
358*4882a593Smuzhiyun struct hdc100x_data *data;
359*4882a593Smuzhiyun int ret;
360*4882a593Smuzhiyun
361*4882a593Smuzhiyun if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_WORD_DATA |
362*4882a593Smuzhiyun I2C_FUNC_SMBUS_BYTE | I2C_FUNC_I2C))
363*4882a593Smuzhiyun return -EOPNOTSUPP;
364*4882a593Smuzhiyun
365*4882a593Smuzhiyun indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
366*4882a593Smuzhiyun if (!indio_dev)
367*4882a593Smuzhiyun return -ENOMEM;
368*4882a593Smuzhiyun
369*4882a593Smuzhiyun data = iio_priv(indio_dev);
370*4882a593Smuzhiyun i2c_set_clientdata(client, indio_dev);
371*4882a593Smuzhiyun data->client = client;
372*4882a593Smuzhiyun mutex_init(&data->lock);
373*4882a593Smuzhiyun
374*4882a593Smuzhiyun indio_dev->name = dev_name(&client->dev);
375*4882a593Smuzhiyun indio_dev->modes = INDIO_DIRECT_MODE;
376*4882a593Smuzhiyun indio_dev->info = &hdc100x_info;
377*4882a593Smuzhiyun
378*4882a593Smuzhiyun indio_dev->channels = hdc100x_channels;
379*4882a593Smuzhiyun indio_dev->num_channels = ARRAY_SIZE(hdc100x_channels);
380*4882a593Smuzhiyun indio_dev->available_scan_masks = hdc100x_scan_masks;
381*4882a593Smuzhiyun
382*4882a593Smuzhiyun /* be sure we are in a known state */
383*4882a593Smuzhiyun hdc100x_set_it_time(data, 0, hdc100x_int_time[0][0]);
384*4882a593Smuzhiyun hdc100x_set_it_time(data, 1, hdc100x_int_time[1][0]);
385*4882a593Smuzhiyun hdc100x_update_config(data, HDC100X_REG_CONFIG_ACQ_MODE, 0);
386*4882a593Smuzhiyun
387*4882a593Smuzhiyun ret = devm_iio_triggered_buffer_setup(&client->dev,
388*4882a593Smuzhiyun indio_dev, NULL,
389*4882a593Smuzhiyun hdc100x_trigger_handler,
390*4882a593Smuzhiyun &hdc_buffer_setup_ops);
391*4882a593Smuzhiyun if (ret < 0) {
392*4882a593Smuzhiyun dev_err(&client->dev, "iio triggered buffer setup failed\n");
393*4882a593Smuzhiyun return ret;
394*4882a593Smuzhiyun }
395*4882a593Smuzhiyun
396*4882a593Smuzhiyun return devm_iio_device_register(&client->dev, indio_dev);
397*4882a593Smuzhiyun }
398*4882a593Smuzhiyun
399*4882a593Smuzhiyun static const struct i2c_device_id hdc100x_id[] = {
400*4882a593Smuzhiyun { "hdc100x", 0 },
401*4882a593Smuzhiyun { "hdc1000", 0 },
402*4882a593Smuzhiyun { "hdc1008", 0 },
403*4882a593Smuzhiyun { "hdc1010", 0 },
404*4882a593Smuzhiyun { "hdc1050", 0 },
405*4882a593Smuzhiyun { "hdc1080", 0 },
406*4882a593Smuzhiyun { }
407*4882a593Smuzhiyun };
408*4882a593Smuzhiyun MODULE_DEVICE_TABLE(i2c, hdc100x_id);
409*4882a593Smuzhiyun
410*4882a593Smuzhiyun static const struct of_device_id hdc100x_dt_ids[] = {
411*4882a593Smuzhiyun { .compatible = "ti,hdc1000" },
412*4882a593Smuzhiyun { .compatible = "ti,hdc1008" },
413*4882a593Smuzhiyun { .compatible = "ti,hdc1010" },
414*4882a593Smuzhiyun { .compatible = "ti,hdc1050" },
415*4882a593Smuzhiyun { .compatible = "ti,hdc1080" },
416*4882a593Smuzhiyun { }
417*4882a593Smuzhiyun };
418*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, hdc100x_dt_ids);
419*4882a593Smuzhiyun
420*4882a593Smuzhiyun static struct i2c_driver hdc100x_driver = {
421*4882a593Smuzhiyun .driver = {
422*4882a593Smuzhiyun .name = "hdc100x",
423*4882a593Smuzhiyun .of_match_table = hdc100x_dt_ids,
424*4882a593Smuzhiyun },
425*4882a593Smuzhiyun .probe = hdc100x_probe,
426*4882a593Smuzhiyun .id_table = hdc100x_id,
427*4882a593Smuzhiyun };
428*4882a593Smuzhiyun module_i2c_driver(hdc100x_driver);
429*4882a593Smuzhiyun
430*4882a593Smuzhiyun MODULE_AUTHOR("Matt Ranostay <matt.ranostay@konsulko.com>");
431*4882a593Smuzhiyun MODULE_DESCRIPTION("TI HDC100x humidity and temperature sensor driver");
432*4882a593Smuzhiyun MODULE_LICENSE("GPL");
433