xref: /OK3568_Linux_fs/kernel/drivers/iio/humidity/dht11.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * DHT11/DHT22 bit banging GPIO driver
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (c) Harald Geyer <harald@ccbib.org>
6*4882a593Smuzhiyun  */
7*4882a593Smuzhiyun 
8*4882a593Smuzhiyun #include <linux/err.h>
9*4882a593Smuzhiyun #include <linux/interrupt.h>
10*4882a593Smuzhiyun #include <linux/device.h>
11*4882a593Smuzhiyun #include <linux/kernel.h>
12*4882a593Smuzhiyun #include <linux/printk.h>
13*4882a593Smuzhiyun #include <linux/slab.h>
14*4882a593Smuzhiyun #include <linux/of.h>
15*4882a593Smuzhiyun #include <linux/of_device.h>
16*4882a593Smuzhiyun #include <linux/sysfs.h>
17*4882a593Smuzhiyun #include <linux/io.h>
18*4882a593Smuzhiyun #include <linux/module.h>
19*4882a593Smuzhiyun #include <linux/platform_device.h>
20*4882a593Smuzhiyun #include <linux/wait.h>
21*4882a593Smuzhiyun #include <linux/bitops.h>
22*4882a593Smuzhiyun #include <linux/completion.h>
23*4882a593Smuzhiyun #include <linux/mutex.h>
24*4882a593Smuzhiyun #include <linux/delay.h>
25*4882a593Smuzhiyun #include <linux/gpio/consumer.h>
26*4882a593Smuzhiyun #include <linux/timekeeping.h>
27*4882a593Smuzhiyun 
28*4882a593Smuzhiyun #include <linux/iio/iio.h>
29*4882a593Smuzhiyun 
30*4882a593Smuzhiyun #define DRIVER_NAME	"dht11"
31*4882a593Smuzhiyun 
32*4882a593Smuzhiyun #define DHT11_DATA_VALID_TIME	2000000000  /* 2s in ns */
33*4882a593Smuzhiyun 
34*4882a593Smuzhiyun #define DHT11_EDGES_PREAMBLE 2
35*4882a593Smuzhiyun #define DHT11_BITS_PER_READ 40
36*4882a593Smuzhiyun /*
37*4882a593Smuzhiyun  * Note that when reading the sensor actually 84 edges are detected, but
38*4882a593Smuzhiyun  * since the last edge is not significant, we only store 83:
39*4882a593Smuzhiyun  */
40*4882a593Smuzhiyun #define DHT11_EDGES_PER_READ (2 * DHT11_BITS_PER_READ + \
41*4882a593Smuzhiyun 			      DHT11_EDGES_PREAMBLE + 1)
42*4882a593Smuzhiyun 
43*4882a593Smuzhiyun /*
44*4882a593Smuzhiyun  * Data transmission timing:
45*4882a593Smuzhiyun  * Data bits are encoded as pulse length (high time) on the data line.
46*4882a593Smuzhiyun  * 0-bit: 22-30uS -- typically 26uS (AM2302)
47*4882a593Smuzhiyun  * 1-bit: 68-75uS -- typically 70uS (AM2302)
48*4882a593Smuzhiyun  * The acutal timings also depend on the properties of the cable, with
49*4882a593Smuzhiyun  * longer cables typically making pulses shorter.
50*4882a593Smuzhiyun  *
51*4882a593Smuzhiyun  * Our decoding depends on the time resolution of the system:
52*4882a593Smuzhiyun  * timeres > 34uS ... don't know what a 1-tick pulse is
53*4882a593Smuzhiyun  * 34uS > timeres > 30uS ... no problem (30kHz and 32kHz clocks)
54*4882a593Smuzhiyun  * 30uS > timeres > 23uS ... don't know what a 2-tick pulse is
55*4882a593Smuzhiyun  * timeres < 23uS ... no problem
56*4882a593Smuzhiyun  *
57*4882a593Smuzhiyun  * Luckily clocks in the 33-44kHz range are quite uncommon, so we can
58*4882a593Smuzhiyun  * support most systems if the threshold for decoding a pulse as 1-bit
59*4882a593Smuzhiyun  * is chosen carefully. If somebody really wants to support clocks around
60*4882a593Smuzhiyun  * 40kHz, where this driver is most unreliable, there are two options.
61*4882a593Smuzhiyun  * a) select an implementation using busy loop polling on those systems
62*4882a593Smuzhiyun  * b) use the checksum to do some probabilistic decoding
63*4882a593Smuzhiyun  */
64*4882a593Smuzhiyun #define DHT11_START_TRANSMISSION_MIN	18000  /* us */
65*4882a593Smuzhiyun #define DHT11_START_TRANSMISSION_MAX	20000  /* us */
66*4882a593Smuzhiyun #define DHT11_MIN_TIMERES	34000  /* ns */
67*4882a593Smuzhiyun #define DHT11_THRESHOLD		49000  /* ns */
68*4882a593Smuzhiyun #define DHT11_AMBIG_LOW		23000  /* ns */
69*4882a593Smuzhiyun #define DHT11_AMBIG_HIGH	30000  /* ns */
70*4882a593Smuzhiyun 
71*4882a593Smuzhiyun struct dht11 {
72*4882a593Smuzhiyun 	struct device			*dev;
73*4882a593Smuzhiyun 
74*4882a593Smuzhiyun 	struct gpio_desc		*gpiod;
75*4882a593Smuzhiyun 	int				irq;
76*4882a593Smuzhiyun 
77*4882a593Smuzhiyun 	struct completion		completion;
78*4882a593Smuzhiyun 	/* The iio sysfs interface doesn't prevent concurrent reads: */
79*4882a593Smuzhiyun 	struct mutex			lock;
80*4882a593Smuzhiyun 
81*4882a593Smuzhiyun 	s64				timestamp;
82*4882a593Smuzhiyun 	int				temperature;
83*4882a593Smuzhiyun 	int				humidity;
84*4882a593Smuzhiyun 
85*4882a593Smuzhiyun 	/* num_edges: -1 means "no transmission in progress" */
86*4882a593Smuzhiyun 	int				num_edges;
87*4882a593Smuzhiyun 	struct {s64 ts; int value; }	edges[DHT11_EDGES_PER_READ];
88*4882a593Smuzhiyun };
89*4882a593Smuzhiyun 
90*4882a593Smuzhiyun #ifdef CONFIG_DYNAMIC_DEBUG
91*4882a593Smuzhiyun /*
92*4882a593Smuzhiyun  * dht11_edges_print: show the data as actually received by the
93*4882a593Smuzhiyun  *                    driver.
94*4882a593Smuzhiyun  */
dht11_edges_print(struct dht11 * dht11)95*4882a593Smuzhiyun static void dht11_edges_print(struct dht11 *dht11)
96*4882a593Smuzhiyun {
97*4882a593Smuzhiyun 	int i;
98*4882a593Smuzhiyun 
99*4882a593Smuzhiyun 	dev_dbg(dht11->dev, "%d edges detected:\n", dht11->num_edges);
100*4882a593Smuzhiyun 	for (i = 1; i < dht11->num_edges; ++i) {
101*4882a593Smuzhiyun 		dev_dbg(dht11->dev, "%d: %lld ns %s\n", i,
102*4882a593Smuzhiyun 			dht11->edges[i].ts - dht11->edges[i - 1].ts,
103*4882a593Smuzhiyun 			dht11->edges[i - 1].value ? "high" : "low");
104*4882a593Smuzhiyun 	}
105*4882a593Smuzhiyun }
106*4882a593Smuzhiyun #endif /* CONFIG_DYNAMIC_DEBUG */
107*4882a593Smuzhiyun 
dht11_decode_byte(char * bits)108*4882a593Smuzhiyun static unsigned char dht11_decode_byte(char *bits)
109*4882a593Smuzhiyun {
110*4882a593Smuzhiyun 	unsigned char ret = 0;
111*4882a593Smuzhiyun 	int i;
112*4882a593Smuzhiyun 
113*4882a593Smuzhiyun 	for (i = 0; i < 8; ++i) {
114*4882a593Smuzhiyun 		ret <<= 1;
115*4882a593Smuzhiyun 		if (bits[i])
116*4882a593Smuzhiyun 			++ret;
117*4882a593Smuzhiyun 	}
118*4882a593Smuzhiyun 
119*4882a593Smuzhiyun 	return ret;
120*4882a593Smuzhiyun }
121*4882a593Smuzhiyun 
dht11_decode(struct dht11 * dht11,int offset)122*4882a593Smuzhiyun static int dht11_decode(struct dht11 *dht11, int offset)
123*4882a593Smuzhiyun {
124*4882a593Smuzhiyun 	int i, t;
125*4882a593Smuzhiyun 	char bits[DHT11_BITS_PER_READ];
126*4882a593Smuzhiyun 	unsigned char temp_int, temp_dec, hum_int, hum_dec, checksum;
127*4882a593Smuzhiyun 
128*4882a593Smuzhiyun 	for (i = 0; i < DHT11_BITS_PER_READ; ++i) {
129*4882a593Smuzhiyun 		t = dht11->edges[offset + 2 * i + 2].ts -
130*4882a593Smuzhiyun 			dht11->edges[offset + 2 * i + 1].ts;
131*4882a593Smuzhiyun 		if (!dht11->edges[offset + 2 * i + 1].value) {
132*4882a593Smuzhiyun 			dev_dbg(dht11->dev,
133*4882a593Smuzhiyun 				"lost synchronisation at edge %d\n",
134*4882a593Smuzhiyun 				offset + 2 * i + 1);
135*4882a593Smuzhiyun 			return -EIO;
136*4882a593Smuzhiyun 		}
137*4882a593Smuzhiyun 		bits[i] = t > DHT11_THRESHOLD;
138*4882a593Smuzhiyun 	}
139*4882a593Smuzhiyun 
140*4882a593Smuzhiyun 	hum_int = dht11_decode_byte(bits);
141*4882a593Smuzhiyun 	hum_dec = dht11_decode_byte(&bits[8]);
142*4882a593Smuzhiyun 	temp_int = dht11_decode_byte(&bits[16]);
143*4882a593Smuzhiyun 	temp_dec = dht11_decode_byte(&bits[24]);
144*4882a593Smuzhiyun 	checksum = dht11_decode_byte(&bits[32]);
145*4882a593Smuzhiyun 
146*4882a593Smuzhiyun 	if (((hum_int + hum_dec + temp_int + temp_dec) & 0xff) != checksum) {
147*4882a593Smuzhiyun 		dev_dbg(dht11->dev, "invalid checksum\n");
148*4882a593Smuzhiyun 		return -EIO;
149*4882a593Smuzhiyun 	}
150*4882a593Smuzhiyun 
151*4882a593Smuzhiyun 	dht11->timestamp = ktime_get_boottime_ns();
152*4882a593Smuzhiyun 	if (hum_int < 4) {  /* DHT22: 100000 = (3*256+232)*100 */
153*4882a593Smuzhiyun 		dht11->temperature = (((temp_int & 0x7f) << 8) + temp_dec) *
154*4882a593Smuzhiyun 					((temp_int & 0x80) ? -100 : 100);
155*4882a593Smuzhiyun 		dht11->humidity = ((hum_int << 8) + hum_dec) * 100;
156*4882a593Smuzhiyun 	} else if (temp_dec == 0 && hum_dec == 0) {  /* DHT11 */
157*4882a593Smuzhiyun 		dht11->temperature = temp_int * 1000;
158*4882a593Smuzhiyun 		dht11->humidity = hum_int * 1000;
159*4882a593Smuzhiyun 	} else {
160*4882a593Smuzhiyun 		dev_err(dht11->dev,
161*4882a593Smuzhiyun 			"Don't know how to decode data: %d %d %d %d\n",
162*4882a593Smuzhiyun 			hum_int, hum_dec, temp_int, temp_dec);
163*4882a593Smuzhiyun 		return -EIO;
164*4882a593Smuzhiyun 	}
165*4882a593Smuzhiyun 
166*4882a593Smuzhiyun 	return 0;
167*4882a593Smuzhiyun }
168*4882a593Smuzhiyun 
169*4882a593Smuzhiyun /*
170*4882a593Smuzhiyun  * IRQ handler called on GPIO edges
171*4882a593Smuzhiyun  */
dht11_handle_irq(int irq,void * data)172*4882a593Smuzhiyun static irqreturn_t dht11_handle_irq(int irq, void *data)
173*4882a593Smuzhiyun {
174*4882a593Smuzhiyun 	struct iio_dev *iio = data;
175*4882a593Smuzhiyun 	struct dht11 *dht11 = iio_priv(iio);
176*4882a593Smuzhiyun 
177*4882a593Smuzhiyun 	if (dht11->num_edges < DHT11_EDGES_PER_READ && dht11->num_edges >= 0) {
178*4882a593Smuzhiyun 		dht11->edges[dht11->num_edges].ts = ktime_get_boottime_ns();
179*4882a593Smuzhiyun 		dht11->edges[dht11->num_edges++].value =
180*4882a593Smuzhiyun 						gpiod_get_value(dht11->gpiod);
181*4882a593Smuzhiyun 
182*4882a593Smuzhiyun 		if (dht11->num_edges >= DHT11_EDGES_PER_READ)
183*4882a593Smuzhiyun 			complete(&dht11->completion);
184*4882a593Smuzhiyun 	}
185*4882a593Smuzhiyun 
186*4882a593Smuzhiyun 	return IRQ_HANDLED;
187*4882a593Smuzhiyun }
188*4882a593Smuzhiyun 
dht11_read_raw(struct iio_dev * iio_dev,const struct iio_chan_spec * chan,int * val,int * val2,long m)189*4882a593Smuzhiyun static int dht11_read_raw(struct iio_dev *iio_dev,
190*4882a593Smuzhiyun 			  const struct iio_chan_spec *chan,
191*4882a593Smuzhiyun 			int *val, int *val2, long m)
192*4882a593Smuzhiyun {
193*4882a593Smuzhiyun 	struct dht11 *dht11 = iio_priv(iio_dev);
194*4882a593Smuzhiyun 	int ret, timeres, offset;
195*4882a593Smuzhiyun 
196*4882a593Smuzhiyun 	mutex_lock(&dht11->lock);
197*4882a593Smuzhiyun 	if (dht11->timestamp + DHT11_DATA_VALID_TIME < ktime_get_boottime_ns()) {
198*4882a593Smuzhiyun 		timeres = ktime_get_resolution_ns();
199*4882a593Smuzhiyun 		dev_dbg(dht11->dev, "current timeresolution: %dns\n", timeres);
200*4882a593Smuzhiyun 		if (timeres > DHT11_MIN_TIMERES) {
201*4882a593Smuzhiyun 			dev_err(dht11->dev, "timeresolution %dns too low\n",
202*4882a593Smuzhiyun 				timeres);
203*4882a593Smuzhiyun 			/* In theory a better clock could become available
204*4882a593Smuzhiyun 			 * at some point ... and there is no error code
205*4882a593Smuzhiyun 			 * that really fits better.
206*4882a593Smuzhiyun 			 */
207*4882a593Smuzhiyun 			ret = -EAGAIN;
208*4882a593Smuzhiyun 			goto err;
209*4882a593Smuzhiyun 		}
210*4882a593Smuzhiyun 		if (timeres > DHT11_AMBIG_LOW && timeres < DHT11_AMBIG_HIGH)
211*4882a593Smuzhiyun 			dev_warn(dht11->dev,
212*4882a593Smuzhiyun 				 "timeresolution: %dns - decoding ambiguous\n",
213*4882a593Smuzhiyun 				 timeres);
214*4882a593Smuzhiyun 
215*4882a593Smuzhiyun 		reinit_completion(&dht11->completion);
216*4882a593Smuzhiyun 
217*4882a593Smuzhiyun 		dht11->num_edges = 0;
218*4882a593Smuzhiyun 		ret = gpiod_direction_output(dht11->gpiod, 0);
219*4882a593Smuzhiyun 		if (ret)
220*4882a593Smuzhiyun 			goto err;
221*4882a593Smuzhiyun 		usleep_range(DHT11_START_TRANSMISSION_MIN,
222*4882a593Smuzhiyun 			     DHT11_START_TRANSMISSION_MAX);
223*4882a593Smuzhiyun 		ret = gpiod_direction_input(dht11->gpiod);
224*4882a593Smuzhiyun 		if (ret)
225*4882a593Smuzhiyun 			goto err;
226*4882a593Smuzhiyun 
227*4882a593Smuzhiyun 		ret = request_irq(dht11->irq, dht11_handle_irq,
228*4882a593Smuzhiyun 				  IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
229*4882a593Smuzhiyun 				  iio_dev->name, iio_dev);
230*4882a593Smuzhiyun 		if (ret)
231*4882a593Smuzhiyun 			goto err;
232*4882a593Smuzhiyun 
233*4882a593Smuzhiyun 		ret = wait_for_completion_killable_timeout(&dht11->completion,
234*4882a593Smuzhiyun 							   HZ);
235*4882a593Smuzhiyun 
236*4882a593Smuzhiyun 		free_irq(dht11->irq, iio_dev);
237*4882a593Smuzhiyun 
238*4882a593Smuzhiyun #ifdef CONFIG_DYNAMIC_DEBUG
239*4882a593Smuzhiyun 		dht11_edges_print(dht11);
240*4882a593Smuzhiyun #endif
241*4882a593Smuzhiyun 
242*4882a593Smuzhiyun 		if (ret == 0 && dht11->num_edges < DHT11_EDGES_PER_READ - 1) {
243*4882a593Smuzhiyun 			dev_err(dht11->dev, "Only %d signal edges detected\n",
244*4882a593Smuzhiyun 				dht11->num_edges);
245*4882a593Smuzhiyun 			ret = -ETIMEDOUT;
246*4882a593Smuzhiyun 		}
247*4882a593Smuzhiyun 		if (ret < 0)
248*4882a593Smuzhiyun 			goto err;
249*4882a593Smuzhiyun 
250*4882a593Smuzhiyun 		offset = DHT11_EDGES_PREAMBLE +
251*4882a593Smuzhiyun 				dht11->num_edges - DHT11_EDGES_PER_READ;
252*4882a593Smuzhiyun 		for (; offset >= 0; --offset) {
253*4882a593Smuzhiyun 			ret = dht11_decode(dht11, offset);
254*4882a593Smuzhiyun 			if (!ret)
255*4882a593Smuzhiyun 				break;
256*4882a593Smuzhiyun 		}
257*4882a593Smuzhiyun 
258*4882a593Smuzhiyun 		if (ret)
259*4882a593Smuzhiyun 			goto err;
260*4882a593Smuzhiyun 	}
261*4882a593Smuzhiyun 
262*4882a593Smuzhiyun 	ret = IIO_VAL_INT;
263*4882a593Smuzhiyun 	if (chan->type == IIO_TEMP)
264*4882a593Smuzhiyun 		*val = dht11->temperature;
265*4882a593Smuzhiyun 	else if (chan->type == IIO_HUMIDITYRELATIVE)
266*4882a593Smuzhiyun 		*val = dht11->humidity;
267*4882a593Smuzhiyun 	else
268*4882a593Smuzhiyun 		ret = -EINVAL;
269*4882a593Smuzhiyun err:
270*4882a593Smuzhiyun 	dht11->num_edges = -1;
271*4882a593Smuzhiyun 	mutex_unlock(&dht11->lock);
272*4882a593Smuzhiyun 	return ret;
273*4882a593Smuzhiyun }
274*4882a593Smuzhiyun 
275*4882a593Smuzhiyun static const struct iio_info dht11_iio_info = {
276*4882a593Smuzhiyun 	.read_raw		= dht11_read_raw,
277*4882a593Smuzhiyun };
278*4882a593Smuzhiyun 
279*4882a593Smuzhiyun static const struct iio_chan_spec dht11_chan_spec[] = {
280*4882a593Smuzhiyun 	{ .type = IIO_TEMP,
281*4882a593Smuzhiyun 		.info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED), },
282*4882a593Smuzhiyun 	{ .type = IIO_HUMIDITYRELATIVE,
283*4882a593Smuzhiyun 		.info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED), }
284*4882a593Smuzhiyun };
285*4882a593Smuzhiyun 
286*4882a593Smuzhiyun static const struct of_device_id dht11_dt_ids[] = {
287*4882a593Smuzhiyun 	{ .compatible = "dht11", },
288*4882a593Smuzhiyun 	{ }
289*4882a593Smuzhiyun };
290*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, dht11_dt_ids);
291*4882a593Smuzhiyun 
dht11_probe(struct platform_device * pdev)292*4882a593Smuzhiyun static int dht11_probe(struct platform_device *pdev)
293*4882a593Smuzhiyun {
294*4882a593Smuzhiyun 	struct device *dev = &pdev->dev;
295*4882a593Smuzhiyun 	struct dht11 *dht11;
296*4882a593Smuzhiyun 	struct iio_dev *iio;
297*4882a593Smuzhiyun 
298*4882a593Smuzhiyun 	iio = devm_iio_device_alloc(dev, sizeof(*dht11));
299*4882a593Smuzhiyun 	if (!iio) {
300*4882a593Smuzhiyun 		dev_err(dev, "Failed to allocate IIO device\n");
301*4882a593Smuzhiyun 		return -ENOMEM;
302*4882a593Smuzhiyun 	}
303*4882a593Smuzhiyun 
304*4882a593Smuzhiyun 	dht11 = iio_priv(iio);
305*4882a593Smuzhiyun 	dht11->dev = dev;
306*4882a593Smuzhiyun 	dht11->gpiod = devm_gpiod_get(dev, NULL, GPIOD_IN);
307*4882a593Smuzhiyun 	if (IS_ERR(dht11->gpiod))
308*4882a593Smuzhiyun 		return PTR_ERR(dht11->gpiod);
309*4882a593Smuzhiyun 
310*4882a593Smuzhiyun 	dht11->irq = gpiod_to_irq(dht11->gpiod);
311*4882a593Smuzhiyun 	if (dht11->irq < 0) {
312*4882a593Smuzhiyun 		dev_err(dev, "GPIO %d has no interrupt\n", desc_to_gpio(dht11->gpiod));
313*4882a593Smuzhiyun 		return -EINVAL;
314*4882a593Smuzhiyun 	}
315*4882a593Smuzhiyun 
316*4882a593Smuzhiyun 	dht11->timestamp = ktime_get_boottime_ns() - DHT11_DATA_VALID_TIME - 1;
317*4882a593Smuzhiyun 	dht11->num_edges = -1;
318*4882a593Smuzhiyun 
319*4882a593Smuzhiyun 	platform_set_drvdata(pdev, iio);
320*4882a593Smuzhiyun 
321*4882a593Smuzhiyun 	init_completion(&dht11->completion);
322*4882a593Smuzhiyun 	mutex_init(&dht11->lock);
323*4882a593Smuzhiyun 	iio->name = pdev->name;
324*4882a593Smuzhiyun 	iio->info = &dht11_iio_info;
325*4882a593Smuzhiyun 	iio->modes = INDIO_DIRECT_MODE;
326*4882a593Smuzhiyun 	iio->channels = dht11_chan_spec;
327*4882a593Smuzhiyun 	iio->num_channels = ARRAY_SIZE(dht11_chan_spec);
328*4882a593Smuzhiyun 
329*4882a593Smuzhiyun 	return devm_iio_device_register(dev, iio);
330*4882a593Smuzhiyun }
331*4882a593Smuzhiyun 
332*4882a593Smuzhiyun static struct platform_driver dht11_driver = {
333*4882a593Smuzhiyun 	.driver = {
334*4882a593Smuzhiyun 		.name	= DRIVER_NAME,
335*4882a593Smuzhiyun 		.of_match_table = dht11_dt_ids,
336*4882a593Smuzhiyun 	},
337*4882a593Smuzhiyun 	.probe  = dht11_probe,
338*4882a593Smuzhiyun };
339*4882a593Smuzhiyun 
340*4882a593Smuzhiyun module_platform_driver(dht11_driver);
341*4882a593Smuzhiyun 
342*4882a593Smuzhiyun MODULE_AUTHOR("Harald Geyer <harald@ccbib.org>");
343*4882a593Smuzhiyun MODULE_DESCRIPTION("DHT11 humidity/temperature sensor driver");
344*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
345