1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * This file is part of STM32 DAC driver
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
6*4882a593Smuzhiyun * Author: Fabrice Gasnier <fabrice.gasnier@st.com>.
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun */
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun #include <linux/clk.h>
11*4882a593Smuzhiyun #include <linux/delay.h>
12*4882a593Smuzhiyun #include <linux/module.h>
13*4882a593Smuzhiyun #include <linux/of_platform.h>
14*4882a593Smuzhiyun #include <linux/pm_runtime.h>
15*4882a593Smuzhiyun #include <linux/regulator/consumer.h>
16*4882a593Smuzhiyun #include <linux/reset.h>
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun #include "stm32-dac-core.h"
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun /**
21*4882a593Smuzhiyun * struct stm32_dac_priv - stm32 DAC core private data
22*4882a593Smuzhiyun * @pclk: peripheral clock common for all DACs
23*4882a593Smuzhiyun * @vref: regulator reference
24*4882a593Smuzhiyun * @common: Common data for all DAC instances
25*4882a593Smuzhiyun */
26*4882a593Smuzhiyun struct stm32_dac_priv {
27*4882a593Smuzhiyun struct clk *pclk;
28*4882a593Smuzhiyun struct regulator *vref;
29*4882a593Smuzhiyun struct stm32_dac_common common;
30*4882a593Smuzhiyun };
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun /**
33*4882a593Smuzhiyun * struct stm32_dac_cfg - DAC configuration
34*4882a593Smuzhiyun * @has_hfsel: DAC has high frequency control
35*4882a593Smuzhiyun */
36*4882a593Smuzhiyun struct stm32_dac_cfg {
37*4882a593Smuzhiyun bool has_hfsel;
38*4882a593Smuzhiyun };
39*4882a593Smuzhiyun
to_stm32_dac_priv(struct stm32_dac_common * com)40*4882a593Smuzhiyun static struct stm32_dac_priv *to_stm32_dac_priv(struct stm32_dac_common *com)
41*4882a593Smuzhiyun {
42*4882a593Smuzhiyun return container_of(com, struct stm32_dac_priv, common);
43*4882a593Smuzhiyun }
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun static const struct regmap_config stm32_dac_regmap_cfg = {
46*4882a593Smuzhiyun .reg_bits = 32,
47*4882a593Smuzhiyun .val_bits = 32,
48*4882a593Smuzhiyun .reg_stride = sizeof(u32),
49*4882a593Smuzhiyun .max_register = 0x3fc,
50*4882a593Smuzhiyun };
51*4882a593Smuzhiyun
stm32_dac_core_hw_start(struct device * dev)52*4882a593Smuzhiyun static int stm32_dac_core_hw_start(struct device *dev)
53*4882a593Smuzhiyun {
54*4882a593Smuzhiyun struct stm32_dac_common *common = dev_get_drvdata(dev);
55*4882a593Smuzhiyun struct stm32_dac_priv *priv = to_stm32_dac_priv(common);
56*4882a593Smuzhiyun int ret;
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun ret = regulator_enable(priv->vref);
59*4882a593Smuzhiyun if (ret < 0) {
60*4882a593Smuzhiyun dev_err(dev, "vref enable failed: %d\n", ret);
61*4882a593Smuzhiyun return ret;
62*4882a593Smuzhiyun }
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun ret = clk_prepare_enable(priv->pclk);
65*4882a593Smuzhiyun if (ret < 0) {
66*4882a593Smuzhiyun dev_err(dev, "pclk enable failed: %d\n", ret);
67*4882a593Smuzhiyun goto err_regulator_disable;
68*4882a593Smuzhiyun }
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun return 0;
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun err_regulator_disable:
73*4882a593Smuzhiyun regulator_disable(priv->vref);
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun return ret;
76*4882a593Smuzhiyun }
77*4882a593Smuzhiyun
stm32_dac_core_hw_stop(struct device * dev)78*4882a593Smuzhiyun static void stm32_dac_core_hw_stop(struct device *dev)
79*4882a593Smuzhiyun {
80*4882a593Smuzhiyun struct stm32_dac_common *common = dev_get_drvdata(dev);
81*4882a593Smuzhiyun struct stm32_dac_priv *priv = to_stm32_dac_priv(common);
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun clk_disable_unprepare(priv->pclk);
84*4882a593Smuzhiyun regulator_disable(priv->vref);
85*4882a593Smuzhiyun }
86*4882a593Smuzhiyun
stm32_dac_probe(struct platform_device * pdev)87*4882a593Smuzhiyun static int stm32_dac_probe(struct platform_device *pdev)
88*4882a593Smuzhiyun {
89*4882a593Smuzhiyun struct device *dev = &pdev->dev;
90*4882a593Smuzhiyun const struct stm32_dac_cfg *cfg;
91*4882a593Smuzhiyun struct stm32_dac_priv *priv;
92*4882a593Smuzhiyun struct regmap *regmap;
93*4882a593Smuzhiyun struct resource *res;
94*4882a593Smuzhiyun void __iomem *mmio;
95*4882a593Smuzhiyun struct reset_control *rst;
96*4882a593Smuzhiyun int ret;
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun if (!dev->of_node)
99*4882a593Smuzhiyun return -ENODEV;
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
102*4882a593Smuzhiyun if (!priv)
103*4882a593Smuzhiyun return -ENOMEM;
104*4882a593Smuzhiyun platform_set_drvdata(pdev, &priv->common);
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun cfg = (const struct stm32_dac_cfg *)
107*4882a593Smuzhiyun of_match_device(dev->driver->of_match_table, dev)->data;
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
110*4882a593Smuzhiyun mmio = devm_ioremap_resource(dev, res);
111*4882a593Smuzhiyun if (IS_ERR(mmio))
112*4882a593Smuzhiyun return PTR_ERR(mmio);
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun regmap = devm_regmap_init_mmio_clk(dev, "pclk", mmio,
115*4882a593Smuzhiyun &stm32_dac_regmap_cfg);
116*4882a593Smuzhiyun if (IS_ERR(regmap))
117*4882a593Smuzhiyun return PTR_ERR(regmap);
118*4882a593Smuzhiyun priv->common.regmap = regmap;
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun priv->pclk = devm_clk_get(dev, "pclk");
121*4882a593Smuzhiyun if (IS_ERR(priv->pclk)) {
122*4882a593Smuzhiyun ret = PTR_ERR(priv->pclk);
123*4882a593Smuzhiyun dev_err(dev, "pclk get failed\n");
124*4882a593Smuzhiyun return ret;
125*4882a593Smuzhiyun }
126*4882a593Smuzhiyun
127*4882a593Smuzhiyun priv->vref = devm_regulator_get(dev, "vref");
128*4882a593Smuzhiyun if (IS_ERR(priv->vref)) {
129*4882a593Smuzhiyun ret = PTR_ERR(priv->vref);
130*4882a593Smuzhiyun dev_err(dev, "vref get failed, %d\n", ret);
131*4882a593Smuzhiyun return ret;
132*4882a593Smuzhiyun }
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun pm_runtime_get_noresume(dev);
135*4882a593Smuzhiyun pm_runtime_set_active(dev);
136*4882a593Smuzhiyun pm_runtime_enable(dev);
137*4882a593Smuzhiyun
138*4882a593Smuzhiyun ret = stm32_dac_core_hw_start(dev);
139*4882a593Smuzhiyun if (ret)
140*4882a593Smuzhiyun goto err_pm_stop;
141*4882a593Smuzhiyun
142*4882a593Smuzhiyun ret = regulator_get_voltage(priv->vref);
143*4882a593Smuzhiyun if (ret < 0) {
144*4882a593Smuzhiyun dev_err(dev, "vref get voltage failed, %d\n", ret);
145*4882a593Smuzhiyun goto err_hw_stop;
146*4882a593Smuzhiyun }
147*4882a593Smuzhiyun priv->common.vref_mv = ret / 1000;
148*4882a593Smuzhiyun dev_dbg(dev, "vref+=%dmV\n", priv->common.vref_mv);
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun rst = devm_reset_control_get_optional_exclusive(dev, NULL);
151*4882a593Smuzhiyun if (rst) {
152*4882a593Smuzhiyun if (IS_ERR(rst)) {
153*4882a593Smuzhiyun ret = dev_err_probe(dev, PTR_ERR(rst), "reset get failed\n");
154*4882a593Smuzhiyun goto err_hw_stop;
155*4882a593Smuzhiyun }
156*4882a593Smuzhiyun
157*4882a593Smuzhiyun reset_control_assert(rst);
158*4882a593Smuzhiyun udelay(2);
159*4882a593Smuzhiyun reset_control_deassert(rst);
160*4882a593Smuzhiyun }
161*4882a593Smuzhiyun
162*4882a593Smuzhiyun if (cfg && cfg->has_hfsel) {
163*4882a593Smuzhiyun /* When clock speed is higher than 80MHz, set HFSEL */
164*4882a593Smuzhiyun priv->common.hfsel = (clk_get_rate(priv->pclk) > 80000000UL);
165*4882a593Smuzhiyun ret = regmap_update_bits(regmap, STM32_DAC_CR,
166*4882a593Smuzhiyun STM32H7_DAC_CR_HFSEL,
167*4882a593Smuzhiyun priv->common.hfsel ?
168*4882a593Smuzhiyun STM32H7_DAC_CR_HFSEL : 0);
169*4882a593Smuzhiyun if (ret)
170*4882a593Smuzhiyun goto err_hw_stop;
171*4882a593Smuzhiyun }
172*4882a593Smuzhiyun
173*4882a593Smuzhiyun
174*4882a593Smuzhiyun ret = of_platform_populate(pdev->dev.of_node, NULL, NULL, dev);
175*4882a593Smuzhiyun if (ret < 0) {
176*4882a593Smuzhiyun dev_err(dev, "failed to populate DT children\n");
177*4882a593Smuzhiyun goto err_hw_stop;
178*4882a593Smuzhiyun }
179*4882a593Smuzhiyun
180*4882a593Smuzhiyun pm_runtime_put(dev);
181*4882a593Smuzhiyun
182*4882a593Smuzhiyun return 0;
183*4882a593Smuzhiyun
184*4882a593Smuzhiyun err_hw_stop:
185*4882a593Smuzhiyun stm32_dac_core_hw_stop(dev);
186*4882a593Smuzhiyun err_pm_stop:
187*4882a593Smuzhiyun pm_runtime_disable(dev);
188*4882a593Smuzhiyun pm_runtime_set_suspended(dev);
189*4882a593Smuzhiyun pm_runtime_put_noidle(dev);
190*4882a593Smuzhiyun
191*4882a593Smuzhiyun return ret;
192*4882a593Smuzhiyun }
193*4882a593Smuzhiyun
stm32_dac_remove(struct platform_device * pdev)194*4882a593Smuzhiyun static int stm32_dac_remove(struct platform_device *pdev)
195*4882a593Smuzhiyun {
196*4882a593Smuzhiyun pm_runtime_get_sync(&pdev->dev);
197*4882a593Smuzhiyun of_platform_depopulate(&pdev->dev);
198*4882a593Smuzhiyun stm32_dac_core_hw_stop(&pdev->dev);
199*4882a593Smuzhiyun pm_runtime_disable(&pdev->dev);
200*4882a593Smuzhiyun pm_runtime_set_suspended(&pdev->dev);
201*4882a593Smuzhiyun pm_runtime_put_noidle(&pdev->dev);
202*4882a593Smuzhiyun
203*4882a593Smuzhiyun return 0;
204*4882a593Smuzhiyun }
205*4882a593Smuzhiyun
stm32_dac_core_resume(struct device * dev)206*4882a593Smuzhiyun static int __maybe_unused stm32_dac_core_resume(struct device *dev)
207*4882a593Smuzhiyun {
208*4882a593Smuzhiyun struct stm32_dac_common *common = dev_get_drvdata(dev);
209*4882a593Smuzhiyun struct stm32_dac_priv *priv = to_stm32_dac_priv(common);
210*4882a593Smuzhiyun int ret;
211*4882a593Smuzhiyun
212*4882a593Smuzhiyun if (priv->common.hfsel) {
213*4882a593Smuzhiyun /* restore hfsel (maybe lost under low power state) */
214*4882a593Smuzhiyun ret = regmap_update_bits(priv->common.regmap, STM32_DAC_CR,
215*4882a593Smuzhiyun STM32H7_DAC_CR_HFSEL,
216*4882a593Smuzhiyun STM32H7_DAC_CR_HFSEL);
217*4882a593Smuzhiyun if (ret)
218*4882a593Smuzhiyun return ret;
219*4882a593Smuzhiyun }
220*4882a593Smuzhiyun
221*4882a593Smuzhiyun return pm_runtime_force_resume(dev);
222*4882a593Smuzhiyun }
223*4882a593Smuzhiyun
stm32_dac_core_runtime_suspend(struct device * dev)224*4882a593Smuzhiyun static int __maybe_unused stm32_dac_core_runtime_suspend(struct device *dev)
225*4882a593Smuzhiyun {
226*4882a593Smuzhiyun stm32_dac_core_hw_stop(dev);
227*4882a593Smuzhiyun
228*4882a593Smuzhiyun return 0;
229*4882a593Smuzhiyun }
230*4882a593Smuzhiyun
stm32_dac_core_runtime_resume(struct device * dev)231*4882a593Smuzhiyun static int __maybe_unused stm32_dac_core_runtime_resume(struct device *dev)
232*4882a593Smuzhiyun {
233*4882a593Smuzhiyun return stm32_dac_core_hw_start(dev);
234*4882a593Smuzhiyun }
235*4882a593Smuzhiyun
236*4882a593Smuzhiyun static const struct dev_pm_ops stm32_dac_core_pm_ops = {
237*4882a593Smuzhiyun SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, stm32_dac_core_resume)
238*4882a593Smuzhiyun SET_RUNTIME_PM_OPS(stm32_dac_core_runtime_suspend,
239*4882a593Smuzhiyun stm32_dac_core_runtime_resume,
240*4882a593Smuzhiyun NULL)
241*4882a593Smuzhiyun };
242*4882a593Smuzhiyun
243*4882a593Smuzhiyun static const struct stm32_dac_cfg stm32h7_dac_cfg = {
244*4882a593Smuzhiyun .has_hfsel = true,
245*4882a593Smuzhiyun };
246*4882a593Smuzhiyun
247*4882a593Smuzhiyun static const struct of_device_id stm32_dac_of_match[] = {
248*4882a593Smuzhiyun {
249*4882a593Smuzhiyun .compatible = "st,stm32f4-dac-core",
250*4882a593Smuzhiyun }, {
251*4882a593Smuzhiyun .compatible = "st,stm32h7-dac-core",
252*4882a593Smuzhiyun .data = (void *)&stm32h7_dac_cfg,
253*4882a593Smuzhiyun },
254*4882a593Smuzhiyun {},
255*4882a593Smuzhiyun };
256*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, stm32_dac_of_match);
257*4882a593Smuzhiyun
258*4882a593Smuzhiyun static struct platform_driver stm32_dac_driver = {
259*4882a593Smuzhiyun .probe = stm32_dac_probe,
260*4882a593Smuzhiyun .remove = stm32_dac_remove,
261*4882a593Smuzhiyun .driver = {
262*4882a593Smuzhiyun .name = "stm32-dac-core",
263*4882a593Smuzhiyun .of_match_table = stm32_dac_of_match,
264*4882a593Smuzhiyun .pm = &stm32_dac_core_pm_ops,
265*4882a593Smuzhiyun },
266*4882a593Smuzhiyun };
267*4882a593Smuzhiyun module_platform_driver(stm32_dac_driver);
268*4882a593Smuzhiyun
269*4882a593Smuzhiyun MODULE_AUTHOR("Fabrice Gasnier <fabrice.gasnier@st.com>");
270*4882a593Smuzhiyun MODULE_DESCRIPTION("STMicroelectronics STM32 DAC core driver");
271*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
272*4882a593Smuzhiyun MODULE_ALIAS("platform:stm32-dac-core");
273