xref: /OK3568_Linux_fs/kernel/drivers/iio/dac/max517.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  *  max517.c - Support for Maxim MAX517, MAX518 and MAX519
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  *  Copyright (C) 2010, 2011 Roland Stigge <stigge@antcom.de>
6*4882a593Smuzhiyun  */
7*4882a593Smuzhiyun 
8*4882a593Smuzhiyun #include <linux/module.h>
9*4882a593Smuzhiyun #include <linux/slab.h>
10*4882a593Smuzhiyun #include <linux/jiffies.h>
11*4882a593Smuzhiyun #include <linux/i2c.h>
12*4882a593Smuzhiyun #include <linux/err.h>
13*4882a593Smuzhiyun 
14*4882a593Smuzhiyun #include <linux/iio/iio.h>
15*4882a593Smuzhiyun #include <linux/iio/sysfs.h>
16*4882a593Smuzhiyun #include <linux/iio/dac/max517.h>
17*4882a593Smuzhiyun 
18*4882a593Smuzhiyun #define MAX517_DRV_NAME	"max517"
19*4882a593Smuzhiyun 
20*4882a593Smuzhiyun /* Commands */
21*4882a593Smuzhiyun #define COMMAND_CHANNEL0	0x00
22*4882a593Smuzhiyun #define COMMAND_CHANNEL1	0x01 /* for MAX518 and MAX519 */
23*4882a593Smuzhiyun #define COMMAND_PD		0x08 /* Power Down */
24*4882a593Smuzhiyun 
25*4882a593Smuzhiyun enum max517_device_ids {
26*4882a593Smuzhiyun 	ID_MAX517,
27*4882a593Smuzhiyun 	ID_MAX518,
28*4882a593Smuzhiyun 	ID_MAX519,
29*4882a593Smuzhiyun 	ID_MAX520,
30*4882a593Smuzhiyun 	ID_MAX521,
31*4882a593Smuzhiyun };
32*4882a593Smuzhiyun 
33*4882a593Smuzhiyun struct max517_data {
34*4882a593Smuzhiyun 	struct i2c_client	*client;
35*4882a593Smuzhiyun 	unsigned short		vref_mv[8];
36*4882a593Smuzhiyun };
37*4882a593Smuzhiyun 
38*4882a593Smuzhiyun /*
39*4882a593Smuzhiyun  * channel: bit 0: channel 1
40*4882a593Smuzhiyun  *          bit 1: channel 2
41*4882a593Smuzhiyun  * (this way, it's possible to set both channels at once)
42*4882a593Smuzhiyun  */
max517_set_value(struct iio_dev * indio_dev,long val,int channel)43*4882a593Smuzhiyun static int max517_set_value(struct iio_dev *indio_dev,
44*4882a593Smuzhiyun 	long val, int channel)
45*4882a593Smuzhiyun {
46*4882a593Smuzhiyun 	struct max517_data *data = iio_priv(indio_dev);
47*4882a593Smuzhiyun 	struct i2c_client *client = data->client;
48*4882a593Smuzhiyun 	u8 outbuf[2];
49*4882a593Smuzhiyun 	int res;
50*4882a593Smuzhiyun 
51*4882a593Smuzhiyun 	if (val < 0 || val > 255)
52*4882a593Smuzhiyun 		return -EINVAL;
53*4882a593Smuzhiyun 
54*4882a593Smuzhiyun 	outbuf[0] = channel;
55*4882a593Smuzhiyun 	outbuf[1] = val;
56*4882a593Smuzhiyun 
57*4882a593Smuzhiyun 	res = i2c_master_send(client, outbuf, 2);
58*4882a593Smuzhiyun 	if (res < 0)
59*4882a593Smuzhiyun 		return res;
60*4882a593Smuzhiyun 	else if (res != 2)
61*4882a593Smuzhiyun 		return -EIO;
62*4882a593Smuzhiyun 	else
63*4882a593Smuzhiyun 		return 0;
64*4882a593Smuzhiyun }
65*4882a593Smuzhiyun 
max517_read_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int * val,int * val2,long m)66*4882a593Smuzhiyun static int max517_read_raw(struct iio_dev *indio_dev,
67*4882a593Smuzhiyun 			   struct iio_chan_spec const *chan,
68*4882a593Smuzhiyun 			   int *val,
69*4882a593Smuzhiyun 			   int *val2,
70*4882a593Smuzhiyun 			   long m)
71*4882a593Smuzhiyun {
72*4882a593Smuzhiyun 	struct max517_data *data = iio_priv(indio_dev);
73*4882a593Smuzhiyun 
74*4882a593Smuzhiyun 	switch (m) {
75*4882a593Smuzhiyun 	case IIO_CHAN_INFO_SCALE:
76*4882a593Smuzhiyun 		/* Corresponds to Vref / 2^(bits) */
77*4882a593Smuzhiyun 		*val = data->vref_mv[chan->channel];
78*4882a593Smuzhiyun 		*val2 = 8;
79*4882a593Smuzhiyun 		return IIO_VAL_FRACTIONAL_LOG2;
80*4882a593Smuzhiyun 	default:
81*4882a593Smuzhiyun 		break;
82*4882a593Smuzhiyun 	}
83*4882a593Smuzhiyun 	return -EINVAL;
84*4882a593Smuzhiyun }
85*4882a593Smuzhiyun 
max517_write_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int val,int val2,long mask)86*4882a593Smuzhiyun static int max517_write_raw(struct iio_dev *indio_dev,
87*4882a593Smuzhiyun 	struct iio_chan_spec const *chan, int val, int val2, long mask)
88*4882a593Smuzhiyun {
89*4882a593Smuzhiyun 	int ret;
90*4882a593Smuzhiyun 
91*4882a593Smuzhiyun 	switch (mask) {
92*4882a593Smuzhiyun 	case IIO_CHAN_INFO_RAW:
93*4882a593Smuzhiyun 		ret = max517_set_value(indio_dev, val, chan->channel);
94*4882a593Smuzhiyun 		break;
95*4882a593Smuzhiyun 	default:
96*4882a593Smuzhiyun 		ret = -EINVAL;
97*4882a593Smuzhiyun 		break;
98*4882a593Smuzhiyun 	}
99*4882a593Smuzhiyun 
100*4882a593Smuzhiyun 	return ret;
101*4882a593Smuzhiyun }
102*4882a593Smuzhiyun 
max517_suspend(struct device * dev)103*4882a593Smuzhiyun static int __maybe_unused max517_suspend(struct device *dev)
104*4882a593Smuzhiyun {
105*4882a593Smuzhiyun 	u8 outbuf = COMMAND_PD;
106*4882a593Smuzhiyun 
107*4882a593Smuzhiyun 	return i2c_master_send(to_i2c_client(dev), &outbuf, 1);
108*4882a593Smuzhiyun }
109*4882a593Smuzhiyun 
max517_resume(struct device * dev)110*4882a593Smuzhiyun static int __maybe_unused max517_resume(struct device *dev)
111*4882a593Smuzhiyun {
112*4882a593Smuzhiyun 	u8 outbuf = 0;
113*4882a593Smuzhiyun 
114*4882a593Smuzhiyun 	return i2c_master_send(to_i2c_client(dev), &outbuf, 1);
115*4882a593Smuzhiyun }
116*4882a593Smuzhiyun 
117*4882a593Smuzhiyun static SIMPLE_DEV_PM_OPS(max517_pm_ops, max517_suspend, max517_resume);
118*4882a593Smuzhiyun 
119*4882a593Smuzhiyun static const struct iio_info max517_info = {
120*4882a593Smuzhiyun 	.read_raw = max517_read_raw,
121*4882a593Smuzhiyun 	.write_raw = max517_write_raw,
122*4882a593Smuzhiyun };
123*4882a593Smuzhiyun 
124*4882a593Smuzhiyun #define MAX517_CHANNEL(chan) {				\
125*4882a593Smuzhiyun 	.type = IIO_VOLTAGE,				\
126*4882a593Smuzhiyun 	.indexed = 1,					\
127*4882a593Smuzhiyun 	.output = 1,					\
128*4882a593Smuzhiyun 	.channel = (chan),				\
129*4882a593Smuzhiyun 	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |	\
130*4882a593Smuzhiyun 	BIT(IIO_CHAN_INFO_SCALE),			\
131*4882a593Smuzhiyun }
132*4882a593Smuzhiyun 
133*4882a593Smuzhiyun static const struct iio_chan_spec max517_channels[] = {
134*4882a593Smuzhiyun 	MAX517_CHANNEL(0),
135*4882a593Smuzhiyun 	MAX517_CHANNEL(1),
136*4882a593Smuzhiyun 	MAX517_CHANNEL(2),
137*4882a593Smuzhiyun 	MAX517_CHANNEL(3),
138*4882a593Smuzhiyun 	MAX517_CHANNEL(4),
139*4882a593Smuzhiyun 	MAX517_CHANNEL(5),
140*4882a593Smuzhiyun 	MAX517_CHANNEL(6),
141*4882a593Smuzhiyun 	MAX517_CHANNEL(7),
142*4882a593Smuzhiyun };
143*4882a593Smuzhiyun 
max517_probe(struct i2c_client * client,const struct i2c_device_id * id)144*4882a593Smuzhiyun static int max517_probe(struct i2c_client *client,
145*4882a593Smuzhiyun 			const struct i2c_device_id *id)
146*4882a593Smuzhiyun {
147*4882a593Smuzhiyun 	struct max517_data *data;
148*4882a593Smuzhiyun 	struct iio_dev *indio_dev;
149*4882a593Smuzhiyun 	struct max517_platform_data *platform_data = client->dev.platform_data;
150*4882a593Smuzhiyun 	int chan;
151*4882a593Smuzhiyun 
152*4882a593Smuzhiyun 	indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
153*4882a593Smuzhiyun 	if (!indio_dev)
154*4882a593Smuzhiyun 		return -ENOMEM;
155*4882a593Smuzhiyun 	data = iio_priv(indio_dev);
156*4882a593Smuzhiyun 	i2c_set_clientdata(client, indio_dev);
157*4882a593Smuzhiyun 	data->client = client;
158*4882a593Smuzhiyun 
159*4882a593Smuzhiyun 	switch (id->driver_data) {
160*4882a593Smuzhiyun 	case ID_MAX521:
161*4882a593Smuzhiyun 		indio_dev->num_channels = 8;
162*4882a593Smuzhiyun 		break;
163*4882a593Smuzhiyun 	case ID_MAX520:
164*4882a593Smuzhiyun 		indio_dev->num_channels = 4;
165*4882a593Smuzhiyun 		break;
166*4882a593Smuzhiyun 	case ID_MAX519:
167*4882a593Smuzhiyun 	case ID_MAX518:
168*4882a593Smuzhiyun 		indio_dev->num_channels = 2;
169*4882a593Smuzhiyun 		break;
170*4882a593Smuzhiyun 	default:  /* single channel for MAX517 */
171*4882a593Smuzhiyun 		indio_dev->num_channels = 1;
172*4882a593Smuzhiyun 		break;
173*4882a593Smuzhiyun 	}
174*4882a593Smuzhiyun 	indio_dev->channels = max517_channels;
175*4882a593Smuzhiyun 	indio_dev->modes = INDIO_DIRECT_MODE;
176*4882a593Smuzhiyun 	indio_dev->info = &max517_info;
177*4882a593Smuzhiyun 
178*4882a593Smuzhiyun 	/*
179*4882a593Smuzhiyun 	 * Reference voltage on MAX518 and default is 5V, else take vref_mv
180*4882a593Smuzhiyun 	 * from platform_data
181*4882a593Smuzhiyun 	 */
182*4882a593Smuzhiyun 	for (chan = 0; chan < indio_dev->num_channels; chan++) {
183*4882a593Smuzhiyun 		if (id->driver_data == ID_MAX518 || !platform_data)
184*4882a593Smuzhiyun 			data->vref_mv[chan] = 5000; /* mV */
185*4882a593Smuzhiyun 		else
186*4882a593Smuzhiyun 			data->vref_mv[chan] = platform_data->vref_mv[chan];
187*4882a593Smuzhiyun 	}
188*4882a593Smuzhiyun 
189*4882a593Smuzhiyun 	return iio_device_register(indio_dev);
190*4882a593Smuzhiyun }
191*4882a593Smuzhiyun 
max517_remove(struct i2c_client * client)192*4882a593Smuzhiyun static int max517_remove(struct i2c_client *client)
193*4882a593Smuzhiyun {
194*4882a593Smuzhiyun 	iio_device_unregister(i2c_get_clientdata(client));
195*4882a593Smuzhiyun 	return 0;
196*4882a593Smuzhiyun }
197*4882a593Smuzhiyun 
198*4882a593Smuzhiyun static const struct i2c_device_id max517_id[] = {
199*4882a593Smuzhiyun 	{ "max517", ID_MAX517 },
200*4882a593Smuzhiyun 	{ "max518", ID_MAX518 },
201*4882a593Smuzhiyun 	{ "max519", ID_MAX519 },
202*4882a593Smuzhiyun 	{ "max520", ID_MAX520 },
203*4882a593Smuzhiyun 	{ "max521", ID_MAX521 },
204*4882a593Smuzhiyun 	{ }
205*4882a593Smuzhiyun };
206*4882a593Smuzhiyun MODULE_DEVICE_TABLE(i2c, max517_id);
207*4882a593Smuzhiyun 
208*4882a593Smuzhiyun static struct i2c_driver max517_driver = {
209*4882a593Smuzhiyun 	.driver = {
210*4882a593Smuzhiyun 		.name	= MAX517_DRV_NAME,
211*4882a593Smuzhiyun 		.pm	= &max517_pm_ops,
212*4882a593Smuzhiyun 	},
213*4882a593Smuzhiyun 	.probe		= max517_probe,
214*4882a593Smuzhiyun 	.remove		= max517_remove,
215*4882a593Smuzhiyun 	.id_table	= max517_id,
216*4882a593Smuzhiyun };
217*4882a593Smuzhiyun module_i2c_driver(max517_driver);
218*4882a593Smuzhiyun 
219*4882a593Smuzhiyun MODULE_AUTHOR("Roland Stigge <stigge@antcom.de>");
220*4882a593Smuzhiyun MODULE_DESCRIPTION("MAX517/518/519/520/521 8-bit DAC");
221*4882a593Smuzhiyun MODULE_LICENSE("GPL");
222