1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * IIO DAC driver for NXP LPC18xx DAC
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2016 Joachim Eastwood <manabian@gmail.com>
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * UNSUPPORTED hardware features:
8*4882a593Smuzhiyun * - Interrupts
9*4882a593Smuzhiyun * - DMA
10*4882a593Smuzhiyun */
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun #include <linux/clk.h>
13*4882a593Smuzhiyun #include <linux/err.h>
14*4882a593Smuzhiyun #include <linux/iio/iio.h>
15*4882a593Smuzhiyun #include <linux/iio/driver.h>
16*4882a593Smuzhiyun #include <linux/io.h>
17*4882a593Smuzhiyun #include <linux/iopoll.h>
18*4882a593Smuzhiyun #include <linux/module.h>
19*4882a593Smuzhiyun #include <linux/mutex.h>
20*4882a593Smuzhiyun #include <linux/of.h>
21*4882a593Smuzhiyun #include <linux/of_device.h>
22*4882a593Smuzhiyun #include <linux/platform_device.h>
23*4882a593Smuzhiyun #include <linux/regulator/consumer.h>
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun /* LPC18XX DAC registers and bits */
26*4882a593Smuzhiyun #define LPC18XX_DAC_CR 0x000
27*4882a593Smuzhiyun #define LPC18XX_DAC_CR_VALUE_SHIFT 6
28*4882a593Smuzhiyun #define LPC18XX_DAC_CR_VALUE_MASK 0x3ff
29*4882a593Smuzhiyun #define LPC18XX_DAC_CR_BIAS BIT(16)
30*4882a593Smuzhiyun #define LPC18XX_DAC_CTRL 0x004
31*4882a593Smuzhiyun #define LPC18XX_DAC_CTRL_DMA_ENA BIT(3)
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun struct lpc18xx_dac {
34*4882a593Smuzhiyun struct regulator *vref;
35*4882a593Smuzhiyun void __iomem *base;
36*4882a593Smuzhiyun struct mutex lock;
37*4882a593Smuzhiyun struct clk *clk;
38*4882a593Smuzhiyun };
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun static const struct iio_chan_spec lpc18xx_dac_iio_channels[] = {
41*4882a593Smuzhiyun {
42*4882a593Smuzhiyun .type = IIO_VOLTAGE,
43*4882a593Smuzhiyun .output = 1,
44*4882a593Smuzhiyun .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
45*4882a593Smuzhiyun BIT(IIO_CHAN_INFO_SCALE),
46*4882a593Smuzhiyun },
47*4882a593Smuzhiyun };
48*4882a593Smuzhiyun
lpc18xx_dac_read_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int * val,int * val2,long mask)49*4882a593Smuzhiyun static int lpc18xx_dac_read_raw(struct iio_dev *indio_dev,
50*4882a593Smuzhiyun struct iio_chan_spec const *chan,
51*4882a593Smuzhiyun int *val, int *val2, long mask)
52*4882a593Smuzhiyun {
53*4882a593Smuzhiyun struct lpc18xx_dac *dac = iio_priv(indio_dev);
54*4882a593Smuzhiyun u32 reg;
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun switch (mask) {
57*4882a593Smuzhiyun case IIO_CHAN_INFO_RAW:
58*4882a593Smuzhiyun reg = readl(dac->base + LPC18XX_DAC_CR);
59*4882a593Smuzhiyun *val = reg >> LPC18XX_DAC_CR_VALUE_SHIFT;
60*4882a593Smuzhiyun *val &= LPC18XX_DAC_CR_VALUE_MASK;
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun return IIO_VAL_INT;
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun case IIO_CHAN_INFO_SCALE:
65*4882a593Smuzhiyun *val = regulator_get_voltage(dac->vref) / 1000;
66*4882a593Smuzhiyun *val2 = 10;
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun return IIO_VAL_FRACTIONAL_LOG2;
69*4882a593Smuzhiyun }
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun return -EINVAL;
72*4882a593Smuzhiyun }
73*4882a593Smuzhiyun
lpc18xx_dac_write_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int val,int val2,long mask)74*4882a593Smuzhiyun static int lpc18xx_dac_write_raw(struct iio_dev *indio_dev,
75*4882a593Smuzhiyun struct iio_chan_spec const *chan,
76*4882a593Smuzhiyun int val, int val2, long mask)
77*4882a593Smuzhiyun {
78*4882a593Smuzhiyun struct lpc18xx_dac *dac = iio_priv(indio_dev);
79*4882a593Smuzhiyun u32 reg;
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun switch (mask) {
82*4882a593Smuzhiyun case IIO_CHAN_INFO_RAW:
83*4882a593Smuzhiyun if (val < 0 || val > LPC18XX_DAC_CR_VALUE_MASK)
84*4882a593Smuzhiyun return -EINVAL;
85*4882a593Smuzhiyun
86*4882a593Smuzhiyun reg = LPC18XX_DAC_CR_BIAS;
87*4882a593Smuzhiyun reg |= val << LPC18XX_DAC_CR_VALUE_SHIFT;
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun mutex_lock(&dac->lock);
90*4882a593Smuzhiyun writel(reg, dac->base + LPC18XX_DAC_CR);
91*4882a593Smuzhiyun writel(LPC18XX_DAC_CTRL_DMA_ENA, dac->base + LPC18XX_DAC_CTRL);
92*4882a593Smuzhiyun mutex_unlock(&dac->lock);
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun return 0;
95*4882a593Smuzhiyun }
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun return -EINVAL;
98*4882a593Smuzhiyun }
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun static const struct iio_info lpc18xx_dac_info = {
101*4882a593Smuzhiyun .read_raw = lpc18xx_dac_read_raw,
102*4882a593Smuzhiyun .write_raw = lpc18xx_dac_write_raw,
103*4882a593Smuzhiyun };
104*4882a593Smuzhiyun
lpc18xx_dac_probe(struct platform_device * pdev)105*4882a593Smuzhiyun static int lpc18xx_dac_probe(struct platform_device *pdev)
106*4882a593Smuzhiyun {
107*4882a593Smuzhiyun struct iio_dev *indio_dev;
108*4882a593Smuzhiyun struct lpc18xx_dac *dac;
109*4882a593Smuzhiyun int ret;
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*dac));
112*4882a593Smuzhiyun if (!indio_dev)
113*4882a593Smuzhiyun return -ENOMEM;
114*4882a593Smuzhiyun
115*4882a593Smuzhiyun platform_set_drvdata(pdev, indio_dev);
116*4882a593Smuzhiyun dac = iio_priv(indio_dev);
117*4882a593Smuzhiyun mutex_init(&dac->lock);
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun dac->base = devm_platform_ioremap_resource(pdev, 0);
120*4882a593Smuzhiyun if (IS_ERR(dac->base))
121*4882a593Smuzhiyun return PTR_ERR(dac->base);
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun dac->clk = devm_clk_get(&pdev->dev, NULL);
124*4882a593Smuzhiyun if (IS_ERR(dac->clk)) {
125*4882a593Smuzhiyun dev_err(&pdev->dev, "error getting clock\n");
126*4882a593Smuzhiyun return PTR_ERR(dac->clk);
127*4882a593Smuzhiyun }
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun dac->vref = devm_regulator_get(&pdev->dev, "vref");
130*4882a593Smuzhiyun if (IS_ERR(dac->vref)) {
131*4882a593Smuzhiyun dev_err(&pdev->dev, "error getting regulator\n");
132*4882a593Smuzhiyun return PTR_ERR(dac->vref);
133*4882a593Smuzhiyun }
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun indio_dev->name = dev_name(&pdev->dev);
136*4882a593Smuzhiyun indio_dev->info = &lpc18xx_dac_info;
137*4882a593Smuzhiyun indio_dev->modes = INDIO_DIRECT_MODE;
138*4882a593Smuzhiyun indio_dev->channels = lpc18xx_dac_iio_channels;
139*4882a593Smuzhiyun indio_dev->num_channels = ARRAY_SIZE(lpc18xx_dac_iio_channels);
140*4882a593Smuzhiyun
141*4882a593Smuzhiyun ret = regulator_enable(dac->vref);
142*4882a593Smuzhiyun if (ret) {
143*4882a593Smuzhiyun dev_err(&pdev->dev, "unable to enable regulator\n");
144*4882a593Smuzhiyun return ret;
145*4882a593Smuzhiyun }
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun ret = clk_prepare_enable(dac->clk);
148*4882a593Smuzhiyun if (ret) {
149*4882a593Smuzhiyun dev_err(&pdev->dev, "unable to enable clock\n");
150*4882a593Smuzhiyun goto dis_reg;
151*4882a593Smuzhiyun }
152*4882a593Smuzhiyun
153*4882a593Smuzhiyun writel(0, dac->base + LPC18XX_DAC_CTRL);
154*4882a593Smuzhiyun writel(0, dac->base + LPC18XX_DAC_CR);
155*4882a593Smuzhiyun
156*4882a593Smuzhiyun ret = iio_device_register(indio_dev);
157*4882a593Smuzhiyun if (ret) {
158*4882a593Smuzhiyun dev_err(&pdev->dev, "unable to register device\n");
159*4882a593Smuzhiyun goto dis_clk;
160*4882a593Smuzhiyun }
161*4882a593Smuzhiyun
162*4882a593Smuzhiyun return 0;
163*4882a593Smuzhiyun
164*4882a593Smuzhiyun dis_clk:
165*4882a593Smuzhiyun clk_disable_unprepare(dac->clk);
166*4882a593Smuzhiyun dis_reg:
167*4882a593Smuzhiyun regulator_disable(dac->vref);
168*4882a593Smuzhiyun return ret;
169*4882a593Smuzhiyun }
170*4882a593Smuzhiyun
lpc18xx_dac_remove(struct platform_device * pdev)171*4882a593Smuzhiyun static int lpc18xx_dac_remove(struct platform_device *pdev)
172*4882a593Smuzhiyun {
173*4882a593Smuzhiyun struct iio_dev *indio_dev = platform_get_drvdata(pdev);
174*4882a593Smuzhiyun struct lpc18xx_dac *dac = iio_priv(indio_dev);
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun iio_device_unregister(indio_dev);
177*4882a593Smuzhiyun
178*4882a593Smuzhiyun writel(0, dac->base + LPC18XX_DAC_CTRL);
179*4882a593Smuzhiyun clk_disable_unprepare(dac->clk);
180*4882a593Smuzhiyun regulator_disable(dac->vref);
181*4882a593Smuzhiyun
182*4882a593Smuzhiyun return 0;
183*4882a593Smuzhiyun }
184*4882a593Smuzhiyun
185*4882a593Smuzhiyun static const struct of_device_id lpc18xx_dac_match[] = {
186*4882a593Smuzhiyun { .compatible = "nxp,lpc1850-dac" },
187*4882a593Smuzhiyun { /* sentinel */ }
188*4882a593Smuzhiyun };
189*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, lpc18xx_dac_match);
190*4882a593Smuzhiyun
191*4882a593Smuzhiyun static struct platform_driver lpc18xx_dac_driver = {
192*4882a593Smuzhiyun .probe = lpc18xx_dac_probe,
193*4882a593Smuzhiyun .remove = lpc18xx_dac_remove,
194*4882a593Smuzhiyun .driver = {
195*4882a593Smuzhiyun .name = "lpc18xx-dac",
196*4882a593Smuzhiyun .of_match_table = lpc18xx_dac_match,
197*4882a593Smuzhiyun },
198*4882a593Smuzhiyun };
199*4882a593Smuzhiyun module_platform_driver(lpc18xx_dac_driver);
200*4882a593Smuzhiyun
201*4882a593Smuzhiyun MODULE_DESCRIPTION("LPC18xx DAC driver");
202*4882a593Smuzhiyun MODULE_AUTHOR("Joachim Eastwood <manabian@gmail.com>");
203*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
204