xref: /OK3568_Linux_fs/kernel/drivers/iio/dac/ad8801.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * IIO DAC driver for Analog Devices AD8801 DAC
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (C) 2016 Gwenhael Goavec-Merou
6*4882a593Smuzhiyun  */
7*4882a593Smuzhiyun 
8*4882a593Smuzhiyun #include <linux/iio/iio.h>
9*4882a593Smuzhiyun #include <linux/module.h>
10*4882a593Smuzhiyun #include <linux/regulator/consumer.h>
11*4882a593Smuzhiyun #include <linux/spi/spi.h>
12*4882a593Smuzhiyun #include <linux/sysfs.h>
13*4882a593Smuzhiyun 
14*4882a593Smuzhiyun #define AD8801_CFG_ADDR_OFFSET 8
15*4882a593Smuzhiyun 
16*4882a593Smuzhiyun enum ad8801_device_ids {
17*4882a593Smuzhiyun 	ID_AD8801,
18*4882a593Smuzhiyun 	ID_AD8803,
19*4882a593Smuzhiyun };
20*4882a593Smuzhiyun 
21*4882a593Smuzhiyun struct ad8801_state {
22*4882a593Smuzhiyun 	struct spi_device *spi;
23*4882a593Smuzhiyun 	unsigned char dac_cache[8]; /* Value write on each channel */
24*4882a593Smuzhiyun 	unsigned int vrefh_mv;
25*4882a593Smuzhiyun 	unsigned int vrefl_mv;
26*4882a593Smuzhiyun 	struct regulator *vrefh_reg;
27*4882a593Smuzhiyun 	struct regulator *vrefl_reg;
28*4882a593Smuzhiyun 
29*4882a593Smuzhiyun 	__be16 data ____cacheline_aligned;
30*4882a593Smuzhiyun };
31*4882a593Smuzhiyun 
ad8801_spi_write(struct ad8801_state * state,u8 channel,unsigned char value)32*4882a593Smuzhiyun static int ad8801_spi_write(struct ad8801_state *state,
33*4882a593Smuzhiyun 	u8 channel, unsigned char value)
34*4882a593Smuzhiyun {
35*4882a593Smuzhiyun 	state->data = cpu_to_be16((channel << AD8801_CFG_ADDR_OFFSET) | value);
36*4882a593Smuzhiyun 	return spi_write(state->spi, &state->data, sizeof(state->data));
37*4882a593Smuzhiyun }
38*4882a593Smuzhiyun 
ad8801_write_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int val,int val2,long mask)39*4882a593Smuzhiyun static int ad8801_write_raw(struct iio_dev *indio_dev,
40*4882a593Smuzhiyun 	struct iio_chan_spec const *chan, int val, int val2, long mask)
41*4882a593Smuzhiyun {
42*4882a593Smuzhiyun 	struct ad8801_state *state = iio_priv(indio_dev);
43*4882a593Smuzhiyun 	int ret;
44*4882a593Smuzhiyun 
45*4882a593Smuzhiyun 	switch (mask) {
46*4882a593Smuzhiyun 	case IIO_CHAN_INFO_RAW:
47*4882a593Smuzhiyun 		if (val >= 256 || val < 0)
48*4882a593Smuzhiyun 			return -EINVAL;
49*4882a593Smuzhiyun 
50*4882a593Smuzhiyun 		ret = ad8801_spi_write(state, chan->channel, val);
51*4882a593Smuzhiyun 		if (ret == 0)
52*4882a593Smuzhiyun 			state->dac_cache[chan->channel] = val;
53*4882a593Smuzhiyun 		break;
54*4882a593Smuzhiyun 	default:
55*4882a593Smuzhiyun 		ret = -EINVAL;
56*4882a593Smuzhiyun 	}
57*4882a593Smuzhiyun 
58*4882a593Smuzhiyun 	return ret;
59*4882a593Smuzhiyun }
60*4882a593Smuzhiyun 
ad8801_read_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int * val,int * val2,long info)61*4882a593Smuzhiyun static int ad8801_read_raw(struct iio_dev *indio_dev,
62*4882a593Smuzhiyun 	struct iio_chan_spec const *chan, int *val, int *val2, long info)
63*4882a593Smuzhiyun {
64*4882a593Smuzhiyun 	struct ad8801_state *state = iio_priv(indio_dev);
65*4882a593Smuzhiyun 
66*4882a593Smuzhiyun 	switch (info) {
67*4882a593Smuzhiyun 	case IIO_CHAN_INFO_RAW:
68*4882a593Smuzhiyun 		*val = state->dac_cache[chan->channel];
69*4882a593Smuzhiyun 		return IIO_VAL_INT;
70*4882a593Smuzhiyun 	case IIO_CHAN_INFO_SCALE:
71*4882a593Smuzhiyun 		*val = state->vrefh_mv - state->vrefl_mv;
72*4882a593Smuzhiyun 		*val2 = 8;
73*4882a593Smuzhiyun 		return IIO_VAL_FRACTIONAL_LOG2;
74*4882a593Smuzhiyun 	case IIO_CHAN_INFO_OFFSET:
75*4882a593Smuzhiyun 		*val = state->vrefl_mv;
76*4882a593Smuzhiyun 		return IIO_VAL_INT;
77*4882a593Smuzhiyun 	default:
78*4882a593Smuzhiyun 		return -EINVAL;
79*4882a593Smuzhiyun 	}
80*4882a593Smuzhiyun 
81*4882a593Smuzhiyun 	return -EINVAL;
82*4882a593Smuzhiyun }
83*4882a593Smuzhiyun 
84*4882a593Smuzhiyun static const struct iio_info ad8801_info = {
85*4882a593Smuzhiyun 	.read_raw = ad8801_read_raw,
86*4882a593Smuzhiyun 	.write_raw = ad8801_write_raw,
87*4882a593Smuzhiyun };
88*4882a593Smuzhiyun 
89*4882a593Smuzhiyun #define AD8801_CHANNEL(chan) {		\
90*4882a593Smuzhiyun 	.type = IIO_VOLTAGE,			\
91*4882a593Smuzhiyun 	.indexed = 1,				\
92*4882a593Smuzhiyun 	.output = 1,				\
93*4882a593Smuzhiyun 	.channel = chan,			\
94*4882a593Smuzhiyun 	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
95*4882a593Smuzhiyun 	.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) |	\
96*4882a593Smuzhiyun 		BIT(IIO_CHAN_INFO_OFFSET), \
97*4882a593Smuzhiyun }
98*4882a593Smuzhiyun 
99*4882a593Smuzhiyun static const struct iio_chan_spec ad8801_channels[] = {
100*4882a593Smuzhiyun 	AD8801_CHANNEL(0),
101*4882a593Smuzhiyun 	AD8801_CHANNEL(1),
102*4882a593Smuzhiyun 	AD8801_CHANNEL(2),
103*4882a593Smuzhiyun 	AD8801_CHANNEL(3),
104*4882a593Smuzhiyun 	AD8801_CHANNEL(4),
105*4882a593Smuzhiyun 	AD8801_CHANNEL(5),
106*4882a593Smuzhiyun 	AD8801_CHANNEL(6),
107*4882a593Smuzhiyun 	AD8801_CHANNEL(7),
108*4882a593Smuzhiyun };
109*4882a593Smuzhiyun 
ad8801_probe(struct spi_device * spi)110*4882a593Smuzhiyun static int ad8801_probe(struct spi_device *spi)
111*4882a593Smuzhiyun {
112*4882a593Smuzhiyun 	struct iio_dev *indio_dev;
113*4882a593Smuzhiyun 	struct ad8801_state *state;
114*4882a593Smuzhiyun 	const struct spi_device_id *id;
115*4882a593Smuzhiyun 	int ret;
116*4882a593Smuzhiyun 
117*4882a593Smuzhiyun 	indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*state));
118*4882a593Smuzhiyun 	if (indio_dev == NULL)
119*4882a593Smuzhiyun 		return -ENOMEM;
120*4882a593Smuzhiyun 
121*4882a593Smuzhiyun 	state = iio_priv(indio_dev);
122*4882a593Smuzhiyun 	state->spi = spi;
123*4882a593Smuzhiyun 	id = spi_get_device_id(spi);
124*4882a593Smuzhiyun 
125*4882a593Smuzhiyun 	state->vrefh_reg = devm_regulator_get(&spi->dev, "vrefh");
126*4882a593Smuzhiyun 	if (IS_ERR(state->vrefh_reg)) {
127*4882a593Smuzhiyun 		dev_err(&spi->dev, "Vrefh regulator not specified\n");
128*4882a593Smuzhiyun 		return PTR_ERR(state->vrefh_reg);
129*4882a593Smuzhiyun 	}
130*4882a593Smuzhiyun 
131*4882a593Smuzhiyun 	ret = regulator_enable(state->vrefh_reg);
132*4882a593Smuzhiyun 	if (ret) {
133*4882a593Smuzhiyun 		dev_err(&spi->dev, "Failed to enable vrefh regulator: %d\n",
134*4882a593Smuzhiyun 				ret);
135*4882a593Smuzhiyun 		return ret;
136*4882a593Smuzhiyun 	}
137*4882a593Smuzhiyun 
138*4882a593Smuzhiyun 	ret = regulator_get_voltage(state->vrefh_reg);
139*4882a593Smuzhiyun 	if (ret < 0) {
140*4882a593Smuzhiyun 		dev_err(&spi->dev, "Failed to read vrefh regulator: %d\n",
141*4882a593Smuzhiyun 				ret);
142*4882a593Smuzhiyun 		goto error_disable_vrefh_reg;
143*4882a593Smuzhiyun 	}
144*4882a593Smuzhiyun 	state->vrefh_mv = ret / 1000;
145*4882a593Smuzhiyun 
146*4882a593Smuzhiyun 	if (id->driver_data == ID_AD8803) {
147*4882a593Smuzhiyun 		state->vrefl_reg = devm_regulator_get(&spi->dev, "vrefl");
148*4882a593Smuzhiyun 		if (IS_ERR(state->vrefl_reg)) {
149*4882a593Smuzhiyun 			dev_err(&spi->dev, "Vrefl regulator not specified\n");
150*4882a593Smuzhiyun 			ret = PTR_ERR(state->vrefl_reg);
151*4882a593Smuzhiyun 			goto error_disable_vrefh_reg;
152*4882a593Smuzhiyun 		}
153*4882a593Smuzhiyun 
154*4882a593Smuzhiyun 		ret = regulator_enable(state->vrefl_reg);
155*4882a593Smuzhiyun 		if (ret) {
156*4882a593Smuzhiyun 			dev_err(&spi->dev, "Failed to enable vrefl regulator: %d\n",
157*4882a593Smuzhiyun 					ret);
158*4882a593Smuzhiyun 			goto error_disable_vrefh_reg;
159*4882a593Smuzhiyun 		}
160*4882a593Smuzhiyun 
161*4882a593Smuzhiyun 		ret = regulator_get_voltage(state->vrefl_reg);
162*4882a593Smuzhiyun 		if (ret < 0) {
163*4882a593Smuzhiyun 			dev_err(&spi->dev, "Failed to read vrefl regulator: %d\n",
164*4882a593Smuzhiyun 					ret);
165*4882a593Smuzhiyun 			goto error_disable_vrefl_reg;
166*4882a593Smuzhiyun 		}
167*4882a593Smuzhiyun 		state->vrefl_mv = ret / 1000;
168*4882a593Smuzhiyun 	} else {
169*4882a593Smuzhiyun 		state->vrefl_mv = 0;
170*4882a593Smuzhiyun 		state->vrefl_reg = NULL;
171*4882a593Smuzhiyun 	}
172*4882a593Smuzhiyun 
173*4882a593Smuzhiyun 	spi_set_drvdata(spi, indio_dev);
174*4882a593Smuzhiyun 	indio_dev->info = &ad8801_info;
175*4882a593Smuzhiyun 	indio_dev->modes = INDIO_DIRECT_MODE;
176*4882a593Smuzhiyun 	indio_dev->channels = ad8801_channels;
177*4882a593Smuzhiyun 	indio_dev->num_channels = ARRAY_SIZE(ad8801_channels);
178*4882a593Smuzhiyun 	indio_dev->name = id->name;
179*4882a593Smuzhiyun 
180*4882a593Smuzhiyun 	ret = iio_device_register(indio_dev);
181*4882a593Smuzhiyun 	if (ret) {
182*4882a593Smuzhiyun 		dev_err(&spi->dev, "Failed to register iio device: %d\n",
183*4882a593Smuzhiyun 				ret);
184*4882a593Smuzhiyun 		goto error_disable_vrefl_reg;
185*4882a593Smuzhiyun 	}
186*4882a593Smuzhiyun 
187*4882a593Smuzhiyun 	return 0;
188*4882a593Smuzhiyun 
189*4882a593Smuzhiyun error_disable_vrefl_reg:
190*4882a593Smuzhiyun 	if (state->vrefl_reg)
191*4882a593Smuzhiyun 		regulator_disable(state->vrefl_reg);
192*4882a593Smuzhiyun error_disable_vrefh_reg:
193*4882a593Smuzhiyun 	regulator_disable(state->vrefh_reg);
194*4882a593Smuzhiyun 	return ret;
195*4882a593Smuzhiyun }
196*4882a593Smuzhiyun 
ad8801_remove(struct spi_device * spi)197*4882a593Smuzhiyun static int ad8801_remove(struct spi_device *spi)
198*4882a593Smuzhiyun {
199*4882a593Smuzhiyun 	struct iio_dev *indio_dev = spi_get_drvdata(spi);
200*4882a593Smuzhiyun 	struct ad8801_state *state = iio_priv(indio_dev);
201*4882a593Smuzhiyun 
202*4882a593Smuzhiyun 	iio_device_unregister(indio_dev);
203*4882a593Smuzhiyun 	if (state->vrefl_reg)
204*4882a593Smuzhiyun 		regulator_disable(state->vrefl_reg);
205*4882a593Smuzhiyun 	regulator_disable(state->vrefh_reg);
206*4882a593Smuzhiyun 
207*4882a593Smuzhiyun 	return 0;
208*4882a593Smuzhiyun }
209*4882a593Smuzhiyun 
210*4882a593Smuzhiyun static const struct spi_device_id ad8801_ids[] = {
211*4882a593Smuzhiyun 	{"ad8801", ID_AD8801},
212*4882a593Smuzhiyun 	{"ad8803", ID_AD8803},
213*4882a593Smuzhiyun 	{}
214*4882a593Smuzhiyun };
215*4882a593Smuzhiyun MODULE_DEVICE_TABLE(spi, ad8801_ids);
216*4882a593Smuzhiyun 
217*4882a593Smuzhiyun static struct spi_driver ad8801_driver = {
218*4882a593Smuzhiyun 	.driver = {
219*4882a593Smuzhiyun 		.name	= "ad8801",
220*4882a593Smuzhiyun 	},
221*4882a593Smuzhiyun 	.probe		= ad8801_probe,
222*4882a593Smuzhiyun 	.remove		= ad8801_remove,
223*4882a593Smuzhiyun 	.id_table	= ad8801_ids,
224*4882a593Smuzhiyun };
225*4882a593Smuzhiyun module_spi_driver(ad8801_driver);
226*4882a593Smuzhiyun 
227*4882a593Smuzhiyun MODULE_AUTHOR("Gwenhael Goavec-Merou <gwenhael.goavec-merou@trabucayre.com>");
228*4882a593Smuzhiyun MODULE_DESCRIPTION("Analog Devices AD8801/AD8803 DAC");
229*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
230