1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun #ifndef BME680_H_ 3*4882a593Smuzhiyun #define BME680_H_ 4*4882a593Smuzhiyun 5*4882a593Smuzhiyun #define BME680_REG_CHIP_ID 0xD0 6*4882a593Smuzhiyun #define BME680_CHIP_ID_VAL 0x61 7*4882a593Smuzhiyun #define BME680_REG_SOFT_RESET 0xE0 8*4882a593Smuzhiyun #define BME680_CMD_SOFTRESET 0xB6 9*4882a593Smuzhiyun #define BME680_REG_STATUS 0x73 10*4882a593Smuzhiyun #define BME680_SPI_MEM_PAGE_BIT BIT(4) 11*4882a593Smuzhiyun #define BME680_SPI_MEM_PAGE_1_VAL 1 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun #define BME680_REG_TEMP_MSB 0x22 14*4882a593Smuzhiyun #define BME680_REG_PRESS_MSB 0x1F 15*4882a593Smuzhiyun #define BM6880_REG_HUMIDITY_MSB 0x25 16*4882a593Smuzhiyun #define BME680_REG_GAS_MSB 0x2A 17*4882a593Smuzhiyun #define BME680_REG_GAS_R_LSB 0x2B 18*4882a593Smuzhiyun #define BME680_GAS_STAB_BIT BIT(4) 19*4882a593Smuzhiyun #define BME680_GAS_RANGE_MASK GENMASK(3, 0) 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun #define BME680_REG_CTRL_HUMIDITY 0x72 22*4882a593Smuzhiyun #define BME680_OSRS_HUMIDITY_MASK GENMASK(2, 0) 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun #define BME680_REG_CTRL_MEAS 0x74 25*4882a593Smuzhiyun #define BME680_OSRS_TEMP_MASK GENMASK(7, 5) 26*4882a593Smuzhiyun #define BME680_OSRS_PRESS_MASK GENMASK(4, 2) 27*4882a593Smuzhiyun #define BME680_MODE_MASK GENMASK(1, 0) 28*4882a593Smuzhiyun #define BME680_MODE_FORCED 1 29*4882a593Smuzhiyun #define BME680_MODE_SLEEP 0 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun #define BME680_REG_CONFIG 0x75 32*4882a593Smuzhiyun #define BME680_FILTER_MASK GENMASK(4, 2) 33*4882a593Smuzhiyun #define BME680_FILTER_COEFF_VAL BIT(1) 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun /* TEMP/PRESS/HUMID reading skipped */ 36*4882a593Smuzhiyun #define BME680_MEAS_SKIPPED 0x8000 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun #define BME680_MAX_OVERFLOW_VAL 0x40000000 39*4882a593Smuzhiyun #define BME680_HUM_REG_SHIFT_VAL 4 40*4882a593Smuzhiyun #define BME680_BIT_H1_DATA_MASK GENMASK(3, 0) 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun #define BME680_REG_RES_HEAT_RANGE 0x02 43*4882a593Smuzhiyun #define BME680_RHRANGE_MASK GENMASK(5, 4) 44*4882a593Smuzhiyun #define BME680_REG_RES_HEAT_VAL 0x00 45*4882a593Smuzhiyun #define BME680_REG_RANGE_SW_ERR 0x04 46*4882a593Smuzhiyun #define BME680_RSERROR_MASK GENMASK(7, 4) 47*4882a593Smuzhiyun #define BME680_REG_RES_HEAT_0 0x5A 48*4882a593Smuzhiyun #define BME680_REG_GAS_WAIT_0 0x64 49*4882a593Smuzhiyun #define BME680_ADC_GAS_RES_SHIFT 6 50*4882a593Smuzhiyun #define BME680_AMB_TEMP 25 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun #define BME680_REG_CTRL_GAS_1 0x71 53*4882a593Smuzhiyun #define BME680_RUN_GAS_MASK BIT(4) 54*4882a593Smuzhiyun #define BME680_NB_CONV_MASK GENMASK(3, 0) 55*4882a593Smuzhiyun 56*4882a593Smuzhiyun #define BME680_REG_MEAS_STAT_0 0x1D 57*4882a593Smuzhiyun #define BME680_GAS_MEAS_BIT BIT(6) 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun /* Calibration Parameters */ 60*4882a593Smuzhiyun #define BME680_T2_LSB_REG 0x8A 61*4882a593Smuzhiyun #define BME680_T3_REG 0x8C 62*4882a593Smuzhiyun #define BME680_P1_LSB_REG 0x8E 63*4882a593Smuzhiyun #define BME680_P2_LSB_REG 0x90 64*4882a593Smuzhiyun #define BME680_P3_REG 0x92 65*4882a593Smuzhiyun #define BME680_P4_LSB_REG 0x94 66*4882a593Smuzhiyun #define BME680_P5_LSB_REG 0x96 67*4882a593Smuzhiyun #define BME680_P7_REG 0x98 68*4882a593Smuzhiyun #define BME680_P6_REG 0x99 69*4882a593Smuzhiyun #define BME680_P8_LSB_REG 0x9C 70*4882a593Smuzhiyun #define BME680_P9_LSB_REG 0x9E 71*4882a593Smuzhiyun #define BME680_P10_REG 0xA0 72*4882a593Smuzhiyun #define BME680_H2_LSB_REG 0xE2 73*4882a593Smuzhiyun #define BME680_H2_MSB_REG 0xE1 74*4882a593Smuzhiyun #define BME680_H1_MSB_REG 0xE3 75*4882a593Smuzhiyun #define BME680_H1_LSB_REG 0xE2 76*4882a593Smuzhiyun #define BME680_H3_REG 0xE4 77*4882a593Smuzhiyun #define BME680_H4_REG 0xE5 78*4882a593Smuzhiyun #define BME680_H5_REG 0xE6 79*4882a593Smuzhiyun #define BME680_H6_REG 0xE7 80*4882a593Smuzhiyun #define BME680_H7_REG 0xE8 81*4882a593Smuzhiyun #define BME680_T1_LSB_REG 0xE9 82*4882a593Smuzhiyun #define BME680_GH2_LSB_REG 0xEB 83*4882a593Smuzhiyun #define BME680_GH1_REG 0xED 84*4882a593Smuzhiyun #define BME680_GH3_REG 0xEE 85*4882a593Smuzhiyun 86*4882a593Smuzhiyun extern const struct regmap_config bme680_regmap_config; 87*4882a593Smuzhiyun 88*4882a593Smuzhiyun int bme680_core_probe(struct device *dev, struct regmap *regmap, 89*4882a593Smuzhiyun const char *name); 90*4882a593Smuzhiyun 91*4882a593Smuzhiyun #endif /* BME680_H_ */ 92