1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0+
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * atlas-sensor.c - Support for Atlas Scientific OEM SM sensors
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2015-2019 Konsulko Group
6*4882a593Smuzhiyun * Author: Matt Ranostay <matt.ranostay@konsulko.com>
7*4882a593Smuzhiyun */
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun #include <linux/module.h>
10*4882a593Smuzhiyun #include <linux/init.h>
11*4882a593Smuzhiyun #include <linux/interrupt.h>
12*4882a593Smuzhiyun #include <linux/delay.h>
13*4882a593Smuzhiyun #include <linux/mutex.h>
14*4882a593Smuzhiyun #include <linux/err.h>
15*4882a593Smuzhiyun #include <linux/irq.h>
16*4882a593Smuzhiyun #include <linux/irq_work.h>
17*4882a593Smuzhiyun #include <linux/i2c.h>
18*4882a593Smuzhiyun #include <linux/mod_devicetable.h>
19*4882a593Smuzhiyun #include <linux/regmap.h>
20*4882a593Smuzhiyun #include <linux/iio/iio.h>
21*4882a593Smuzhiyun #include <linux/iio/buffer.h>
22*4882a593Smuzhiyun #include <linux/iio/trigger.h>
23*4882a593Smuzhiyun #include <linux/iio/trigger_consumer.h>
24*4882a593Smuzhiyun #include <linux/iio/triggered_buffer.h>
25*4882a593Smuzhiyun #include <linux/pm_runtime.h>
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun #define ATLAS_REGMAP_NAME "atlas_regmap"
28*4882a593Smuzhiyun #define ATLAS_DRV_NAME "atlas"
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun #define ATLAS_REG_DEV_TYPE 0x00
31*4882a593Smuzhiyun #define ATLAS_REG_DEV_VERSION 0x01
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun #define ATLAS_REG_INT_CONTROL 0x04
34*4882a593Smuzhiyun #define ATLAS_REG_INT_CONTROL_EN BIT(3)
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun #define ATLAS_REG_PWR_CONTROL 0x06
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun #define ATLAS_REG_PH_CALIB_STATUS 0x0d
39*4882a593Smuzhiyun #define ATLAS_REG_PH_CALIB_STATUS_MASK 0x07
40*4882a593Smuzhiyun #define ATLAS_REG_PH_CALIB_STATUS_LOW BIT(0)
41*4882a593Smuzhiyun #define ATLAS_REG_PH_CALIB_STATUS_MID BIT(1)
42*4882a593Smuzhiyun #define ATLAS_REG_PH_CALIB_STATUS_HIGH BIT(2)
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun #define ATLAS_REG_EC_CALIB_STATUS 0x0f
45*4882a593Smuzhiyun #define ATLAS_REG_EC_CALIB_STATUS_MASK 0x0f
46*4882a593Smuzhiyun #define ATLAS_REG_EC_CALIB_STATUS_DRY BIT(0)
47*4882a593Smuzhiyun #define ATLAS_REG_EC_CALIB_STATUS_SINGLE BIT(1)
48*4882a593Smuzhiyun #define ATLAS_REG_EC_CALIB_STATUS_LOW BIT(2)
49*4882a593Smuzhiyun #define ATLAS_REG_EC_CALIB_STATUS_HIGH BIT(3)
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun #define ATLAS_REG_DO_CALIB_STATUS 0x09
52*4882a593Smuzhiyun #define ATLAS_REG_DO_CALIB_STATUS_MASK 0x03
53*4882a593Smuzhiyun #define ATLAS_REG_DO_CALIB_STATUS_PRESSURE BIT(0)
54*4882a593Smuzhiyun #define ATLAS_REG_DO_CALIB_STATUS_DO BIT(1)
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun #define ATLAS_REG_RTD_DATA 0x0e
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun #define ATLAS_REG_PH_TEMP_DATA 0x0e
59*4882a593Smuzhiyun #define ATLAS_REG_PH_DATA 0x16
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun #define ATLAS_REG_EC_PROBE 0x08
62*4882a593Smuzhiyun #define ATLAS_REG_EC_TEMP_DATA 0x10
63*4882a593Smuzhiyun #define ATLAS_REG_EC_DATA 0x18
64*4882a593Smuzhiyun #define ATLAS_REG_TDS_DATA 0x1c
65*4882a593Smuzhiyun #define ATLAS_REG_PSS_DATA 0x20
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun #define ATLAS_REG_ORP_CALIB_STATUS 0x0d
68*4882a593Smuzhiyun #define ATLAS_REG_ORP_DATA 0x0e
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun #define ATLAS_REG_DO_TEMP_DATA 0x12
71*4882a593Smuzhiyun #define ATLAS_REG_DO_DATA 0x22
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun #define ATLAS_PH_INT_TIME_IN_MS 450
74*4882a593Smuzhiyun #define ATLAS_EC_INT_TIME_IN_MS 650
75*4882a593Smuzhiyun #define ATLAS_ORP_INT_TIME_IN_MS 450
76*4882a593Smuzhiyun #define ATLAS_DO_INT_TIME_IN_MS 450
77*4882a593Smuzhiyun #define ATLAS_RTD_INT_TIME_IN_MS 450
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun enum {
80*4882a593Smuzhiyun ATLAS_PH_SM,
81*4882a593Smuzhiyun ATLAS_EC_SM,
82*4882a593Smuzhiyun ATLAS_ORP_SM,
83*4882a593Smuzhiyun ATLAS_DO_SM,
84*4882a593Smuzhiyun ATLAS_RTD_SM,
85*4882a593Smuzhiyun };
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun struct atlas_data {
88*4882a593Smuzhiyun struct i2c_client *client;
89*4882a593Smuzhiyun struct iio_trigger *trig;
90*4882a593Smuzhiyun struct atlas_device *chip;
91*4882a593Smuzhiyun struct regmap *regmap;
92*4882a593Smuzhiyun struct irq_work work;
93*4882a593Smuzhiyun unsigned int interrupt_enabled;
94*4882a593Smuzhiyun /* 96-bit data + 32-bit pad + 64-bit timestamp */
95*4882a593Smuzhiyun __be32 buffer[6] __aligned(8);
96*4882a593Smuzhiyun };
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun static const struct regmap_config atlas_regmap_config = {
99*4882a593Smuzhiyun .name = ATLAS_REGMAP_NAME,
100*4882a593Smuzhiyun .reg_bits = 8,
101*4882a593Smuzhiyun .val_bits = 8,
102*4882a593Smuzhiyun };
103*4882a593Smuzhiyun
atlas_buffer_num_channels(const struct iio_chan_spec * spec)104*4882a593Smuzhiyun static int atlas_buffer_num_channels(const struct iio_chan_spec *spec)
105*4882a593Smuzhiyun {
106*4882a593Smuzhiyun int idx = 0;
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun for (; spec->type != IIO_TIMESTAMP; spec++)
109*4882a593Smuzhiyun idx++;
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun return idx;
112*4882a593Smuzhiyun };
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun static const struct iio_chan_spec atlas_ph_channels[] = {
115*4882a593Smuzhiyun {
116*4882a593Smuzhiyun .type = IIO_PH,
117*4882a593Smuzhiyun .address = ATLAS_REG_PH_DATA,
118*4882a593Smuzhiyun .info_mask_separate =
119*4882a593Smuzhiyun BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
120*4882a593Smuzhiyun .scan_index = 0,
121*4882a593Smuzhiyun .scan_type = {
122*4882a593Smuzhiyun .sign = 'u',
123*4882a593Smuzhiyun .realbits = 32,
124*4882a593Smuzhiyun .storagebits = 32,
125*4882a593Smuzhiyun .endianness = IIO_BE,
126*4882a593Smuzhiyun },
127*4882a593Smuzhiyun },
128*4882a593Smuzhiyun IIO_CHAN_SOFT_TIMESTAMP(1),
129*4882a593Smuzhiyun {
130*4882a593Smuzhiyun .type = IIO_TEMP,
131*4882a593Smuzhiyun .address = ATLAS_REG_PH_TEMP_DATA,
132*4882a593Smuzhiyun .info_mask_separate =
133*4882a593Smuzhiyun BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
134*4882a593Smuzhiyun .output = 1,
135*4882a593Smuzhiyun .scan_index = -1
136*4882a593Smuzhiyun },
137*4882a593Smuzhiyun };
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun #define ATLAS_CONCENTRATION_CHANNEL(_idx, _addr) \
140*4882a593Smuzhiyun {\
141*4882a593Smuzhiyun .type = IIO_CONCENTRATION, \
142*4882a593Smuzhiyun .indexed = 1, \
143*4882a593Smuzhiyun .channel = _idx, \
144*4882a593Smuzhiyun .address = _addr, \
145*4882a593Smuzhiyun .info_mask_separate = \
146*4882a593Smuzhiyun BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE), \
147*4882a593Smuzhiyun .scan_index = _idx + 1, \
148*4882a593Smuzhiyun .scan_type = { \
149*4882a593Smuzhiyun .sign = 'u', \
150*4882a593Smuzhiyun .realbits = 32, \
151*4882a593Smuzhiyun .storagebits = 32, \
152*4882a593Smuzhiyun .endianness = IIO_BE, \
153*4882a593Smuzhiyun }, \
154*4882a593Smuzhiyun }
155*4882a593Smuzhiyun
156*4882a593Smuzhiyun static const struct iio_chan_spec atlas_ec_channels[] = {
157*4882a593Smuzhiyun {
158*4882a593Smuzhiyun .type = IIO_ELECTRICALCONDUCTIVITY,
159*4882a593Smuzhiyun .address = ATLAS_REG_EC_DATA,
160*4882a593Smuzhiyun .info_mask_separate =
161*4882a593Smuzhiyun BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
162*4882a593Smuzhiyun .scan_index = 0,
163*4882a593Smuzhiyun .scan_type = {
164*4882a593Smuzhiyun .sign = 'u',
165*4882a593Smuzhiyun .realbits = 32,
166*4882a593Smuzhiyun .storagebits = 32,
167*4882a593Smuzhiyun .endianness = IIO_BE,
168*4882a593Smuzhiyun },
169*4882a593Smuzhiyun },
170*4882a593Smuzhiyun ATLAS_CONCENTRATION_CHANNEL(0, ATLAS_REG_TDS_DATA),
171*4882a593Smuzhiyun ATLAS_CONCENTRATION_CHANNEL(1, ATLAS_REG_PSS_DATA),
172*4882a593Smuzhiyun IIO_CHAN_SOFT_TIMESTAMP(3),
173*4882a593Smuzhiyun {
174*4882a593Smuzhiyun .type = IIO_TEMP,
175*4882a593Smuzhiyun .address = ATLAS_REG_EC_TEMP_DATA,
176*4882a593Smuzhiyun .info_mask_separate =
177*4882a593Smuzhiyun BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
178*4882a593Smuzhiyun .output = 1,
179*4882a593Smuzhiyun .scan_index = -1
180*4882a593Smuzhiyun },
181*4882a593Smuzhiyun };
182*4882a593Smuzhiyun
183*4882a593Smuzhiyun static const struct iio_chan_spec atlas_orp_channels[] = {
184*4882a593Smuzhiyun {
185*4882a593Smuzhiyun .type = IIO_VOLTAGE,
186*4882a593Smuzhiyun .address = ATLAS_REG_ORP_DATA,
187*4882a593Smuzhiyun .info_mask_separate =
188*4882a593Smuzhiyun BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
189*4882a593Smuzhiyun .scan_index = 0,
190*4882a593Smuzhiyun .scan_type = {
191*4882a593Smuzhiyun .sign = 's',
192*4882a593Smuzhiyun .realbits = 32,
193*4882a593Smuzhiyun .storagebits = 32,
194*4882a593Smuzhiyun .endianness = IIO_BE,
195*4882a593Smuzhiyun },
196*4882a593Smuzhiyun },
197*4882a593Smuzhiyun IIO_CHAN_SOFT_TIMESTAMP(1),
198*4882a593Smuzhiyun };
199*4882a593Smuzhiyun
200*4882a593Smuzhiyun static const struct iio_chan_spec atlas_do_channels[] = {
201*4882a593Smuzhiyun {
202*4882a593Smuzhiyun .type = IIO_CONCENTRATION,
203*4882a593Smuzhiyun .address = ATLAS_REG_DO_DATA,
204*4882a593Smuzhiyun .info_mask_separate =
205*4882a593Smuzhiyun BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
206*4882a593Smuzhiyun .scan_index = 0,
207*4882a593Smuzhiyun .scan_type = {
208*4882a593Smuzhiyun .sign = 'u',
209*4882a593Smuzhiyun .realbits = 32,
210*4882a593Smuzhiyun .storagebits = 32,
211*4882a593Smuzhiyun .endianness = IIO_BE,
212*4882a593Smuzhiyun },
213*4882a593Smuzhiyun },
214*4882a593Smuzhiyun IIO_CHAN_SOFT_TIMESTAMP(1),
215*4882a593Smuzhiyun {
216*4882a593Smuzhiyun .type = IIO_TEMP,
217*4882a593Smuzhiyun .address = ATLAS_REG_DO_TEMP_DATA,
218*4882a593Smuzhiyun .info_mask_separate =
219*4882a593Smuzhiyun BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
220*4882a593Smuzhiyun .output = 1,
221*4882a593Smuzhiyun .scan_index = -1
222*4882a593Smuzhiyun },
223*4882a593Smuzhiyun };
224*4882a593Smuzhiyun
225*4882a593Smuzhiyun static const struct iio_chan_spec atlas_rtd_channels[] = {
226*4882a593Smuzhiyun {
227*4882a593Smuzhiyun .type = IIO_TEMP,
228*4882a593Smuzhiyun .address = ATLAS_REG_RTD_DATA,
229*4882a593Smuzhiyun .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED),
230*4882a593Smuzhiyun .scan_index = 0,
231*4882a593Smuzhiyun .scan_type = {
232*4882a593Smuzhiyun .sign = 's',
233*4882a593Smuzhiyun .realbits = 32,
234*4882a593Smuzhiyun .storagebits = 32,
235*4882a593Smuzhiyun .endianness = IIO_BE,
236*4882a593Smuzhiyun },
237*4882a593Smuzhiyun },
238*4882a593Smuzhiyun IIO_CHAN_SOFT_TIMESTAMP(1),
239*4882a593Smuzhiyun };
240*4882a593Smuzhiyun
atlas_check_ph_calibration(struct atlas_data * data)241*4882a593Smuzhiyun static int atlas_check_ph_calibration(struct atlas_data *data)
242*4882a593Smuzhiyun {
243*4882a593Smuzhiyun struct device *dev = &data->client->dev;
244*4882a593Smuzhiyun int ret;
245*4882a593Smuzhiyun unsigned int val;
246*4882a593Smuzhiyun
247*4882a593Smuzhiyun ret = regmap_read(data->regmap, ATLAS_REG_PH_CALIB_STATUS, &val);
248*4882a593Smuzhiyun if (ret)
249*4882a593Smuzhiyun return ret;
250*4882a593Smuzhiyun
251*4882a593Smuzhiyun if (!(val & ATLAS_REG_PH_CALIB_STATUS_MASK)) {
252*4882a593Smuzhiyun dev_warn(dev, "device has not been calibrated\n");
253*4882a593Smuzhiyun return 0;
254*4882a593Smuzhiyun }
255*4882a593Smuzhiyun
256*4882a593Smuzhiyun if (!(val & ATLAS_REG_PH_CALIB_STATUS_LOW))
257*4882a593Smuzhiyun dev_warn(dev, "device missing low point calibration\n");
258*4882a593Smuzhiyun
259*4882a593Smuzhiyun if (!(val & ATLAS_REG_PH_CALIB_STATUS_MID))
260*4882a593Smuzhiyun dev_warn(dev, "device missing mid point calibration\n");
261*4882a593Smuzhiyun
262*4882a593Smuzhiyun if (!(val & ATLAS_REG_PH_CALIB_STATUS_HIGH))
263*4882a593Smuzhiyun dev_warn(dev, "device missing high point calibration\n");
264*4882a593Smuzhiyun
265*4882a593Smuzhiyun return 0;
266*4882a593Smuzhiyun }
267*4882a593Smuzhiyun
atlas_check_ec_calibration(struct atlas_data * data)268*4882a593Smuzhiyun static int atlas_check_ec_calibration(struct atlas_data *data)
269*4882a593Smuzhiyun {
270*4882a593Smuzhiyun struct device *dev = &data->client->dev;
271*4882a593Smuzhiyun int ret;
272*4882a593Smuzhiyun unsigned int val;
273*4882a593Smuzhiyun __be16 rval;
274*4882a593Smuzhiyun
275*4882a593Smuzhiyun ret = regmap_bulk_read(data->regmap, ATLAS_REG_EC_PROBE, &rval, 2);
276*4882a593Smuzhiyun if (ret)
277*4882a593Smuzhiyun return ret;
278*4882a593Smuzhiyun
279*4882a593Smuzhiyun val = be16_to_cpu(rval);
280*4882a593Smuzhiyun dev_info(dev, "probe set to K = %d.%.2d", val / 100, val % 100);
281*4882a593Smuzhiyun
282*4882a593Smuzhiyun ret = regmap_read(data->regmap, ATLAS_REG_EC_CALIB_STATUS, &val);
283*4882a593Smuzhiyun if (ret)
284*4882a593Smuzhiyun return ret;
285*4882a593Smuzhiyun
286*4882a593Smuzhiyun if (!(val & ATLAS_REG_EC_CALIB_STATUS_MASK)) {
287*4882a593Smuzhiyun dev_warn(dev, "device has not been calibrated\n");
288*4882a593Smuzhiyun return 0;
289*4882a593Smuzhiyun }
290*4882a593Smuzhiyun
291*4882a593Smuzhiyun if (!(val & ATLAS_REG_EC_CALIB_STATUS_DRY))
292*4882a593Smuzhiyun dev_warn(dev, "device missing dry point calibration\n");
293*4882a593Smuzhiyun
294*4882a593Smuzhiyun if (val & ATLAS_REG_EC_CALIB_STATUS_SINGLE) {
295*4882a593Smuzhiyun dev_warn(dev, "device using single point calibration\n");
296*4882a593Smuzhiyun } else {
297*4882a593Smuzhiyun if (!(val & ATLAS_REG_EC_CALIB_STATUS_LOW))
298*4882a593Smuzhiyun dev_warn(dev, "device missing low point calibration\n");
299*4882a593Smuzhiyun
300*4882a593Smuzhiyun if (!(val & ATLAS_REG_EC_CALIB_STATUS_HIGH))
301*4882a593Smuzhiyun dev_warn(dev, "device missing high point calibration\n");
302*4882a593Smuzhiyun }
303*4882a593Smuzhiyun
304*4882a593Smuzhiyun return 0;
305*4882a593Smuzhiyun }
306*4882a593Smuzhiyun
atlas_check_orp_calibration(struct atlas_data * data)307*4882a593Smuzhiyun static int atlas_check_orp_calibration(struct atlas_data *data)
308*4882a593Smuzhiyun {
309*4882a593Smuzhiyun struct device *dev = &data->client->dev;
310*4882a593Smuzhiyun int ret;
311*4882a593Smuzhiyun unsigned int val;
312*4882a593Smuzhiyun
313*4882a593Smuzhiyun ret = regmap_read(data->regmap, ATLAS_REG_ORP_CALIB_STATUS, &val);
314*4882a593Smuzhiyun if (ret)
315*4882a593Smuzhiyun return ret;
316*4882a593Smuzhiyun
317*4882a593Smuzhiyun if (!val)
318*4882a593Smuzhiyun dev_warn(dev, "device has not been calibrated\n");
319*4882a593Smuzhiyun
320*4882a593Smuzhiyun return 0;
321*4882a593Smuzhiyun }
322*4882a593Smuzhiyun
atlas_check_do_calibration(struct atlas_data * data)323*4882a593Smuzhiyun static int atlas_check_do_calibration(struct atlas_data *data)
324*4882a593Smuzhiyun {
325*4882a593Smuzhiyun struct device *dev = &data->client->dev;
326*4882a593Smuzhiyun int ret;
327*4882a593Smuzhiyun unsigned int val;
328*4882a593Smuzhiyun
329*4882a593Smuzhiyun ret = regmap_read(data->regmap, ATLAS_REG_DO_CALIB_STATUS, &val);
330*4882a593Smuzhiyun if (ret)
331*4882a593Smuzhiyun return ret;
332*4882a593Smuzhiyun
333*4882a593Smuzhiyun if (!(val & ATLAS_REG_DO_CALIB_STATUS_MASK)) {
334*4882a593Smuzhiyun dev_warn(dev, "device has not been calibrated\n");
335*4882a593Smuzhiyun return 0;
336*4882a593Smuzhiyun }
337*4882a593Smuzhiyun
338*4882a593Smuzhiyun if (!(val & ATLAS_REG_DO_CALIB_STATUS_PRESSURE))
339*4882a593Smuzhiyun dev_warn(dev, "device missing atmospheric pressure calibration\n");
340*4882a593Smuzhiyun
341*4882a593Smuzhiyun if (!(val & ATLAS_REG_DO_CALIB_STATUS_DO))
342*4882a593Smuzhiyun dev_warn(dev, "device missing dissolved oxygen calibration\n");
343*4882a593Smuzhiyun
344*4882a593Smuzhiyun return 0;
345*4882a593Smuzhiyun }
346*4882a593Smuzhiyun
347*4882a593Smuzhiyun struct atlas_device {
348*4882a593Smuzhiyun const struct iio_chan_spec *channels;
349*4882a593Smuzhiyun int num_channels;
350*4882a593Smuzhiyun int data_reg;
351*4882a593Smuzhiyun
352*4882a593Smuzhiyun int (*calibration)(struct atlas_data *data);
353*4882a593Smuzhiyun int delay;
354*4882a593Smuzhiyun };
355*4882a593Smuzhiyun
356*4882a593Smuzhiyun static struct atlas_device atlas_devices[] = {
357*4882a593Smuzhiyun [ATLAS_PH_SM] = {
358*4882a593Smuzhiyun .channels = atlas_ph_channels,
359*4882a593Smuzhiyun .num_channels = 3,
360*4882a593Smuzhiyun .data_reg = ATLAS_REG_PH_DATA,
361*4882a593Smuzhiyun .calibration = &atlas_check_ph_calibration,
362*4882a593Smuzhiyun .delay = ATLAS_PH_INT_TIME_IN_MS,
363*4882a593Smuzhiyun },
364*4882a593Smuzhiyun [ATLAS_EC_SM] = {
365*4882a593Smuzhiyun .channels = atlas_ec_channels,
366*4882a593Smuzhiyun .num_channels = 5,
367*4882a593Smuzhiyun .data_reg = ATLAS_REG_EC_DATA,
368*4882a593Smuzhiyun .calibration = &atlas_check_ec_calibration,
369*4882a593Smuzhiyun .delay = ATLAS_EC_INT_TIME_IN_MS,
370*4882a593Smuzhiyun },
371*4882a593Smuzhiyun [ATLAS_ORP_SM] = {
372*4882a593Smuzhiyun .channels = atlas_orp_channels,
373*4882a593Smuzhiyun .num_channels = 2,
374*4882a593Smuzhiyun .data_reg = ATLAS_REG_ORP_DATA,
375*4882a593Smuzhiyun .calibration = &atlas_check_orp_calibration,
376*4882a593Smuzhiyun .delay = ATLAS_ORP_INT_TIME_IN_MS,
377*4882a593Smuzhiyun },
378*4882a593Smuzhiyun [ATLAS_DO_SM] = {
379*4882a593Smuzhiyun .channels = atlas_do_channels,
380*4882a593Smuzhiyun .num_channels = 3,
381*4882a593Smuzhiyun .data_reg = ATLAS_REG_DO_DATA,
382*4882a593Smuzhiyun .calibration = &atlas_check_do_calibration,
383*4882a593Smuzhiyun .delay = ATLAS_DO_INT_TIME_IN_MS,
384*4882a593Smuzhiyun },
385*4882a593Smuzhiyun [ATLAS_RTD_SM] = {
386*4882a593Smuzhiyun .channels = atlas_rtd_channels,
387*4882a593Smuzhiyun .num_channels = 2,
388*4882a593Smuzhiyun .data_reg = ATLAS_REG_RTD_DATA,
389*4882a593Smuzhiyun .delay = ATLAS_RTD_INT_TIME_IN_MS,
390*4882a593Smuzhiyun },
391*4882a593Smuzhiyun };
392*4882a593Smuzhiyun
atlas_set_powermode(struct atlas_data * data,int on)393*4882a593Smuzhiyun static int atlas_set_powermode(struct atlas_data *data, int on)
394*4882a593Smuzhiyun {
395*4882a593Smuzhiyun return regmap_write(data->regmap, ATLAS_REG_PWR_CONTROL, on);
396*4882a593Smuzhiyun }
397*4882a593Smuzhiyun
atlas_set_interrupt(struct atlas_data * data,bool state)398*4882a593Smuzhiyun static int atlas_set_interrupt(struct atlas_data *data, bool state)
399*4882a593Smuzhiyun {
400*4882a593Smuzhiyun if (!data->interrupt_enabled)
401*4882a593Smuzhiyun return 0;
402*4882a593Smuzhiyun
403*4882a593Smuzhiyun return regmap_update_bits(data->regmap, ATLAS_REG_INT_CONTROL,
404*4882a593Smuzhiyun ATLAS_REG_INT_CONTROL_EN,
405*4882a593Smuzhiyun state ? ATLAS_REG_INT_CONTROL_EN : 0);
406*4882a593Smuzhiyun }
407*4882a593Smuzhiyun
atlas_buffer_postenable(struct iio_dev * indio_dev)408*4882a593Smuzhiyun static int atlas_buffer_postenable(struct iio_dev *indio_dev)
409*4882a593Smuzhiyun {
410*4882a593Smuzhiyun struct atlas_data *data = iio_priv(indio_dev);
411*4882a593Smuzhiyun int ret;
412*4882a593Smuzhiyun
413*4882a593Smuzhiyun ret = pm_runtime_get_sync(&data->client->dev);
414*4882a593Smuzhiyun if (ret < 0) {
415*4882a593Smuzhiyun pm_runtime_put_noidle(&data->client->dev);
416*4882a593Smuzhiyun return ret;
417*4882a593Smuzhiyun }
418*4882a593Smuzhiyun
419*4882a593Smuzhiyun return atlas_set_interrupt(data, true);
420*4882a593Smuzhiyun }
421*4882a593Smuzhiyun
atlas_buffer_predisable(struct iio_dev * indio_dev)422*4882a593Smuzhiyun static int atlas_buffer_predisable(struct iio_dev *indio_dev)
423*4882a593Smuzhiyun {
424*4882a593Smuzhiyun struct atlas_data *data = iio_priv(indio_dev);
425*4882a593Smuzhiyun int ret;
426*4882a593Smuzhiyun
427*4882a593Smuzhiyun ret = atlas_set_interrupt(data, false);
428*4882a593Smuzhiyun if (ret)
429*4882a593Smuzhiyun return ret;
430*4882a593Smuzhiyun
431*4882a593Smuzhiyun pm_runtime_mark_last_busy(&data->client->dev);
432*4882a593Smuzhiyun ret = pm_runtime_put_autosuspend(&data->client->dev);
433*4882a593Smuzhiyun if (ret)
434*4882a593Smuzhiyun return ret;
435*4882a593Smuzhiyun
436*4882a593Smuzhiyun return 0;
437*4882a593Smuzhiyun }
438*4882a593Smuzhiyun
439*4882a593Smuzhiyun static const struct iio_trigger_ops atlas_interrupt_trigger_ops = {
440*4882a593Smuzhiyun };
441*4882a593Smuzhiyun
442*4882a593Smuzhiyun static const struct iio_buffer_setup_ops atlas_buffer_setup_ops = {
443*4882a593Smuzhiyun .postenable = atlas_buffer_postenable,
444*4882a593Smuzhiyun .predisable = atlas_buffer_predisable,
445*4882a593Smuzhiyun };
446*4882a593Smuzhiyun
atlas_work_handler(struct irq_work * work)447*4882a593Smuzhiyun static void atlas_work_handler(struct irq_work *work)
448*4882a593Smuzhiyun {
449*4882a593Smuzhiyun struct atlas_data *data = container_of(work, struct atlas_data, work);
450*4882a593Smuzhiyun
451*4882a593Smuzhiyun iio_trigger_poll(data->trig);
452*4882a593Smuzhiyun }
453*4882a593Smuzhiyun
atlas_trigger_handler(int irq,void * private)454*4882a593Smuzhiyun static irqreturn_t atlas_trigger_handler(int irq, void *private)
455*4882a593Smuzhiyun {
456*4882a593Smuzhiyun struct iio_poll_func *pf = private;
457*4882a593Smuzhiyun struct iio_dev *indio_dev = pf->indio_dev;
458*4882a593Smuzhiyun struct atlas_data *data = iio_priv(indio_dev);
459*4882a593Smuzhiyun int channels = atlas_buffer_num_channels(data->chip->channels);
460*4882a593Smuzhiyun int ret;
461*4882a593Smuzhiyun
462*4882a593Smuzhiyun ret = regmap_bulk_read(data->regmap, data->chip->data_reg,
463*4882a593Smuzhiyun &data->buffer, sizeof(__be32) * channels);
464*4882a593Smuzhiyun
465*4882a593Smuzhiyun if (!ret)
466*4882a593Smuzhiyun iio_push_to_buffers_with_timestamp(indio_dev, data->buffer,
467*4882a593Smuzhiyun iio_get_time_ns(indio_dev));
468*4882a593Smuzhiyun
469*4882a593Smuzhiyun iio_trigger_notify_done(indio_dev->trig);
470*4882a593Smuzhiyun
471*4882a593Smuzhiyun return IRQ_HANDLED;
472*4882a593Smuzhiyun }
473*4882a593Smuzhiyun
atlas_interrupt_handler(int irq,void * private)474*4882a593Smuzhiyun static irqreturn_t atlas_interrupt_handler(int irq, void *private)
475*4882a593Smuzhiyun {
476*4882a593Smuzhiyun struct iio_dev *indio_dev = private;
477*4882a593Smuzhiyun struct atlas_data *data = iio_priv(indio_dev);
478*4882a593Smuzhiyun
479*4882a593Smuzhiyun irq_work_queue(&data->work);
480*4882a593Smuzhiyun
481*4882a593Smuzhiyun return IRQ_HANDLED;
482*4882a593Smuzhiyun }
483*4882a593Smuzhiyun
atlas_read_measurement(struct atlas_data * data,int reg,__be32 * val)484*4882a593Smuzhiyun static int atlas_read_measurement(struct atlas_data *data, int reg, __be32 *val)
485*4882a593Smuzhiyun {
486*4882a593Smuzhiyun struct device *dev = &data->client->dev;
487*4882a593Smuzhiyun int suspended = pm_runtime_suspended(dev);
488*4882a593Smuzhiyun int ret;
489*4882a593Smuzhiyun
490*4882a593Smuzhiyun ret = pm_runtime_get_sync(dev);
491*4882a593Smuzhiyun if (ret < 0) {
492*4882a593Smuzhiyun pm_runtime_put_noidle(dev);
493*4882a593Smuzhiyun return ret;
494*4882a593Smuzhiyun }
495*4882a593Smuzhiyun
496*4882a593Smuzhiyun if (suspended)
497*4882a593Smuzhiyun msleep(data->chip->delay);
498*4882a593Smuzhiyun
499*4882a593Smuzhiyun ret = regmap_bulk_read(data->regmap, reg, val, sizeof(*val));
500*4882a593Smuzhiyun
501*4882a593Smuzhiyun pm_runtime_mark_last_busy(dev);
502*4882a593Smuzhiyun pm_runtime_put_autosuspend(dev);
503*4882a593Smuzhiyun
504*4882a593Smuzhiyun return ret;
505*4882a593Smuzhiyun }
506*4882a593Smuzhiyun
atlas_read_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int * val,int * val2,long mask)507*4882a593Smuzhiyun static int atlas_read_raw(struct iio_dev *indio_dev,
508*4882a593Smuzhiyun struct iio_chan_spec const *chan,
509*4882a593Smuzhiyun int *val, int *val2, long mask)
510*4882a593Smuzhiyun {
511*4882a593Smuzhiyun struct atlas_data *data = iio_priv(indio_dev);
512*4882a593Smuzhiyun
513*4882a593Smuzhiyun switch (mask) {
514*4882a593Smuzhiyun case IIO_CHAN_INFO_PROCESSED:
515*4882a593Smuzhiyun case IIO_CHAN_INFO_RAW: {
516*4882a593Smuzhiyun int ret;
517*4882a593Smuzhiyun __be32 reg;
518*4882a593Smuzhiyun
519*4882a593Smuzhiyun switch (chan->type) {
520*4882a593Smuzhiyun case IIO_TEMP:
521*4882a593Smuzhiyun ret = regmap_bulk_read(data->regmap, chan->address,
522*4882a593Smuzhiyun ®, sizeof(reg));
523*4882a593Smuzhiyun break;
524*4882a593Smuzhiyun case IIO_PH:
525*4882a593Smuzhiyun case IIO_CONCENTRATION:
526*4882a593Smuzhiyun case IIO_ELECTRICALCONDUCTIVITY:
527*4882a593Smuzhiyun case IIO_VOLTAGE:
528*4882a593Smuzhiyun ret = iio_device_claim_direct_mode(indio_dev);
529*4882a593Smuzhiyun if (ret)
530*4882a593Smuzhiyun return ret;
531*4882a593Smuzhiyun
532*4882a593Smuzhiyun ret = atlas_read_measurement(data, chan->address, ®);
533*4882a593Smuzhiyun
534*4882a593Smuzhiyun iio_device_release_direct_mode(indio_dev);
535*4882a593Smuzhiyun break;
536*4882a593Smuzhiyun default:
537*4882a593Smuzhiyun ret = -EINVAL;
538*4882a593Smuzhiyun }
539*4882a593Smuzhiyun
540*4882a593Smuzhiyun if (!ret) {
541*4882a593Smuzhiyun *val = be32_to_cpu(reg);
542*4882a593Smuzhiyun ret = IIO_VAL_INT;
543*4882a593Smuzhiyun }
544*4882a593Smuzhiyun return ret;
545*4882a593Smuzhiyun }
546*4882a593Smuzhiyun case IIO_CHAN_INFO_SCALE:
547*4882a593Smuzhiyun switch (chan->type) {
548*4882a593Smuzhiyun case IIO_TEMP:
549*4882a593Smuzhiyun *val = 10;
550*4882a593Smuzhiyun return IIO_VAL_INT;
551*4882a593Smuzhiyun case IIO_PH:
552*4882a593Smuzhiyun *val = 1; /* 0.001 */
553*4882a593Smuzhiyun *val2 = 1000;
554*4882a593Smuzhiyun break;
555*4882a593Smuzhiyun case IIO_ELECTRICALCONDUCTIVITY:
556*4882a593Smuzhiyun *val = 1; /* 0.00001 */
557*4882a593Smuzhiyun *val2 = 100000;
558*4882a593Smuzhiyun break;
559*4882a593Smuzhiyun case IIO_CONCENTRATION:
560*4882a593Smuzhiyun *val = 0; /* 0.000000001 */
561*4882a593Smuzhiyun *val2 = 1000;
562*4882a593Smuzhiyun return IIO_VAL_INT_PLUS_NANO;
563*4882a593Smuzhiyun case IIO_VOLTAGE:
564*4882a593Smuzhiyun *val = 1; /* 0.1 */
565*4882a593Smuzhiyun *val2 = 10;
566*4882a593Smuzhiyun break;
567*4882a593Smuzhiyun default:
568*4882a593Smuzhiyun return -EINVAL;
569*4882a593Smuzhiyun }
570*4882a593Smuzhiyun return IIO_VAL_FRACTIONAL;
571*4882a593Smuzhiyun }
572*4882a593Smuzhiyun
573*4882a593Smuzhiyun return -EINVAL;
574*4882a593Smuzhiyun }
575*4882a593Smuzhiyun
atlas_write_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int val,int val2,long mask)576*4882a593Smuzhiyun static int atlas_write_raw(struct iio_dev *indio_dev,
577*4882a593Smuzhiyun struct iio_chan_spec const *chan,
578*4882a593Smuzhiyun int val, int val2, long mask)
579*4882a593Smuzhiyun {
580*4882a593Smuzhiyun struct atlas_data *data = iio_priv(indio_dev);
581*4882a593Smuzhiyun __be32 reg = cpu_to_be32(val / 10);
582*4882a593Smuzhiyun
583*4882a593Smuzhiyun if (val2 != 0 || val < 0 || val > 20000)
584*4882a593Smuzhiyun return -EINVAL;
585*4882a593Smuzhiyun
586*4882a593Smuzhiyun if (mask != IIO_CHAN_INFO_RAW || chan->type != IIO_TEMP)
587*4882a593Smuzhiyun return -EINVAL;
588*4882a593Smuzhiyun
589*4882a593Smuzhiyun return regmap_bulk_write(data->regmap, chan->address,
590*4882a593Smuzhiyun ®, sizeof(reg));
591*4882a593Smuzhiyun }
592*4882a593Smuzhiyun
593*4882a593Smuzhiyun static const struct iio_info atlas_info = {
594*4882a593Smuzhiyun .read_raw = atlas_read_raw,
595*4882a593Smuzhiyun .write_raw = atlas_write_raw,
596*4882a593Smuzhiyun };
597*4882a593Smuzhiyun
598*4882a593Smuzhiyun static const struct i2c_device_id atlas_id[] = {
599*4882a593Smuzhiyun { "atlas-ph-sm", ATLAS_PH_SM},
600*4882a593Smuzhiyun { "atlas-ec-sm", ATLAS_EC_SM},
601*4882a593Smuzhiyun { "atlas-orp-sm", ATLAS_ORP_SM},
602*4882a593Smuzhiyun { "atlas-do-sm", ATLAS_DO_SM},
603*4882a593Smuzhiyun { "atlas-rtd-sm", ATLAS_RTD_SM},
604*4882a593Smuzhiyun {}
605*4882a593Smuzhiyun };
606*4882a593Smuzhiyun MODULE_DEVICE_TABLE(i2c, atlas_id);
607*4882a593Smuzhiyun
608*4882a593Smuzhiyun static const struct of_device_id atlas_dt_ids[] = {
609*4882a593Smuzhiyun { .compatible = "atlas,ph-sm", .data = (void *)ATLAS_PH_SM, },
610*4882a593Smuzhiyun { .compatible = "atlas,ec-sm", .data = (void *)ATLAS_EC_SM, },
611*4882a593Smuzhiyun { .compatible = "atlas,orp-sm", .data = (void *)ATLAS_ORP_SM, },
612*4882a593Smuzhiyun { .compatible = "atlas,do-sm", .data = (void *)ATLAS_DO_SM, },
613*4882a593Smuzhiyun { .compatible = "atlas,rtd-sm", .data = (void *)ATLAS_RTD_SM, },
614*4882a593Smuzhiyun { }
615*4882a593Smuzhiyun };
616*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, atlas_dt_ids);
617*4882a593Smuzhiyun
atlas_probe(struct i2c_client * client,const struct i2c_device_id * id)618*4882a593Smuzhiyun static int atlas_probe(struct i2c_client *client,
619*4882a593Smuzhiyun const struct i2c_device_id *id)
620*4882a593Smuzhiyun {
621*4882a593Smuzhiyun struct atlas_data *data;
622*4882a593Smuzhiyun struct atlas_device *chip;
623*4882a593Smuzhiyun struct iio_trigger *trig;
624*4882a593Smuzhiyun struct iio_dev *indio_dev;
625*4882a593Smuzhiyun int ret;
626*4882a593Smuzhiyun
627*4882a593Smuzhiyun indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
628*4882a593Smuzhiyun if (!indio_dev)
629*4882a593Smuzhiyun return -ENOMEM;
630*4882a593Smuzhiyun
631*4882a593Smuzhiyun if (!dev_fwnode(&client->dev))
632*4882a593Smuzhiyun chip = &atlas_devices[id->driver_data];
633*4882a593Smuzhiyun else
634*4882a593Smuzhiyun chip = &atlas_devices[(unsigned long)device_get_match_data(&client->dev)];
635*4882a593Smuzhiyun
636*4882a593Smuzhiyun indio_dev->info = &atlas_info;
637*4882a593Smuzhiyun indio_dev->name = ATLAS_DRV_NAME;
638*4882a593Smuzhiyun indio_dev->channels = chip->channels;
639*4882a593Smuzhiyun indio_dev->num_channels = chip->num_channels;
640*4882a593Smuzhiyun indio_dev->modes = INDIO_BUFFER_SOFTWARE | INDIO_DIRECT_MODE;
641*4882a593Smuzhiyun
642*4882a593Smuzhiyun trig = devm_iio_trigger_alloc(&client->dev, "%s-dev%d",
643*4882a593Smuzhiyun indio_dev->name, indio_dev->id);
644*4882a593Smuzhiyun
645*4882a593Smuzhiyun if (!trig)
646*4882a593Smuzhiyun return -ENOMEM;
647*4882a593Smuzhiyun
648*4882a593Smuzhiyun data = iio_priv(indio_dev);
649*4882a593Smuzhiyun data->client = client;
650*4882a593Smuzhiyun data->trig = trig;
651*4882a593Smuzhiyun data->chip = chip;
652*4882a593Smuzhiyun trig->dev.parent = indio_dev->dev.parent;
653*4882a593Smuzhiyun trig->ops = &atlas_interrupt_trigger_ops;
654*4882a593Smuzhiyun iio_trigger_set_drvdata(trig, indio_dev);
655*4882a593Smuzhiyun
656*4882a593Smuzhiyun i2c_set_clientdata(client, indio_dev);
657*4882a593Smuzhiyun
658*4882a593Smuzhiyun data->regmap = devm_regmap_init_i2c(client, &atlas_regmap_config);
659*4882a593Smuzhiyun if (IS_ERR(data->regmap)) {
660*4882a593Smuzhiyun dev_err(&client->dev, "regmap initialization failed\n");
661*4882a593Smuzhiyun return PTR_ERR(data->regmap);
662*4882a593Smuzhiyun }
663*4882a593Smuzhiyun
664*4882a593Smuzhiyun ret = pm_runtime_set_active(&client->dev);
665*4882a593Smuzhiyun if (ret)
666*4882a593Smuzhiyun return ret;
667*4882a593Smuzhiyun
668*4882a593Smuzhiyun ret = chip->calibration(data);
669*4882a593Smuzhiyun if (ret)
670*4882a593Smuzhiyun return ret;
671*4882a593Smuzhiyun
672*4882a593Smuzhiyun ret = iio_trigger_register(trig);
673*4882a593Smuzhiyun if (ret) {
674*4882a593Smuzhiyun dev_err(&client->dev, "failed to register trigger\n");
675*4882a593Smuzhiyun return ret;
676*4882a593Smuzhiyun }
677*4882a593Smuzhiyun
678*4882a593Smuzhiyun ret = iio_triggered_buffer_setup(indio_dev, &iio_pollfunc_store_time,
679*4882a593Smuzhiyun &atlas_trigger_handler, &atlas_buffer_setup_ops);
680*4882a593Smuzhiyun if (ret) {
681*4882a593Smuzhiyun dev_err(&client->dev, "cannot setup iio trigger\n");
682*4882a593Smuzhiyun goto unregister_trigger;
683*4882a593Smuzhiyun }
684*4882a593Smuzhiyun
685*4882a593Smuzhiyun init_irq_work(&data->work, atlas_work_handler);
686*4882a593Smuzhiyun
687*4882a593Smuzhiyun if (client->irq > 0) {
688*4882a593Smuzhiyun /* interrupt pin toggles on new conversion */
689*4882a593Smuzhiyun ret = devm_request_threaded_irq(&client->dev, client->irq,
690*4882a593Smuzhiyun NULL, atlas_interrupt_handler,
691*4882a593Smuzhiyun IRQF_TRIGGER_RISING |
692*4882a593Smuzhiyun IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
693*4882a593Smuzhiyun "atlas_irq",
694*4882a593Smuzhiyun indio_dev);
695*4882a593Smuzhiyun
696*4882a593Smuzhiyun if (ret)
697*4882a593Smuzhiyun dev_warn(&client->dev,
698*4882a593Smuzhiyun "request irq (%d) failed\n", client->irq);
699*4882a593Smuzhiyun else
700*4882a593Smuzhiyun data->interrupt_enabled = 1;
701*4882a593Smuzhiyun }
702*4882a593Smuzhiyun
703*4882a593Smuzhiyun ret = atlas_set_powermode(data, 1);
704*4882a593Smuzhiyun if (ret) {
705*4882a593Smuzhiyun dev_err(&client->dev, "cannot power device on");
706*4882a593Smuzhiyun goto unregister_buffer;
707*4882a593Smuzhiyun }
708*4882a593Smuzhiyun
709*4882a593Smuzhiyun pm_runtime_enable(&client->dev);
710*4882a593Smuzhiyun pm_runtime_set_autosuspend_delay(&client->dev, 2500);
711*4882a593Smuzhiyun pm_runtime_use_autosuspend(&client->dev);
712*4882a593Smuzhiyun
713*4882a593Smuzhiyun ret = iio_device_register(indio_dev);
714*4882a593Smuzhiyun if (ret) {
715*4882a593Smuzhiyun dev_err(&client->dev, "unable to register device\n");
716*4882a593Smuzhiyun goto unregister_pm;
717*4882a593Smuzhiyun }
718*4882a593Smuzhiyun
719*4882a593Smuzhiyun return 0;
720*4882a593Smuzhiyun
721*4882a593Smuzhiyun unregister_pm:
722*4882a593Smuzhiyun pm_runtime_disable(&client->dev);
723*4882a593Smuzhiyun atlas_set_powermode(data, 0);
724*4882a593Smuzhiyun
725*4882a593Smuzhiyun unregister_buffer:
726*4882a593Smuzhiyun iio_triggered_buffer_cleanup(indio_dev);
727*4882a593Smuzhiyun
728*4882a593Smuzhiyun unregister_trigger:
729*4882a593Smuzhiyun iio_trigger_unregister(data->trig);
730*4882a593Smuzhiyun
731*4882a593Smuzhiyun return ret;
732*4882a593Smuzhiyun }
733*4882a593Smuzhiyun
atlas_remove(struct i2c_client * client)734*4882a593Smuzhiyun static int atlas_remove(struct i2c_client *client)
735*4882a593Smuzhiyun {
736*4882a593Smuzhiyun struct iio_dev *indio_dev = i2c_get_clientdata(client);
737*4882a593Smuzhiyun struct atlas_data *data = iio_priv(indio_dev);
738*4882a593Smuzhiyun
739*4882a593Smuzhiyun iio_device_unregister(indio_dev);
740*4882a593Smuzhiyun iio_triggered_buffer_cleanup(indio_dev);
741*4882a593Smuzhiyun iio_trigger_unregister(data->trig);
742*4882a593Smuzhiyun
743*4882a593Smuzhiyun pm_runtime_disable(&client->dev);
744*4882a593Smuzhiyun pm_runtime_set_suspended(&client->dev);
745*4882a593Smuzhiyun pm_runtime_put_noidle(&client->dev);
746*4882a593Smuzhiyun
747*4882a593Smuzhiyun return atlas_set_powermode(data, 0);
748*4882a593Smuzhiyun }
749*4882a593Smuzhiyun
750*4882a593Smuzhiyun #ifdef CONFIG_PM
atlas_runtime_suspend(struct device * dev)751*4882a593Smuzhiyun static int atlas_runtime_suspend(struct device *dev)
752*4882a593Smuzhiyun {
753*4882a593Smuzhiyun struct atlas_data *data =
754*4882a593Smuzhiyun iio_priv(i2c_get_clientdata(to_i2c_client(dev)));
755*4882a593Smuzhiyun
756*4882a593Smuzhiyun return atlas_set_powermode(data, 0);
757*4882a593Smuzhiyun }
758*4882a593Smuzhiyun
atlas_runtime_resume(struct device * dev)759*4882a593Smuzhiyun static int atlas_runtime_resume(struct device *dev)
760*4882a593Smuzhiyun {
761*4882a593Smuzhiyun struct atlas_data *data =
762*4882a593Smuzhiyun iio_priv(i2c_get_clientdata(to_i2c_client(dev)));
763*4882a593Smuzhiyun
764*4882a593Smuzhiyun return atlas_set_powermode(data, 1);
765*4882a593Smuzhiyun }
766*4882a593Smuzhiyun #endif
767*4882a593Smuzhiyun
768*4882a593Smuzhiyun static const struct dev_pm_ops atlas_pm_ops = {
769*4882a593Smuzhiyun SET_RUNTIME_PM_OPS(atlas_runtime_suspend,
770*4882a593Smuzhiyun atlas_runtime_resume, NULL)
771*4882a593Smuzhiyun };
772*4882a593Smuzhiyun
773*4882a593Smuzhiyun static struct i2c_driver atlas_driver = {
774*4882a593Smuzhiyun .driver = {
775*4882a593Smuzhiyun .name = ATLAS_DRV_NAME,
776*4882a593Smuzhiyun .of_match_table = atlas_dt_ids,
777*4882a593Smuzhiyun .pm = &atlas_pm_ops,
778*4882a593Smuzhiyun },
779*4882a593Smuzhiyun .probe = atlas_probe,
780*4882a593Smuzhiyun .remove = atlas_remove,
781*4882a593Smuzhiyun .id_table = atlas_id,
782*4882a593Smuzhiyun };
783*4882a593Smuzhiyun module_i2c_driver(atlas_driver);
784*4882a593Smuzhiyun
785*4882a593Smuzhiyun MODULE_AUTHOR("Matt Ranostay <matt.ranostay@konsulko.com>");
786*4882a593Smuzhiyun MODULE_DESCRIPTION("Atlas Scientific SM sensors");
787*4882a593Smuzhiyun MODULE_LICENSE("GPL");
788