1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * HMC425A and similar Gain Amplifiers
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright 2020 Analog Devices Inc.
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun #include <linux/device.h>
9*4882a593Smuzhiyun #include <linux/err.h>
10*4882a593Smuzhiyun #include <linux/gpio/consumer.h>
11*4882a593Smuzhiyun #include <linux/iio/iio.h>
12*4882a593Smuzhiyun #include <linux/iio/sysfs.h>
13*4882a593Smuzhiyun #include <linux/kernel.h>
14*4882a593Smuzhiyun #include <linux/module.h>
15*4882a593Smuzhiyun #include <linux/of_device.h>
16*4882a593Smuzhiyun #include <linux/of_platform.h>
17*4882a593Smuzhiyun #include <linux/platform_device.h>
18*4882a593Smuzhiyun #include <linux/slab.h>
19*4882a593Smuzhiyun #include <linux/regulator/consumer.h>
20*4882a593Smuzhiyun #include <linux/sysfs.h>
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun enum hmc425a_type {
23*4882a593Smuzhiyun ID_HMC425A,
24*4882a593Smuzhiyun };
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun struct hmc425a_chip_info {
27*4882a593Smuzhiyun const char *name;
28*4882a593Smuzhiyun const struct iio_chan_spec *channels;
29*4882a593Smuzhiyun unsigned int num_channels;
30*4882a593Smuzhiyun unsigned int num_gpios;
31*4882a593Smuzhiyun int gain_min;
32*4882a593Smuzhiyun int gain_max;
33*4882a593Smuzhiyun int default_gain;
34*4882a593Smuzhiyun };
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun struct hmc425a_state {
37*4882a593Smuzhiyun struct regulator *reg;
38*4882a593Smuzhiyun struct mutex lock; /* protect sensor state */
39*4882a593Smuzhiyun struct hmc425a_chip_info *chip_info;
40*4882a593Smuzhiyun struct gpio_descs *gpios;
41*4882a593Smuzhiyun enum hmc425a_type type;
42*4882a593Smuzhiyun u32 gain;
43*4882a593Smuzhiyun };
44*4882a593Smuzhiyun
hmc425a_write(struct iio_dev * indio_dev,u32 value)45*4882a593Smuzhiyun static int hmc425a_write(struct iio_dev *indio_dev, u32 value)
46*4882a593Smuzhiyun {
47*4882a593Smuzhiyun struct hmc425a_state *st = iio_priv(indio_dev);
48*4882a593Smuzhiyun DECLARE_BITMAP(values, BITS_PER_TYPE(value));
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun values[0] = value;
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun gpiod_set_array_value_cansleep(st->gpios->ndescs, st->gpios->desc,
53*4882a593Smuzhiyun NULL, values);
54*4882a593Smuzhiyun return 0;
55*4882a593Smuzhiyun }
56*4882a593Smuzhiyun
hmc425a_read_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int * val,int * val2,long m)57*4882a593Smuzhiyun static int hmc425a_read_raw(struct iio_dev *indio_dev,
58*4882a593Smuzhiyun struct iio_chan_spec const *chan, int *val,
59*4882a593Smuzhiyun int *val2, long m)
60*4882a593Smuzhiyun {
61*4882a593Smuzhiyun struct hmc425a_state *st = iio_priv(indio_dev);
62*4882a593Smuzhiyun int code, gain = 0;
63*4882a593Smuzhiyun int ret;
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun mutex_lock(&st->lock);
66*4882a593Smuzhiyun switch (m) {
67*4882a593Smuzhiyun case IIO_CHAN_INFO_HARDWAREGAIN:
68*4882a593Smuzhiyun code = st->gain;
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun switch (st->type) {
71*4882a593Smuzhiyun case ID_HMC425A:
72*4882a593Smuzhiyun gain = ~code * -500;
73*4882a593Smuzhiyun break;
74*4882a593Smuzhiyun }
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun *val = gain / 1000;
77*4882a593Smuzhiyun *val2 = (gain % 1000) * 1000;
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun ret = IIO_VAL_INT_PLUS_MICRO_DB;
80*4882a593Smuzhiyun break;
81*4882a593Smuzhiyun default:
82*4882a593Smuzhiyun ret = -EINVAL;
83*4882a593Smuzhiyun }
84*4882a593Smuzhiyun mutex_unlock(&st->lock);
85*4882a593Smuzhiyun
86*4882a593Smuzhiyun return ret;
87*4882a593Smuzhiyun };
88*4882a593Smuzhiyun
hmc425a_write_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int val,int val2,long mask)89*4882a593Smuzhiyun static int hmc425a_write_raw(struct iio_dev *indio_dev,
90*4882a593Smuzhiyun struct iio_chan_spec const *chan, int val,
91*4882a593Smuzhiyun int val2, long mask)
92*4882a593Smuzhiyun {
93*4882a593Smuzhiyun struct hmc425a_state *st = iio_priv(indio_dev);
94*4882a593Smuzhiyun struct hmc425a_chip_info *inf = st->chip_info;
95*4882a593Smuzhiyun int code = 0, gain;
96*4882a593Smuzhiyun int ret;
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun if (val < 0)
99*4882a593Smuzhiyun gain = (val * 1000) - (val2 / 1000);
100*4882a593Smuzhiyun else
101*4882a593Smuzhiyun gain = (val * 1000) + (val2 / 1000);
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun if (gain > inf->gain_max || gain < inf->gain_min)
104*4882a593Smuzhiyun return -EINVAL;
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun switch (st->type) {
107*4882a593Smuzhiyun case ID_HMC425A:
108*4882a593Smuzhiyun code = ~((abs(gain) / 500) & 0x3F);
109*4882a593Smuzhiyun break;
110*4882a593Smuzhiyun }
111*4882a593Smuzhiyun
112*4882a593Smuzhiyun mutex_lock(&st->lock);
113*4882a593Smuzhiyun switch (mask) {
114*4882a593Smuzhiyun case IIO_CHAN_INFO_HARDWAREGAIN:
115*4882a593Smuzhiyun st->gain = code;
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun ret = hmc425a_write(indio_dev, st->gain);
118*4882a593Smuzhiyun break;
119*4882a593Smuzhiyun default:
120*4882a593Smuzhiyun ret = -EINVAL;
121*4882a593Smuzhiyun }
122*4882a593Smuzhiyun mutex_unlock(&st->lock);
123*4882a593Smuzhiyun
124*4882a593Smuzhiyun return ret;
125*4882a593Smuzhiyun }
126*4882a593Smuzhiyun
hmc425a_write_raw_get_fmt(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,long mask)127*4882a593Smuzhiyun static int hmc425a_write_raw_get_fmt(struct iio_dev *indio_dev,
128*4882a593Smuzhiyun struct iio_chan_spec const *chan,
129*4882a593Smuzhiyun long mask)
130*4882a593Smuzhiyun {
131*4882a593Smuzhiyun switch (mask) {
132*4882a593Smuzhiyun case IIO_CHAN_INFO_HARDWAREGAIN:
133*4882a593Smuzhiyun return IIO_VAL_INT_PLUS_MICRO_DB;
134*4882a593Smuzhiyun default:
135*4882a593Smuzhiyun return -EINVAL;
136*4882a593Smuzhiyun }
137*4882a593Smuzhiyun }
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun static const struct iio_info hmc425a_info = {
140*4882a593Smuzhiyun .read_raw = &hmc425a_read_raw,
141*4882a593Smuzhiyun .write_raw = &hmc425a_write_raw,
142*4882a593Smuzhiyun .write_raw_get_fmt = &hmc425a_write_raw_get_fmt,
143*4882a593Smuzhiyun };
144*4882a593Smuzhiyun
145*4882a593Smuzhiyun #define HMC425A_CHAN(_channel) \
146*4882a593Smuzhiyun { \
147*4882a593Smuzhiyun .type = IIO_VOLTAGE, \
148*4882a593Smuzhiyun .output = 1, \
149*4882a593Smuzhiyun .indexed = 1, \
150*4882a593Smuzhiyun .channel = _channel, \
151*4882a593Smuzhiyun .info_mask_separate = BIT(IIO_CHAN_INFO_HARDWAREGAIN), \
152*4882a593Smuzhiyun }
153*4882a593Smuzhiyun
154*4882a593Smuzhiyun static const struct iio_chan_spec hmc425a_channels[] = {
155*4882a593Smuzhiyun HMC425A_CHAN(0),
156*4882a593Smuzhiyun };
157*4882a593Smuzhiyun
158*4882a593Smuzhiyun /* Match table for of_platform binding */
159*4882a593Smuzhiyun static const struct of_device_id hmc425a_of_match[] = {
160*4882a593Smuzhiyun { .compatible = "adi,hmc425a", .data = (void *)ID_HMC425A },
161*4882a593Smuzhiyun {},
162*4882a593Smuzhiyun };
163*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, hmc425a_of_match);
164*4882a593Smuzhiyun
hmc425a_reg_disable(void * data)165*4882a593Smuzhiyun static void hmc425a_reg_disable(void *data)
166*4882a593Smuzhiyun {
167*4882a593Smuzhiyun struct hmc425a_state *st = data;
168*4882a593Smuzhiyun
169*4882a593Smuzhiyun regulator_disable(st->reg);
170*4882a593Smuzhiyun }
171*4882a593Smuzhiyun
172*4882a593Smuzhiyun static struct hmc425a_chip_info hmc425a_chip_info_tbl[] = {
173*4882a593Smuzhiyun [ID_HMC425A] = {
174*4882a593Smuzhiyun .name = "hmc425a",
175*4882a593Smuzhiyun .channels = hmc425a_channels,
176*4882a593Smuzhiyun .num_channels = ARRAY_SIZE(hmc425a_channels),
177*4882a593Smuzhiyun .num_gpios = 6,
178*4882a593Smuzhiyun .gain_min = -31500,
179*4882a593Smuzhiyun .gain_max = 0,
180*4882a593Smuzhiyun .default_gain = -0x40, /* set default gain -31.5db*/
181*4882a593Smuzhiyun },
182*4882a593Smuzhiyun };
183*4882a593Smuzhiyun
hmc425a_probe(struct platform_device * pdev)184*4882a593Smuzhiyun static int hmc425a_probe(struct platform_device *pdev)
185*4882a593Smuzhiyun {
186*4882a593Smuzhiyun struct iio_dev *indio_dev;
187*4882a593Smuzhiyun struct hmc425a_state *st;
188*4882a593Smuzhiyun int ret;
189*4882a593Smuzhiyun
190*4882a593Smuzhiyun indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*st));
191*4882a593Smuzhiyun if (!indio_dev)
192*4882a593Smuzhiyun return -ENOMEM;
193*4882a593Smuzhiyun
194*4882a593Smuzhiyun st = iio_priv(indio_dev);
195*4882a593Smuzhiyun st->type = (enum hmc425a_type)of_device_get_match_data(&pdev->dev);
196*4882a593Smuzhiyun
197*4882a593Smuzhiyun st->chip_info = &hmc425a_chip_info_tbl[st->type];
198*4882a593Smuzhiyun indio_dev->num_channels = st->chip_info->num_channels;
199*4882a593Smuzhiyun indio_dev->channels = st->chip_info->channels;
200*4882a593Smuzhiyun indio_dev->name = st->chip_info->name;
201*4882a593Smuzhiyun st->gain = st->chip_info->default_gain;
202*4882a593Smuzhiyun
203*4882a593Smuzhiyun st->gpios = devm_gpiod_get_array(&pdev->dev, "ctrl", GPIOD_OUT_LOW);
204*4882a593Smuzhiyun if (IS_ERR(st->gpios))
205*4882a593Smuzhiyun return dev_err_probe(&pdev->dev, PTR_ERR(st->gpios),
206*4882a593Smuzhiyun "failed to get gpios\n");
207*4882a593Smuzhiyun
208*4882a593Smuzhiyun if (st->gpios->ndescs != st->chip_info->num_gpios) {
209*4882a593Smuzhiyun dev_err(&pdev->dev, "%d GPIOs needed to operate\n",
210*4882a593Smuzhiyun st->chip_info->num_gpios);
211*4882a593Smuzhiyun return -ENODEV;
212*4882a593Smuzhiyun }
213*4882a593Smuzhiyun
214*4882a593Smuzhiyun st->reg = devm_regulator_get(&pdev->dev, "vcc-supply");
215*4882a593Smuzhiyun if (IS_ERR(st->reg))
216*4882a593Smuzhiyun return PTR_ERR(st->reg);
217*4882a593Smuzhiyun
218*4882a593Smuzhiyun ret = regulator_enable(st->reg);
219*4882a593Smuzhiyun if (ret)
220*4882a593Smuzhiyun return ret;
221*4882a593Smuzhiyun ret = devm_add_action_or_reset(&pdev->dev, hmc425a_reg_disable, st);
222*4882a593Smuzhiyun if (ret)
223*4882a593Smuzhiyun return ret;
224*4882a593Smuzhiyun
225*4882a593Smuzhiyun mutex_init(&st->lock);
226*4882a593Smuzhiyun
227*4882a593Smuzhiyun indio_dev->info = &hmc425a_info;
228*4882a593Smuzhiyun indio_dev->modes = INDIO_DIRECT_MODE;
229*4882a593Smuzhiyun
230*4882a593Smuzhiyun return devm_iio_device_register(&pdev->dev, indio_dev);
231*4882a593Smuzhiyun }
232*4882a593Smuzhiyun
233*4882a593Smuzhiyun static struct platform_driver hmc425a_driver = {
234*4882a593Smuzhiyun .driver = {
235*4882a593Smuzhiyun .name = KBUILD_MODNAME,
236*4882a593Smuzhiyun .of_match_table = hmc425a_of_match,
237*4882a593Smuzhiyun },
238*4882a593Smuzhiyun .probe = hmc425a_probe,
239*4882a593Smuzhiyun };
240*4882a593Smuzhiyun module_platform_driver(hmc425a_driver);
241*4882a593Smuzhiyun
242*4882a593Smuzhiyun MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>");
243*4882a593Smuzhiyun MODULE_DESCRIPTION("Analog Devices HMC425A and similar GPIO control Gain Amplifiers");
244*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
245