xref: /OK3568_Linux_fs/kernel/drivers/iio/amplifiers/ad8366.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * AD8366 and similar Gain Amplifiers
4*4882a593Smuzhiyun  * This driver supports the following gain amplifiers:
5*4882a593Smuzhiyun  *   AD8366 Dual-Digital Variable Gain Amplifier (VGA)
6*4882a593Smuzhiyun  *   ADA4961 BiCMOS RF Digital Gain Amplifier (DGA)
7*4882a593Smuzhiyun  *   ADL5240 Digitally controlled variable gain amplifier (VGA)
8*4882a593Smuzhiyun  *   HMC1119 0.25 dB LSB, 7-Bit, Silicon Digital Attenuator
9*4882a593Smuzhiyun  *
10*4882a593Smuzhiyun  * Copyright 2012-2019 Analog Devices Inc.
11*4882a593Smuzhiyun  */
12*4882a593Smuzhiyun 
13*4882a593Smuzhiyun #include <linux/device.h>
14*4882a593Smuzhiyun #include <linux/kernel.h>
15*4882a593Smuzhiyun #include <linux/slab.h>
16*4882a593Smuzhiyun #include <linux/sysfs.h>
17*4882a593Smuzhiyun #include <linux/spi/spi.h>
18*4882a593Smuzhiyun #include <linux/regulator/consumer.h>
19*4882a593Smuzhiyun #include <linux/gpio/consumer.h>
20*4882a593Smuzhiyun #include <linux/err.h>
21*4882a593Smuzhiyun #include <linux/module.h>
22*4882a593Smuzhiyun #include <linux/bitrev.h>
23*4882a593Smuzhiyun 
24*4882a593Smuzhiyun #include <linux/iio/iio.h>
25*4882a593Smuzhiyun #include <linux/iio/sysfs.h>
26*4882a593Smuzhiyun 
27*4882a593Smuzhiyun enum ad8366_type {
28*4882a593Smuzhiyun 	ID_AD8366,
29*4882a593Smuzhiyun 	ID_ADA4961,
30*4882a593Smuzhiyun 	ID_ADL5240,
31*4882a593Smuzhiyun 	ID_HMC1119,
32*4882a593Smuzhiyun };
33*4882a593Smuzhiyun 
34*4882a593Smuzhiyun struct ad8366_info {
35*4882a593Smuzhiyun 	int gain_min;
36*4882a593Smuzhiyun 	int gain_max;
37*4882a593Smuzhiyun };
38*4882a593Smuzhiyun 
39*4882a593Smuzhiyun struct ad8366_state {
40*4882a593Smuzhiyun 	struct spi_device	*spi;
41*4882a593Smuzhiyun 	struct regulator	*reg;
42*4882a593Smuzhiyun 	struct mutex            lock; /* protect sensor state */
43*4882a593Smuzhiyun 	struct gpio_desc	*reset_gpio;
44*4882a593Smuzhiyun 	unsigned char		ch[2];
45*4882a593Smuzhiyun 	enum ad8366_type	type;
46*4882a593Smuzhiyun 	struct ad8366_info	*info;
47*4882a593Smuzhiyun 	/*
48*4882a593Smuzhiyun 	 * DMA (thus cache coherency maintenance) requires the
49*4882a593Smuzhiyun 	 * transfer buffers to live in their own cache lines.
50*4882a593Smuzhiyun 	 */
51*4882a593Smuzhiyun 	unsigned char		data[2] ____cacheline_aligned;
52*4882a593Smuzhiyun };
53*4882a593Smuzhiyun 
54*4882a593Smuzhiyun static struct ad8366_info ad8366_infos[] = {
55*4882a593Smuzhiyun 	[ID_AD8366] = {
56*4882a593Smuzhiyun 		.gain_min = 4500,
57*4882a593Smuzhiyun 		.gain_max = 20500,
58*4882a593Smuzhiyun 	},
59*4882a593Smuzhiyun 	[ID_ADA4961] = {
60*4882a593Smuzhiyun 		.gain_min = -6000,
61*4882a593Smuzhiyun 		.gain_max = 15000,
62*4882a593Smuzhiyun 	},
63*4882a593Smuzhiyun 	[ID_ADL5240] = {
64*4882a593Smuzhiyun 		.gain_min = -11500,
65*4882a593Smuzhiyun 		.gain_max = 20000,
66*4882a593Smuzhiyun 	},
67*4882a593Smuzhiyun 	[ID_HMC1119] = {
68*4882a593Smuzhiyun 		.gain_min = -31750,
69*4882a593Smuzhiyun 		.gain_max = 0,
70*4882a593Smuzhiyun 	},
71*4882a593Smuzhiyun };
72*4882a593Smuzhiyun 
ad8366_write(struct iio_dev * indio_dev,unsigned char ch_a,unsigned char ch_b)73*4882a593Smuzhiyun static int ad8366_write(struct iio_dev *indio_dev,
74*4882a593Smuzhiyun 			unsigned char ch_a, unsigned char ch_b)
75*4882a593Smuzhiyun {
76*4882a593Smuzhiyun 	struct ad8366_state *st = iio_priv(indio_dev);
77*4882a593Smuzhiyun 	int ret;
78*4882a593Smuzhiyun 
79*4882a593Smuzhiyun 	switch (st->type) {
80*4882a593Smuzhiyun 	case ID_AD8366:
81*4882a593Smuzhiyun 		ch_a = bitrev8(ch_a & 0x3F);
82*4882a593Smuzhiyun 		ch_b = bitrev8(ch_b & 0x3F);
83*4882a593Smuzhiyun 
84*4882a593Smuzhiyun 		st->data[0] = ch_b >> 4;
85*4882a593Smuzhiyun 		st->data[1] = (ch_b << 4) | (ch_a >> 2);
86*4882a593Smuzhiyun 		break;
87*4882a593Smuzhiyun 	case ID_ADA4961:
88*4882a593Smuzhiyun 		st->data[0] = ch_a & 0x1F;
89*4882a593Smuzhiyun 		break;
90*4882a593Smuzhiyun 	case ID_ADL5240:
91*4882a593Smuzhiyun 		st->data[0] = (ch_a & 0x3F);
92*4882a593Smuzhiyun 		break;
93*4882a593Smuzhiyun 	case ID_HMC1119:
94*4882a593Smuzhiyun 		st->data[0] = ch_a;
95*4882a593Smuzhiyun 		break;
96*4882a593Smuzhiyun 	}
97*4882a593Smuzhiyun 
98*4882a593Smuzhiyun 	ret = spi_write(st->spi, st->data, indio_dev->num_channels);
99*4882a593Smuzhiyun 	if (ret < 0)
100*4882a593Smuzhiyun 		dev_err(&indio_dev->dev, "write failed (%d)", ret);
101*4882a593Smuzhiyun 
102*4882a593Smuzhiyun 	return ret;
103*4882a593Smuzhiyun }
104*4882a593Smuzhiyun 
ad8366_read_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int * val,int * val2,long m)105*4882a593Smuzhiyun static int ad8366_read_raw(struct iio_dev *indio_dev,
106*4882a593Smuzhiyun 			   struct iio_chan_spec const *chan,
107*4882a593Smuzhiyun 			   int *val,
108*4882a593Smuzhiyun 			   int *val2,
109*4882a593Smuzhiyun 			   long m)
110*4882a593Smuzhiyun {
111*4882a593Smuzhiyun 	struct ad8366_state *st = iio_priv(indio_dev);
112*4882a593Smuzhiyun 	int ret;
113*4882a593Smuzhiyun 	int code, gain = 0;
114*4882a593Smuzhiyun 
115*4882a593Smuzhiyun 	mutex_lock(&st->lock);
116*4882a593Smuzhiyun 	switch (m) {
117*4882a593Smuzhiyun 	case IIO_CHAN_INFO_HARDWAREGAIN:
118*4882a593Smuzhiyun 		code = st->ch[chan->channel];
119*4882a593Smuzhiyun 
120*4882a593Smuzhiyun 		switch (st->type) {
121*4882a593Smuzhiyun 		case ID_AD8366:
122*4882a593Smuzhiyun 			gain = code * 253 + 4500;
123*4882a593Smuzhiyun 			break;
124*4882a593Smuzhiyun 		case ID_ADA4961:
125*4882a593Smuzhiyun 			gain = 15000 - code * 1000;
126*4882a593Smuzhiyun 			break;
127*4882a593Smuzhiyun 		case ID_ADL5240:
128*4882a593Smuzhiyun 			gain = 20000 - 31500 + code * 500;
129*4882a593Smuzhiyun 			break;
130*4882a593Smuzhiyun 		case ID_HMC1119:
131*4882a593Smuzhiyun 			gain = -1 * code * 250;
132*4882a593Smuzhiyun 			break;
133*4882a593Smuzhiyun 		}
134*4882a593Smuzhiyun 
135*4882a593Smuzhiyun 		/* Values in dB */
136*4882a593Smuzhiyun 		*val = gain / 1000;
137*4882a593Smuzhiyun 		*val2 = (gain % 1000) * 1000;
138*4882a593Smuzhiyun 
139*4882a593Smuzhiyun 		ret = IIO_VAL_INT_PLUS_MICRO_DB;
140*4882a593Smuzhiyun 		break;
141*4882a593Smuzhiyun 	default:
142*4882a593Smuzhiyun 		ret = -EINVAL;
143*4882a593Smuzhiyun 	}
144*4882a593Smuzhiyun 	mutex_unlock(&st->lock);
145*4882a593Smuzhiyun 
146*4882a593Smuzhiyun 	return ret;
147*4882a593Smuzhiyun };
148*4882a593Smuzhiyun 
ad8366_write_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int val,int val2,long mask)149*4882a593Smuzhiyun static int ad8366_write_raw(struct iio_dev *indio_dev,
150*4882a593Smuzhiyun 			    struct iio_chan_spec const *chan,
151*4882a593Smuzhiyun 			    int val,
152*4882a593Smuzhiyun 			    int val2,
153*4882a593Smuzhiyun 			    long mask)
154*4882a593Smuzhiyun {
155*4882a593Smuzhiyun 	struct ad8366_state *st = iio_priv(indio_dev);
156*4882a593Smuzhiyun 	struct ad8366_info *inf = st->info;
157*4882a593Smuzhiyun 	int code = 0, gain;
158*4882a593Smuzhiyun 	int ret;
159*4882a593Smuzhiyun 
160*4882a593Smuzhiyun 	/* Values in dB */
161*4882a593Smuzhiyun 	if (val < 0)
162*4882a593Smuzhiyun 		gain = (val * 1000) - (val2 / 1000);
163*4882a593Smuzhiyun 	else
164*4882a593Smuzhiyun 		gain = (val * 1000) + (val2 / 1000);
165*4882a593Smuzhiyun 
166*4882a593Smuzhiyun 	if (gain > inf->gain_max || gain < inf->gain_min)
167*4882a593Smuzhiyun 		return -EINVAL;
168*4882a593Smuzhiyun 
169*4882a593Smuzhiyun 	switch (st->type) {
170*4882a593Smuzhiyun 	case ID_AD8366:
171*4882a593Smuzhiyun 		code = (gain - 4500) / 253;
172*4882a593Smuzhiyun 		break;
173*4882a593Smuzhiyun 	case ID_ADA4961:
174*4882a593Smuzhiyun 		code = (15000 - gain) / 1000;
175*4882a593Smuzhiyun 		break;
176*4882a593Smuzhiyun 	case ID_ADL5240:
177*4882a593Smuzhiyun 		code = ((gain - 500 - 20000) / 500) & 0x3F;
178*4882a593Smuzhiyun 		break;
179*4882a593Smuzhiyun 	case ID_HMC1119:
180*4882a593Smuzhiyun 		code = (abs(gain) / 250) & 0x7F;
181*4882a593Smuzhiyun 		break;
182*4882a593Smuzhiyun 	}
183*4882a593Smuzhiyun 
184*4882a593Smuzhiyun 	mutex_lock(&st->lock);
185*4882a593Smuzhiyun 	switch (mask) {
186*4882a593Smuzhiyun 	case IIO_CHAN_INFO_HARDWAREGAIN:
187*4882a593Smuzhiyun 		st->ch[chan->channel] = code;
188*4882a593Smuzhiyun 		ret = ad8366_write(indio_dev, st->ch[0], st->ch[1]);
189*4882a593Smuzhiyun 		break;
190*4882a593Smuzhiyun 	default:
191*4882a593Smuzhiyun 		ret = -EINVAL;
192*4882a593Smuzhiyun 	}
193*4882a593Smuzhiyun 	mutex_unlock(&st->lock);
194*4882a593Smuzhiyun 
195*4882a593Smuzhiyun 	return ret;
196*4882a593Smuzhiyun }
197*4882a593Smuzhiyun 
ad8366_write_raw_get_fmt(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,long mask)198*4882a593Smuzhiyun static int ad8366_write_raw_get_fmt(struct iio_dev *indio_dev,
199*4882a593Smuzhiyun 				    struct iio_chan_spec const *chan,
200*4882a593Smuzhiyun 				    long mask)
201*4882a593Smuzhiyun {
202*4882a593Smuzhiyun 	switch (mask) {
203*4882a593Smuzhiyun 	case IIO_CHAN_INFO_HARDWAREGAIN:
204*4882a593Smuzhiyun 		return IIO_VAL_INT_PLUS_MICRO_DB;
205*4882a593Smuzhiyun 	default:
206*4882a593Smuzhiyun 		return -EINVAL;
207*4882a593Smuzhiyun 	}
208*4882a593Smuzhiyun }
209*4882a593Smuzhiyun 
210*4882a593Smuzhiyun static const struct iio_info ad8366_info = {
211*4882a593Smuzhiyun 	.read_raw = &ad8366_read_raw,
212*4882a593Smuzhiyun 	.write_raw = &ad8366_write_raw,
213*4882a593Smuzhiyun 	.write_raw_get_fmt = &ad8366_write_raw_get_fmt,
214*4882a593Smuzhiyun };
215*4882a593Smuzhiyun 
216*4882a593Smuzhiyun #define AD8366_CHAN(_channel) {				\
217*4882a593Smuzhiyun 	.type = IIO_VOLTAGE,				\
218*4882a593Smuzhiyun 	.output = 1,					\
219*4882a593Smuzhiyun 	.indexed = 1,					\
220*4882a593Smuzhiyun 	.channel = _channel,				\
221*4882a593Smuzhiyun 	.info_mask_separate = BIT(IIO_CHAN_INFO_HARDWAREGAIN),\
222*4882a593Smuzhiyun }
223*4882a593Smuzhiyun 
224*4882a593Smuzhiyun static const struct iio_chan_spec ad8366_channels[] = {
225*4882a593Smuzhiyun 	AD8366_CHAN(0),
226*4882a593Smuzhiyun 	AD8366_CHAN(1),
227*4882a593Smuzhiyun };
228*4882a593Smuzhiyun 
229*4882a593Smuzhiyun static const struct iio_chan_spec ada4961_channels[] = {
230*4882a593Smuzhiyun 	AD8366_CHAN(0),
231*4882a593Smuzhiyun };
232*4882a593Smuzhiyun 
ad8366_probe(struct spi_device * spi)233*4882a593Smuzhiyun static int ad8366_probe(struct spi_device *spi)
234*4882a593Smuzhiyun {
235*4882a593Smuzhiyun 	struct iio_dev *indio_dev;
236*4882a593Smuzhiyun 	struct ad8366_state *st;
237*4882a593Smuzhiyun 	int ret;
238*4882a593Smuzhiyun 
239*4882a593Smuzhiyun 	indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
240*4882a593Smuzhiyun 	if (indio_dev == NULL)
241*4882a593Smuzhiyun 		return -ENOMEM;
242*4882a593Smuzhiyun 
243*4882a593Smuzhiyun 	st = iio_priv(indio_dev);
244*4882a593Smuzhiyun 
245*4882a593Smuzhiyun 	st->reg = devm_regulator_get(&spi->dev, "vcc");
246*4882a593Smuzhiyun 	if (!IS_ERR(st->reg)) {
247*4882a593Smuzhiyun 		ret = regulator_enable(st->reg);
248*4882a593Smuzhiyun 		if (ret)
249*4882a593Smuzhiyun 			return ret;
250*4882a593Smuzhiyun 	}
251*4882a593Smuzhiyun 
252*4882a593Smuzhiyun 	spi_set_drvdata(spi, indio_dev);
253*4882a593Smuzhiyun 	mutex_init(&st->lock);
254*4882a593Smuzhiyun 	st->spi = spi;
255*4882a593Smuzhiyun 	st->type = spi_get_device_id(spi)->driver_data;
256*4882a593Smuzhiyun 
257*4882a593Smuzhiyun 	switch (st->type) {
258*4882a593Smuzhiyun 	case ID_AD8366:
259*4882a593Smuzhiyun 		indio_dev->channels = ad8366_channels;
260*4882a593Smuzhiyun 		indio_dev->num_channels = ARRAY_SIZE(ad8366_channels);
261*4882a593Smuzhiyun 		break;
262*4882a593Smuzhiyun 	case ID_ADA4961:
263*4882a593Smuzhiyun 	case ID_ADL5240:
264*4882a593Smuzhiyun 	case ID_HMC1119:
265*4882a593Smuzhiyun 		st->reset_gpio = devm_gpiod_get_optional(&spi->dev, "reset", GPIOD_OUT_HIGH);
266*4882a593Smuzhiyun 		if (IS_ERR(st->reset_gpio)) {
267*4882a593Smuzhiyun 			ret = PTR_ERR(st->reset_gpio);
268*4882a593Smuzhiyun 			goto error_disable_reg;
269*4882a593Smuzhiyun 		}
270*4882a593Smuzhiyun 		indio_dev->channels = ada4961_channels;
271*4882a593Smuzhiyun 		indio_dev->num_channels = ARRAY_SIZE(ada4961_channels);
272*4882a593Smuzhiyun 		break;
273*4882a593Smuzhiyun 	default:
274*4882a593Smuzhiyun 		dev_err(&spi->dev, "Invalid device ID\n");
275*4882a593Smuzhiyun 		ret = -EINVAL;
276*4882a593Smuzhiyun 		goto error_disable_reg;
277*4882a593Smuzhiyun 	}
278*4882a593Smuzhiyun 
279*4882a593Smuzhiyun 	st->info = &ad8366_infos[st->type];
280*4882a593Smuzhiyun 	indio_dev->name = spi_get_device_id(spi)->name;
281*4882a593Smuzhiyun 	indio_dev->info = &ad8366_info;
282*4882a593Smuzhiyun 	indio_dev->modes = INDIO_DIRECT_MODE;
283*4882a593Smuzhiyun 
284*4882a593Smuzhiyun 	ret = ad8366_write(indio_dev, 0 , 0);
285*4882a593Smuzhiyun 	if (ret < 0)
286*4882a593Smuzhiyun 		goto error_disable_reg;
287*4882a593Smuzhiyun 
288*4882a593Smuzhiyun 	ret = iio_device_register(indio_dev);
289*4882a593Smuzhiyun 	if (ret)
290*4882a593Smuzhiyun 		goto error_disable_reg;
291*4882a593Smuzhiyun 
292*4882a593Smuzhiyun 	return 0;
293*4882a593Smuzhiyun 
294*4882a593Smuzhiyun error_disable_reg:
295*4882a593Smuzhiyun 	if (!IS_ERR(st->reg))
296*4882a593Smuzhiyun 		regulator_disable(st->reg);
297*4882a593Smuzhiyun 
298*4882a593Smuzhiyun 	return ret;
299*4882a593Smuzhiyun }
300*4882a593Smuzhiyun 
ad8366_remove(struct spi_device * spi)301*4882a593Smuzhiyun static int ad8366_remove(struct spi_device *spi)
302*4882a593Smuzhiyun {
303*4882a593Smuzhiyun 	struct iio_dev *indio_dev = spi_get_drvdata(spi);
304*4882a593Smuzhiyun 	struct ad8366_state *st = iio_priv(indio_dev);
305*4882a593Smuzhiyun 	struct regulator *reg = st->reg;
306*4882a593Smuzhiyun 
307*4882a593Smuzhiyun 	iio_device_unregister(indio_dev);
308*4882a593Smuzhiyun 
309*4882a593Smuzhiyun 	if (!IS_ERR(reg))
310*4882a593Smuzhiyun 		regulator_disable(reg);
311*4882a593Smuzhiyun 
312*4882a593Smuzhiyun 	return 0;
313*4882a593Smuzhiyun }
314*4882a593Smuzhiyun 
315*4882a593Smuzhiyun static const struct spi_device_id ad8366_id[] = {
316*4882a593Smuzhiyun 	{"ad8366",  ID_AD8366},
317*4882a593Smuzhiyun 	{"ada4961", ID_ADA4961},
318*4882a593Smuzhiyun 	{"adl5240", ID_ADL5240},
319*4882a593Smuzhiyun 	{"hmc1119", ID_HMC1119},
320*4882a593Smuzhiyun 	{}
321*4882a593Smuzhiyun };
322*4882a593Smuzhiyun MODULE_DEVICE_TABLE(spi, ad8366_id);
323*4882a593Smuzhiyun 
324*4882a593Smuzhiyun static struct spi_driver ad8366_driver = {
325*4882a593Smuzhiyun 	.driver = {
326*4882a593Smuzhiyun 		.name	= KBUILD_MODNAME,
327*4882a593Smuzhiyun 	},
328*4882a593Smuzhiyun 	.probe		= ad8366_probe,
329*4882a593Smuzhiyun 	.remove		= ad8366_remove,
330*4882a593Smuzhiyun 	.id_table	= ad8366_id,
331*4882a593Smuzhiyun };
332*4882a593Smuzhiyun 
333*4882a593Smuzhiyun module_spi_driver(ad8366_driver);
334*4882a593Smuzhiyun 
335*4882a593Smuzhiyun MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>");
336*4882a593Smuzhiyun MODULE_DESCRIPTION("Analog Devices AD8366 and similar Gain Amplifiers");
337*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
338