xref: /OK3568_Linux_fs/kernel/drivers/iio/adc/ti-ads8344.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0+
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * ADS8344 16-bit 8-Channel ADC driver
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Author: Gregory CLEMENT <gregory.clement@bootlin.com>
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * Datasheet: https://www.ti.com/lit/ds/symlink/ads8344.pdf
8*4882a593Smuzhiyun  */
9*4882a593Smuzhiyun 
10*4882a593Smuzhiyun #include <linux/delay.h>
11*4882a593Smuzhiyun #include <linux/iio/buffer.h>
12*4882a593Smuzhiyun #include <linux/iio/iio.h>
13*4882a593Smuzhiyun #include <linux/module.h>
14*4882a593Smuzhiyun #include <linux/regulator/consumer.h>
15*4882a593Smuzhiyun #include <linux/spi/spi.h>
16*4882a593Smuzhiyun 
17*4882a593Smuzhiyun #define ADS8344_START BIT(7)
18*4882a593Smuzhiyun #define ADS8344_SINGLE_END BIT(2)
19*4882a593Smuzhiyun #define ADS8344_CHANNEL(channel) ((channel) << 4)
20*4882a593Smuzhiyun #define ADS8344_CLOCK_INTERNAL 0x2 /* PD1 = 1 and PD0 = 0 */
21*4882a593Smuzhiyun 
22*4882a593Smuzhiyun struct ads8344 {
23*4882a593Smuzhiyun 	struct spi_device *spi;
24*4882a593Smuzhiyun 	struct regulator *reg;
25*4882a593Smuzhiyun 	/*
26*4882a593Smuzhiyun 	 * Lock protecting access to adc->tx_buff and rx_buff,
27*4882a593Smuzhiyun 	 * especially from concurrent read on sysfs file.
28*4882a593Smuzhiyun 	 */
29*4882a593Smuzhiyun 	struct mutex lock;
30*4882a593Smuzhiyun 
31*4882a593Smuzhiyun 	u8 tx_buf ____cacheline_aligned;
32*4882a593Smuzhiyun 	u8 rx_buf[3];
33*4882a593Smuzhiyun };
34*4882a593Smuzhiyun 
35*4882a593Smuzhiyun #define ADS8344_VOLTAGE_CHANNEL(chan, addr)				\
36*4882a593Smuzhiyun 	{								\
37*4882a593Smuzhiyun 		.type = IIO_VOLTAGE,					\
38*4882a593Smuzhiyun 		.indexed = 1,						\
39*4882a593Smuzhiyun 		.channel = chan,					\
40*4882a593Smuzhiyun 		.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),		\
41*4882a593Smuzhiyun 		.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),	\
42*4882a593Smuzhiyun 		.address = addr,					\
43*4882a593Smuzhiyun 	}
44*4882a593Smuzhiyun 
45*4882a593Smuzhiyun #define ADS8344_VOLTAGE_CHANNEL_DIFF(chan1, chan2, addr)		\
46*4882a593Smuzhiyun 	{								\
47*4882a593Smuzhiyun 		.type = IIO_VOLTAGE,					\
48*4882a593Smuzhiyun 		.indexed = 1,						\
49*4882a593Smuzhiyun 		.channel = (chan1),					\
50*4882a593Smuzhiyun 		.channel2 = (chan2),					\
51*4882a593Smuzhiyun 		.differential = 1,					\
52*4882a593Smuzhiyun 		.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),		\
53*4882a593Smuzhiyun 		.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),	\
54*4882a593Smuzhiyun 		.address = addr,					\
55*4882a593Smuzhiyun 	}
56*4882a593Smuzhiyun 
57*4882a593Smuzhiyun static const struct iio_chan_spec ads8344_channels[] = {
58*4882a593Smuzhiyun 	ADS8344_VOLTAGE_CHANNEL(0, 0),
59*4882a593Smuzhiyun 	ADS8344_VOLTAGE_CHANNEL(1, 4),
60*4882a593Smuzhiyun 	ADS8344_VOLTAGE_CHANNEL(2, 1),
61*4882a593Smuzhiyun 	ADS8344_VOLTAGE_CHANNEL(3, 5),
62*4882a593Smuzhiyun 	ADS8344_VOLTAGE_CHANNEL(4, 2),
63*4882a593Smuzhiyun 	ADS8344_VOLTAGE_CHANNEL(5, 6),
64*4882a593Smuzhiyun 	ADS8344_VOLTAGE_CHANNEL(6, 3),
65*4882a593Smuzhiyun 	ADS8344_VOLTAGE_CHANNEL(7, 7),
66*4882a593Smuzhiyun 	ADS8344_VOLTAGE_CHANNEL_DIFF(0, 1, 8),
67*4882a593Smuzhiyun 	ADS8344_VOLTAGE_CHANNEL_DIFF(2, 3, 9),
68*4882a593Smuzhiyun 	ADS8344_VOLTAGE_CHANNEL_DIFF(4, 5, 10),
69*4882a593Smuzhiyun 	ADS8344_VOLTAGE_CHANNEL_DIFF(6, 7, 11),
70*4882a593Smuzhiyun 	ADS8344_VOLTAGE_CHANNEL_DIFF(1, 0, 12),
71*4882a593Smuzhiyun 	ADS8344_VOLTAGE_CHANNEL_DIFF(3, 2, 13),
72*4882a593Smuzhiyun 	ADS8344_VOLTAGE_CHANNEL_DIFF(5, 4, 14),
73*4882a593Smuzhiyun 	ADS8344_VOLTAGE_CHANNEL_DIFF(7, 6, 15),
74*4882a593Smuzhiyun };
75*4882a593Smuzhiyun 
ads8344_adc_conversion(struct ads8344 * adc,int channel,bool differential)76*4882a593Smuzhiyun static int ads8344_adc_conversion(struct ads8344 *adc, int channel,
77*4882a593Smuzhiyun 				  bool differential)
78*4882a593Smuzhiyun {
79*4882a593Smuzhiyun 	struct spi_device *spi = adc->spi;
80*4882a593Smuzhiyun 	int ret;
81*4882a593Smuzhiyun 
82*4882a593Smuzhiyun 	adc->tx_buf = ADS8344_START;
83*4882a593Smuzhiyun 	if (!differential)
84*4882a593Smuzhiyun 		adc->tx_buf |= ADS8344_SINGLE_END;
85*4882a593Smuzhiyun 	adc->tx_buf |= ADS8344_CHANNEL(channel);
86*4882a593Smuzhiyun 	adc->tx_buf |= ADS8344_CLOCK_INTERNAL;
87*4882a593Smuzhiyun 
88*4882a593Smuzhiyun 	ret = spi_write(spi, &adc->tx_buf, 1);
89*4882a593Smuzhiyun 	if (ret)
90*4882a593Smuzhiyun 		return ret;
91*4882a593Smuzhiyun 
92*4882a593Smuzhiyun 	udelay(9);
93*4882a593Smuzhiyun 
94*4882a593Smuzhiyun 	ret = spi_read(spi, adc->rx_buf, sizeof(adc->rx_buf));
95*4882a593Smuzhiyun 	if (ret)
96*4882a593Smuzhiyun 		return ret;
97*4882a593Smuzhiyun 
98*4882a593Smuzhiyun 	return adc->rx_buf[0] << 9 | adc->rx_buf[1] << 1 | adc->rx_buf[2] >> 7;
99*4882a593Smuzhiyun }
100*4882a593Smuzhiyun 
ads8344_read_raw(struct iio_dev * iio,struct iio_chan_spec const * channel,int * value,int * shift,long mask)101*4882a593Smuzhiyun static int ads8344_read_raw(struct iio_dev *iio,
102*4882a593Smuzhiyun 			    struct iio_chan_spec const *channel, int *value,
103*4882a593Smuzhiyun 			    int *shift, long mask)
104*4882a593Smuzhiyun {
105*4882a593Smuzhiyun 	struct ads8344 *adc = iio_priv(iio);
106*4882a593Smuzhiyun 
107*4882a593Smuzhiyun 	switch (mask) {
108*4882a593Smuzhiyun 	case IIO_CHAN_INFO_RAW:
109*4882a593Smuzhiyun 		mutex_lock(&adc->lock);
110*4882a593Smuzhiyun 		*value = ads8344_adc_conversion(adc, channel->address,
111*4882a593Smuzhiyun 						channel->differential);
112*4882a593Smuzhiyun 		mutex_unlock(&adc->lock);
113*4882a593Smuzhiyun 		if (*value < 0)
114*4882a593Smuzhiyun 			return *value;
115*4882a593Smuzhiyun 
116*4882a593Smuzhiyun 		return IIO_VAL_INT;
117*4882a593Smuzhiyun 	case IIO_CHAN_INFO_SCALE:
118*4882a593Smuzhiyun 		*value = regulator_get_voltage(adc->reg);
119*4882a593Smuzhiyun 		if (*value < 0)
120*4882a593Smuzhiyun 			return *value;
121*4882a593Smuzhiyun 
122*4882a593Smuzhiyun 		/* convert regulator output voltage to mV */
123*4882a593Smuzhiyun 		*value /= 1000;
124*4882a593Smuzhiyun 		*shift = 16;
125*4882a593Smuzhiyun 
126*4882a593Smuzhiyun 		return IIO_VAL_FRACTIONAL_LOG2;
127*4882a593Smuzhiyun 	default:
128*4882a593Smuzhiyun 		return -EINVAL;
129*4882a593Smuzhiyun 	}
130*4882a593Smuzhiyun }
131*4882a593Smuzhiyun 
132*4882a593Smuzhiyun static const struct iio_info ads8344_info = {
133*4882a593Smuzhiyun 	.read_raw = ads8344_read_raw,
134*4882a593Smuzhiyun };
135*4882a593Smuzhiyun 
ads8344_probe(struct spi_device * spi)136*4882a593Smuzhiyun static int ads8344_probe(struct spi_device *spi)
137*4882a593Smuzhiyun {
138*4882a593Smuzhiyun 	struct iio_dev *indio_dev;
139*4882a593Smuzhiyun 	struct ads8344 *adc;
140*4882a593Smuzhiyun 	int ret;
141*4882a593Smuzhiyun 
142*4882a593Smuzhiyun 	indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*adc));
143*4882a593Smuzhiyun 	if (!indio_dev)
144*4882a593Smuzhiyun 		return -ENOMEM;
145*4882a593Smuzhiyun 
146*4882a593Smuzhiyun 	adc = iio_priv(indio_dev);
147*4882a593Smuzhiyun 	adc->spi = spi;
148*4882a593Smuzhiyun 	mutex_init(&adc->lock);
149*4882a593Smuzhiyun 
150*4882a593Smuzhiyun 	indio_dev->name = dev_name(&spi->dev);
151*4882a593Smuzhiyun 	indio_dev->info = &ads8344_info;
152*4882a593Smuzhiyun 	indio_dev->modes = INDIO_DIRECT_MODE;
153*4882a593Smuzhiyun 	indio_dev->channels = ads8344_channels;
154*4882a593Smuzhiyun 	indio_dev->num_channels = ARRAY_SIZE(ads8344_channels);
155*4882a593Smuzhiyun 
156*4882a593Smuzhiyun 	adc->reg = devm_regulator_get(&spi->dev, "vref");
157*4882a593Smuzhiyun 	if (IS_ERR(adc->reg))
158*4882a593Smuzhiyun 		return PTR_ERR(adc->reg);
159*4882a593Smuzhiyun 
160*4882a593Smuzhiyun 	ret = regulator_enable(adc->reg);
161*4882a593Smuzhiyun 	if (ret)
162*4882a593Smuzhiyun 		return ret;
163*4882a593Smuzhiyun 
164*4882a593Smuzhiyun 	spi_set_drvdata(spi, indio_dev);
165*4882a593Smuzhiyun 
166*4882a593Smuzhiyun 	ret = iio_device_register(indio_dev);
167*4882a593Smuzhiyun 	if (ret) {
168*4882a593Smuzhiyun 		regulator_disable(adc->reg);
169*4882a593Smuzhiyun 		return ret;
170*4882a593Smuzhiyun 	}
171*4882a593Smuzhiyun 
172*4882a593Smuzhiyun 	return 0;
173*4882a593Smuzhiyun }
174*4882a593Smuzhiyun 
ads8344_remove(struct spi_device * spi)175*4882a593Smuzhiyun static int ads8344_remove(struct spi_device *spi)
176*4882a593Smuzhiyun {
177*4882a593Smuzhiyun 	struct iio_dev *indio_dev = spi_get_drvdata(spi);
178*4882a593Smuzhiyun 	struct ads8344 *adc = iio_priv(indio_dev);
179*4882a593Smuzhiyun 
180*4882a593Smuzhiyun 	iio_device_unregister(indio_dev);
181*4882a593Smuzhiyun 	regulator_disable(adc->reg);
182*4882a593Smuzhiyun 
183*4882a593Smuzhiyun 	return 0;
184*4882a593Smuzhiyun }
185*4882a593Smuzhiyun 
186*4882a593Smuzhiyun static const struct of_device_id ads8344_of_match[] = {
187*4882a593Smuzhiyun 	{ .compatible = "ti,ads8344", },
188*4882a593Smuzhiyun 	{}
189*4882a593Smuzhiyun };
190*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, ads8344_of_match);
191*4882a593Smuzhiyun 
192*4882a593Smuzhiyun static struct spi_driver ads8344_driver = {
193*4882a593Smuzhiyun 	.driver = {
194*4882a593Smuzhiyun 		.name = "ads8344",
195*4882a593Smuzhiyun 		.of_match_table = ads8344_of_match,
196*4882a593Smuzhiyun 	},
197*4882a593Smuzhiyun 	.probe = ads8344_probe,
198*4882a593Smuzhiyun 	.remove = ads8344_remove,
199*4882a593Smuzhiyun };
200*4882a593Smuzhiyun module_spi_driver(ads8344_driver);
201*4882a593Smuzhiyun 
202*4882a593Smuzhiyun MODULE_AUTHOR("Gregory CLEMENT <gregory.clement@bootlin.com>");
203*4882a593Smuzhiyun MODULE_DESCRIPTION("ADS8344 driver");
204*4882a593Smuzhiyun MODULE_LICENSE("GPL");
205