1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0+
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * ti-adc161s626.c - Texas Instruments ADC161S626 1-channel differential ADC
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * ADC Devices Supported:
6*4882a593Smuzhiyun * adc141s626 - 14-bit ADC
7*4882a593Smuzhiyun * adc161s626 - 16-bit ADC
8*4882a593Smuzhiyun *
9*4882a593Smuzhiyun * Copyright (C) 2016-2018
10*4882a593Smuzhiyun * Author: Matt Ranostay <matt.ranostay@konsulko.com>
11*4882a593Smuzhiyun */
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun #include <linux/module.h>
14*4882a593Smuzhiyun #include <linux/mod_devicetable.h>
15*4882a593Smuzhiyun #include <linux/init.h>
16*4882a593Smuzhiyun #include <linux/err.h>
17*4882a593Smuzhiyun #include <linux/spi/spi.h>
18*4882a593Smuzhiyun #include <linux/iio/iio.h>
19*4882a593Smuzhiyun #include <linux/iio/trigger.h>
20*4882a593Smuzhiyun #include <linux/iio/buffer.h>
21*4882a593Smuzhiyun #include <linux/iio/trigger_consumer.h>
22*4882a593Smuzhiyun #include <linux/iio/triggered_buffer.h>
23*4882a593Smuzhiyun #include <linux/regulator/consumer.h>
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun #define TI_ADC_DRV_NAME "ti-adc161s626"
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun enum {
28*4882a593Smuzhiyun TI_ADC141S626,
29*4882a593Smuzhiyun TI_ADC161S626,
30*4882a593Smuzhiyun };
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun static const struct iio_chan_spec ti_adc141s626_channels[] = {
33*4882a593Smuzhiyun {
34*4882a593Smuzhiyun .type = IIO_VOLTAGE,
35*4882a593Smuzhiyun .channel = 0,
36*4882a593Smuzhiyun .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
37*4882a593Smuzhiyun BIT(IIO_CHAN_INFO_SCALE) |
38*4882a593Smuzhiyun BIT(IIO_CHAN_INFO_OFFSET),
39*4882a593Smuzhiyun .scan_index = 0,
40*4882a593Smuzhiyun .scan_type = {
41*4882a593Smuzhiyun .sign = 's',
42*4882a593Smuzhiyun .realbits = 14,
43*4882a593Smuzhiyun .storagebits = 16,
44*4882a593Smuzhiyun },
45*4882a593Smuzhiyun },
46*4882a593Smuzhiyun IIO_CHAN_SOFT_TIMESTAMP(1),
47*4882a593Smuzhiyun };
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun static const struct iio_chan_spec ti_adc161s626_channels[] = {
50*4882a593Smuzhiyun {
51*4882a593Smuzhiyun .type = IIO_VOLTAGE,
52*4882a593Smuzhiyun .channel = 0,
53*4882a593Smuzhiyun .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
54*4882a593Smuzhiyun BIT(IIO_CHAN_INFO_SCALE) |
55*4882a593Smuzhiyun BIT(IIO_CHAN_INFO_OFFSET),
56*4882a593Smuzhiyun .scan_index = 0,
57*4882a593Smuzhiyun .scan_type = {
58*4882a593Smuzhiyun .sign = 's',
59*4882a593Smuzhiyun .realbits = 16,
60*4882a593Smuzhiyun .storagebits = 16,
61*4882a593Smuzhiyun },
62*4882a593Smuzhiyun },
63*4882a593Smuzhiyun IIO_CHAN_SOFT_TIMESTAMP(1),
64*4882a593Smuzhiyun };
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun struct ti_adc_data {
67*4882a593Smuzhiyun struct iio_dev *indio_dev;
68*4882a593Smuzhiyun struct spi_device *spi;
69*4882a593Smuzhiyun struct regulator *ref;
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun u8 read_size;
72*4882a593Smuzhiyun u8 shift;
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun u8 buffer[16] ____cacheline_aligned;
75*4882a593Smuzhiyun };
76*4882a593Smuzhiyun
ti_adc_read_measurement(struct ti_adc_data * data,struct iio_chan_spec const * chan,int * val)77*4882a593Smuzhiyun static int ti_adc_read_measurement(struct ti_adc_data *data,
78*4882a593Smuzhiyun struct iio_chan_spec const *chan, int *val)
79*4882a593Smuzhiyun {
80*4882a593Smuzhiyun int ret;
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun switch (data->read_size) {
83*4882a593Smuzhiyun case 2: {
84*4882a593Smuzhiyun __be16 buf;
85*4882a593Smuzhiyun
86*4882a593Smuzhiyun ret = spi_read(data->spi, (void *) &buf, 2);
87*4882a593Smuzhiyun if (ret)
88*4882a593Smuzhiyun return ret;
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun *val = be16_to_cpu(buf);
91*4882a593Smuzhiyun break;
92*4882a593Smuzhiyun }
93*4882a593Smuzhiyun case 3: {
94*4882a593Smuzhiyun __be32 buf;
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun ret = spi_read(data->spi, (void *) &buf, 3);
97*4882a593Smuzhiyun if (ret)
98*4882a593Smuzhiyun return ret;
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun *val = be32_to_cpu(buf) >> 8;
101*4882a593Smuzhiyun break;
102*4882a593Smuzhiyun }
103*4882a593Smuzhiyun default:
104*4882a593Smuzhiyun return -EINVAL;
105*4882a593Smuzhiyun }
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun *val = sign_extend32(*val >> data->shift, chan->scan_type.realbits - 1);
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun return 0;
110*4882a593Smuzhiyun }
111*4882a593Smuzhiyun
ti_adc_trigger_handler(int irq,void * private)112*4882a593Smuzhiyun static irqreturn_t ti_adc_trigger_handler(int irq, void *private)
113*4882a593Smuzhiyun {
114*4882a593Smuzhiyun struct iio_poll_func *pf = private;
115*4882a593Smuzhiyun struct iio_dev *indio_dev = pf->indio_dev;
116*4882a593Smuzhiyun struct ti_adc_data *data = iio_priv(indio_dev);
117*4882a593Smuzhiyun int ret;
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun ret = ti_adc_read_measurement(data, &indio_dev->channels[0],
120*4882a593Smuzhiyun (int *) &data->buffer);
121*4882a593Smuzhiyun if (!ret)
122*4882a593Smuzhiyun iio_push_to_buffers_with_timestamp(indio_dev,
123*4882a593Smuzhiyun data->buffer,
124*4882a593Smuzhiyun iio_get_time_ns(indio_dev));
125*4882a593Smuzhiyun
126*4882a593Smuzhiyun iio_trigger_notify_done(indio_dev->trig);
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun return IRQ_HANDLED;
129*4882a593Smuzhiyun }
130*4882a593Smuzhiyun
ti_adc_read_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int * val,int * val2,long mask)131*4882a593Smuzhiyun static int ti_adc_read_raw(struct iio_dev *indio_dev,
132*4882a593Smuzhiyun struct iio_chan_spec const *chan,
133*4882a593Smuzhiyun int *val, int *val2, long mask)
134*4882a593Smuzhiyun {
135*4882a593Smuzhiyun struct ti_adc_data *data = iio_priv(indio_dev);
136*4882a593Smuzhiyun int ret;
137*4882a593Smuzhiyun
138*4882a593Smuzhiyun switch (mask) {
139*4882a593Smuzhiyun case IIO_CHAN_INFO_RAW:
140*4882a593Smuzhiyun ret = iio_device_claim_direct_mode(indio_dev);
141*4882a593Smuzhiyun if (ret)
142*4882a593Smuzhiyun return ret;
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun ret = ti_adc_read_measurement(data, chan, val);
145*4882a593Smuzhiyun iio_device_release_direct_mode(indio_dev);
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun if (ret)
148*4882a593Smuzhiyun return ret;
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun return IIO_VAL_INT;
151*4882a593Smuzhiyun case IIO_CHAN_INFO_SCALE:
152*4882a593Smuzhiyun ret = regulator_get_voltage(data->ref);
153*4882a593Smuzhiyun if (ret < 0)
154*4882a593Smuzhiyun return ret;
155*4882a593Smuzhiyun
156*4882a593Smuzhiyun *val = ret / 1000;
157*4882a593Smuzhiyun *val2 = chan->scan_type.realbits;
158*4882a593Smuzhiyun
159*4882a593Smuzhiyun return IIO_VAL_FRACTIONAL_LOG2;
160*4882a593Smuzhiyun case IIO_CHAN_INFO_OFFSET:
161*4882a593Smuzhiyun *val = 1 << (chan->scan_type.realbits - 1);
162*4882a593Smuzhiyun return IIO_VAL_INT;
163*4882a593Smuzhiyun }
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun return 0;
166*4882a593Smuzhiyun }
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun static const struct iio_info ti_adc_info = {
169*4882a593Smuzhiyun .read_raw = ti_adc_read_raw,
170*4882a593Smuzhiyun };
171*4882a593Smuzhiyun
ti_adc_probe(struct spi_device * spi)172*4882a593Smuzhiyun static int ti_adc_probe(struct spi_device *spi)
173*4882a593Smuzhiyun {
174*4882a593Smuzhiyun struct iio_dev *indio_dev;
175*4882a593Smuzhiyun struct ti_adc_data *data;
176*4882a593Smuzhiyun int ret;
177*4882a593Smuzhiyun
178*4882a593Smuzhiyun indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*data));
179*4882a593Smuzhiyun if (!indio_dev)
180*4882a593Smuzhiyun return -ENOMEM;
181*4882a593Smuzhiyun
182*4882a593Smuzhiyun indio_dev->info = &ti_adc_info;
183*4882a593Smuzhiyun indio_dev->name = TI_ADC_DRV_NAME;
184*4882a593Smuzhiyun indio_dev->modes = INDIO_DIRECT_MODE;
185*4882a593Smuzhiyun spi_set_drvdata(spi, indio_dev);
186*4882a593Smuzhiyun
187*4882a593Smuzhiyun data = iio_priv(indio_dev);
188*4882a593Smuzhiyun data->spi = spi;
189*4882a593Smuzhiyun
190*4882a593Smuzhiyun switch (spi_get_device_id(spi)->driver_data) {
191*4882a593Smuzhiyun case TI_ADC141S626:
192*4882a593Smuzhiyun indio_dev->channels = ti_adc141s626_channels;
193*4882a593Smuzhiyun indio_dev->num_channels = ARRAY_SIZE(ti_adc141s626_channels);
194*4882a593Smuzhiyun data->shift = 0;
195*4882a593Smuzhiyun data->read_size = 2;
196*4882a593Smuzhiyun break;
197*4882a593Smuzhiyun case TI_ADC161S626:
198*4882a593Smuzhiyun indio_dev->channels = ti_adc161s626_channels;
199*4882a593Smuzhiyun indio_dev->num_channels = ARRAY_SIZE(ti_adc161s626_channels);
200*4882a593Smuzhiyun data->shift = 6;
201*4882a593Smuzhiyun data->read_size = 3;
202*4882a593Smuzhiyun break;
203*4882a593Smuzhiyun }
204*4882a593Smuzhiyun
205*4882a593Smuzhiyun data->ref = devm_regulator_get(&spi->dev, "vdda");
206*4882a593Smuzhiyun if (!IS_ERR(data->ref)) {
207*4882a593Smuzhiyun ret = regulator_enable(data->ref);
208*4882a593Smuzhiyun if (ret < 0)
209*4882a593Smuzhiyun return ret;
210*4882a593Smuzhiyun }
211*4882a593Smuzhiyun
212*4882a593Smuzhiyun ret = iio_triggered_buffer_setup(indio_dev, NULL,
213*4882a593Smuzhiyun ti_adc_trigger_handler, NULL);
214*4882a593Smuzhiyun if (ret)
215*4882a593Smuzhiyun goto error_regulator_disable;
216*4882a593Smuzhiyun
217*4882a593Smuzhiyun ret = iio_device_register(indio_dev);
218*4882a593Smuzhiyun if (ret)
219*4882a593Smuzhiyun goto error_unreg_buffer;
220*4882a593Smuzhiyun
221*4882a593Smuzhiyun return 0;
222*4882a593Smuzhiyun
223*4882a593Smuzhiyun error_unreg_buffer:
224*4882a593Smuzhiyun iio_triggered_buffer_cleanup(indio_dev);
225*4882a593Smuzhiyun
226*4882a593Smuzhiyun error_regulator_disable:
227*4882a593Smuzhiyun regulator_disable(data->ref);
228*4882a593Smuzhiyun
229*4882a593Smuzhiyun return ret;
230*4882a593Smuzhiyun }
231*4882a593Smuzhiyun
ti_adc_remove(struct spi_device * spi)232*4882a593Smuzhiyun static int ti_adc_remove(struct spi_device *spi)
233*4882a593Smuzhiyun {
234*4882a593Smuzhiyun struct iio_dev *indio_dev = spi_get_drvdata(spi);
235*4882a593Smuzhiyun struct ti_adc_data *data = iio_priv(indio_dev);
236*4882a593Smuzhiyun
237*4882a593Smuzhiyun iio_device_unregister(indio_dev);
238*4882a593Smuzhiyun iio_triggered_buffer_cleanup(indio_dev);
239*4882a593Smuzhiyun regulator_disable(data->ref);
240*4882a593Smuzhiyun
241*4882a593Smuzhiyun return 0;
242*4882a593Smuzhiyun }
243*4882a593Smuzhiyun
244*4882a593Smuzhiyun static const struct of_device_id ti_adc_dt_ids[] = {
245*4882a593Smuzhiyun { .compatible = "ti,adc141s626", },
246*4882a593Smuzhiyun { .compatible = "ti,adc161s626", },
247*4882a593Smuzhiyun {}
248*4882a593Smuzhiyun };
249*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, ti_adc_dt_ids);
250*4882a593Smuzhiyun
251*4882a593Smuzhiyun static const struct spi_device_id ti_adc_id[] = {
252*4882a593Smuzhiyun {"adc141s626", TI_ADC141S626},
253*4882a593Smuzhiyun {"adc161s626", TI_ADC161S626},
254*4882a593Smuzhiyun {},
255*4882a593Smuzhiyun };
256*4882a593Smuzhiyun MODULE_DEVICE_TABLE(spi, ti_adc_id);
257*4882a593Smuzhiyun
258*4882a593Smuzhiyun static struct spi_driver ti_adc_driver = {
259*4882a593Smuzhiyun .driver = {
260*4882a593Smuzhiyun .name = TI_ADC_DRV_NAME,
261*4882a593Smuzhiyun .of_match_table = ti_adc_dt_ids,
262*4882a593Smuzhiyun },
263*4882a593Smuzhiyun .probe = ti_adc_probe,
264*4882a593Smuzhiyun .remove = ti_adc_remove,
265*4882a593Smuzhiyun .id_table = ti_adc_id,
266*4882a593Smuzhiyun };
267*4882a593Smuzhiyun module_spi_driver(ti_adc_driver);
268*4882a593Smuzhiyun
269*4882a593Smuzhiyun MODULE_AUTHOR("Matt Ranostay <matt.ranostay@konsulko.com>");
270*4882a593Smuzhiyun MODULE_DESCRIPTION("Texas Instruments ADC1x1S 1-channel differential ADC");
271*4882a593Smuzhiyun MODULE_LICENSE("GPL");
272