xref: /OK3568_Linux_fs/kernel/drivers/iio/adc/men_z188_adc.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * MEN 16z188 Analog to Digial Converter
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (C) 2014 MEN Mikroelektronik GmbH (www.men.de)
6*4882a593Smuzhiyun  * Author: Johannes Thumshirn <johannes.thumshirn@men.de>
7*4882a593Smuzhiyun  */
8*4882a593Smuzhiyun 
9*4882a593Smuzhiyun #include <linux/kernel.h>
10*4882a593Smuzhiyun #include <linux/module.h>
11*4882a593Smuzhiyun #include <linux/mcb.h>
12*4882a593Smuzhiyun #include <linux/io.h>
13*4882a593Smuzhiyun #include <linux/iio/iio.h>
14*4882a593Smuzhiyun 
15*4882a593Smuzhiyun #define Z188_ADC_MAX_CHAN	8
16*4882a593Smuzhiyun #define Z188_ADC_GAIN		0x0700000
17*4882a593Smuzhiyun #define Z188_MODE_VOLTAGE	BIT(27)
18*4882a593Smuzhiyun #define Z188_CFG_AUTO		0x1
19*4882a593Smuzhiyun #define Z188_CTRL_REG		0x40
20*4882a593Smuzhiyun 
21*4882a593Smuzhiyun #define ADC_DATA(x) (((x) >> 2) & 0x7ffffc)
22*4882a593Smuzhiyun #define ADC_OVR(x) ((x) & 0x1)
23*4882a593Smuzhiyun 
24*4882a593Smuzhiyun struct z188_adc {
25*4882a593Smuzhiyun 	struct resource *mem;
26*4882a593Smuzhiyun 	void __iomem *base;
27*4882a593Smuzhiyun };
28*4882a593Smuzhiyun 
29*4882a593Smuzhiyun #define Z188_ADC_CHANNEL(idx) {					\
30*4882a593Smuzhiyun 		.type = IIO_VOLTAGE,				\
31*4882a593Smuzhiyun 		.indexed = 1,					\
32*4882a593Smuzhiyun 		.channel = (idx),				\
33*4882a593Smuzhiyun 		.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),   \
34*4882a593Smuzhiyun }
35*4882a593Smuzhiyun 
36*4882a593Smuzhiyun static const struct iio_chan_spec z188_adc_iio_channels[] = {
37*4882a593Smuzhiyun 	Z188_ADC_CHANNEL(0),
38*4882a593Smuzhiyun 	Z188_ADC_CHANNEL(1),
39*4882a593Smuzhiyun 	Z188_ADC_CHANNEL(2),
40*4882a593Smuzhiyun 	Z188_ADC_CHANNEL(3),
41*4882a593Smuzhiyun 	Z188_ADC_CHANNEL(4),
42*4882a593Smuzhiyun 	Z188_ADC_CHANNEL(5),
43*4882a593Smuzhiyun 	Z188_ADC_CHANNEL(6),
44*4882a593Smuzhiyun 	Z188_ADC_CHANNEL(7),
45*4882a593Smuzhiyun };
46*4882a593Smuzhiyun 
z188_iio_read_raw(struct iio_dev * iio_dev,struct iio_chan_spec const * chan,int * val,int * val2,long info)47*4882a593Smuzhiyun static int z188_iio_read_raw(struct iio_dev *iio_dev,
48*4882a593Smuzhiyun 			struct iio_chan_spec const *chan,
49*4882a593Smuzhiyun 			int *val,
50*4882a593Smuzhiyun 			int *val2,
51*4882a593Smuzhiyun 			long info)
52*4882a593Smuzhiyun {
53*4882a593Smuzhiyun 	struct z188_adc *adc = iio_priv(iio_dev);
54*4882a593Smuzhiyun 	int ret;
55*4882a593Smuzhiyun 	u16 tmp;
56*4882a593Smuzhiyun 
57*4882a593Smuzhiyun 	switch (info) {
58*4882a593Smuzhiyun 	case IIO_CHAN_INFO_RAW:
59*4882a593Smuzhiyun 		tmp = readw(adc->base + chan->channel * 4);
60*4882a593Smuzhiyun 
61*4882a593Smuzhiyun 		if (ADC_OVR(tmp)) {
62*4882a593Smuzhiyun 			dev_info(&iio_dev->dev,
63*4882a593Smuzhiyun 				"Oversampling error on ADC channel %d\n",
64*4882a593Smuzhiyun 				chan->channel);
65*4882a593Smuzhiyun 			return -EIO;
66*4882a593Smuzhiyun 		}
67*4882a593Smuzhiyun 		*val = ADC_DATA(tmp);
68*4882a593Smuzhiyun 		ret = IIO_VAL_INT;
69*4882a593Smuzhiyun 		break;
70*4882a593Smuzhiyun 	default:
71*4882a593Smuzhiyun 		ret = -EINVAL;
72*4882a593Smuzhiyun 		break;
73*4882a593Smuzhiyun 	}
74*4882a593Smuzhiyun 
75*4882a593Smuzhiyun 	return ret;
76*4882a593Smuzhiyun }
77*4882a593Smuzhiyun 
78*4882a593Smuzhiyun static const struct iio_info z188_adc_info = {
79*4882a593Smuzhiyun 	.read_raw = &z188_iio_read_raw,
80*4882a593Smuzhiyun };
81*4882a593Smuzhiyun 
men_z188_config_channels(void __iomem * addr)82*4882a593Smuzhiyun static void men_z188_config_channels(void __iomem *addr)
83*4882a593Smuzhiyun {
84*4882a593Smuzhiyun 	int i;
85*4882a593Smuzhiyun 	u32 cfg;
86*4882a593Smuzhiyun 	u32 ctl;
87*4882a593Smuzhiyun 
88*4882a593Smuzhiyun 	ctl = readl(addr + Z188_CTRL_REG);
89*4882a593Smuzhiyun 	ctl |= Z188_CFG_AUTO;
90*4882a593Smuzhiyun 	writel(ctl, addr + Z188_CTRL_REG);
91*4882a593Smuzhiyun 
92*4882a593Smuzhiyun 	for (i = 0; i < Z188_ADC_MAX_CHAN; i++) {
93*4882a593Smuzhiyun 		cfg = readl(addr + i);
94*4882a593Smuzhiyun 		cfg &= ~Z188_ADC_GAIN;
95*4882a593Smuzhiyun 		cfg |= Z188_MODE_VOLTAGE;
96*4882a593Smuzhiyun 		writel(cfg, addr + i);
97*4882a593Smuzhiyun 	}
98*4882a593Smuzhiyun }
99*4882a593Smuzhiyun 
men_z188_probe(struct mcb_device * dev,const struct mcb_device_id * id)100*4882a593Smuzhiyun static int men_z188_probe(struct mcb_device *dev,
101*4882a593Smuzhiyun 			const struct mcb_device_id *id)
102*4882a593Smuzhiyun {
103*4882a593Smuzhiyun 	struct z188_adc *adc;
104*4882a593Smuzhiyun 	struct iio_dev *indio_dev;
105*4882a593Smuzhiyun 	struct resource *mem;
106*4882a593Smuzhiyun 	int ret;
107*4882a593Smuzhiyun 
108*4882a593Smuzhiyun 	indio_dev = devm_iio_device_alloc(&dev->dev, sizeof(struct z188_adc));
109*4882a593Smuzhiyun 	if (!indio_dev)
110*4882a593Smuzhiyun 		return -ENOMEM;
111*4882a593Smuzhiyun 
112*4882a593Smuzhiyun 	adc = iio_priv(indio_dev);
113*4882a593Smuzhiyun 	indio_dev->name = "z188-adc";
114*4882a593Smuzhiyun 	indio_dev->info = &z188_adc_info;
115*4882a593Smuzhiyun 	indio_dev->modes = INDIO_DIRECT_MODE;
116*4882a593Smuzhiyun 	indio_dev->channels = z188_adc_iio_channels;
117*4882a593Smuzhiyun 	indio_dev->num_channels = ARRAY_SIZE(z188_adc_iio_channels);
118*4882a593Smuzhiyun 
119*4882a593Smuzhiyun 	mem = mcb_request_mem(dev, "z188-adc");
120*4882a593Smuzhiyun 	if (IS_ERR(mem))
121*4882a593Smuzhiyun 		return PTR_ERR(mem);
122*4882a593Smuzhiyun 
123*4882a593Smuzhiyun 	adc->base = ioremap(mem->start, resource_size(mem));
124*4882a593Smuzhiyun 	if (adc->base == NULL)
125*4882a593Smuzhiyun 		goto err;
126*4882a593Smuzhiyun 
127*4882a593Smuzhiyun 	men_z188_config_channels(adc->base);
128*4882a593Smuzhiyun 
129*4882a593Smuzhiyun 	adc->mem = mem;
130*4882a593Smuzhiyun 	mcb_set_drvdata(dev, indio_dev);
131*4882a593Smuzhiyun 
132*4882a593Smuzhiyun 	ret = iio_device_register(indio_dev);
133*4882a593Smuzhiyun 	if (ret)
134*4882a593Smuzhiyun 		goto err_unmap;
135*4882a593Smuzhiyun 
136*4882a593Smuzhiyun 	return 0;
137*4882a593Smuzhiyun 
138*4882a593Smuzhiyun err_unmap:
139*4882a593Smuzhiyun 	iounmap(adc->base);
140*4882a593Smuzhiyun err:
141*4882a593Smuzhiyun 	mcb_release_mem(mem);
142*4882a593Smuzhiyun 	return -ENXIO;
143*4882a593Smuzhiyun }
144*4882a593Smuzhiyun 
men_z188_remove(struct mcb_device * dev)145*4882a593Smuzhiyun static void men_z188_remove(struct mcb_device *dev)
146*4882a593Smuzhiyun {
147*4882a593Smuzhiyun 	struct iio_dev *indio_dev  = mcb_get_drvdata(dev);
148*4882a593Smuzhiyun 	struct z188_adc *adc = iio_priv(indio_dev);
149*4882a593Smuzhiyun 
150*4882a593Smuzhiyun 	iio_device_unregister(indio_dev);
151*4882a593Smuzhiyun 	iounmap(adc->base);
152*4882a593Smuzhiyun 	mcb_release_mem(adc->mem);
153*4882a593Smuzhiyun }
154*4882a593Smuzhiyun 
155*4882a593Smuzhiyun static const struct mcb_device_id men_z188_ids[] = {
156*4882a593Smuzhiyun 	{ .device = 0xbc },
157*4882a593Smuzhiyun 	{ }
158*4882a593Smuzhiyun };
159*4882a593Smuzhiyun MODULE_DEVICE_TABLE(mcb, men_z188_ids);
160*4882a593Smuzhiyun 
161*4882a593Smuzhiyun static struct mcb_driver men_z188_driver = {
162*4882a593Smuzhiyun 	.driver = {
163*4882a593Smuzhiyun 		.name = "z188-adc",
164*4882a593Smuzhiyun 		.owner = THIS_MODULE,
165*4882a593Smuzhiyun 	},
166*4882a593Smuzhiyun 	.probe = men_z188_probe,
167*4882a593Smuzhiyun 	.remove = men_z188_remove,
168*4882a593Smuzhiyun 	.id_table = men_z188_ids,
169*4882a593Smuzhiyun };
170*4882a593Smuzhiyun module_mcb_driver(men_z188_driver);
171*4882a593Smuzhiyun 
172*4882a593Smuzhiyun MODULE_AUTHOR("Johannes Thumshirn <johannes.thumshirn@men.de>");
173*4882a593Smuzhiyun MODULE_LICENSE("GPL");
174*4882a593Smuzhiyun MODULE_DESCRIPTION("IIO ADC driver for MEN 16z188 ADC Core");
175*4882a593Smuzhiyun MODULE_ALIAS("mcb:16z188");
176*4882a593Smuzhiyun MODULE_IMPORT_NS(MCB);
177