1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * iio/adc/max9611.c
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Maxim max9611/max9612 high side current sense amplifier with
6*4882a593Smuzhiyun * 12-bit ADC interface.
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * Copyright (C) 2017 Jacopo Mondi
9*4882a593Smuzhiyun */
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun /*
12*4882a593Smuzhiyun * This driver supports input common-mode voltage, current-sense
13*4882a593Smuzhiyun * amplifier with programmable gains and die temperature reading from
14*4882a593Smuzhiyun * Maxim max9611/max9612.
15*4882a593Smuzhiyun *
16*4882a593Smuzhiyun * Op-amp, analog comparator, and watchdog functionalities are not
17*4882a593Smuzhiyun * supported by this driver.
18*4882a593Smuzhiyun */
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun #include <linux/delay.h>
21*4882a593Smuzhiyun #include <linux/i2c.h>
22*4882a593Smuzhiyun #include <linux/iio/iio.h>
23*4882a593Smuzhiyun #include <linux/iio/sysfs.h>
24*4882a593Smuzhiyun #include <linux/module.h>
25*4882a593Smuzhiyun #include <linux/of_device.h>
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun #define DRIVER_NAME "max9611"
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun /* max9611 register addresses */
30*4882a593Smuzhiyun #define MAX9611_REG_CSA_DATA 0x00
31*4882a593Smuzhiyun #define MAX9611_REG_RS_DATA 0x02
32*4882a593Smuzhiyun #define MAX9611_REG_TEMP_DATA 0x08
33*4882a593Smuzhiyun #define MAX9611_REG_CTRL1 0x0a
34*4882a593Smuzhiyun #define MAX9611_REG_CTRL2 0x0b
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun /* max9611 REG1 mux configuration options */
37*4882a593Smuzhiyun #define MAX9611_MUX_MASK GENMASK(3, 0)
38*4882a593Smuzhiyun #define MAX9611_MUX_SENSE_1x 0x00
39*4882a593Smuzhiyun #define MAX9611_MUX_SENSE_4x 0x01
40*4882a593Smuzhiyun #define MAX9611_MUX_SENSE_8x 0x02
41*4882a593Smuzhiyun #define MAX9611_INPUT_VOLT 0x03
42*4882a593Smuzhiyun #define MAX9611_MUX_TEMP 0x06
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun /* max9611 voltage (both csa and input) helper macros */
45*4882a593Smuzhiyun #define MAX9611_VOLTAGE_SHIFT 0x04
46*4882a593Smuzhiyun #define MAX9611_VOLTAGE_RAW(_r) ((_r) >> MAX9611_VOLTAGE_SHIFT)
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun /*
49*4882a593Smuzhiyun * max9611 current sense amplifier voltage output:
50*4882a593Smuzhiyun * LSB and offset values depends on selected gain (1x, 4x, 8x)
51*4882a593Smuzhiyun *
52*4882a593Smuzhiyun * GAIN LSB (nV) OFFSET (LSB steps)
53*4882a593Smuzhiyun * 1x 107500 1
54*4882a593Smuzhiyun * 4x 26880 1
55*4882a593Smuzhiyun * 8x 13440 3
56*4882a593Smuzhiyun *
57*4882a593Smuzhiyun * The complete formula to calculate current sense voltage is:
58*4882a593Smuzhiyun * (((adc_read >> 4) - offset) / ((1 / LSB) * 10^-3)
59*4882a593Smuzhiyun */
60*4882a593Smuzhiyun #define MAX9611_CSA_1X_LSB_nV 107500
61*4882a593Smuzhiyun #define MAX9611_CSA_4X_LSB_nV 26880
62*4882a593Smuzhiyun #define MAX9611_CSA_8X_LSB_nV 13440
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun #define MAX9611_CSA_1X_OFFS_RAW 1
65*4882a593Smuzhiyun #define MAX9611_CSA_4X_OFFS_RAW 1
66*4882a593Smuzhiyun #define MAX9611_CSA_8X_OFFS_RAW 3
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun /*
69*4882a593Smuzhiyun * max9611 common input mode (CIM): LSB is 14mV, with 14mV offset at 25 C
70*4882a593Smuzhiyun *
71*4882a593Smuzhiyun * The complete formula to calculate input common voltage is:
72*4882a593Smuzhiyun * (((adc_read >> 4) * 1000) - offset) / (1 / 14 * 1000)
73*4882a593Smuzhiyun */
74*4882a593Smuzhiyun #define MAX9611_CIM_LSB_mV 14
75*4882a593Smuzhiyun #define MAX9611_CIM_OFFSET_RAW 1
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun /*
78*4882a593Smuzhiyun * max9611 temperature reading: LSB is 480 milli degrees Celsius
79*4882a593Smuzhiyun *
80*4882a593Smuzhiyun * The complete formula to calculate temperature is:
81*4882a593Smuzhiyun * ((adc_read >> 7) * 1000) / (1 / 480 * 1000)
82*4882a593Smuzhiyun */
83*4882a593Smuzhiyun #define MAX9611_TEMP_MAX_POS 0x7f80
84*4882a593Smuzhiyun #define MAX9611_TEMP_MAX_NEG 0xff80
85*4882a593Smuzhiyun #define MAX9611_TEMP_MIN_NEG 0xd980
86*4882a593Smuzhiyun #define MAX9611_TEMP_MASK GENMASK(15, 7)
87*4882a593Smuzhiyun #define MAX9611_TEMP_SHIFT 0x07
88*4882a593Smuzhiyun #define MAX9611_TEMP_RAW(_r) ((_r) >> MAX9611_TEMP_SHIFT)
89*4882a593Smuzhiyun #define MAX9611_TEMP_SCALE_NUM 1000000
90*4882a593Smuzhiyun #define MAX9611_TEMP_SCALE_DIV 2083
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun /*
93*4882a593Smuzhiyun * Conversion time is 2 ms (typically) at Ta=25 degreeC
94*4882a593Smuzhiyun * No maximum value is known, so play it safe.
95*4882a593Smuzhiyun */
96*4882a593Smuzhiyun #define MAX9611_CONV_TIME_US_RANGE 3000, 3300
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun struct max9611_dev {
99*4882a593Smuzhiyun struct device *dev;
100*4882a593Smuzhiyun struct i2c_client *i2c_client;
101*4882a593Smuzhiyun struct mutex lock;
102*4882a593Smuzhiyun unsigned int shunt_resistor_uohm;
103*4882a593Smuzhiyun };
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun enum max9611_conf_ids {
106*4882a593Smuzhiyun CONF_SENSE_1x,
107*4882a593Smuzhiyun CONF_SENSE_4x,
108*4882a593Smuzhiyun CONF_SENSE_8x,
109*4882a593Smuzhiyun CONF_IN_VOLT,
110*4882a593Smuzhiyun CONF_TEMP,
111*4882a593Smuzhiyun };
112*4882a593Smuzhiyun
113*4882a593Smuzhiyun /*
114*4882a593Smuzhiyun * max9611_mux_conf - associate ADC mux configuration with register address
115*4882a593Smuzhiyun * where data shall be read from
116*4882a593Smuzhiyun */
117*4882a593Smuzhiyun static const unsigned int max9611_mux_conf[][2] = {
118*4882a593Smuzhiyun [CONF_SENSE_1x] = { MAX9611_MUX_SENSE_1x, MAX9611_REG_CSA_DATA },
119*4882a593Smuzhiyun [CONF_SENSE_4x] = { MAX9611_MUX_SENSE_4x, MAX9611_REG_CSA_DATA },
120*4882a593Smuzhiyun [CONF_SENSE_8x] = { MAX9611_MUX_SENSE_8x, MAX9611_REG_CSA_DATA },
121*4882a593Smuzhiyun [CONF_IN_VOLT] = { MAX9611_INPUT_VOLT, MAX9611_REG_RS_DATA },
122*4882a593Smuzhiyun [CONF_TEMP] = { MAX9611_MUX_TEMP, MAX9611_REG_TEMP_DATA },
123*4882a593Smuzhiyun };
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun enum max9611_csa_gain {
126*4882a593Smuzhiyun CSA_GAIN_1x = CONF_SENSE_1x,
127*4882a593Smuzhiyun CSA_GAIN_4x = CONF_SENSE_4x,
128*4882a593Smuzhiyun CSA_GAIN_8x = CONF_SENSE_8x,
129*4882a593Smuzhiyun };
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun enum max9611_csa_gain_params {
132*4882a593Smuzhiyun CSA_GAIN_LSB_nV,
133*4882a593Smuzhiyun CSA_GAIN_OFFS_RAW,
134*4882a593Smuzhiyun };
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun /*
137*4882a593Smuzhiyun * max9611_csa_gain_conf - associate gain multiplier with LSB and
138*4882a593Smuzhiyun * offset values.
139*4882a593Smuzhiyun *
140*4882a593Smuzhiyun * Group together parameters associated with configurable gain
141*4882a593Smuzhiyun * on current sense amplifier path to ADC interface.
142*4882a593Smuzhiyun * Current sense read routine adjusts gain until it gets a meaningful
143*4882a593Smuzhiyun * value; use this structure to retrieve the correct LSB and offset values.
144*4882a593Smuzhiyun */
145*4882a593Smuzhiyun static const unsigned int max9611_gain_conf[][2] = {
146*4882a593Smuzhiyun [CSA_GAIN_1x] = { MAX9611_CSA_1X_LSB_nV, MAX9611_CSA_1X_OFFS_RAW, },
147*4882a593Smuzhiyun [CSA_GAIN_4x] = { MAX9611_CSA_4X_LSB_nV, MAX9611_CSA_4X_OFFS_RAW, },
148*4882a593Smuzhiyun [CSA_GAIN_8x] = { MAX9611_CSA_8X_LSB_nV, MAX9611_CSA_8X_OFFS_RAW, },
149*4882a593Smuzhiyun };
150*4882a593Smuzhiyun
151*4882a593Smuzhiyun enum max9611_chan_addrs {
152*4882a593Smuzhiyun MAX9611_CHAN_VOLTAGE_INPUT,
153*4882a593Smuzhiyun MAX9611_CHAN_VOLTAGE_SENSE,
154*4882a593Smuzhiyun MAX9611_CHAN_TEMPERATURE,
155*4882a593Smuzhiyun MAX9611_CHAN_CURRENT_LOAD,
156*4882a593Smuzhiyun MAX9611_CHAN_POWER_LOAD,
157*4882a593Smuzhiyun };
158*4882a593Smuzhiyun
159*4882a593Smuzhiyun static const struct iio_chan_spec max9611_channels[] = {
160*4882a593Smuzhiyun {
161*4882a593Smuzhiyun .type = IIO_TEMP,
162*4882a593Smuzhiyun .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
163*4882a593Smuzhiyun BIT(IIO_CHAN_INFO_SCALE),
164*4882a593Smuzhiyun .address = MAX9611_CHAN_TEMPERATURE,
165*4882a593Smuzhiyun },
166*4882a593Smuzhiyun {
167*4882a593Smuzhiyun .type = IIO_VOLTAGE,
168*4882a593Smuzhiyun .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED),
169*4882a593Smuzhiyun .address = MAX9611_CHAN_VOLTAGE_SENSE,
170*4882a593Smuzhiyun .indexed = 1,
171*4882a593Smuzhiyun .channel = 0,
172*4882a593Smuzhiyun },
173*4882a593Smuzhiyun {
174*4882a593Smuzhiyun .type = IIO_VOLTAGE,
175*4882a593Smuzhiyun .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
176*4882a593Smuzhiyun BIT(IIO_CHAN_INFO_SCALE) |
177*4882a593Smuzhiyun BIT(IIO_CHAN_INFO_OFFSET),
178*4882a593Smuzhiyun .address = MAX9611_CHAN_VOLTAGE_INPUT,
179*4882a593Smuzhiyun .indexed = 1,
180*4882a593Smuzhiyun .channel = 1,
181*4882a593Smuzhiyun },
182*4882a593Smuzhiyun {
183*4882a593Smuzhiyun .type = IIO_CURRENT,
184*4882a593Smuzhiyun .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED),
185*4882a593Smuzhiyun .address = MAX9611_CHAN_CURRENT_LOAD,
186*4882a593Smuzhiyun },
187*4882a593Smuzhiyun {
188*4882a593Smuzhiyun .type = IIO_POWER,
189*4882a593Smuzhiyun .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED),
190*4882a593Smuzhiyun .address = MAX9611_CHAN_POWER_LOAD
191*4882a593Smuzhiyun },
192*4882a593Smuzhiyun };
193*4882a593Smuzhiyun
194*4882a593Smuzhiyun /**
195*4882a593Smuzhiyun * max9611_read_single() - read a single value from ADC interface
196*4882a593Smuzhiyun *
197*4882a593Smuzhiyun * Data registers are 16 bit long, spread between two 8 bit registers
198*4882a593Smuzhiyun * with consecutive addresses.
199*4882a593Smuzhiyun * Configure ADC mux first, then read register at address "reg_addr".
200*4882a593Smuzhiyun * The smbus_read_word routine asks for 16 bits and the ADC is kind enough
201*4882a593Smuzhiyun * to return values from "reg_addr" and "reg_addr + 1" consecutively.
202*4882a593Smuzhiyun * Data are transmitted with big-endian ordering: MSB arrives first.
203*4882a593Smuzhiyun *
204*4882a593Smuzhiyun * @max9611: max9611 device
205*4882a593Smuzhiyun * @selector: index for mux and register configuration
206*4882a593Smuzhiyun * @raw_val: the value returned from ADC
207*4882a593Smuzhiyun */
max9611_read_single(struct max9611_dev * max9611,enum max9611_conf_ids selector,u16 * raw_val)208*4882a593Smuzhiyun static int max9611_read_single(struct max9611_dev *max9611,
209*4882a593Smuzhiyun enum max9611_conf_ids selector,
210*4882a593Smuzhiyun u16 *raw_val)
211*4882a593Smuzhiyun {
212*4882a593Smuzhiyun int ret;
213*4882a593Smuzhiyun
214*4882a593Smuzhiyun u8 mux_conf = max9611_mux_conf[selector][0] & MAX9611_MUX_MASK;
215*4882a593Smuzhiyun u8 reg_addr = max9611_mux_conf[selector][1];
216*4882a593Smuzhiyun
217*4882a593Smuzhiyun /*
218*4882a593Smuzhiyun * Keep mutex lock held during read-write to avoid mux register
219*4882a593Smuzhiyun * (CTRL1) re-configuration.
220*4882a593Smuzhiyun */
221*4882a593Smuzhiyun mutex_lock(&max9611->lock);
222*4882a593Smuzhiyun ret = i2c_smbus_write_byte_data(max9611->i2c_client,
223*4882a593Smuzhiyun MAX9611_REG_CTRL1, mux_conf);
224*4882a593Smuzhiyun if (ret) {
225*4882a593Smuzhiyun dev_err(max9611->dev, "i2c write byte failed: 0x%2x - 0x%2x\n",
226*4882a593Smuzhiyun MAX9611_REG_CTRL1, mux_conf);
227*4882a593Smuzhiyun mutex_unlock(&max9611->lock);
228*4882a593Smuzhiyun return ret;
229*4882a593Smuzhiyun }
230*4882a593Smuzhiyun
231*4882a593Smuzhiyun /* need a delay here to make register configuration stabilize. */
232*4882a593Smuzhiyun
233*4882a593Smuzhiyun usleep_range(MAX9611_CONV_TIME_US_RANGE);
234*4882a593Smuzhiyun
235*4882a593Smuzhiyun ret = i2c_smbus_read_word_swapped(max9611->i2c_client, reg_addr);
236*4882a593Smuzhiyun if (ret < 0) {
237*4882a593Smuzhiyun dev_err(max9611->dev, "i2c read word from 0x%2x failed\n",
238*4882a593Smuzhiyun reg_addr);
239*4882a593Smuzhiyun mutex_unlock(&max9611->lock);
240*4882a593Smuzhiyun return ret;
241*4882a593Smuzhiyun }
242*4882a593Smuzhiyun
243*4882a593Smuzhiyun *raw_val = ret;
244*4882a593Smuzhiyun mutex_unlock(&max9611->lock);
245*4882a593Smuzhiyun
246*4882a593Smuzhiyun return 0;
247*4882a593Smuzhiyun }
248*4882a593Smuzhiyun
249*4882a593Smuzhiyun /**
250*4882a593Smuzhiyun * max9611_read_csa_voltage() - read current sense amplifier output voltage
251*4882a593Smuzhiyun *
252*4882a593Smuzhiyun * Current sense amplifier output voltage is read through a configurable
253*4882a593Smuzhiyun * 1x, 4x or 8x gain.
254*4882a593Smuzhiyun * Start with plain 1x gain, and adjust gain control properly until a
255*4882a593Smuzhiyun * meaningful value is read from ADC output.
256*4882a593Smuzhiyun *
257*4882a593Smuzhiyun * @max9611: max9611 device
258*4882a593Smuzhiyun * @adc_raw: raw value read from ADC output
259*4882a593Smuzhiyun * @csa_gain: gain configuration option selector
260*4882a593Smuzhiyun */
max9611_read_csa_voltage(struct max9611_dev * max9611,u16 * adc_raw,enum max9611_csa_gain * csa_gain)261*4882a593Smuzhiyun static int max9611_read_csa_voltage(struct max9611_dev *max9611,
262*4882a593Smuzhiyun u16 *adc_raw,
263*4882a593Smuzhiyun enum max9611_csa_gain *csa_gain)
264*4882a593Smuzhiyun {
265*4882a593Smuzhiyun enum max9611_conf_ids gain_selectors[] = {
266*4882a593Smuzhiyun CONF_SENSE_1x,
267*4882a593Smuzhiyun CONF_SENSE_4x,
268*4882a593Smuzhiyun CONF_SENSE_8x
269*4882a593Smuzhiyun };
270*4882a593Smuzhiyun unsigned int i;
271*4882a593Smuzhiyun int ret;
272*4882a593Smuzhiyun
273*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(gain_selectors); ++i) {
274*4882a593Smuzhiyun ret = max9611_read_single(max9611, gain_selectors[i], adc_raw);
275*4882a593Smuzhiyun if (ret)
276*4882a593Smuzhiyun return ret;
277*4882a593Smuzhiyun
278*4882a593Smuzhiyun if (*adc_raw > 0) {
279*4882a593Smuzhiyun *csa_gain = (enum max9611_csa_gain)gain_selectors[i];
280*4882a593Smuzhiyun return 0;
281*4882a593Smuzhiyun }
282*4882a593Smuzhiyun }
283*4882a593Smuzhiyun
284*4882a593Smuzhiyun return -EIO;
285*4882a593Smuzhiyun }
286*4882a593Smuzhiyun
max9611_read_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int * val,int * val2,long mask)287*4882a593Smuzhiyun static int max9611_read_raw(struct iio_dev *indio_dev,
288*4882a593Smuzhiyun struct iio_chan_spec const *chan,
289*4882a593Smuzhiyun int *val, int *val2, long mask)
290*4882a593Smuzhiyun {
291*4882a593Smuzhiyun struct max9611_dev *dev = iio_priv(indio_dev);
292*4882a593Smuzhiyun enum max9611_csa_gain gain_selector;
293*4882a593Smuzhiyun const unsigned int *csa_gain;
294*4882a593Smuzhiyun u16 adc_data;
295*4882a593Smuzhiyun int ret;
296*4882a593Smuzhiyun
297*4882a593Smuzhiyun switch (mask) {
298*4882a593Smuzhiyun case IIO_CHAN_INFO_RAW:
299*4882a593Smuzhiyun
300*4882a593Smuzhiyun switch (chan->address) {
301*4882a593Smuzhiyun case MAX9611_CHAN_TEMPERATURE:
302*4882a593Smuzhiyun ret = max9611_read_single(dev, CONF_TEMP,
303*4882a593Smuzhiyun &adc_data);
304*4882a593Smuzhiyun if (ret)
305*4882a593Smuzhiyun return -EINVAL;
306*4882a593Smuzhiyun
307*4882a593Smuzhiyun *val = MAX9611_TEMP_RAW(adc_data);
308*4882a593Smuzhiyun return IIO_VAL_INT;
309*4882a593Smuzhiyun
310*4882a593Smuzhiyun case MAX9611_CHAN_VOLTAGE_INPUT:
311*4882a593Smuzhiyun ret = max9611_read_single(dev, CONF_IN_VOLT,
312*4882a593Smuzhiyun &adc_data);
313*4882a593Smuzhiyun if (ret)
314*4882a593Smuzhiyun return -EINVAL;
315*4882a593Smuzhiyun
316*4882a593Smuzhiyun *val = MAX9611_VOLTAGE_RAW(adc_data);
317*4882a593Smuzhiyun return IIO_VAL_INT;
318*4882a593Smuzhiyun }
319*4882a593Smuzhiyun
320*4882a593Smuzhiyun break;
321*4882a593Smuzhiyun
322*4882a593Smuzhiyun case IIO_CHAN_INFO_OFFSET:
323*4882a593Smuzhiyun /* MAX9611_CHAN_VOLTAGE_INPUT */
324*4882a593Smuzhiyun *val = MAX9611_CIM_OFFSET_RAW;
325*4882a593Smuzhiyun
326*4882a593Smuzhiyun return IIO_VAL_INT;
327*4882a593Smuzhiyun
328*4882a593Smuzhiyun case IIO_CHAN_INFO_SCALE:
329*4882a593Smuzhiyun
330*4882a593Smuzhiyun switch (chan->address) {
331*4882a593Smuzhiyun case MAX9611_CHAN_TEMPERATURE:
332*4882a593Smuzhiyun *val = MAX9611_TEMP_SCALE_NUM;
333*4882a593Smuzhiyun *val2 = MAX9611_TEMP_SCALE_DIV;
334*4882a593Smuzhiyun
335*4882a593Smuzhiyun return IIO_VAL_FRACTIONAL;
336*4882a593Smuzhiyun
337*4882a593Smuzhiyun case MAX9611_CHAN_VOLTAGE_INPUT:
338*4882a593Smuzhiyun *val = MAX9611_CIM_LSB_mV;
339*4882a593Smuzhiyun
340*4882a593Smuzhiyun return IIO_VAL_INT;
341*4882a593Smuzhiyun }
342*4882a593Smuzhiyun
343*4882a593Smuzhiyun break;
344*4882a593Smuzhiyun
345*4882a593Smuzhiyun case IIO_CHAN_INFO_PROCESSED:
346*4882a593Smuzhiyun
347*4882a593Smuzhiyun switch (chan->address) {
348*4882a593Smuzhiyun case MAX9611_CHAN_VOLTAGE_SENSE:
349*4882a593Smuzhiyun /*
350*4882a593Smuzhiyun * processed (mV): (raw - offset) * LSB (nV) / 10^6
351*4882a593Smuzhiyun *
352*4882a593Smuzhiyun * Even if max9611 can output raw csa voltage readings,
353*4882a593Smuzhiyun * use a produced value as scale depends on gain.
354*4882a593Smuzhiyun */
355*4882a593Smuzhiyun ret = max9611_read_csa_voltage(dev, &adc_data,
356*4882a593Smuzhiyun &gain_selector);
357*4882a593Smuzhiyun if (ret)
358*4882a593Smuzhiyun return -EINVAL;
359*4882a593Smuzhiyun
360*4882a593Smuzhiyun csa_gain = max9611_gain_conf[gain_selector];
361*4882a593Smuzhiyun
362*4882a593Smuzhiyun adc_data -= csa_gain[CSA_GAIN_OFFS_RAW];
363*4882a593Smuzhiyun *val = MAX9611_VOLTAGE_RAW(adc_data) *
364*4882a593Smuzhiyun csa_gain[CSA_GAIN_LSB_nV];
365*4882a593Smuzhiyun *val2 = 1000000;
366*4882a593Smuzhiyun
367*4882a593Smuzhiyun return IIO_VAL_FRACTIONAL;
368*4882a593Smuzhiyun
369*4882a593Smuzhiyun case MAX9611_CHAN_CURRENT_LOAD:
370*4882a593Smuzhiyun /* processed (mA): Vcsa (nV) / Rshunt (uOhm) */
371*4882a593Smuzhiyun ret = max9611_read_csa_voltage(dev, &adc_data,
372*4882a593Smuzhiyun &gain_selector);
373*4882a593Smuzhiyun if (ret)
374*4882a593Smuzhiyun return -EINVAL;
375*4882a593Smuzhiyun
376*4882a593Smuzhiyun csa_gain = max9611_gain_conf[gain_selector];
377*4882a593Smuzhiyun
378*4882a593Smuzhiyun adc_data -= csa_gain[CSA_GAIN_OFFS_RAW];
379*4882a593Smuzhiyun *val = MAX9611_VOLTAGE_RAW(adc_data) *
380*4882a593Smuzhiyun csa_gain[CSA_GAIN_LSB_nV];
381*4882a593Smuzhiyun *val2 = dev->shunt_resistor_uohm;
382*4882a593Smuzhiyun
383*4882a593Smuzhiyun return IIO_VAL_FRACTIONAL;
384*4882a593Smuzhiyun
385*4882a593Smuzhiyun case MAX9611_CHAN_POWER_LOAD:
386*4882a593Smuzhiyun /*
387*4882a593Smuzhiyun * processed (mW): Vin (mV) * Vcsa (uV) /
388*4882a593Smuzhiyun * Rshunt (uOhm)
389*4882a593Smuzhiyun */
390*4882a593Smuzhiyun ret = max9611_read_single(dev, CONF_IN_VOLT,
391*4882a593Smuzhiyun &adc_data);
392*4882a593Smuzhiyun if (ret)
393*4882a593Smuzhiyun return -EINVAL;
394*4882a593Smuzhiyun
395*4882a593Smuzhiyun adc_data -= MAX9611_CIM_OFFSET_RAW;
396*4882a593Smuzhiyun *val = MAX9611_VOLTAGE_RAW(adc_data) *
397*4882a593Smuzhiyun MAX9611_CIM_LSB_mV;
398*4882a593Smuzhiyun
399*4882a593Smuzhiyun ret = max9611_read_csa_voltage(dev, &adc_data,
400*4882a593Smuzhiyun &gain_selector);
401*4882a593Smuzhiyun if (ret)
402*4882a593Smuzhiyun return -EINVAL;
403*4882a593Smuzhiyun
404*4882a593Smuzhiyun csa_gain = max9611_gain_conf[gain_selector];
405*4882a593Smuzhiyun
406*4882a593Smuzhiyun /* divide by 10^3 here to avoid 32bit overflow */
407*4882a593Smuzhiyun adc_data -= csa_gain[CSA_GAIN_OFFS_RAW];
408*4882a593Smuzhiyun *val *= MAX9611_VOLTAGE_RAW(adc_data) *
409*4882a593Smuzhiyun csa_gain[CSA_GAIN_LSB_nV] / 1000;
410*4882a593Smuzhiyun *val2 = dev->shunt_resistor_uohm;
411*4882a593Smuzhiyun
412*4882a593Smuzhiyun return IIO_VAL_FRACTIONAL;
413*4882a593Smuzhiyun }
414*4882a593Smuzhiyun
415*4882a593Smuzhiyun break;
416*4882a593Smuzhiyun }
417*4882a593Smuzhiyun
418*4882a593Smuzhiyun return -EINVAL;
419*4882a593Smuzhiyun }
420*4882a593Smuzhiyun
max9611_shunt_resistor_show(struct device * dev,struct device_attribute * attr,char * buf)421*4882a593Smuzhiyun static ssize_t max9611_shunt_resistor_show(struct device *dev,
422*4882a593Smuzhiyun struct device_attribute *attr,
423*4882a593Smuzhiyun char *buf)
424*4882a593Smuzhiyun {
425*4882a593Smuzhiyun struct max9611_dev *max9611 = iio_priv(dev_to_iio_dev(dev));
426*4882a593Smuzhiyun unsigned int i, r;
427*4882a593Smuzhiyun
428*4882a593Smuzhiyun i = max9611->shunt_resistor_uohm / 1000000;
429*4882a593Smuzhiyun r = max9611->shunt_resistor_uohm % 1000000;
430*4882a593Smuzhiyun
431*4882a593Smuzhiyun return sprintf(buf, "%u.%06u\n", i, r);
432*4882a593Smuzhiyun }
433*4882a593Smuzhiyun
434*4882a593Smuzhiyun static IIO_DEVICE_ATTR(in_power_shunt_resistor, 0444,
435*4882a593Smuzhiyun max9611_shunt_resistor_show, NULL, 0);
436*4882a593Smuzhiyun static IIO_DEVICE_ATTR(in_current_shunt_resistor, 0444,
437*4882a593Smuzhiyun max9611_shunt_resistor_show, NULL, 0);
438*4882a593Smuzhiyun
439*4882a593Smuzhiyun static struct attribute *max9611_attributes[] = {
440*4882a593Smuzhiyun &iio_dev_attr_in_power_shunt_resistor.dev_attr.attr,
441*4882a593Smuzhiyun &iio_dev_attr_in_current_shunt_resistor.dev_attr.attr,
442*4882a593Smuzhiyun NULL,
443*4882a593Smuzhiyun };
444*4882a593Smuzhiyun
445*4882a593Smuzhiyun static const struct attribute_group max9611_attribute_group = {
446*4882a593Smuzhiyun .attrs = max9611_attributes,
447*4882a593Smuzhiyun };
448*4882a593Smuzhiyun
449*4882a593Smuzhiyun static const struct iio_info indio_info = {
450*4882a593Smuzhiyun .read_raw = max9611_read_raw,
451*4882a593Smuzhiyun .attrs = &max9611_attribute_group,
452*4882a593Smuzhiyun };
453*4882a593Smuzhiyun
max9611_init(struct max9611_dev * max9611)454*4882a593Smuzhiyun static int max9611_init(struct max9611_dev *max9611)
455*4882a593Smuzhiyun {
456*4882a593Smuzhiyun struct i2c_client *client = max9611->i2c_client;
457*4882a593Smuzhiyun u16 regval;
458*4882a593Smuzhiyun int ret;
459*4882a593Smuzhiyun
460*4882a593Smuzhiyun if (!i2c_check_functionality(client->adapter,
461*4882a593Smuzhiyun I2C_FUNC_SMBUS_WRITE_BYTE |
462*4882a593Smuzhiyun I2C_FUNC_SMBUS_READ_WORD_DATA)) {
463*4882a593Smuzhiyun dev_err(max9611->dev,
464*4882a593Smuzhiyun "I2c adapter does not support smbus write_byte or read_word functionalities: aborting probe.\n");
465*4882a593Smuzhiyun return -EINVAL;
466*4882a593Smuzhiyun }
467*4882a593Smuzhiyun
468*4882a593Smuzhiyun /* Make sure die temperature is in range to test communications. */
469*4882a593Smuzhiyun ret = max9611_read_single(max9611, CONF_TEMP, ®val);
470*4882a593Smuzhiyun if (ret)
471*4882a593Smuzhiyun return ret;
472*4882a593Smuzhiyun
473*4882a593Smuzhiyun regval &= MAX9611_TEMP_MASK;
474*4882a593Smuzhiyun
475*4882a593Smuzhiyun if ((regval > MAX9611_TEMP_MAX_POS &&
476*4882a593Smuzhiyun regval < MAX9611_TEMP_MIN_NEG) ||
477*4882a593Smuzhiyun regval > MAX9611_TEMP_MAX_NEG) {
478*4882a593Smuzhiyun dev_err(max9611->dev,
479*4882a593Smuzhiyun "Invalid value received from ADC 0x%4x: aborting\n",
480*4882a593Smuzhiyun regval);
481*4882a593Smuzhiyun return -EIO;
482*4882a593Smuzhiyun }
483*4882a593Smuzhiyun
484*4882a593Smuzhiyun /* Mux shall be zeroed back before applying other configurations */
485*4882a593Smuzhiyun ret = i2c_smbus_write_byte_data(max9611->i2c_client,
486*4882a593Smuzhiyun MAX9611_REG_CTRL1, 0);
487*4882a593Smuzhiyun if (ret) {
488*4882a593Smuzhiyun dev_err(max9611->dev, "i2c write byte failed: 0x%2x - 0x%2x\n",
489*4882a593Smuzhiyun MAX9611_REG_CTRL1, 0);
490*4882a593Smuzhiyun return ret;
491*4882a593Smuzhiyun }
492*4882a593Smuzhiyun
493*4882a593Smuzhiyun ret = i2c_smbus_write_byte_data(max9611->i2c_client,
494*4882a593Smuzhiyun MAX9611_REG_CTRL2, 0);
495*4882a593Smuzhiyun if (ret) {
496*4882a593Smuzhiyun dev_err(max9611->dev, "i2c write byte failed: 0x%2x - 0x%2x\n",
497*4882a593Smuzhiyun MAX9611_REG_CTRL2, 0);
498*4882a593Smuzhiyun return ret;
499*4882a593Smuzhiyun }
500*4882a593Smuzhiyun usleep_range(MAX9611_CONV_TIME_US_RANGE);
501*4882a593Smuzhiyun
502*4882a593Smuzhiyun return 0;
503*4882a593Smuzhiyun }
504*4882a593Smuzhiyun
505*4882a593Smuzhiyun static const struct of_device_id max9611_of_table[] = {
506*4882a593Smuzhiyun {.compatible = "maxim,max9611", .data = "max9611"},
507*4882a593Smuzhiyun {.compatible = "maxim,max9612", .data = "max9612"},
508*4882a593Smuzhiyun { },
509*4882a593Smuzhiyun };
510*4882a593Smuzhiyun
511*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, max9611_of_table);
max9611_probe(struct i2c_client * client,const struct i2c_device_id * id)512*4882a593Smuzhiyun static int max9611_probe(struct i2c_client *client,
513*4882a593Smuzhiyun const struct i2c_device_id *id)
514*4882a593Smuzhiyun {
515*4882a593Smuzhiyun const char * const shunt_res_prop = "shunt-resistor-micro-ohms";
516*4882a593Smuzhiyun const struct device_node *of_node = client->dev.of_node;
517*4882a593Smuzhiyun const struct of_device_id *of_id =
518*4882a593Smuzhiyun of_match_device(max9611_of_table, &client->dev);
519*4882a593Smuzhiyun struct max9611_dev *max9611;
520*4882a593Smuzhiyun struct iio_dev *indio_dev;
521*4882a593Smuzhiyun unsigned int of_shunt;
522*4882a593Smuzhiyun int ret;
523*4882a593Smuzhiyun
524*4882a593Smuzhiyun indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*max9611));
525*4882a593Smuzhiyun if (!indio_dev)
526*4882a593Smuzhiyun return -ENOMEM;
527*4882a593Smuzhiyun
528*4882a593Smuzhiyun i2c_set_clientdata(client, indio_dev);
529*4882a593Smuzhiyun
530*4882a593Smuzhiyun max9611 = iio_priv(indio_dev);
531*4882a593Smuzhiyun max9611->dev = &client->dev;
532*4882a593Smuzhiyun max9611->i2c_client = client;
533*4882a593Smuzhiyun mutex_init(&max9611->lock);
534*4882a593Smuzhiyun
535*4882a593Smuzhiyun ret = of_property_read_u32(of_node, shunt_res_prop, &of_shunt);
536*4882a593Smuzhiyun if (ret) {
537*4882a593Smuzhiyun dev_err(&client->dev,
538*4882a593Smuzhiyun "Missing %s property for %pOF node\n",
539*4882a593Smuzhiyun shunt_res_prop, of_node);
540*4882a593Smuzhiyun return ret;
541*4882a593Smuzhiyun }
542*4882a593Smuzhiyun max9611->shunt_resistor_uohm = of_shunt;
543*4882a593Smuzhiyun
544*4882a593Smuzhiyun ret = max9611_init(max9611);
545*4882a593Smuzhiyun if (ret)
546*4882a593Smuzhiyun return ret;
547*4882a593Smuzhiyun
548*4882a593Smuzhiyun indio_dev->name = of_id->data;
549*4882a593Smuzhiyun indio_dev->modes = INDIO_DIRECT_MODE;
550*4882a593Smuzhiyun indio_dev->info = &indio_info;
551*4882a593Smuzhiyun indio_dev->channels = max9611_channels;
552*4882a593Smuzhiyun indio_dev->num_channels = ARRAY_SIZE(max9611_channels);
553*4882a593Smuzhiyun
554*4882a593Smuzhiyun return devm_iio_device_register(&client->dev, indio_dev);
555*4882a593Smuzhiyun }
556*4882a593Smuzhiyun
557*4882a593Smuzhiyun static struct i2c_driver max9611_driver = {
558*4882a593Smuzhiyun .driver = {
559*4882a593Smuzhiyun .name = DRIVER_NAME,
560*4882a593Smuzhiyun .of_match_table = max9611_of_table,
561*4882a593Smuzhiyun },
562*4882a593Smuzhiyun .probe = max9611_probe,
563*4882a593Smuzhiyun };
564*4882a593Smuzhiyun module_i2c_driver(max9611_driver);
565*4882a593Smuzhiyun
566*4882a593Smuzhiyun MODULE_AUTHOR("Jacopo Mondi <jacopo+renesas@jmondi.org>");
567*4882a593Smuzhiyun MODULE_DESCRIPTION("Maxim max9611/12 current sense amplifier with 12bit ADC");
568*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
569