1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * DA9150 GPADC Driver
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (c) 2014 Dialog Semiconductor
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Author: Adam Thomson <Adam.Thomson.Opensource@diasemi.com>
8*4882a593Smuzhiyun */
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun #include <linux/kernel.h>
11*4882a593Smuzhiyun #include <linux/slab.h>
12*4882a593Smuzhiyun #include <linux/module.h>
13*4882a593Smuzhiyun #include <linux/platform_device.h>
14*4882a593Smuzhiyun #include <linux/interrupt.h>
15*4882a593Smuzhiyun #include <linux/mutex.h>
16*4882a593Smuzhiyun #include <linux/completion.h>
17*4882a593Smuzhiyun #include <linux/iio/iio.h>
18*4882a593Smuzhiyun #include <linux/iio/machine.h>
19*4882a593Smuzhiyun #include <linux/iio/driver.h>
20*4882a593Smuzhiyun #include <linux/mfd/da9150/core.h>
21*4882a593Smuzhiyun #include <linux/mfd/da9150/registers.h>
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun /* Channels */
24*4882a593Smuzhiyun enum da9150_gpadc_hw_channel {
25*4882a593Smuzhiyun DA9150_GPADC_HW_CHAN_GPIOA_2V = 0,
26*4882a593Smuzhiyun DA9150_GPADC_HW_CHAN_GPIOA_2V_,
27*4882a593Smuzhiyun DA9150_GPADC_HW_CHAN_GPIOB_2V,
28*4882a593Smuzhiyun DA9150_GPADC_HW_CHAN_GPIOB_2V_,
29*4882a593Smuzhiyun DA9150_GPADC_HW_CHAN_GPIOC_2V,
30*4882a593Smuzhiyun DA9150_GPADC_HW_CHAN_GPIOC_2V_,
31*4882a593Smuzhiyun DA9150_GPADC_HW_CHAN_GPIOD_2V,
32*4882a593Smuzhiyun DA9150_GPADC_HW_CHAN_GPIOD_2V_,
33*4882a593Smuzhiyun DA9150_GPADC_HW_CHAN_IBUS_SENSE,
34*4882a593Smuzhiyun DA9150_GPADC_HW_CHAN_IBUS_SENSE_,
35*4882a593Smuzhiyun DA9150_GPADC_HW_CHAN_VBUS_DIV,
36*4882a593Smuzhiyun DA9150_GPADC_HW_CHAN_VBUS_DIV_,
37*4882a593Smuzhiyun DA9150_GPADC_HW_CHAN_ID,
38*4882a593Smuzhiyun DA9150_GPADC_HW_CHAN_ID_,
39*4882a593Smuzhiyun DA9150_GPADC_HW_CHAN_VSYS,
40*4882a593Smuzhiyun DA9150_GPADC_HW_CHAN_VSYS_,
41*4882a593Smuzhiyun DA9150_GPADC_HW_CHAN_GPIOA_6V,
42*4882a593Smuzhiyun DA9150_GPADC_HW_CHAN_GPIOA_6V_,
43*4882a593Smuzhiyun DA9150_GPADC_HW_CHAN_GPIOB_6V,
44*4882a593Smuzhiyun DA9150_GPADC_HW_CHAN_GPIOB_6V_,
45*4882a593Smuzhiyun DA9150_GPADC_HW_CHAN_GPIOC_6V,
46*4882a593Smuzhiyun DA9150_GPADC_HW_CHAN_GPIOC_6V_,
47*4882a593Smuzhiyun DA9150_GPADC_HW_CHAN_GPIOD_6V,
48*4882a593Smuzhiyun DA9150_GPADC_HW_CHAN_GPIOD_6V_,
49*4882a593Smuzhiyun DA9150_GPADC_HW_CHAN_VBAT,
50*4882a593Smuzhiyun DA9150_GPADC_HW_CHAN_VBAT_,
51*4882a593Smuzhiyun DA9150_GPADC_HW_CHAN_TBAT,
52*4882a593Smuzhiyun DA9150_GPADC_HW_CHAN_TBAT_,
53*4882a593Smuzhiyun DA9150_GPADC_HW_CHAN_TJUNC_CORE,
54*4882a593Smuzhiyun DA9150_GPADC_HW_CHAN_TJUNC_CORE_,
55*4882a593Smuzhiyun DA9150_GPADC_HW_CHAN_TJUNC_OVP,
56*4882a593Smuzhiyun DA9150_GPADC_HW_CHAN_TJUNC_OVP_,
57*4882a593Smuzhiyun };
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun enum da9150_gpadc_channel {
60*4882a593Smuzhiyun DA9150_GPADC_CHAN_GPIOA = 0,
61*4882a593Smuzhiyun DA9150_GPADC_CHAN_GPIOB,
62*4882a593Smuzhiyun DA9150_GPADC_CHAN_GPIOC,
63*4882a593Smuzhiyun DA9150_GPADC_CHAN_GPIOD,
64*4882a593Smuzhiyun DA9150_GPADC_CHAN_IBUS,
65*4882a593Smuzhiyun DA9150_GPADC_CHAN_VBUS,
66*4882a593Smuzhiyun DA9150_GPADC_CHAN_VSYS,
67*4882a593Smuzhiyun DA9150_GPADC_CHAN_VBAT,
68*4882a593Smuzhiyun DA9150_GPADC_CHAN_TBAT,
69*4882a593Smuzhiyun DA9150_GPADC_CHAN_TJUNC_CORE,
70*4882a593Smuzhiyun DA9150_GPADC_CHAN_TJUNC_OVP,
71*4882a593Smuzhiyun };
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun /* Private data */
74*4882a593Smuzhiyun struct da9150_gpadc {
75*4882a593Smuzhiyun struct da9150 *da9150;
76*4882a593Smuzhiyun struct device *dev;
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun struct mutex lock;
79*4882a593Smuzhiyun struct completion complete;
80*4882a593Smuzhiyun };
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun
da9150_gpadc_irq(int irq,void * data)83*4882a593Smuzhiyun static irqreturn_t da9150_gpadc_irq(int irq, void *data)
84*4882a593Smuzhiyun {
85*4882a593Smuzhiyun
86*4882a593Smuzhiyun struct da9150_gpadc *gpadc = data;
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun complete(&gpadc->complete);
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun return IRQ_HANDLED;
91*4882a593Smuzhiyun }
92*4882a593Smuzhiyun
da9150_gpadc_read_adc(struct da9150_gpadc * gpadc,int hw_chan)93*4882a593Smuzhiyun static int da9150_gpadc_read_adc(struct da9150_gpadc *gpadc, int hw_chan)
94*4882a593Smuzhiyun {
95*4882a593Smuzhiyun u8 result_regs[2];
96*4882a593Smuzhiyun int result;
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun mutex_lock(&gpadc->lock);
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun /* Set channel & enable measurement */
101*4882a593Smuzhiyun da9150_reg_write(gpadc->da9150, DA9150_GPADC_MAN,
102*4882a593Smuzhiyun (DA9150_GPADC_EN_MASK |
103*4882a593Smuzhiyun hw_chan << DA9150_GPADC_MUX_SHIFT));
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun /* Consume left-over completion from a previous timeout */
106*4882a593Smuzhiyun try_wait_for_completion(&gpadc->complete);
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun /* Check for actual completion */
109*4882a593Smuzhiyun wait_for_completion_timeout(&gpadc->complete, msecs_to_jiffies(5));
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun /* Read result and status from device */
112*4882a593Smuzhiyun da9150_bulk_read(gpadc->da9150, DA9150_GPADC_RES_A, 2, result_regs);
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun mutex_unlock(&gpadc->lock);
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun /* Check to make sure device really has completed reading */
117*4882a593Smuzhiyun if (result_regs[1] & DA9150_GPADC_RUN_MASK) {
118*4882a593Smuzhiyun dev_err(gpadc->dev, "Timeout on channel %d of GPADC\n",
119*4882a593Smuzhiyun hw_chan);
120*4882a593Smuzhiyun return -ETIMEDOUT;
121*4882a593Smuzhiyun }
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun /* LSBs - 2 bits */
124*4882a593Smuzhiyun result = (result_regs[1] & DA9150_GPADC_RES_L_MASK) >>
125*4882a593Smuzhiyun DA9150_GPADC_RES_L_SHIFT;
126*4882a593Smuzhiyun /* MSBs - 8 bits */
127*4882a593Smuzhiyun result |= result_regs[0] << DA9150_GPADC_RES_L_BITS;
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun return result;
130*4882a593Smuzhiyun }
131*4882a593Smuzhiyun
da9150_gpadc_gpio_6v_voltage_now(int raw_val)132*4882a593Smuzhiyun static inline int da9150_gpadc_gpio_6v_voltage_now(int raw_val)
133*4882a593Smuzhiyun {
134*4882a593Smuzhiyun /* Convert to mV */
135*4882a593Smuzhiyun return (6 * ((raw_val * 1000) + 500)) / 1024;
136*4882a593Smuzhiyun }
137*4882a593Smuzhiyun
da9150_gpadc_ibus_current_avg(int raw_val)138*4882a593Smuzhiyun static inline int da9150_gpadc_ibus_current_avg(int raw_val)
139*4882a593Smuzhiyun {
140*4882a593Smuzhiyun /* Convert to mA */
141*4882a593Smuzhiyun return (4 * ((raw_val * 1000) + 500)) / 2048;
142*4882a593Smuzhiyun }
143*4882a593Smuzhiyun
da9150_gpadc_vbus_21v_voltage_now(int raw_val)144*4882a593Smuzhiyun static inline int da9150_gpadc_vbus_21v_voltage_now(int raw_val)
145*4882a593Smuzhiyun {
146*4882a593Smuzhiyun /* Convert to mV */
147*4882a593Smuzhiyun return (21 * ((raw_val * 1000) + 500)) / 1024;
148*4882a593Smuzhiyun }
149*4882a593Smuzhiyun
da9150_gpadc_vsys_6v_voltage_now(int raw_val)150*4882a593Smuzhiyun static inline int da9150_gpadc_vsys_6v_voltage_now(int raw_val)
151*4882a593Smuzhiyun {
152*4882a593Smuzhiyun /* Convert to mV */
153*4882a593Smuzhiyun return (3 * ((raw_val * 1000) + 500)) / 512;
154*4882a593Smuzhiyun }
155*4882a593Smuzhiyun
da9150_gpadc_read_processed(struct da9150_gpadc * gpadc,int channel,int hw_chan,int * val)156*4882a593Smuzhiyun static int da9150_gpadc_read_processed(struct da9150_gpadc *gpadc, int channel,
157*4882a593Smuzhiyun int hw_chan, int *val)
158*4882a593Smuzhiyun {
159*4882a593Smuzhiyun int raw_val;
160*4882a593Smuzhiyun
161*4882a593Smuzhiyun raw_val = da9150_gpadc_read_adc(gpadc, hw_chan);
162*4882a593Smuzhiyun if (raw_val < 0)
163*4882a593Smuzhiyun return raw_val;
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun switch (channel) {
166*4882a593Smuzhiyun case DA9150_GPADC_CHAN_GPIOA:
167*4882a593Smuzhiyun case DA9150_GPADC_CHAN_GPIOB:
168*4882a593Smuzhiyun case DA9150_GPADC_CHAN_GPIOC:
169*4882a593Smuzhiyun case DA9150_GPADC_CHAN_GPIOD:
170*4882a593Smuzhiyun *val = da9150_gpadc_gpio_6v_voltage_now(raw_val);
171*4882a593Smuzhiyun break;
172*4882a593Smuzhiyun case DA9150_GPADC_CHAN_IBUS:
173*4882a593Smuzhiyun *val = da9150_gpadc_ibus_current_avg(raw_val);
174*4882a593Smuzhiyun break;
175*4882a593Smuzhiyun case DA9150_GPADC_CHAN_VBUS:
176*4882a593Smuzhiyun *val = da9150_gpadc_vbus_21v_voltage_now(raw_val);
177*4882a593Smuzhiyun break;
178*4882a593Smuzhiyun case DA9150_GPADC_CHAN_VSYS:
179*4882a593Smuzhiyun *val = da9150_gpadc_vsys_6v_voltage_now(raw_val);
180*4882a593Smuzhiyun break;
181*4882a593Smuzhiyun default:
182*4882a593Smuzhiyun /* No processing for other channels so return raw value */
183*4882a593Smuzhiyun *val = raw_val;
184*4882a593Smuzhiyun break;
185*4882a593Smuzhiyun }
186*4882a593Smuzhiyun
187*4882a593Smuzhiyun return IIO_VAL_INT;
188*4882a593Smuzhiyun }
189*4882a593Smuzhiyun
da9150_gpadc_read_scale(int channel,int * val,int * val2)190*4882a593Smuzhiyun static int da9150_gpadc_read_scale(int channel, int *val, int *val2)
191*4882a593Smuzhiyun {
192*4882a593Smuzhiyun switch (channel) {
193*4882a593Smuzhiyun case DA9150_GPADC_CHAN_VBAT:
194*4882a593Smuzhiyun *val = 2932;
195*4882a593Smuzhiyun *val2 = 1000;
196*4882a593Smuzhiyun return IIO_VAL_FRACTIONAL;
197*4882a593Smuzhiyun case DA9150_GPADC_CHAN_TJUNC_CORE:
198*4882a593Smuzhiyun case DA9150_GPADC_CHAN_TJUNC_OVP:
199*4882a593Smuzhiyun *val = 1000000;
200*4882a593Smuzhiyun *val2 = 4420;
201*4882a593Smuzhiyun return IIO_VAL_FRACTIONAL;
202*4882a593Smuzhiyun default:
203*4882a593Smuzhiyun return -EINVAL;
204*4882a593Smuzhiyun }
205*4882a593Smuzhiyun }
206*4882a593Smuzhiyun
da9150_gpadc_read_offset(int channel,int * val)207*4882a593Smuzhiyun static int da9150_gpadc_read_offset(int channel, int *val)
208*4882a593Smuzhiyun {
209*4882a593Smuzhiyun switch (channel) {
210*4882a593Smuzhiyun case DA9150_GPADC_CHAN_VBAT:
211*4882a593Smuzhiyun *val = 1500000 / 2932;
212*4882a593Smuzhiyun return IIO_VAL_INT;
213*4882a593Smuzhiyun case DA9150_GPADC_CHAN_TJUNC_CORE:
214*4882a593Smuzhiyun case DA9150_GPADC_CHAN_TJUNC_OVP:
215*4882a593Smuzhiyun *val = -144;
216*4882a593Smuzhiyun return IIO_VAL_INT;
217*4882a593Smuzhiyun default:
218*4882a593Smuzhiyun return -EINVAL;
219*4882a593Smuzhiyun }
220*4882a593Smuzhiyun }
221*4882a593Smuzhiyun
da9150_gpadc_read_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int * val,int * val2,long mask)222*4882a593Smuzhiyun static int da9150_gpadc_read_raw(struct iio_dev *indio_dev,
223*4882a593Smuzhiyun struct iio_chan_spec const *chan,
224*4882a593Smuzhiyun int *val, int *val2, long mask)
225*4882a593Smuzhiyun {
226*4882a593Smuzhiyun struct da9150_gpadc *gpadc = iio_priv(indio_dev);
227*4882a593Smuzhiyun
228*4882a593Smuzhiyun if ((chan->channel < DA9150_GPADC_CHAN_GPIOA) ||
229*4882a593Smuzhiyun (chan->channel > DA9150_GPADC_CHAN_TJUNC_OVP))
230*4882a593Smuzhiyun return -EINVAL;
231*4882a593Smuzhiyun
232*4882a593Smuzhiyun switch (mask) {
233*4882a593Smuzhiyun case IIO_CHAN_INFO_RAW:
234*4882a593Smuzhiyun case IIO_CHAN_INFO_PROCESSED:
235*4882a593Smuzhiyun return da9150_gpadc_read_processed(gpadc, chan->channel,
236*4882a593Smuzhiyun chan->address, val);
237*4882a593Smuzhiyun case IIO_CHAN_INFO_SCALE:
238*4882a593Smuzhiyun return da9150_gpadc_read_scale(chan->channel, val, val2);
239*4882a593Smuzhiyun case IIO_CHAN_INFO_OFFSET:
240*4882a593Smuzhiyun return da9150_gpadc_read_offset(chan->channel, val);
241*4882a593Smuzhiyun default:
242*4882a593Smuzhiyun return -EINVAL;
243*4882a593Smuzhiyun }
244*4882a593Smuzhiyun }
245*4882a593Smuzhiyun
246*4882a593Smuzhiyun static const struct iio_info da9150_gpadc_info = {
247*4882a593Smuzhiyun .read_raw = &da9150_gpadc_read_raw,
248*4882a593Smuzhiyun };
249*4882a593Smuzhiyun
250*4882a593Smuzhiyun #define DA9150_GPADC_CHANNEL(_id, _hw_id, _type, chan_info, \
251*4882a593Smuzhiyun _ext_name) { \
252*4882a593Smuzhiyun .type = _type, \
253*4882a593Smuzhiyun .indexed = 1, \
254*4882a593Smuzhiyun .channel = DA9150_GPADC_CHAN_##_id, \
255*4882a593Smuzhiyun .address = DA9150_GPADC_HW_CHAN_##_hw_id, \
256*4882a593Smuzhiyun .info_mask_separate = chan_info, \
257*4882a593Smuzhiyun .extend_name = _ext_name, \
258*4882a593Smuzhiyun .datasheet_name = #_id, \
259*4882a593Smuzhiyun }
260*4882a593Smuzhiyun
261*4882a593Smuzhiyun #define DA9150_GPADC_CHANNEL_RAW(_id, _hw_id, _type, _ext_name) \
262*4882a593Smuzhiyun DA9150_GPADC_CHANNEL(_id, _hw_id, _type, \
263*4882a593Smuzhiyun BIT(IIO_CHAN_INFO_RAW), _ext_name)
264*4882a593Smuzhiyun
265*4882a593Smuzhiyun #define DA9150_GPADC_CHANNEL_SCALED(_id, _hw_id, _type, _ext_name) \
266*4882a593Smuzhiyun DA9150_GPADC_CHANNEL(_id, _hw_id, _type, \
267*4882a593Smuzhiyun BIT(IIO_CHAN_INFO_RAW) | \
268*4882a593Smuzhiyun BIT(IIO_CHAN_INFO_SCALE) | \
269*4882a593Smuzhiyun BIT(IIO_CHAN_INFO_OFFSET), \
270*4882a593Smuzhiyun _ext_name)
271*4882a593Smuzhiyun
272*4882a593Smuzhiyun #define DA9150_GPADC_CHANNEL_PROCESSED(_id, _hw_id, _type, _ext_name) \
273*4882a593Smuzhiyun DA9150_GPADC_CHANNEL(_id, _hw_id, _type, \
274*4882a593Smuzhiyun BIT(IIO_CHAN_INFO_PROCESSED), _ext_name)
275*4882a593Smuzhiyun
276*4882a593Smuzhiyun /* Supported channels */
277*4882a593Smuzhiyun static const struct iio_chan_spec da9150_gpadc_channels[] = {
278*4882a593Smuzhiyun DA9150_GPADC_CHANNEL_PROCESSED(GPIOA, GPIOA_6V, IIO_VOLTAGE, NULL),
279*4882a593Smuzhiyun DA9150_GPADC_CHANNEL_PROCESSED(GPIOB, GPIOB_6V, IIO_VOLTAGE, NULL),
280*4882a593Smuzhiyun DA9150_GPADC_CHANNEL_PROCESSED(GPIOC, GPIOC_6V, IIO_VOLTAGE, NULL),
281*4882a593Smuzhiyun DA9150_GPADC_CHANNEL_PROCESSED(GPIOD, GPIOD_6V, IIO_VOLTAGE, NULL),
282*4882a593Smuzhiyun DA9150_GPADC_CHANNEL_PROCESSED(IBUS, IBUS_SENSE, IIO_CURRENT, "ibus"),
283*4882a593Smuzhiyun DA9150_GPADC_CHANNEL_PROCESSED(VBUS, VBUS_DIV_, IIO_VOLTAGE, "vbus"),
284*4882a593Smuzhiyun DA9150_GPADC_CHANNEL_PROCESSED(VSYS, VSYS, IIO_VOLTAGE, "vsys"),
285*4882a593Smuzhiyun DA9150_GPADC_CHANNEL_SCALED(VBAT, VBAT, IIO_VOLTAGE, "vbat"),
286*4882a593Smuzhiyun DA9150_GPADC_CHANNEL_RAW(TBAT, TBAT, IIO_VOLTAGE, "tbat"),
287*4882a593Smuzhiyun DA9150_GPADC_CHANNEL_SCALED(TJUNC_CORE, TJUNC_CORE, IIO_TEMP,
288*4882a593Smuzhiyun "tjunc_core"),
289*4882a593Smuzhiyun DA9150_GPADC_CHANNEL_SCALED(TJUNC_OVP, TJUNC_OVP, IIO_TEMP,
290*4882a593Smuzhiyun "tjunc_ovp"),
291*4882a593Smuzhiyun };
292*4882a593Smuzhiyun
293*4882a593Smuzhiyun /* Default maps used by da9150-charger */
294*4882a593Smuzhiyun static struct iio_map da9150_gpadc_default_maps[] = {
295*4882a593Smuzhiyun {
296*4882a593Smuzhiyun .consumer_dev_name = "da9150-charger",
297*4882a593Smuzhiyun .consumer_channel = "CHAN_IBUS",
298*4882a593Smuzhiyun .adc_channel_label = "IBUS",
299*4882a593Smuzhiyun },
300*4882a593Smuzhiyun {
301*4882a593Smuzhiyun .consumer_dev_name = "da9150-charger",
302*4882a593Smuzhiyun .consumer_channel = "CHAN_VBUS",
303*4882a593Smuzhiyun .adc_channel_label = "VBUS",
304*4882a593Smuzhiyun },
305*4882a593Smuzhiyun {
306*4882a593Smuzhiyun .consumer_dev_name = "da9150-charger",
307*4882a593Smuzhiyun .consumer_channel = "CHAN_TJUNC",
308*4882a593Smuzhiyun .adc_channel_label = "TJUNC_CORE",
309*4882a593Smuzhiyun },
310*4882a593Smuzhiyun {
311*4882a593Smuzhiyun .consumer_dev_name = "da9150-charger",
312*4882a593Smuzhiyun .consumer_channel = "CHAN_VBAT",
313*4882a593Smuzhiyun .adc_channel_label = "VBAT",
314*4882a593Smuzhiyun },
315*4882a593Smuzhiyun {},
316*4882a593Smuzhiyun };
317*4882a593Smuzhiyun
da9150_gpadc_probe(struct platform_device * pdev)318*4882a593Smuzhiyun static int da9150_gpadc_probe(struct platform_device *pdev)
319*4882a593Smuzhiyun {
320*4882a593Smuzhiyun struct device *dev = &pdev->dev;
321*4882a593Smuzhiyun struct da9150 *da9150 = dev_get_drvdata(dev->parent);
322*4882a593Smuzhiyun struct da9150_gpadc *gpadc;
323*4882a593Smuzhiyun struct iio_dev *indio_dev;
324*4882a593Smuzhiyun int irq, ret;
325*4882a593Smuzhiyun
326*4882a593Smuzhiyun indio_dev = devm_iio_device_alloc(dev, sizeof(*gpadc));
327*4882a593Smuzhiyun if (!indio_dev) {
328*4882a593Smuzhiyun dev_err(&pdev->dev, "Failed to allocate IIO device\n");
329*4882a593Smuzhiyun return -ENOMEM;
330*4882a593Smuzhiyun }
331*4882a593Smuzhiyun gpadc = iio_priv(indio_dev);
332*4882a593Smuzhiyun
333*4882a593Smuzhiyun platform_set_drvdata(pdev, indio_dev);
334*4882a593Smuzhiyun gpadc->da9150 = da9150;
335*4882a593Smuzhiyun gpadc->dev = dev;
336*4882a593Smuzhiyun mutex_init(&gpadc->lock);
337*4882a593Smuzhiyun init_completion(&gpadc->complete);
338*4882a593Smuzhiyun
339*4882a593Smuzhiyun irq = platform_get_irq_byname(pdev, "GPADC");
340*4882a593Smuzhiyun if (irq < 0)
341*4882a593Smuzhiyun return irq;
342*4882a593Smuzhiyun
343*4882a593Smuzhiyun ret = devm_request_threaded_irq(dev, irq, NULL, da9150_gpadc_irq,
344*4882a593Smuzhiyun IRQF_ONESHOT, "GPADC", gpadc);
345*4882a593Smuzhiyun if (ret) {
346*4882a593Smuzhiyun dev_err(dev, "Failed to request IRQ %d: %d\n", irq, ret);
347*4882a593Smuzhiyun return ret;
348*4882a593Smuzhiyun }
349*4882a593Smuzhiyun
350*4882a593Smuzhiyun ret = iio_map_array_register(indio_dev, da9150_gpadc_default_maps);
351*4882a593Smuzhiyun if (ret) {
352*4882a593Smuzhiyun dev_err(dev, "Failed to register IIO maps: %d\n", ret);
353*4882a593Smuzhiyun return ret;
354*4882a593Smuzhiyun }
355*4882a593Smuzhiyun
356*4882a593Smuzhiyun indio_dev->name = dev_name(dev);
357*4882a593Smuzhiyun indio_dev->info = &da9150_gpadc_info;
358*4882a593Smuzhiyun indio_dev->modes = INDIO_DIRECT_MODE;
359*4882a593Smuzhiyun indio_dev->channels = da9150_gpadc_channels;
360*4882a593Smuzhiyun indio_dev->num_channels = ARRAY_SIZE(da9150_gpadc_channels);
361*4882a593Smuzhiyun
362*4882a593Smuzhiyun ret = iio_device_register(indio_dev);
363*4882a593Smuzhiyun if (ret) {
364*4882a593Smuzhiyun dev_err(dev, "Failed to register IIO device: %d\n", ret);
365*4882a593Smuzhiyun goto iio_map_unreg;
366*4882a593Smuzhiyun }
367*4882a593Smuzhiyun
368*4882a593Smuzhiyun return 0;
369*4882a593Smuzhiyun
370*4882a593Smuzhiyun iio_map_unreg:
371*4882a593Smuzhiyun iio_map_array_unregister(indio_dev);
372*4882a593Smuzhiyun
373*4882a593Smuzhiyun return ret;
374*4882a593Smuzhiyun }
375*4882a593Smuzhiyun
da9150_gpadc_remove(struct platform_device * pdev)376*4882a593Smuzhiyun static int da9150_gpadc_remove(struct platform_device *pdev)
377*4882a593Smuzhiyun {
378*4882a593Smuzhiyun struct iio_dev *indio_dev = platform_get_drvdata(pdev);
379*4882a593Smuzhiyun
380*4882a593Smuzhiyun iio_device_unregister(indio_dev);
381*4882a593Smuzhiyun iio_map_array_unregister(indio_dev);
382*4882a593Smuzhiyun
383*4882a593Smuzhiyun return 0;
384*4882a593Smuzhiyun }
385*4882a593Smuzhiyun
386*4882a593Smuzhiyun static struct platform_driver da9150_gpadc_driver = {
387*4882a593Smuzhiyun .driver = {
388*4882a593Smuzhiyun .name = "da9150-gpadc",
389*4882a593Smuzhiyun },
390*4882a593Smuzhiyun .probe = da9150_gpadc_probe,
391*4882a593Smuzhiyun .remove = da9150_gpadc_remove,
392*4882a593Smuzhiyun };
393*4882a593Smuzhiyun
394*4882a593Smuzhiyun module_platform_driver(da9150_gpadc_driver);
395*4882a593Smuzhiyun
396*4882a593Smuzhiyun MODULE_DESCRIPTION("GPADC Driver for DA9150");
397*4882a593Smuzhiyun MODULE_AUTHOR("Adam Thomson <Adam.Thomson.Opensource@diasemi.com>");
398*4882a593Smuzhiyun MODULE_LICENSE("GPL");
399