xref: /OK3568_Linux_fs/kernel/drivers/iio/accel/stk8312.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /**
3*4882a593Smuzhiyun  * Sensortek STK8312 3-Axis Accelerometer
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (c) 2015, Intel Corporation.
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * IIO driver for STK8312; 7-bit I2C address: 0x3D.
8*4882a593Smuzhiyun  */
9*4882a593Smuzhiyun 
10*4882a593Smuzhiyun #include <linux/acpi.h>
11*4882a593Smuzhiyun #include <linux/i2c.h>
12*4882a593Smuzhiyun #include <linux/interrupt.h>
13*4882a593Smuzhiyun #include <linux/kernel.h>
14*4882a593Smuzhiyun #include <linux/module.h>
15*4882a593Smuzhiyun #include <linux/delay.h>
16*4882a593Smuzhiyun #include <linux/iio/buffer.h>
17*4882a593Smuzhiyun #include <linux/iio/iio.h>
18*4882a593Smuzhiyun #include <linux/iio/sysfs.h>
19*4882a593Smuzhiyun #include <linux/iio/trigger.h>
20*4882a593Smuzhiyun #include <linux/iio/triggered_buffer.h>
21*4882a593Smuzhiyun #include <linux/iio/trigger_consumer.h>
22*4882a593Smuzhiyun 
23*4882a593Smuzhiyun #define STK8312_REG_XOUT		0x00
24*4882a593Smuzhiyun #define STK8312_REG_YOUT		0x01
25*4882a593Smuzhiyun #define STK8312_REG_ZOUT		0x02
26*4882a593Smuzhiyun #define STK8312_REG_INTSU		0x06
27*4882a593Smuzhiyun #define STK8312_REG_MODE		0x07
28*4882a593Smuzhiyun #define STK8312_REG_SR			0x08
29*4882a593Smuzhiyun #define STK8312_REG_STH			0x13
30*4882a593Smuzhiyun #define STK8312_REG_RESET		0x20
31*4882a593Smuzhiyun #define STK8312_REG_AFECTRL		0x24
32*4882a593Smuzhiyun #define STK8312_REG_OTPADDR		0x3D
33*4882a593Smuzhiyun #define STK8312_REG_OTPDATA		0x3E
34*4882a593Smuzhiyun #define STK8312_REG_OTPCTRL		0x3F
35*4882a593Smuzhiyun 
36*4882a593Smuzhiyun #define STK8312_MODE_ACTIVE		BIT(0)
37*4882a593Smuzhiyun #define STK8312_MODE_STANDBY		0x00
38*4882a593Smuzhiyun #define STK8312_MODE_INT_AH_PP		0xC0	/* active-high, push-pull */
39*4882a593Smuzhiyun #define STK8312_DREADY_BIT		BIT(4)
40*4882a593Smuzhiyun #define STK8312_RNG_6G			1
41*4882a593Smuzhiyun #define STK8312_RNG_SHIFT		6
42*4882a593Smuzhiyun #define STK8312_RNG_MASK		GENMASK(7, 6)
43*4882a593Smuzhiyun #define STK8312_SR_MASK			GENMASK(2, 0)
44*4882a593Smuzhiyun #define STK8312_SR_400HZ_IDX		0
45*4882a593Smuzhiyun #define STK8312_ALL_CHANNEL_MASK	GENMASK(2, 0)
46*4882a593Smuzhiyun #define STK8312_ALL_CHANNEL_SIZE	3
47*4882a593Smuzhiyun 
48*4882a593Smuzhiyun #define STK8312_DRIVER_NAME		"stk8312"
49*4882a593Smuzhiyun #define STK8312_IRQ_NAME		"stk8312_event"
50*4882a593Smuzhiyun 
51*4882a593Smuzhiyun /*
52*4882a593Smuzhiyun  * The accelerometer has two measurement ranges:
53*4882a593Smuzhiyun  *
54*4882a593Smuzhiyun  * -6g - +6g (8-bit, signed)
55*4882a593Smuzhiyun  * -16g - +16g (8-bit, signed)
56*4882a593Smuzhiyun  *
57*4882a593Smuzhiyun  * scale1 = (6 + 6) * 9.81 / (2^8 - 1)     = 0.4616
58*4882a593Smuzhiyun  * scale2 = (16 + 16) * 9.81 / (2^8 - 1)   = 1.2311
59*4882a593Smuzhiyun  */
60*4882a593Smuzhiyun #define STK8312_SCALE_AVAIL		"0.4616 1.2311"
61*4882a593Smuzhiyun 
62*4882a593Smuzhiyun static const int stk8312_scale_table[][2] = {
63*4882a593Smuzhiyun 	{0, 461600}, {1, 231100}
64*4882a593Smuzhiyun };
65*4882a593Smuzhiyun 
66*4882a593Smuzhiyun static const struct {
67*4882a593Smuzhiyun 	int val;
68*4882a593Smuzhiyun 	int val2;
69*4882a593Smuzhiyun } stk8312_samp_freq_table[] = {
70*4882a593Smuzhiyun 	{400, 0}, {200, 0}, {100, 0}, {50, 0}, {25, 0},
71*4882a593Smuzhiyun 	{12, 500000}, {6, 250000}, {3, 125000}
72*4882a593Smuzhiyun };
73*4882a593Smuzhiyun 
74*4882a593Smuzhiyun #define STK8312_ACCEL_CHANNEL(index, reg, axis) {			\
75*4882a593Smuzhiyun 	.type = IIO_ACCEL,						\
76*4882a593Smuzhiyun 	.address = reg,							\
77*4882a593Smuzhiyun 	.modified = 1,							\
78*4882a593Smuzhiyun 	.channel2 = IIO_MOD_##axis,					\
79*4882a593Smuzhiyun 	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),			\
80*4882a593Smuzhiyun 	.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) |		\
81*4882a593Smuzhiyun 				    BIT(IIO_CHAN_INFO_SAMP_FREQ),	\
82*4882a593Smuzhiyun 	.scan_index = index,						\
83*4882a593Smuzhiyun 	.scan_type = {							\
84*4882a593Smuzhiyun 		.sign = 's',						\
85*4882a593Smuzhiyun 		.realbits = 8,						\
86*4882a593Smuzhiyun 		.storagebits = 8,					\
87*4882a593Smuzhiyun 		.endianness = IIO_CPU,					\
88*4882a593Smuzhiyun 	},								\
89*4882a593Smuzhiyun }
90*4882a593Smuzhiyun 
91*4882a593Smuzhiyun static const struct iio_chan_spec stk8312_channels[] = {
92*4882a593Smuzhiyun 	STK8312_ACCEL_CHANNEL(0, STK8312_REG_XOUT, X),
93*4882a593Smuzhiyun 	STK8312_ACCEL_CHANNEL(1, STK8312_REG_YOUT, Y),
94*4882a593Smuzhiyun 	STK8312_ACCEL_CHANNEL(2, STK8312_REG_ZOUT, Z),
95*4882a593Smuzhiyun 	IIO_CHAN_SOFT_TIMESTAMP(3),
96*4882a593Smuzhiyun };
97*4882a593Smuzhiyun 
98*4882a593Smuzhiyun struct stk8312_data {
99*4882a593Smuzhiyun 	struct i2c_client *client;
100*4882a593Smuzhiyun 	struct mutex lock;
101*4882a593Smuzhiyun 	u8 range;
102*4882a593Smuzhiyun 	u8 sample_rate_idx;
103*4882a593Smuzhiyun 	u8 mode;
104*4882a593Smuzhiyun 	struct iio_trigger *dready_trig;
105*4882a593Smuzhiyun 	bool dready_trigger_on;
106*4882a593Smuzhiyun 	/* Ensure timestamp is naturally aligned */
107*4882a593Smuzhiyun 	struct {
108*4882a593Smuzhiyun 		s8 chans[3];
109*4882a593Smuzhiyun 		s64 timestamp __aligned(8);
110*4882a593Smuzhiyun 	} scan;
111*4882a593Smuzhiyun };
112*4882a593Smuzhiyun 
113*4882a593Smuzhiyun static IIO_CONST_ATTR(in_accel_scale_available, STK8312_SCALE_AVAIL);
114*4882a593Smuzhiyun 
115*4882a593Smuzhiyun static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("3.125 6.25 12.5 25 50 100 200 400");
116*4882a593Smuzhiyun 
117*4882a593Smuzhiyun static struct attribute *stk8312_attributes[] = {
118*4882a593Smuzhiyun 	&iio_const_attr_in_accel_scale_available.dev_attr.attr,
119*4882a593Smuzhiyun 	&iio_const_attr_sampling_frequency_available.dev_attr.attr,
120*4882a593Smuzhiyun 	NULL,
121*4882a593Smuzhiyun };
122*4882a593Smuzhiyun 
123*4882a593Smuzhiyun static const struct attribute_group stk8312_attribute_group = {
124*4882a593Smuzhiyun 	.attrs = stk8312_attributes
125*4882a593Smuzhiyun };
126*4882a593Smuzhiyun 
stk8312_otp_init(struct stk8312_data * data)127*4882a593Smuzhiyun static int stk8312_otp_init(struct stk8312_data *data)
128*4882a593Smuzhiyun {
129*4882a593Smuzhiyun 	int ret;
130*4882a593Smuzhiyun 	int count = 10;
131*4882a593Smuzhiyun 	struct i2c_client *client = data->client;
132*4882a593Smuzhiyun 
133*4882a593Smuzhiyun 	ret = i2c_smbus_write_byte_data(client, STK8312_REG_OTPADDR, 0x70);
134*4882a593Smuzhiyun 	if (ret < 0)
135*4882a593Smuzhiyun 		goto exit_err;
136*4882a593Smuzhiyun 	ret = i2c_smbus_write_byte_data(client, STK8312_REG_OTPCTRL, 0x02);
137*4882a593Smuzhiyun 	if (ret < 0)
138*4882a593Smuzhiyun 		goto exit_err;
139*4882a593Smuzhiyun 
140*4882a593Smuzhiyun 	do {
141*4882a593Smuzhiyun 		usleep_range(1000, 5000);
142*4882a593Smuzhiyun 		ret = i2c_smbus_read_byte_data(client, STK8312_REG_OTPCTRL);
143*4882a593Smuzhiyun 		if (ret < 0)
144*4882a593Smuzhiyun 			goto exit_err;
145*4882a593Smuzhiyun 		count--;
146*4882a593Smuzhiyun 	} while (!(ret & BIT(7)) && count > 0);
147*4882a593Smuzhiyun 
148*4882a593Smuzhiyun 	if (count == 0) {
149*4882a593Smuzhiyun 		ret = -ETIMEDOUT;
150*4882a593Smuzhiyun 		goto exit_err;
151*4882a593Smuzhiyun 	}
152*4882a593Smuzhiyun 
153*4882a593Smuzhiyun 	ret = i2c_smbus_read_byte_data(client, STK8312_REG_OTPDATA);
154*4882a593Smuzhiyun 	if (ret == 0)
155*4882a593Smuzhiyun 		ret = -EINVAL;
156*4882a593Smuzhiyun 	if (ret < 0)
157*4882a593Smuzhiyun 		goto exit_err;
158*4882a593Smuzhiyun 
159*4882a593Smuzhiyun 	ret = i2c_smbus_write_byte_data(data->client, STK8312_REG_AFECTRL, ret);
160*4882a593Smuzhiyun 	if (ret < 0)
161*4882a593Smuzhiyun 		goto exit_err;
162*4882a593Smuzhiyun 	msleep(150);
163*4882a593Smuzhiyun 
164*4882a593Smuzhiyun 	return 0;
165*4882a593Smuzhiyun 
166*4882a593Smuzhiyun exit_err:
167*4882a593Smuzhiyun 	dev_err(&client->dev, "failed to initialize sensor\n");
168*4882a593Smuzhiyun 	return ret;
169*4882a593Smuzhiyun }
170*4882a593Smuzhiyun 
stk8312_set_mode(struct stk8312_data * data,u8 mode)171*4882a593Smuzhiyun static int stk8312_set_mode(struct stk8312_data *data, u8 mode)
172*4882a593Smuzhiyun {
173*4882a593Smuzhiyun 	int ret;
174*4882a593Smuzhiyun 	struct i2c_client *client = data->client;
175*4882a593Smuzhiyun 
176*4882a593Smuzhiyun 	if (mode == data->mode)
177*4882a593Smuzhiyun 		return 0;
178*4882a593Smuzhiyun 
179*4882a593Smuzhiyun 	ret = i2c_smbus_write_byte_data(client, STK8312_REG_MODE, mode);
180*4882a593Smuzhiyun 	if (ret < 0) {
181*4882a593Smuzhiyun 		dev_err(&client->dev, "failed to change sensor mode\n");
182*4882a593Smuzhiyun 		return ret;
183*4882a593Smuzhiyun 	}
184*4882a593Smuzhiyun 
185*4882a593Smuzhiyun 	data->mode = mode;
186*4882a593Smuzhiyun 	if (mode & STK8312_MODE_ACTIVE) {
187*4882a593Smuzhiyun 		/* Need to run OTP sequence before entering active mode */
188*4882a593Smuzhiyun 		usleep_range(1000, 5000);
189*4882a593Smuzhiyun 		ret = stk8312_otp_init(data);
190*4882a593Smuzhiyun 	}
191*4882a593Smuzhiyun 
192*4882a593Smuzhiyun 	return ret;
193*4882a593Smuzhiyun }
194*4882a593Smuzhiyun 
stk8312_set_interrupts(struct stk8312_data * data,u8 int_mask)195*4882a593Smuzhiyun static int stk8312_set_interrupts(struct stk8312_data *data, u8 int_mask)
196*4882a593Smuzhiyun {
197*4882a593Smuzhiyun 	int ret;
198*4882a593Smuzhiyun 	u8 mode;
199*4882a593Smuzhiyun 	struct i2c_client *client = data->client;
200*4882a593Smuzhiyun 
201*4882a593Smuzhiyun 	mode = data->mode;
202*4882a593Smuzhiyun 	/* We need to go in standby mode to modify registers */
203*4882a593Smuzhiyun 	ret = stk8312_set_mode(data, STK8312_MODE_STANDBY);
204*4882a593Smuzhiyun 	if (ret < 0)
205*4882a593Smuzhiyun 		return ret;
206*4882a593Smuzhiyun 
207*4882a593Smuzhiyun 	ret = i2c_smbus_write_byte_data(client, STK8312_REG_INTSU, int_mask);
208*4882a593Smuzhiyun 	if (ret < 0) {
209*4882a593Smuzhiyun 		dev_err(&client->dev, "failed to set interrupts\n");
210*4882a593Smuzhiyun 		stk8312_set_mode(data, mode);
211*4882a593Smuzhiyun 		return ret;
212*4882a593Smuzhiyun 	}
213*4882a593Smuzhiyun 
214*4882a593Smuzhiyun 	return stk8312_set_mode(data, mode);
215*4882a593Smuzhiyun }
216*4882a593Smuzhiyun 
stk8312_data_rdy_trigger_set_state(struct iio_trigger * trig,bool state)217*4882a593Smuzhiyun static int stk8312_data_rdy_trigger_set_state(struct iio_trigger *trig,
218*4882a593Smuzhiyun 					      bool state)
219*4882a593Smuzhiyun {
220*4882a593Smuzhiyun 	struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
221*4882a593Smuzhiyun 	struct stk8312_data *data = iio_priv(indio_dev);
222*4882a593Smuzhiyun 	int ret;
223*4882a593Smuzhiyun 
224*4882a593Smuzhiyun 	if (state)
225*4882a593Smuzhiyun 		ret = stk8312_set_interrupts(data, STK8312_DREADY_BIT);
226*4882a593Smuzhiyun 	else
227*4882a593Smuzhiyun 		ret = stk8312_set_interrupts(data, 0x00);
228*4882a593Smuzhiyun 
229*4882a593Smuzhiyun 	if (ret < 0) {
230*4882a593Smuzhiyun 		dev_err(&data->client->dev, "failed to set trigger state\n");
231*4882a593Smuzhiyun 		return ret;
232*4882a593Smuzhiyun 	}
233*4882a593Smuzhiyun 
234*4882a593Smuzhiyun 	data->dready_trigger_on = state;
235*4882a593Smuzhiyun 
236*4882a593Smuzhiyun 	return 0;
237*4882a593Smuzhiyun }
238*4882a593Smuzhiyun 
239*4882a593Smuzhiyun static const struct iio_trigger_ops stk8312_trigger_ops = {
240*4882a593Smuzhiyun 	.set_trigger_state = stk8312_data_rdy_trigger_set_state,
241*4882a593Smuzhiyun };
242*4882a593Smuzhiyun 
stk8312_set_sample_rate(struct stk8312_data * data,u8 rate)243*4882a593Smuzhiyun static int stk8312_set_sample_rate(struct stk8312_data *data, u8 rate)
244*4882a593Smuzhiyun {
245*4882a593Smuzhiyun 	int ret;
246*4882a593Smuzhiyun 	u8 masked_reg;
247*4882a593Smuzhiyun 	u8 mode;
248*4882a593Smuzhiyun 	struct i2c_client *client = data->client;
249*4882a593Smuzhiyun 
250*4882a593Smuzhiyun 	if (rate == data->sample_rate_idx)
251*4882a593Smuzhiyun 		return 0;
252*4882a593Smuzhiyun 
253*4882a593Smuzhiyun 	mode = data->mode;
254*4882a593Smuzhiyun 	/* We need to go in standby mode to modify registers */
255*4882a593Smuzhiyun 	ret = stk8312_set_mode(data, STK8312_MODE_STANDBY);
256*4882a593Smuzhiyun 	if (ret < 0)
257*4882a593Smuzhiyun 		return ret;
258*4882a593Smuzhiyun 
259*4882a593Smuzhiyun 	ret = i2c_smbus_read_byte_data(client, STK8312_REG_SR);
260*4882a593Smuzhiyun 	if (ret < 0)
261*4882a593Smuzhiyun 		goto err_activate;
262*4882a593Smuzhiyun 
263*4882a593Smuzhiyun 	masked_reg = (ret & (~STK8312_SR_MASK)) | rate;
264*4882a593Smuzhiyun 
265*4882a593Smuzhiyun 	ret = i2c_smbus_write_byte_data(client, STK8312_REG_SR, masked_reg);
266*4882a593Smuzhiyun 	if (ret < 0)
267*4882a593Smuzhiyun 		goto err_activate;
268*4882a593Smuzhiyun 
269*4882a593Smuzhiyun 	data->sample_rate_idx = rate;
270*4882a593Smuzhiyun 
271*4882a593Smuzhiyun 	return stk8312_set_mode(data, mode);
272*4882a593Smuzhiyun 
273*4882a593Smuzhiyun err_activate:
274*4882a593Smuzhiyun 	dev_err(&client->dev, "failed to set sampling rate\n");
275*4882a593Smuzhiyun 	stk8312_set_mode(data, mode);
276*4882a593Smuzhiyun 
277*4882a593Smuzhiyun 	return ret;
278*4882a593Smuzhiyun }
279*4882a593Smuzhiyun 
stk8312_set_range(struct stk8312_data * data,u8 range)280*4882a593Smuzhiyun static int stk8312_set_range(struct stk8312_data *data, u8 range)
281*4882a593Smuzhiyun {
282*4882a593Smuzhiyun 	int ret;
283*4882a593Smuzhiyun 	u8 masked_reg;
284*4882a593Smuzhiyun 	u8 mode;
285*4882a593Smuzhiyun 	struct i2c_client *client = data->client;
286*4882a593Smuzhiyun 
287*4882a593Smuzhiyun 	if (range != 1 && range != 2)
288*4882a593Smuzhiyun 		return -EINVAL;
289*4882a593Smuzhiyun 	else if (range == data->range)
290*4882a593Smuzhiyun 		return 0;
291*4882a593Smuzhiyun 
292*4882a593Smuzhiyun 	mode = data->mode;
293*4882a593Smuzhiyun 	/* We need to go in standby mode to modify registers */
294*4882a593Smuzhiyun 	ret = stk8312_set_mode(data, STK8312_MODE_STANDBY);
295*4882a593Smuzhiyun 	if (ret < 0)
296*4882a593Smuzhiyun 		return ret;
297*4882a593Smuzhiyun 
298*4882a593Smuzhiyun 	ret = i2c_smbus_read_byte_data(client, STK8312_REG_STH);
299*4882a593Smuzhiyun 	if (ret < 0)
300*4882a593Smuzhiyun 		goto err_activate;
301*4882a593Smuzhiyun 
302*4882a593Smuzhiyun 	masked_reg = ret & (~STK8312_RNG_MASK);
303*4882a593Smuzhiyun 	masked_reg |= range << STK8312_RNG_SHIFT;
304*4882a593Smuzhiyun 
305*4882a593Smuzhiyun 	ret = i2c_smbus_write_byte_data(client, STK8312_REG_STH, masked_reg);
306*4882a593Smuzhiyun 	if (ret < 0)
307*4882a593Smuzhiyun 		goto err_activate;
308*4882a593Smuzhiyun 
309*4882a593Smuzhiyun 	data->range = range;
310*4882a593Smuzhiyun 
311*4882a593Smuzhiyun 	return stk8312_set_mode(data, mode);
312*4882a593Smuzhiyun 
313*4882a593Smuzhiyun err_activate:
314*4882a593Smuzhiyun 	dev_err(&client->dev, "failed to change sensor range\n");
315*4882a593Smuzhiyun 	stk8312_set_mode(data, mode);
316*4882a593Smuzhiyun 
317*4882a593Smuzhiyun 	return ret;
318*4882a593Smuzhiyun }
319*4882a593Smuzhiyun 
stk8312_read_accel(struct stk8312_data * data,u8 address)320*4882a593Smuzhiyun static int stk8312_read_accel(struct stk8312_data *data, u8 address)
321*4882a593Smuzhiyun {
322*4882a593Smuzhiyun 	int ret;
323*4882a593Smuzhiyun 	struct i2c_client *client = data->client;
324*4882a593Smuzhiyun 
325*4882a593Smuzhiyun 	if (address > 2)
326*4882a593Smuzhiyun 		return -EINVAL;
327*4882a593Smuzhiyun 
328*4882a593Smuzhiyun 	ret = i2c_smbus_read_byte_data(client, address);
329*4882a593Smuzhiyun 	if (ret < 0)
330*4882a593Smuzhiyun 		dev_err(&client->dev, "register read failed\n");
331*4882a593Smuzhiyun 
332*4882a593Smuzhiyun 	return ret;
333*4882a593Smuzhiyun }
334*4882a593Smuzhiyun 
stk8312_read_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int * val,int * val2,long mask)335*4882a593Smuzhiyun static int stk8312_read_raw(struct iio_dev *indio_dev,
336*4882a593Smuzhiyun 			    struct iio_chan_spec const *chan,
337*4882a593Smuzhiyun 			    int *val, int *val2, long mask)
338*4882a593Smuzhiyun {
339*4882a593Smuzhiyun 	struct stk8312_data *data = iio_priv(indio_dev);
340*4882a593Smuzhiyun 	int ret;
341*4882a593Smuzhiyun 
342*4882a593Smuzhiyun 	switch (mask) {
343*4882a593Smuzhiyun 	case IIO_CHAN_INFO_RAW:
344*4882a593Smuzhiyun 		if (iio_buffer_enabled(indio_dev))
345*4882a593Smuzhiyun 			return -EBUSY;
346*4882a593Smuzhiyun 		mutex_lock(&data->lock);
347*4882a593Smuzhiyun 		ret = stk8312_set_mode(data, data->mode | STK8312_MODE_ACTIVE);
348*4882a593Smuzhiyun 		if (ret < 0) {
349*4882a593Smuzhiyun 			mutex_unlock(&data->lock);
350*4882a593Smuzhiyun 			return ret;
351*4882a593Smuzhiyun 		}
352*4882a593Smuzhiyun 		ret = stk8312_read_accel(data, chan->address);
353*4882a593Smuzhiyun 		if (ret < 0) {
354*4882a593Smuzhiyun 			stk8312_set_mode(data,
355*4882a593Smuzhiyun 					 data->mode & (~STK8312_MODE_ACTIVE));
356*4882a593Smuzhiyun 			mutex_unlock(&data->lock);
357*4882a593Smuzhiyun 			return ret;
358*4882a593Smuzhiyun 		}
359*4882a593Smuzhiyun 		*val = sign_extend32(ret, 7);
360*4882a593Smuzhiyun 		ret = stk8312_set_mode(data,
361*4882a593Smuzhiyun 				       data->mode & (~STK8312_MODE_ACTIVE));
362*4882a593Smuzhiyun 		mutex_unlock(&data->lock);
363*4882a593Smuzhiyun 		if (ret < 0)
364*4882a593Smuzhiyun 			return ret;
365*4882a593Smuzhiyun 		return IIO_VAL_INT;
366*4882a593Smuzhiyun 	case IIO_CHAN_INFO_SCALE:
367*4882a593Smuzhiyun 		*val = stk8312_scale_table[data->range - 1][0];
368*4882a593Smuzhiyun 		*val2 = stk8312_scale_table[data->range - 1][1];
369*4882a593Smuzhiyun 		return IIO_VAL_INT_PLUS_MICRO;
370*4882a593Smuzhiyun 	case IIO_CHAN_INFO_SAMP_FREQ:
371*4882a593Smuzhiyun 		*val = stk8312_samp_freq_table[data->sample_rate_idx].val;
372*4882a593Smuzhiyun 		*val2 = stk8312_samp_freq_table[data->sample_rate_idx].val2;
373*4882a593Smuzhiyun 		return IIO_VAL_INT_PLUS_MICRO;
374*4882a593Smuzhiyun 	}
375*4882a593Smuzhiyun 
376*4882a593Smuzhiyun 	return -EINVAL;
377*4882a593Smuzhiyun }
378*4882a593Smuzhiyun 
stk8312_write_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int val,int val2,long mask)379*4882a593Smuzhiyun static int stk8312_write_raw(struct iio_dev *indio_dev,
380*4882a593Smuzhiyun 			     struct iio_chan_spec const *chan,
381*4882a593Smuzhiyun 			     int val, int val2, long mask)
382*4882a593Smuzhiyun {
383*4882a593Smuzhiyun 	int i;
384*4882a593Smuzhiyun 	int index = -1;
385*4882a593Smuzhiyun 	int ret;
386*4882a593Smuzhiyun 	struct stk8312_data *data = iio_priv(indio_dev);
387*4882a593Smuzhiyun 
388*4882a593Smuzhiyun 	switch (mask) {
389*4882a593Smuzhiyun 	case IIO_CHAN_INFO_SCALE:
390*4882a593Smuzhiyun 		for (i = 0; i < ARRAY_SIZE(stk8312_scale_table); i++)
391*4882a593Smuzhiyun 			if (val == stk8312_scale_table[i][0] &&
392*4882a593Smuzhiyun 			    val2 == stk8312_scale_table[i][1]) {
393*4882a593Smuzhiyun 				index = i + 1;
394*4882a593Smuzhiyun 				break;
395*4882a593Smuzhiyun 			}
396*4882a593Smuzhiyun 		if (index < 0)
397*4882a593Smuzhiyun 			return -EINVAL;
398*4882a593Smuzhiyun 
399*4882a593Smuzhiyun 		mutex_lock(&data->lock);
400*4882a593Smuzhiyun 		ret = stk8312_set_range(data, index);
401*4882a593Smuzhiyun 		mutex_unlock(&data->lock);
402*4882a593Smuzhiyun 
403*4882a593Smuzhiyun 		return ret;
404*4882a593Smuzhiyun 	case IIO_CHAN_INFO_SAMP_FREQ:
405*4882a593Smuzhiyun 		for (i = 0; i < ARRAY_SIZE(stk8312_samp_freq_table); i++)
406*4882a593Smuzhiyun 			if (val == stk8312_samp_freq_table[i].val &&
407*4882a593Smuzhiyun 			    val2 == stk8312_samp_freq_table[i].val2) {
408*4882a593Smuzhiyun 				index = i;
409*4882a593Smuzhiyun 				break;
410*4882a593Smuzhiyun 			}
411*4882a593Smuzhiyun 		if (index < 0)
412*4882a593Smuzhiyun 			return -EINVAL;
413*4882a593Smuzhiyun 		mutex_lock(&data->lock);
414*4882a593Smuzhiyun 		ret = stk8312_set_sample_rate(data, index);
415*4882a593Smuzhiyun 		mutex_unlock(&data->lock);
416*4882a593Smuzhiyun 
417*4882a593Smuzhiyun 		return ret;
418*4882a593Smuzhiyun 	}
419*4882a593Smuzhiyun 
420*4882a593Smuzhiyun 	return -EINVAL;
421*4882a593Smuzhiyun }
422*4882a593Smuzhiyun 
423*4882a593Smuzhiyun static const struct iio_info stk8312_info = {
424*4882a593Smuzhiyun 	.read_raw		= stk8312_read_raw,
425*4882a593Smuzhiyun 	.write_raw		= stk8312_write_raw,
426*4882a593Smuzhiyun 	.attrs			= &stk8312_attribute_group,
427*4882a593Smuzhiyun };
428*4882a593Smuzhiyun 
stk8312_trigger_handler(int irq,void * p)429*4882a593Smuzhiyun static irqreturn_t stk8312_trigger_handler(int irq, void *p)
430*4882a593Smuzhiyun {
431*4882a593Smuzhiyun 	struct iio_poll_func *pf = p;
432*4882a593Smuzhiyun 	struct iio_dev *indio_dev = pf->indio_dev;
433*4882a593Smuzhiyun 	struct stk8312_data *data = iio_priv(indio_dev);
434*4882a593Smuzhiyun 	int bit, ret, i = 0;
435*4882a593Smuzhiyun 
436*4882a593Smuzhiyun 	mutex_lock(&data->lock);
437*4882a593Smuzhiyun 	/*
438*4882a593Smuzhiyun 	 * Do a bulk read if all channels are requested,
439*4882a593Smuzhiyun 	 * from 0x00 (XOUT) to 0x02 (ZOUT)
440*4882a593Smuzhiyun 	 */
441*4882a593Smuzhiyun 	if (*(indio_dev->active_scan_mask) == STK8312_ALL_CHANNEL_MASK) {
442*4882a593Smuzhiyun 		ret = i2c_smbus_read_i2c_block_data(data->client,
443*4882a593Smuzhiyun 						    STK8312_REG_XOUT,
444*4882a593Smuzhiyun 						    STK8312_ALL_CHANNEL_SIZE,
445*4882a593Smuzhiyun 						    data->scan.chans);
446*4882a593Smuzhiyun 		if (ret < STK8312_ALL_CHANNEL_SIZE) {
447*4882a593Smuzhiyun 			dev_err(&data->client->dev, "register read failed\n");
448*4882a593Smuzhiyun 			mutex_unlock(&data->lock);
449*4882a593Smuzhiyun 			goto err;
450*4882a593Smuzhiyun 		}
451*4882a593Smuzhiyun 	} else {
452*4882a593Smuzhiyun 		for_each_set_bit(bit, indio_dev->active_scan_mask,
453*4882a593Smuzhiyun 				 indio_dev->masklength) {
454*4882a593Smuzhiyun 			ret = stk8312_read_accel(data, bit);
455*4882a593Smuzhiyun 			if (ret < 0) {
456*4882a593Smuzhiyun 				mutex_unlock(&data->lock);
457*4882a593Smuzhiyun 				goto err;
458*4882a593Smuzhiyun 			}
459*4882a593Smuzhiyun 			data->scan.chans[i++] = ret;
460*4882a593Smuzhiyun 		}
461*4882a593Smuzhiyun 	}
462*4882a593Smuzhiyun 	mutex_unlock(&data->lock);
463*4882a593Smuzhiyun 
464*4882a593Smuzhiyun 	iio_push_to_buffers_with_timestamp(indio_dev, &data->scan,
465*4882a593Smuzhiyun 					   pf->timestamp);
466*4882a593Smuzhiyun err:
467*4882a593Smuzhiyun 	iio_trigger_notify_done(indio_dev->trig);
468*4882a593Smuzhiyun 
469*4882a593Smuzhiyun 	return IRQ_HANDLED;
470*4882a593Smuzhiyun }
471*4882a593Smuzhiyun 
stk8312_data_rdy_trig_poll(int irq,void * private)472*4882a593Smuzhiyun static irqreturn_t stk8312_data_rdy_trig_poll(int irq, void *private)
473*4882a593Smuzhiyun {
474*4882a593Smuzhiyun 	struct iio_dev *indio_dev = private;
475*4882a593Smuzhiyun 	struct stk8312_data *data = iio_priv(indio_dev);
476*4882a593Smuzhiyun 
477*4882a593Smuzhiyun 	if (data->dready_trigger_on)
478*4882a593Smuzhiyun 		iio_trigger_poll(data->dready_trig);
479*4882a593Smuzhiyun 
480*4882a593Smuzhiyun 	return IRQ_HANDLED;
481*4882a593Smuzhiyun }
482*4882a593Smuzhiyun 
stk8312_buffer_preenable(struct iio_dev * indio_dev)483*4882a593Smuzhiyun static int stk8312_buffer_preenable(struct iio_dev *indio_dev)
484*4882a593Smuzhiyun {
485*4882a593Smuzhiyun 	struct stk8312_data *data = iio_priv(indio_dev);
486*4882a593Smuzhiyun 
487*4882a593Smuzhiyun 	return stk8312_set_mode(data, data->mode | STK8312_MODE_ACTIVE);
488*4882a593Smuzhiyun }
489*4882a593Smuzhiyun 
stk8312_buffer_postdisable(struct iio_dev * indio_dev)490*4882a593Smuzhiyun static int stk8312_buffer_postdisable(struct iio_dev *indio_dev)
491*4882a593Smuzhiyun {
492*4882a593Smuzhiyun 	struct stk8312_data *data = iio_priv(indio_dev);
493*4882a593Smuzhiyun 
494*4882a593Smuzhiyun 	return stk8312_set_mode(data, data->mode & (~STK8312_MODE_ACTIVE));
495*4882a593Smuzhiyun }
496*4882a593Smuzhiyun 
497*4882a593Smuzhiyun static const struct iio_buffer_setup_ops stk8312_buffer_setup_ops = {
498*4882a593Smuzhiyun 	.preenable   = stk8312_buffer_preenable,
499*4882a593Smuzhiyun 	.postdisable = stk8312_buffer_postdisable,
500*4882a593Smuzhiyun };
501*4882a593Smuzhiyun 
stk8312_probe(struct i2c_client * client,const struct i2c_device_id * id)502*4882a593Smuzhiyun static int stk8312_probe(struct i2c_client *client,
503*4882a593Smuzhiyun 			 const struct i2c_device_id *id)
504*4882a593Smuzhiyun {
505*4882a593Smuzhiyun 	int ret;
506*4882a593Smuzhiyun 	struct iio_dev *indio_dev;
507*4882a593Smuzhiyun 	struct stk8312_data *data;
508*4882a593Smuzhiyun 
509*4882a593Smuzhiyun 	indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
510*4882a593Smuzhiyun 	if (!indio_dev) {
511*4882a593Smuzhiyun 		dev_err(&client->dev, "iio allocation failed!\n");
512*4882a593Smuzhiyun 		return -ENOMEM;
513*4882a593Smuzhiyun 	}
514*4882a593Smuzhiyun 
515*4882a593Smuzhiyun 	data = iio_priv(indio_dev);
516*4882a593Smuzhiyun 	data->client = client;
517*4882a593Smuzhiyun 	i2c_set_clientdata(client, indio_dev);
518*4882a593Smuzhiyun 	mutex_init(&data->lock);
519*4882a593Smuzhiyun 
520*4882a593Smuzhiyun 	indio_dev->info = &stk8312_info;
521*4882a593Smuzhiyun 	indio_dev->name = STK8312_DRIVER_NAME;
522*4882a593Smuzhiyun 	indio_dev->modes = INDIO_DIRECT_MODE;
523*4882a593Smuzhiyun 	indio_dev->channels = stk8312_channels;
524*4882a593Smuzhiyun 	indio_dev->num_channels = ARRAY_SIZE(stk8312_channels);
525*4882a593Smuzhiyun 
526*4882a593Smuzhiyun 	/* A software reset is recommended at power-on */
527*4882a593Smuzhiyun 	ret = i2c_smbus_write_byte_data(data->client, STK8312_REG_RESET, 0x00);
528*4882a593Smuzhiyun 	if (ret < 0) {
529*4882a593Smuzhiyun 		dev_err(&client->dev, "failed to reset sensor\n");
530*4882a593Smuzhiyun 		return ret;
531*4882a593Smuzhiyun 	}
532*4882a593Smuzhiyun 	data->sample_rate_idx = STK8312_SR_400HZ_IDX;
533*4882a593Smuzhiyun 	ret = stk8312_set_range(data, STK8312_RNG_6G);
534*4882a593Smuzhiyun 	if (ret < 0)
535*4882a593Smuzhiyun 		return ret;
536*4882a593Smuzhiyun 
537*4882a593Smuzhiyun 	ret = stk8312_set_mode(data,
538*4882a593Smuzhiyun 			       STK8312_MODE_INT_AH_PP | STK8312_MODE_ACTIVE);
539*4882a593Smuzhiyun 	if (ret < 0)
540*4882a593Smuzhiyun 		return ret;
541*4882a593Smuzhiyun 
542*4882a593Smuzhiyun 	if (client->irq > 0) {
543*4882a593Smuzhiyun 		ret = devm_request_threaded_irq(&client->dev, client->irq,
544*4882a593Smuzhiyun 						stk8312_data_rdy_trig_poll,
545*4882a593Smuzhiyun 						NULL,
546*4882a593Smuzhiyun 						IRQF_TRIGGER_RISING |
547*4882a593Smuzhiyun 						IRQF_ONESHOT,
548*4882a593Smuzhiyun 						STK8312_IRQ_NAME,
549*4882a593Smuzhiyun 						indio_dev);
550*4882a593Smuzhiyun 		if (ret < 0) {
551*4882a593Smuzhiyun 			dev_err(&client->dev, "request irq %d failed\n",
552*4882a593Smuzhiyun 				client->irq);
553*4882a593Smuzhiyun 			goto err_power_off;
554*4882a593Smuzhiyun 		}
555*4882a593Smuzhiyun 
556*4882a593Smuzhiyun 		data->dready_trig = devm_iio_trigger_alloc(&client->dev,
557*4882a593Smuzhiyun 							   "%s-dev%d",
558*4882a593Smuzhiyun 							   indio_dev->name,
559*4882a593Smuzhiyun 							   indio_dev->id);
560*4882a593Smuzhiyun 		if (!data->dready_trig) {
561*4882a593Smuzhiyun 			ret = -ENOMEM;
562*4882a593Smuzhiyun 			goto err_power_off;
563*4882a593Smuzhiyun 		}
564*4882a593Smuzhiyun 
565*4882a593Smuzhiyun 		data->dready_trig->dev.parent = &client->dev;
566*4882a593Smuzhiyun 		data->dready_trig->ops = &stk8312_trigger_ops;
567*4882a593Smuzhiyun 		iio_trigger_set_drvdata(data->dready_trig, indio_dev);
568*4882a593Smuzhiyun 		ret = iio_trigger_register(data->dready_trig);
569*4882a593Smuzhiyun 		if (ret) {
570*4882a593Smuzhiyun 			dev_err(&client->dev, "iio trigger register failed\n");
571*4882a593Smuzhiyun 			goto err_power_off;
572*4882a593Smuzhiyun 		}
573*4882a593Smuzhiyun 	}
574*4882a593Smuzhiyun 
575*4882a593Smuzhiyun 	ret = iio_triggered_buffer_setup(indio_dev,
576*4882a593Smuzhiyun 					 iio_pollfunc_store_time,
577*4882a593Smuzhiyun 					 stk8312_trigger_handler,
578*4882a593Smuzhiyun 					 &stk8312_buffer_setup_ops);
579*4882a593Smuzhiyun 	if (ret < 0) {
580*4882a593Smuzhiyun 		dev_err(&client->dev, "iio triggered buffer setup failed\n");
581*4882a593Smuzhiyun 		goto err_trigger_unregister;
582*4882a593Smuzhiyun 	}
583*4882a593Smuzhiyun 
584*4882a593Smuzhiyun 	ret = iio_device_register(indio_dev);
585*4882a593Smuzhiyun 	if (ret < 0) {
586*4882a593Smuzhiyun 		dev_err(&client->dev, "device_register failed\n");
587*4882a593Smuzhiyun 		goto err_buffer_cleanup;
588*4882a593Smuzhiyun 	}
589*4882a593Smuzhiyun 
590*4882a593Smuzhiyun 	return 0;
591*4882a593Smuzhiyun 
592*4882a593Smuzhiyun err_buffer_cleanup:
593*4882a593Smuzhiyun 	iio_triggered_buffer_cleanup(indio_dev);
594*4882a593Smuzhiyun err_trigger_unregister:
595*4882a593Smuzhiyun 	if (data->dready_trig)
596*4882a593Smuzhiyun 		iio_trigger_unregister(data->dready_trig);
597*4882a593Smuzhiyun err_power_off:
598*4882a593Smuzhiyun 	stk8312_set_mode(data, STK8312_MODE_STANDBY);
599*4882a593Smuzhiyun 	return ret;
600*4882a593Smuzhiyun }
601*4882a593Smuzhiyun 
stk8312_remove(struct i2c_client * client)602*4882a593Smuzhiyun static int stk8312_remove(struct i2c_client *client)
603*4882a593Smuzhiyun {
604*4882a593Smuzhiyun 	struct iio_dev *indio_dev = i2c_get_clientdata(client);
605*4882a593Smuzhiyun 	struct stk8312_data *data = iio_priv(indio_dev);
606*4882a593Smuzhiyun 
607*4882a593Smuzhiyun 	iio_device_unregister(indio_dev);
608*4882a593Smuzhiyun 	iio_triggered_buffer_cleanup(indio_dev);
609*4882a593Smuzhiyun 
610*4882a593Smuzhiyun 	if (data->dready_trig)
611*4882a593Smuzhiyun 		iio_trigger_unregister(data->dready_trig);
612*4882a593Smuzhiyun 
613*4882a593Smuzhiyun 	return stk8312_set_mode(data, STK8312_MODE_STANDBY);
614*4882a593Smuzhiyun }
615*4882a593Smuzhiyun 
616*4882a593Smuzhiyun #ifdef CONFIG_PM_SLEEP
stk8312_suspend(struct device * dev)617*4882a593Smuzhiyun static int stk8312_suspend(struct device *dev)
618*4882a593Smuzhiyun {
619*4882a593Smuzhiyun 	struct stk8312_data *data;
620*4882a593Smuzhiyun 
621*4882a593Smuzhiyun 	data = iio_priv(i2c_get_clientdata(to_i2c_client(dev)));
622*4882a593Smuzhiyun 
623*4882a593Smuzhiyun 	return stk8312_set_mode(data, data->mode & (~STK8312_MODE_ACTIVE));
624*4882a593Smuzhiyun }
625*4882a593Smuzhiyun 
stk8312_resume(struct device * dev)626*4882a593Smuzhiyun static int stk8312_resume(struct device *dev)
627*4882a593Smuzhiyun {
628*4882a593Smuzhiyun 	struct stk8312_data *data;
629*4882a593Smuzhiyun 
630*4882a593Smuzhiyun 	data = iio_priv(i2c_get_clientdata(to_i2c_client(dev)));
631*4882a593Smuzhiyun 
632*4882a593Smuzhiyun 	return stk8312_set_mode(data, data->mode | STK8312_MODE_ACTIVE);
633*4882a593Smuzhiyun }
634*4882a593Smuzhiyun 
635*4882a593Smuzhiyun static SIMPLE_DEV_PM_OPS(stk8312_pm_ops, stk8312_suspend, stk8312_resume);
636*4882a593Smuzhiyun 
637*4882a593Smuzhiyun #define STK8312_PM_OPS (&stk8312_pm_ops)
638*4882a593Smuzhiyun #else
639*4882a593Smuzhiyun #define STK8312_PM_OPS NULL
640*4882a593Smuzhiyun #endif
641*4882a593Smuzhiyun 
642*4882a593Smuzhiyun static const struct i2c_device_id stk8312_i2c_id[] = {
643*4882a593Smuzhiyun 	{"STK8312", 0},
644*4882a593Smuzhiyun 	{}
645*4882a593Smuzhiyun };
646*4882a593Smuzhiyun MODULE_DEVICE_TABLE(i2c, stk8312_i2c_id);
647*4882a593Smuzhiyun 
648*4882a593Smuzhiyun static const struct acpi_device_id stk8312_acpi_id[] = {
649*4882a593Smuzhiyun 	{"STK8312", 0},
650*4882a593Smuzhiyun 	{}
651*4882a593Smuzhiyun };
652*4882a593Smuzhiyun 
653*4882a593Smuzhiyun MODULE_DEVICE_TABLE(acpi, stk8312_acpi_id);
654*4882a593Smuzhiyun 
655*4882a593Smuzhiyun static struct i2c_driver stk8312_driver = {
656*4882a593Smuzhiyun 	.driver = {
657*4882a593Smuzhiyun 		.name = STK8312_DRIVER_NAME,
658*4882a593Smuzhiyun 		.pm = STK8312_PM_OPS,
659*4882a593Smuzhiyun 		.acpi_match_table = ACPI_PTR(stk8312_acpi_id),
660*4882a593Smuzhiyun 	},
661*4882a593Smuzhiyun 	.probe =            stk8312_probe,
662*4882a593Smuzhiyun 	.remove =           stk8312_remove,
663*4882a593Smuzhiyun 	.id_table =         stk8312_i2c_id,
664*4882a593Smuzhiyun };
665*4882a593Smuzhiyun 
666*4882a593Smuzhiyun module_i2c_driver(stk8312_driver);
667*4882a593Smuzhiyun 
668*4882a593Smuzhiyun MODULE_AUTHOR("Tiberiu Breana <tiberiu.a.breana@intel.com>");
669*4882a593Smuzhiyun MODULE_DESCRIPTION("STK8312 3-Axis Accelerometer driver");
670*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
671