1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * MXC6255 - MEMSIC orientation sensing accelerometer
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (c) 2015, Intel Corporation.
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * IIO driver for MXC6255 (7-bit I2C slave address 0x15).
8*4882a593Smuzhiyun */
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun #include <linux/module.h>
11*4882a593Smuzhiyun #include <linux/i2c.h>
12*4882a593Smuzhiyun #include <linux/init.h>
13*4882a593Smuzhiyun #include <linux/iio/iio.h>
14*4882a593Smuzhiyun #include <linux/delay.h>
15*4882a593Smuzhiyun #include <linux/acpi.h>
16*4882a593Smuzhiyun #include <linux/regmap.h>
17*4882a593Smuzhiyun #include <linux/iio/sysfs.h>
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun #define MXC6255_DRV_NAME "mxc6255"
20*4882a593Smuzhiyun #define MXC6255_REGMAP_NAME "mxc6255_regmap"
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun #define MXC6255_REG_XOUT 0x00
23*4882a593Smuzhiyun #define MXC6255_REG_YOUT 0x01
24*4882a593Smuzhiyun #define MXC6255_REG_CHIP_ID 0x08
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun #define MXC6255_CHIP_ID 0x05
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun /*
29*4882a593Smuzhiyun * MXC6255 has only one measurement range: +/- 2G.
30*4882a593Smuzhiyun * The acceleration output is an 8-bit value.
31*4882a593Smuzhiyun *
32*4882a593Smuzhiyun * Scale is calculated as follows:
33*4882a593Smuzhiyun * (2 + 2) * 9.80665 / (2^8 - 1) = 0.153829
34*4882a593Smuzhiyun *
35*4882a593Smuzhiyun * Scale value for +/- 2G measurement range
36*4882a593Smuzhiyun */
37*4882a593Smuzhiyun #define MXC6255_SCALE 153829
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun enum mxc6255_axis {
40*4882a593Smuzhiyun AXIS_X,
41*4882a593Smuzhiyun AXIS_Y,
42*4882a593Smuzhiyun };
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun struct mxc6255_data {
45*4882a593Smuzhiyun struct i2c_client *client;
46*4882a593Smuzhiyun struct regmap *regmap;
47*4882a593Smuzhiyun };
48*4882a593Smuzhiyun
mxc6255_read_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int * val,int * val2,long mask)49*4882a593Smuzhiyun static int mxc6255_read_raw(struct iio_dev *indio_dev,
50*4882a593Smuzhiyun struct iio_chan_spec const *chan,
51*4882a593Smuzhiyun int *val, int *val2, long mask)
52*4882a593Smuzhiyun {
53*4882a593Smuzhiyun struct mxc6255_data *data = iio_priv(indio_dev);
54*4882a593Smuzhiyun unsigned int reg;
55*4882a593Smuzhiyun int ret;
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun switch (mask) {
58*4882a593Smuzhiyun case IIO_CHAN_INFO_RAW:
59*4882a593Smuzhiyun ret = regmap_read(data->regmap, chan->address, ®);
60*4882a593Smuzhiyun if (ret < 0) {
61*4882a593Smuzhiyun dev_err(&data->client->dev,
62*4882a593Smuzhiyun "Error reading reg %lu\n", chan->address);
63*4882a593Smuzhiyun return ret;
64*4882a593Smuzhiyun }
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun *val = sign_extend32(reg, 7);
67*4882a593Smuzhiyun return IIO_VAL_INT;
68*4882a593Smuzhiyun case IIO_CHAN_INFO_SCALE:
69*4882a593Smuzhiyun *val = 0;
70*4882a593Smuzhiyun *val2 = MXC6255_SCALE;
71*4882a593Smuzhiyun return IIO_VAL_INT_PLUS_MICRO;
72*4882a593Smuzhiyun default:
73*4882a593Smuzhiyun return -EINVAL;
74*4882a593Smuzhiyun }
75*4882a593Smuzhiyun }
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun static const struct iio_info mxc6255_info = {
78*4882a593Smuzhiyun .read_raw = mxc6255_read_raw,
79*4882a593Smuzhiyun };
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun #define MXC6255_CHANNEL(_axis, reg) { \
82*4882a593Smuzhiyun .type = IIO_ACCEL, \
83*4882a593Smuzhiyun .modified = 1, \
84*4882a593Smuzhiyun .channel2 = IIO_MOD_##_axis, \
85*4882a593Smuzhiyun .address = reg, \
86*4882a593Smuzhiyun .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
87*4882a593Smuzhiyun .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
88*4882a593Smuzhiyun }
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun static const struct iio_chan_spec mxc6255_channels[] = {
91*4882a593Smuzhiyun MXC6255_CHANNEL(X, MXC6255_REG_XOUT),
92*4882a593Smuzhiyun MXC6255_CHANNEL(Y, MXC6255_REG_YOUT),
93*4882a593Smuzhiyun };
94*4882a593Smuzhiyun
mxc6255_is_readable_reg(struct device * dev,unsigned int reg)95*4882a593Smuzhiyun static bool mxc6255_is_readable_reg(struct device *dev, unsigned int reg)
96*4882a593Smuzhiyun {
97*4882a593Smuzhiyun switch (reg) {
98*4882a593Smuzhiyun case MXC6255_REG_XOUT:
99*4882a593Smuzhiyun case MXC6255_REG_YOUT:
100*4882a593Smuzhiyun case MXC6255_REG_CHIP_ID:
101*4882a593Smuzhiyun return true;
102*4882a593Smuzhiyun default:
103*4882a593Smuzhiyun return false;
104*4882a593Smuzhiyun }
105*4882a593Smuzhiyun }
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun static const struct regmap_config mxc6255_regmap_config = {
108*4882a593Smuzhiyun .name = MXC6255_REGMAP_NAME,
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun .reg_bits = 8,
111*4882a593Smuzhiyun .val_bits = 8,
112*4882a593Smuzhiyun
113*4882a593Smuzhiyun .readable_reg = mxc6255_is_readable_reg,
114*4882a593Smuzhiyun };
115*4882a593Smuzhiyun
mxc6255_probe(struct i2c_client * client,const struct i2c_device_id * id)116*4882a593Smuzhiyun static int mxc6255_probe(struct i2c_client *client,
117*4882a593Smuzhiyun const struct i2c_device_id *id)
118*4882a593Smuzhiyun {
119*4882a593Smuzhiyun struct mxc6255_data *data;
120*4882a593Smuzhiyun struct iio_dev *indio_dev;
121*4882a593Smuzhiyun struct regmap *regmap;
122*4882a593Smuzhiyun unsigned int chip_id;
123*4882a593Smuzhiyun int ret;
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
126*4882a593Smuzhiyun if (!indio_dev)
127*4882a593Smuzhiyun return -ENOMEM;
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun regmap = devm_regmap_init_i2c(client, &mxc6255_regmap_config);
130*4882a593Smuzhiyun if (IS_ERR(regmap)) {
131*4882a593Smuzhiyun dev_err(&client->dev, "Error initializing regmap\n");
132*4882a593Smuzhiyun return PTR_ERR(regmap);
133*4882a593Smuzhiyun }
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun data = iio_priv(indio_dev);
136*4882a593Smuzhiyun i2c_set_clientdata(client, indio_dev);
137*4882a593Smuzhiyun data->client = client;
138*4882a593Smuzhiyun data->regmap = regmap;
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun indio_dev->name = MXC6255_DRV_NAME;
141*4882a593Smuzhiyun indio_dev->channels = mxc6255_channels;
142*4882a593Smuzhiyun indio_dev->num_channels = ARRAY_SIZE(mxc6255_channels);
143*4882a593Smuzhiyun indio_dev->modes = INDIO_DIRECT_MODE;
144*4882a593Smuzhiyun indio_dev->info = &mxc6255_info;
145*4882a593Smuzhiyun
146*4882a593Smuzhiyun ret = regmap_read(data->regmap, MXC6255_REG_CHIP_ID, &chip_id);
147*4882a593Smuzhiyun if (ret < 0) {
148*4882a593Smuzhiyun dev_err(&client->dev, "Error reading chip id %d\n", ret);
149*4882a593Smuzhiyun return ret;
150*4882a593Smuzhiyun }
151*4882a593Smuzhiyun
152*4882a593Smuzhiyun if ((chip_id & 0x1f) != MXC6255_CHIP_ID) {
153*4882a593Smuzhiyun dev_err(&client->dev, "Invalid chip id %x\n", chip_id);
154*4882a593Smuzhiyun return -ENODEV;
155*4882a593Smuzhiyun }
156*4882a593Smuzhiyun
157*4882a593Smuzhiyun dev_dbg(&client->dev, "Chip id %x\n", chip_id);
158*4882a593Smuzhiyun
159*4882a593Smuzhiyun ret = devm_iio_device_register(&client->dev, indio_dev);
160*4882a593Smuzhiyun if (ret < 0) {
161*4882a593Smuzhiyun dev_err(&client->dev, "Could not register IIO device\n");
162*4882a593Smuzhiyun return ret;
163*4882a593Smuzhiyun }
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun return 0;
166*4882a593Smuzhiyun }
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun static const struct acpi_device_id mxc6255_acpi_match[] = {
169*4882a593Smuzhiyun {"MXC6225", 0},
170*4882a593Smuzhiyun {"MXC6255", 0},
171*4882a593Smuzhiyun { }
172*4882a593Smuzhiyun };
173*4882a593Smuzhiyun MODULE_DEVICE_TABLE(acpi, mxc6255_acpi_match);
174*4882a593Smuzhiyun
175*4882a593Smuzhiyun static const struct i2c_device_id mxc6255_id[] = {
176*4882a593Smuzhiyun {"mxc6225", 0},
177*4882a593Smuzhiyun {"mxc6255", 0},
178*4882a593Smuzhiyun { }
179*4882a593Smuzhiyun };
180*4882a593Smuzhiyun MODULE_DEVICE_TABLE(i2c, mxc6255_id);
181*4882a593Smuzhiyun
182*4882a593Smuzhiyun static struct i2c_driver mxc6255_driver = {
183*4882a593Smuzhiyun .driver = {
184*4882a593Smuzhiyun .name = MXC6255_DRV_NAME,
185*4882a593Smuzhiyun .acpi_match_table = ACPI_PTR(mxc6255_acpi_match),
186*4882a593Smuzhiyun },
187*4882a593Smuzhiyun .probe = mxc6255_probe,
188*4882a593Smuzhiyun .id_table = mxc6255_id,
189*4882a593Smuzhiyun };
190*4882a593Smuzhiyun
191*4882a593Smuzhiyun module_i2c_driver(mxc6255_driver);
192*4882a593Smuzhiyun
193*4882a593Smuzhiyun MODULE_AUTHOR("Teodora Baluta <teodora.baluta@intel.com>");
194*4882a593Smuzhiyun MODULE_DESCRIPTION("MEMSIC MXC6255 orientation sensing accelerometer driver");
195*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
196