1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * ITE 8213 IDE driver
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2006 Jack Lee
6*4882a593Smuzhiyun * Copyright (C) 2006 Alan Cox
7*4882a593Smuzhiyun * Copyright (C) 2007 Bartlomiej Zolnierkiewicz
8*4882a593Smuzhiyun */
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun #include <linux/kernel.h>
11*4882a593Smuzhiyun #include <linux/types.h>
12*4882a593Smuzhiyun #include <linux/module.h>
13*4882a593Smuzhiyun #include <linux/pci.h>
14*4882a593Smuzhiyun #include <linux/ide.h>
15*4882a593Smuzhiyun #include <linux/init.h>
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun #define DRV_NAME "it8213"
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun /**
20*4882a593Smuzhiyun * it8213_set_pio_mode - set host controller for PIO mode
21*4882a593Smuzhiyun * @hwif: port
22*4882a593Smuzhiyun * @drive: drive
23*4882a593Smuzhiyun *
24*4882a593Smuzhiyun * Set the interface PIO mode.
25*4882a593Smuzhiyun */
26*4882a593Smuzhiyun
it8213_set_pio_mode(ide_hwif_t * hwif,ide_drive_t * drive)27*4882a593Smuzhiyun static void it8213_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
28*4882a593Smuzhiyun {
29*4882a593Smuzhiyun struct pci_dev *dev = to_pci_dev(hwif->dev);
30*4882a593Smuzhiyun int is_slave = drive->dn & 1;
31*4882a593Smuzhiyun int master_port = 0x40;
32*4882a593Smuzhiyun int slave_port = 0x44;
33*4882a593Smuzhiyun unsigned long flags;
34*4882a593Smuzhiyun u16 master_data;
35*4882a593Smuzhiyun u8 slave_data;
36*4882a593Smuzhiyun static DEFINE_SPINLOCK(tune_lock);
37*4882a593Smuzhiyun int control = 0;
38*4882a593Smuzhiyun const u8 pio = drive->pio_mode - XFER_PIO_0;
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun static const u8 timings[][2] = {
41*4882a593Smuzhiyun { 0, 0 },
42*4882a593Smuzhiyun { 0, 0 },
43*4882a593Smuzhiyun { 1, 0 },
44*4882a593Smuzhiyun { 2, 1 },
45*4882a593Smuzhiyun { 2, 3 }, };
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun spin_lock_irqsave(&tune_lock, flags);
48*4882a593Smuzhiyun pci_read_config_word(dev, master_port, &master_data);
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun if (pio > 1)
51*4882a593Smuzhiyun control |= 1; /* Programmable timing on */
52*4882a593Smuzhiyun if (drive->media != ide_disk)
53*4882a593Smuzhiyun control |= 4; /* ATAPI */
54*4882a593Smuzhiyun if (ide_pio_need_iordy(drive, pio))
55*4882a593Smuzhiyun control |= 2; /* IORDY */
56*4882a593Smuzhiyun if (is_slave) {
57*4882a593Smuzhiyun master_data |= 0x4000;
58*4882a593Smuzhiyun master_data &= ~0x0070;
59*4882a593Smuzhiyun if (pio > 1)
60*4882a593Smuzhiyun master_data = master_data | (control << 4);
61*4882a593Smuzhiyun pci_read_config_byte(dev, slave_port, &slave_data);
62*4882a593Smuzhiyun slave_data = slave_data & 0xf0;
63*4882a593Smuzhiyun slave_data = slave_data | (timings[pio][0] << 2) | timings[pio][1];
64*4882a593Smuzhiyun } else {
65*4882a593Smuzhiyun master_data &= ~0x3307;
66*4882a593Smuzhiyun if (pio > 1)
67*4882a593Smuzhiyun master_data = master_data | control;
68*4882a593Smuzhiyun master_data = master_data | (timings[pio][0] << 12) | (timings[pio][1] << 8);
69*4882a593Smuzhiyun }
70*4882a593Smuzhiyun pci_write_config_word(dev, master_port, master_data);
71*4882a593Smuzhiyun if (is_slave)
72*4882a593Smuzhiyun pci_write_config_byte(dev, slave_port, slave_data);
73*4882a593Smuzhiyun spin_unlock_irqrestore(&tune_lock, flags);
74*4882a593Smuzhiyun }
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun /**
77*4882a593Smuzhiyun * it8213_set_dma_mode - set host controller for DMA mode
78*4882a593Smuzhiyun * @hwif: port
79*4882a593Smuzhiyun * @drive: drive
80*4882a593Smuzhiyun *
81*4882a593Smuzhiyun * Tune the ITE chipset for the DMA mode.
82*4882a593Smuzhiyun */
83*4882a593Smuzhiyun
it8213_set_dma_mode(ide_hwif_t * hwif,ide_drive_t * drive)84*4882a593Smuzhiyun static void it8213_set_dma_mode(ide_hwif_t *hwif, ide_drive_t *drive)
85*4882a593Smuzhiyun {
86*4882a593Smuzhiyun struct pci_dev *dev = to_pci_dev(hwif->dev);
87*4882a593Smuzhiyun u8 maslave = 0x40;
88*4882a593Smuzhiyun int a_speed = 3 << (drive->dn * 4);
89*4882a593Smuzhiyun int u_flag = 1 << drive->dn;
90*4882a593Smuzhiyun int v_flag = 0x01 << drive->dn;
91*4882a593Smuzhiyun int w_flag = 0x10 << drive->dn;
92*4882a593Smuzhiyun int u_speed = 0;
93*4882a593Smuzhiyun u16 reg4042, reg4a;
94*4882a593Smuzhiyun u8 reg48, reg54, reg55;
95*4882a593Smuzhiyun const u8 speed = drive->dma_mode;
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun pci_read_config_word(dev, maslave, ®4042);
98*4882a593Smuzhiyun pci_read_config_byte(dev, 0x48, ®48);
99*4882a593Smuzhiyun pci_read_config_word(dev, 0x4a, ®4a);
100*4882a593Smuzhiyun pci_read_config_byte(dev, 0x54, ®54);
101*4882a593Smuzhiyun pci_read_config_byte(dev, 0x55, ®55);
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun if (speed >= XFER_UDMA_0) {
104*4882a593Smuzhiyun u8 udma = speed - XFER_UDMA_0;
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun u_speed = min_t(u8, 2 - (udma & 1), udma) << (drive->dn * 4);
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun if (!(reg48 & u_flag))
109*4882a593Smuzhiyun pci_write_config_byte(dev, 0x48, reg48 | u_flag);
110*4882a593Smuzhiyun if (speed >= XFER_UDMA_5)
111*4882a593Smuzhiyun pci_write_config_byte(dev, 0x55, (u8) reg55|w_flag);
112*4882a593Smuzhiyun else
113*4882a593Smuzhiyun pci_write_config_byte(dev, 0x55, (u8) reg55 & ~w_flag);
114*4882a593Smuzhiyun
115*4882a593Smuzhiyun if ((reg4a & a_speed) != u_speed)
116*4882a593Smuzhiyun pci_write_config_word(dev, 0x4a, (reg4a & ~a_speed) | u_speed);
117*4882a593Smuzhiyun if (speed > XFER_UDMA_2) {
118*4882a593Smuzhiyun if (!(reg54 & v_flag))
119*4882a593Smuzhiyun pci_write_config_byte(dev, 0x54, reg54 | v_flag);
120*4882a593Smuzhiyun } else
121*4882a593Smuzhiyun pci_write_config_byte(dev, 0x54, reg54 & ~v_flag);
122*4882a593Smuzhiyun } else {
123*4882a593Smuzhiyun const u8 mwdma_to_pio[] = { 0, 3, 4 };
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun if (reg48 & u_flag)
126*4882a593Smuzhiyun pci_write_config_byte(dev, 0x48, reg48 & ~u_flag);
127*4882a593Smuzhiyun if (reg4a & a_speed)
128*4882a593Smuzhiyun pci_write_config_word(dev, 0x4a, reg4a & ~a_speed);
129*4882a593Smuzhiyun if (reg54 & v_flag)
130*4882a593Smuzhiyun pci_write_config_byte(dev, 0x54, reg54 & ~v_flag);
131*4882a593Smuzhiyun if (reg55 & w_flag)
132*4882a593Smuzhiyun pci_write_config_byte(dev, 0x55, (u8) reg55 & ~w_flag);
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun if (speed >= XFER_MW_DMA_0)
135*4882a593Smuzhiyun drive->pio_mode =
136*4882a593Smuzhiyun mwdma_to_pio[speed - XFER_MW_DMA_0] + XFER_PIO_0;
137*4882a593Smuzhiyun else
138*4882a593Smuzhiyun drive->pio_mode = XFER_PIO_2; /* for SWDMA2 */
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun it8213_set_pio_mode(hwif, drive);
141*4882a593Smuzhiyun }
142*4882a593Smuzhiyun }
143*4882a593Smuzhiyun
it8213_cable_detect(ide_hwif_t * hwif)144*4882a593Smuzhiyun static u8 it8213_cable_detect(ide_hwif_t *hwif)
145*4882a593Smuzhiyun {
146*4882a593Smuzhiyun struct pci_dev *dev = to_pci_dev(hwif->dev);
147*4882a593Smuzhiyun u8 reg42h = 0;
148*4882a593Smuzhiyun
149*4882a593Smuzhiyun pci_read_config_byte(dev, 0x42, ®42h);
150*4882a593Smuzhiyun
151*4882a593Smuzhiyun return (reg42h & 0x02) ? ATA_CBL_PATA40 : ATA_CBL_PATA80;
152*4882a593Smuzhiyun }
153*4882a593Smuzhiyun
154*4882a593Smuzhiyun static const struct ide_port_ops it8213_port_ops = {
155*4882a593Smuzhiyun .set_pio_mode = it8213_set_pio_mode,
156*4882a593Smuzhiyun .set_dma_mode = it8213_set_dma_mode,
157*4882a593Smuzhiyun .cable_detect = it8213_cable_detect,
158*4882a593Smuzhiyun };
159*4882a593Smuzhiyun
160*4882a593Smuzhiyun static const struct ide_port_info it8213_chipset = {
161*4882a593Smuzhiyun .name = DRV_NAME,
162*4882a593Smuzhiyun .enablebits = { {0x41, 0x80, 0x80} },
163*4882a593Smuzhiyun .port_ops = &it8213_port_ops,
164*4882a593Smuzhiyun .host_flags = IDE_HFLAG_SINGLE,
165*4882a593Smuzhiyun .pio_mask = ATA_PIO4,
166*4882a593Smuzhiyun .swdma_mask = ATA_SWDMA2_ONLY,
167*4882a593Smuzhiyun .mwdma_mask = ATA_MWDMA12_ONLY,
168*4882a593Smuzhiyun .udma_mask = ATA_UDMA6,
169*4882a593Smuzhiyun };
170*4882a593Smuzhiyun
171*4882a593Smuzhiyun /**
172*4882a593Smuzhiyun * it8213_init_one - pci layer discovery entry
173*4882a593Smuzhiyun * @dev: PCI device
174*4882a593Smuzhiyun * @id: ident table entry
175*4882a593Smuzhiyun *
176*4882a593Smuzhiyun * Called by the PCI code when it finds an ITE8213 controller. As
177*4882a593Smuzhiyun * this device follows the standard interfaces we can use the
178*4882a593Smuzhiyun * standard helper functions to do almost all the work for us.
179*4882a593Smuzhiyun */
180*4882a593Smuzhiyun
it8213_init_one(struct pci_dev * dev,const struct pci_device_id * id)181*4882a593Smuzhiyun static int it8213_init_one(struct pci_dev *dev, const struct pci_device_id *id)
182*4882a593Smuzhiyun {
183*4882a593Smuzhiyun return ide_pci_init_one(dev, &it8213_chipset, NULL);
184*4882a593Smuzhiyun }
185*4882a593Smuzhiyun
186*4882a593Smuzhiyun static const struct pci_device_id it8213_pci_tbl[] = {
187*4882a593Smuzhiyun { PCI_VDEVICE(ITE, PCI_DEVICE_ID_ITE_8213), 0 },
188*4882a593Smuzhiyun { 0, },
189*4882a593Smuzhiyun };
190*4882a593Smuzhiyun
191*4882a593Smuzhiyun MODULE_DEVICE_TABLE(pci, it8213_pci_tbl);
192*4882a593Smuzhiyun
193*4882a593Smuzhiyun static struct pci_driver it8213_pci_driver = {
194*4882a593Smuzhiyun .name = "ITE8213_IDE",
195*4882a593Smuzhiyun .id_table = it8213_pci_tbl,
196*4882a593Smuzhiyun .probe = it8213_init_one,
197*4882a593Smuzhiyun .remove = ide_pci_remove,
198*4882a593Smuzhiyun .suspend = ide_pci_suspend,
199*4882a593Smuzhiyun .resume = ide_pci_resume,
200*4882a593Smuzhiyun };
201*4882a593Smuzhiyun
it8213_ide_init(void)202*4882a593Smuzhiyun static int __init it8213_ide_init(void)
203*4882a593Smuzhiyun {
204*4882a593Smuzhiyun return ide_pci_register_driver(&it8213_pci_driver);
205*4882a593Smuzhiyun }
206*4882a593Smuzhiyun
it8213_ide_exit(void)207*4882a593Smuzhiyun static void __exit it8213_ide_exit(void)
208*4882a593Smuzhiyun {
209*4882a593Smuzhiyun pci_unregister_driver(&it8213_pci_driver);
210*4882a593Smuzhiyun }
211*4882a593Smuzhiyun
212*4882a593Smuzhiyun module_init(it8213_ide_init);
213*4882a593Smuzhiyun module_exit(it8213_ide_exit);
214*4882a593Smuzhiyun
215*4882a593Smuzhiyun MODULE_AUTHOR("Jack Lee, Alan Cox");
216*4882a593Smuzhiyun MODULE_DESCRIPTION("PCI driver module for the ITE 8213");
217*4882a593Smuzhiyun MODULE_LICENSE("GPL");
218