xref: /OK3568_Linux_fs/kernel/drivers/i3c/master.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Copyright (C) 2018 Cadence Design Systems Inc.
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Author: Boris Brezillon <boris.brezillon@bootlin.com>
6*4882a593Smuzhiyun  */
7*4882a593Smuzhiyun 
8*4882a593Smuzhiyun #include <linux/atomic.h>
9*4882a593Smuzhiyun #include <linux/bug.h>
10*4882a593Smuzhiyun #include <linux/device.h>
11*4882a593Smuzhiyun #include <linux/err.h>
12*4882a593Smuzhiyun #include <linux/export.h>
13*4882a593Smuzhiyun #include <linux/kernel.h>
14*4882a593Smuzhiyun #include <linux/list.h>
15*4882a593Smuzhiyun #include <linux/of.h>
16*4882a593Smuzhiyun #include <linux/slab.h>
17*4882a593Smuzhiyun #include <linux/spinlock.h>
18*4882a593Smuzhiyun #include <linux/workqueue.h>
19*4882a593Smuzhiyun 
20*4882a593Smuzhiyun #include "internals.h"
21*4882a593Smuzhiyun 
22*4882a593Smuzhiyun static DEFINE_IDR(i3c_bus_idr);
23*4882a593Smuzhiyun static DEFINE_MUTEX(i3c_core_lock);
24*4882a593Smuzhiyun 
25*4882a593Smuzhiyun /**
26*4882a593Smuzhiyun  * i3c_bus_maintenance_lock - Lock the bus for a maintenance operation
27*4882a593Smuzhiyun  * @bus: I3C bus to take the lock on
28*4882a593Smuzhiyun  *
29*4882a593Smuzhiyun  * This function takes the bus lock so that no other operations can occur on
30*4882a593Smuzhiyun  * the bus. This is needed for all kind of bus maintenance operation, like
31*4882a593Smuzhiyun  * - enabling/disabling slave events
32*4882a593Smuzhiyun  * - re-triggering DAA
33*4882a593Smuzhiyun  * - changing the dynamic address of a device
34*4882a593Smuzhiyun  * - relinquishing mastership
35*4882a593Smuzhiyun  * - ...
36*4882a593Smuzhiyun  *
37*4882a593Smuzhiyun  * The reason for this kind of locking is that we don't want drivers and core
38*4882a593Smuzhiyun  * logic to rely on I3C device information that could be changed behind their
39*4882a593Smuzhiyun  * back.
40*4882a593Smuzhiyun  */
i3c_bus_maintenance_lock(struct i3c_bus * bus)41*4882a593Smuzhiyun static void i3c_bus_maintenance_lock(struct i3c_bus *bus)
42*4882a593Smuzhiyun {
43*4882a593Smuzhiyun 	down_write(&bus->lock);
44*4882a593Smuzhiyun }
45*4882a593Smuzhiyun 
46*4882a593Smuzhiyun /**
47*4882a593Smuzhiyun  * i3c_bus_maintenance_unlock - Release the bus lock after a maintenance
48*4882a593Smuzhiyun  *			      operation
49*4882a593Smuzhiyun  * @bus: I3C bus to release the lock on
50*4882a593Smuzhiyun  *
51*4882a593Smuzhiyun  * Should be called when the bus maintenance operation is done. See
52*4882a593Smuzhiyun  * i3c_bus_maintenance_lock() for more details on what these maintenance
53*4882a593Smuzhiyun  * operations are.
54*4882a593Smuzhiyun  */
i3c_bus_maintenance_unlock(struct i3c_bus * bus)55*4882a593Smuzhiyun static void i3c_bus_maintenance_unlock(struct i3c_bus *bus)
56*4882a593Smuzhiyun {
57*4882a593Smuzhiyun 	up_write(&bus->lock);
58*4882a593Smuzhiyun }
59*4882a593Smuzhiyun 
60*4882a593Smuzhiyun /**
61*4882a593Smuzhiyun  * i3c_bus_normaluse_lock - Lock the bus for a normal operation
62*4882a593Smuzhiyun  * @bus: I3C bus to take the lock on
63*4882a593Smuzhiyun  *
64*4882a593Smuzhiyun  * This function takes the bus lock for any operation that is not a maintenance
65*4882a593Smuzhiyun  * operation (see i3c_bus_maintenance_lock() for a non-exhaustive list of
66*4882a593Smuzhiyun  * maintenance operations). Basically all communications with I3C devices are
67*4882a593Smuzhiyun  * normal operations (HDR, SDR transfers or CCC commands that do not change bus
68*4882a593Smuzhiyun  * state or I3C dynamic address).
69*4882a593Smuzhiyun  *
70*4882a593Smuzhiyun  * Note that this lock is not guaranteeing serialization of normal operations.
71*4882a593Smuzhiyun  * In other words, transfer requests passed to the I3C master can be submitted
72*4882a593Smuzhiyun  * in parallel and I3C master drivers have to use their own locking to make
73*4882a593Smuzhiyun  * sure two different communications are not inter-mixed, or access to the
74*4882a593Smuzhiyun  * output/input queue is not done while the engine is busy.
75*4882a593Smuzhiyun  */
i3c_bus_normaluse_lock(struct i3c_bus * bus)76*4882a593Smuzhiyun void i3c_bus_normaluse_lock(struct i3c_bus *bus)
77*4882a593Smuzhiyun {
78*4882a593Smuzhiyun 	down_read(&bus->lock);
79*4882a593Smuzhiyun }
80*4882a593Smuzhiyun 
81*4882a593Smuzhiyun /**
82*4882a593Smuzhiyun  * i3c_bus_normaluse_unlock - Release the bus lock after a normal operation
83*4882a593Smuzhiyun  * @bus: I3C bus to release the lock on
84*4882a593Smuzhiyun  *
85*4882a593Smuzhiyun  * Should be called when a normal operation is done. See
86*4882a593Smuzhiyun  * i3c_bus_normaluse_lock() for more details on what these normal operations
87*4882a593Smuzhiyun  * are.
88*4882a593Smuzhiyun  */
i3c_bus_normaluse_unlock(struct i3c_bus * bus)89*4882a593Smuzhiyun void i3c_bus_normaluse_unlock(struct i3c_bus *bus)
90*4882a593Smuzhiyun {
91*4882a593Smuzhiyun 	up_read(&bus->lock);
92*4882a593Smuzhiyun }
93*4882a593Smuzhiyun 
94*4882a593Smuzhiyun static struct i3c_master_controller *
i3c_bus_to_i3c_master(struct i3c_bus * i3cbus)95*4882a593Smuzhiyun i3c_bus_to_i3c_master(struct i3c_bus *i3cbus)
96*4882a593Smuzhiyun {
97*4882a593Smuzhiyun 	return container_of(i3cbus, struct i3c_master_controller, bus);
98*4882a593Smuzhiyun }
99*4882a593Smuzhiyun 
dev_to_i3cmaster(struct device * dev)100*4882a593Smuzhiyun static struct i3c_master_controller *dev_to_i3cmaster(struct device *dev)
101*4882a593Smuzhiyun {
102*4882a593Smuzhiyun 	return container_of(dev, struct i3c_master_controller, dev);
103*4882a593Smuzhiyun }
104*4882a593Smuzhiyun 
105*4882a593Smuzhiyun static const struct device_type i3c_device_type;
106*4882a593Smuzhiyun 
dev_to_i3cbus(struct device * dev)107*4882a593Smuzhiyun static struct i3c_bus *dev_to_i3cbus(struct device *dev)
108*4882a593Smuzhiyun {
109*4882a593Smuzhiyun 	struct i3c_master_controller *master;
110*4882a593Smuzhiyun 
111*4882a593Smuzhiyun 	if (dev->type == &i3c_device_type)
112*4882a593Smuzhiyun 		return dev_to_i3cdev(dev)->bus;
113*4882a593Smuzhiyun 
114*4882a593Smuzhiyun 	master = dev_to_i3cmaster(dev);
115*4882a593Smuzhiyun 
116*4882a593Smuzhiyun 	return &master->bus;
117*4882a593Smuzhiyun }
118*4882a593Smuzhiyun 
dev_to_i3cdesc(struct device * dev)119*4882a593Smuzhiyun static struct i3c_dev_desc *dev_to_i3cdesc(struct device *dev)
120*4882a593Smuzhiyun {
121*4882a593Smuzhiyun 	struct i3c_master_controller *master;
122*4882a593Smuzhiyun 
123*4882a593Smuzhiyun 	if (dev->type == &i3c_device_type)
124*4882a593Smuzhiyun 		return dev_to_i3cdev(dev)->desc;
125*4882a593Smuzhiyun 
126*4882a593Smuzhiyun 	master = dev_to_i3cmaster(dev);
127*4882a593Smuzhiyun 
128*4882a593Smuzhiyun 	return master->this;
129*4882a593Smuzhiyun }
130*4882a593Smuzhiyun 
bcr_show(struct device * dev,struct device_attribute * da,char * buf)131*4882a593Smuzhiyun static ssize_t bcr_show(struct device *dev,
132*4882a593Smuzhiyun 			struct device_attribute *da,
133*4882a593Smuzhiyun 			char *buf)
134*4882a593Smuzhiyun {
135*4882a593Smuzhiyun 	struct i3c_bus *bus = dev_to_i3cbus(dev);
136*4882a593Smuzhiyun 	struct i3c_dev_desc *desc;
137*4882a593Smuzhiyun 	ssize_t ret;
138*4882a593Smuzhiyun 
139*4882a593Smuzhiyun 	i3c_bus_normaluse_lock(bus);
140*4882a593Smuzhiyun 	desc = dev_to_i3cdesc(dev);
141*4882a593Smuzhiyun 	ret = sprintf(buf, "%x\n", desc->info.bcr);
142*4882a593Smuzhiyun 	i3c_bus_normaluse_unlock(bus);
143*4882a593Smuzhiyun 
144*4882a593Smuzhiyun 	return ret;
145*4882a593Smuzhiyun }
146*4882a593Smuzhiyun static DEVICE_ATTR_RO(bcr);
147*4882a593Smuzhiyun 
dcr_show(struct device * dev,struct device_attribute * da,char * buf)148*4882a593Smuzhiyun static ssize_t dcr_show(struct device *dev,
149*4882a593Smuzhiyun 			struct device_attribute *da,
150*4882a593Smuzhiyun 			char *buf)
151*4882a593Smuzhiyun {
152*4882a593Smuzhiyun 	struct i3c_bus *bus = dev_to_i3cbus(dev);
153*4882a593Smuzhiyun 	struct i3c_dev_desc *desc;
154*4882a593Smuzhiyun 	ssize_t ret;
155*4882a593Smuzhiyun 
156*4882a593Smuzhiyun 	i3c_bus_normaluse_lock(bus);
157*4882a593Smuzhiyun 	desc = dev_to_i3cdesc(dev);
158*4882a593Smuzhiyun 	ret = sprintf(buf, "%x\n", desc->info.dcr);
159*4882a593Smuzhiyun 	i3c_bus_normaluse_unlock(bus);
160*4882a593Smuzhiyun 
161*4882a593Smuzhiyun 	return ret;
162*4882a593Smuzhiyun }
163*4882a593Smuzhiyun static DEVICE_ATTR_RO(dcr);
164*4882a593Smuzhiyun 
pid_show(struct device * dev,struct device_attribute * da,char * buf)165*4882a593Smuzhiyun static ssize_t pid_show(struct device *dev,
166*4882a593Smuzhiyun 			struct device_attribute *da,
167*4882a593Smuzhiyun 			char *buf)
168*4882a593Smuzhiyun {
169*4882a593Smuzhiyun 	struct i3c_bus *bus = dev_to_i3cbus(dev);
170*4882a593Smuzhiyun 	struct i3c_dev_desc *desc;
171*4882a593Smuzhiyun 	ssize_t ret;
172*4882a593Smuzhiyun 
173*4882a593Smuzhiyun 	i3c_bus_normaluse_lock(bus);
174*4882a593Smuzhiyun 	desc = dev_to_i3cdesc(dev);
175*4882a593Smuzhiyun 	ret = sprintf(buf, "%llx\n", desc->info.pid);
176*4882a593Smuzhiyun 	i3c_bus_normaluse_unlock(bus);
177*4882a593Smuzhiyun 
178*4882a593Smuzhiyun 	return ret;
179*4882a593Smuzhiyun }
180*4882a593Smuzhiyun static DEVICE_ATTR_RO(pid);
181*4882a593Smuzhiyun 
dynamic_address_show(struct device * dev,struct device_attribute * da,char * buf)182*4882a593Smuzhiyun static ssize_t dynamic_address_show(struct device *dev,
183*4882a593Smuzhiyun 				    struct device_attribute *da,
184*4882a593Smuzhiyun 				    char *buf)
185*4882a593Smuzhiyun {
186*4882a593Smuzhiyun 	struct i3c_bus *bus = dev_to_i3cbus(dev);
187*4882a593Smuzhiyun 	struct i3c_dev_desc *desc;
188*4882a593Smuzhiyun 	ssize_t ret;
189*4882a593Smuzhiyun 
190*4882a593Smuzhiyun 	i3c_bus_normaluse_lock(bus);
191*4882a593Smuzhiyun 	desc = dev_to_i3cdesc(dev);
192*4882a593Smuzhiyun 	ret = sprintf(buf, "%02x\n", desc->info.dyn_addr);
193*4882a593Smuzhiyun 	i3c_bus_normaluse_unlock(bus);
194*4882a593Smuzhiyun 
195*4882a593Smuzhiyun 	return ret;
196*4882a593Smuzhiyun }
197*4882a593Smuzhiyun static DEVICE_ATTR_RO(dynamic_address);
198*4882a593Smuzhiyun 
199*4882a593Smuzhiyun static const char * const hdrcap_strings[] = {
200*4882a593Smuzhiyun 	"hdr-ddr", "hdr-tsp", "hdr-tsl",
201*4882a593Smuzhiyun };
202*4882a593Smuzhiyun 
hdrcap_show(struct device * dev,struct device_attribute * da,char * buf)203*4882a593Smuzhiyun static ssize_t hdrcap_show(struct device *dev,
204*4882a593Smuzhiyun 			   struct device_attribute *da,
205*4882a593Smuzhiyun 			   char *buf)
206*4882a593Smuzhiyun {
207*4882a593Smuzhiyun 	struct i3c_bus *bus = dev_to_i3cbus(dev);
208*4882a593Smuzhiyun 	struct i3c_dev_desc *desc;
209*4882a593Smuzhiyun 	ssize_t offset = 0, ret;
210*4882a593Smuzhiyun 	unsigned long caps;
211*4882a593Smuzhiyun 	int mode;
212*4882a593Smuzhiyun 
213*4882a593Smuzhiyun 	i3c_bus_normaluse_lock(bus);
214*4882a593Smuzhiyun 	desc = dev_to_i3cdesc(dev);
215*4882a593Smuzhiyun 	caps = desc->info.hdr_cap;
216*4882a593Smuzhiyun 	for_each_set_bit(mode, &caps, 8) {
217*4882a593Smuzhiyun 		if (mode >= ARRAY_SIZE(hdrcap_strings))
218*4882a593Smuzhiyun 			break;
219*4882a593Smuzhiyun 
220*4882a593Smuzhiyun 		if (!hdrcap_strings[mode])
221*4882a593Smuzhiyun 			continue;
222*4882a593Smuzhiyun 
223*4882a593Smuzhiyun 		ret = sprintf(buf + offset, offset ? " %s" : "%s",
224*4882a593Smuzhiyun 			      hdrcap_strings[mode]);
225*4882a593Smuzhiyun 		if (ret < 0)
226*4882a593Smuzhiyun 			goto out;
227*4882a593Smuzhiyun 
228*4882a593Smuzhiyun 		offset += ret;
229*4882a593Smuzhiyun 	}
230*4882a593Smuzhiyun 
231*4882a593Smuzhiyun 	ret = sprintf(buf + offset, "\n");
232*4882a593Smuzhiyun 	if (ret < 0)
233*4882a593Smuzhiyun 		goto out;
234*4882a593Smuzhiyun 
235*4882a593Smuzhiyun 	ret = offset + ret;
236*4882a593Smuzhiyun 
237*4882a593Smuzhiyun out:
238*4882a593Smuzhiyun 	i3c_bus_normaluse_unlock(bus);
239*4882a593Smuzhiyun 
240*4882a593Smuzhiyun 	return ret;
241*4882a593Smuzhiyun }
242*4882a593Smuzhiyun static DEVICE_ATTR_RO(hdrcap);
243*4882a593Smuzhiyun 
modalias_show(struct device * dev,struct device_attribute * da,char * buf)244*4882a593Smuzhiyun static ssize_t modalias_show(struct device *dev,
245*4882a593Smuzhiyun 			     struct device_attribute *da, char *buf)
246*4882a593Smuzhiyun {
247*4882a593Smuzhiyun 	struct i3c_device *i3c = dev_to_i3cdev(dev);
248*4882a593Smuzhiyun 	struct i3c_device_info devinfo;
249*4882a593Smuzhiyun 	u16 manuf, part, ext;
250*4882a593Smuzhiyun 
251*4882a593Smuzhiyun 	i3c_device_get_info(i3c, &devinfo);
252*4882a593Smuzhiyun 	manuf = I3C_PID_MANUF_ID(devinfo.pid);
253*4882a593Smuzhiyun 	part = I3C_PID_PART_ID(devinfo.pid);
254*4882a593Smuzhiyun 	ext = I3C_PID_EXTRA_INFO(devinfo.pid);
255*4882a593Smuzhiyun 
256*4882a593Smuzhiyun 	if (I3C_PID_RND_LOWER_32BITS(devinfo.pid))
257*4882a593Smuzhiyun 		return sprintf(buf, "i3c:dcr%02Xmanuf%04X", devinfo.dcr,
258*4882a593Smuzhiyun 			       manuf);
259*4882a593Smuzhiyun 
260*4882a593Smuzhiyun 	return sprintf(buf, "i3c:dcr%02Xmanuf%04Xpart%04Xext%04X",
261*4882a593Smuzhiyun 		       devinfo.dcr, manuf, part, ext);
262*4882a593Smuzhiyun }
263*4882a593Smuzhiyun static DEVICE_ATTR_RO(modalias);
264*4882a593Smuzhiyun 
265*4882a593Smuzhiyun static struct attribute *i3c_device_attrs[] = {
266*4882a593Smuzhiyun 	&dev_attr_bcr.attr,
267*4882a593Smuzhiyun 	&dev_attr_dcr.attr,
268*4882a593Smuzhiyun 	&dev_attr_pid.attr,
269*4882a593Smuzhiyun 	&dev_attr_dynamic_address.attr,
270*4882a593Smuzhiyun 	&dev_attr_hdrcap.attr,
271*4882a593Smuzhiyun 	&dev_attr_modalias.attr,
272*4882a593Smuzhiyun 	NULL,
273*4882a593Smuzhiyun };
274*4882a593Smuzhiyun ATTRIBUTE_GROUPS(i3c_device);
275*4882a593Smuzhiyun 
i3c_device_uevent(struct device * dev,struct kobj_uevent_env * env)276*4882a593Smuzhiyun static int i3c_device_uevent(struct device *dev, struct kobj_uevent_env *env)
277*4882a593Smuzhiyun {
278*4882a593Smuzhiyun 	struct i3c_device *i3cdev = dev_to_i3cdev(dev);
279*4882a593Smuzhiyun 	struct i3c_device_info devinfo;
280*4882a593Smuzhiyun 	u16 manuf, part, ext;
281*4882a593Smuzhiyun 
282*4882a593Smuzhiyun 	i3c_device_get_info(i3cdev, &devinfo);
283*4882a593Smuzhiyun 	manuf = I3C_PID_MANUF_ID(devinfo.pid);
284*4882a593Smuzhiyun 	part = I3C_PID_PART_ID(devinfo.pid);
285*4882a593Smuzhiyun 	ext = I3C_PID_EXTRA_INFO(devinfo.pid);
286*4882a593Smuzhiyun 
287*4882a593Smuzhiyun 	if (I3C_PID_RND_LOWER_32BITS(devinfo.pid))
288*4882a593Smuzhiyun 		return add_uevent_var(env, "MODALIAS=i3c:dcr%02Xmanuf%04X",
289*4882a593Smuzhiyun 				      devinfo.dcr, manuf);
290*4882a593Smuzhiyun 
291*4882a593Smuzhiyun 	return add_uevent_var(env,
292*4882a593Smuzhiyun 			      "MODALIAS=i3c:dcr%02Xmanuf%04Xpart%04Xext%04X",
293*4882a593Smuzhiyun 			      devinfo.dcr, manuf, part, ext);
294*4882a593Smuzhiyun }
295*4882a593Smuzhiyun 
296*4882a593Smuzhiyun static const struct device_type i3c_device_type = {
297*4882a593Smuzhiyun 	.groups	= i3c_device_groups,
298*4882a593Smuzhiyun 	.uevent = i3c_device_uevent,
299*4882a593Smuzhiyun };
300*4882a593Smuzhiyun 
i3c_device_match(struct device * dev,struct device_driver * drv)301*4882a593Smuzhiyun static int i3c_device_match(struct device *dev, struct device_driver *drv)
302*4882a593Smuzhiyun {
303*4882a593Smuzhiyun 	struct i3c_device *i3cdev;
304*4882a593Smuzhiyun 	struct i3c_driver *i3cdrv;
305*4882a593Smuzhiyun 
306*4882a593Smuzhiyun 	if (dev->type != &i3c_device_type)
307*4882a593Smuzhiyun 		return 0;
308*4882a593Smuzhiyun 
309*4882a593Smuzhiyun 	i3cdev = dev_to_i3cdev(dev);
310*4882a593Smuzhiyun 	i3cdrv = drv_to_i3cdrv(drv);
311*4882a593Smuzhiyun 	if (i3c_device_match_id(i3cdev, i3cdrv->id_table))
312*4882a593Smuzhiyun 		return 1;
313*4882a593Smuzhiyun 
314*4882a593Smuzhiyun 	return 0;
315*4882a593Smuzhiyun }
316*4882a593Smuzhiyun 
i3c_device_probe(struct device * dev)317*4882a593Smuzhiyun static int i3c_device_probe(struct device *dev)
318*4882a593Smuzhiyun {
319*4882a593Smuzhiyun 	struct i3c_device *i3cdev = dev_to_i3cdev(dev);
320*4882a593Smuzhiyun 	struct i3c_driver *driver = drv_to_i3cdrv(dev->driver);
321*4882a593Smuzhiyun 
322*4882a593Smuzhiyun 	return driver->probe(i3cdev);
323*4882a593Smuzhiyun }
324*4882a593Smuzhiyun 
i3c_device_remove(struct device * dev)325*4882a593Smuzhiyun static int i3c_device_remove(struct device *dev)
326*4882a593Smuzhiyun {
327*4882a593Smuzhiyun 	struct i3c_device *i3cdev = dev_to_i3cdev(dev);
328*4882a593Smuzhiyun 	struct i3c_driver *driver = drv_to_i3cdrv(dev->driver);
329*4882a593Smuzhiyun 	int ret;
330*4882a593Smuzhiyun 
331*4882a593Smuzhiyun 	ret = driver->remove(i3cdev);
332*4882a593Smuzhiyun 	if (ret)
333*4882a593Smuzhiyun 		return ret;
334*4882a593Smuzhiyun 
335*4882a593Smuzhiyun 	i3c_device_free_ibi(i3cdev);
336*4882a593Smuzhiyun 
337*4882a593Smuzhiyun 	return ret;
338*4882a593Smuzhiyun }
339*4882a593Smuzhiyun 
340*4882a593Smuzhiyun struct bus_type i3c_bus_type = {
341*4882a593Smuzhiyun 	.name = "i3c",
342*4882a593Smuzhiyun 	.match = i3c_device_match,
343*4882a593Smuzhiyun 	.probe = i3c_device_probe,
344*4882a593Smuzhiyun 	.remove = i3c_device_remove,
345*4882a593Smuzhiyun };
346*4882a593Smuzhiyun 
347*4882a593Smuzhiyun static enum i3c_addr_slot_status
i3c_bus_get_addr_slot_status(struct i3c_bus * bus,u16 addr)348*4882a593Smuzhiyun i3c_bus_get_addr_slot_status(struct i3c_bus *bus, u16 addr)
349*4882a593Smuzhiyun {
350*4882a593Smuzhiyun 	int status, bitpos = addr * 2;
351*4882a593Smuzhiyun 
352*4882a593Smuzhiyun 	if (addr > I2C_MAX_ADDR)
353*4882a593Smuzhiyun 		return I3C_ADDR_SLOT_RSVD;
354*4882a593Smuzhiyun 
355*4882a593Smuzhiyun 	status = bus->addrslots[bitpos / BITS_PER_LONG];
356*4882a593Smuzhiyun 	status >>= bitpos % BITS_PER_LONG;
357*4882a593Smuzhiyun 
358*4882a593Smuzhiyun 	return status & I3C_ADDR_SLOT_STATUS_MASK;
359*4882a593Smuzhiyun }
360*4882a593Smuzhiyun 
i3c_bus_set_addr_slot_status(struct i3c_bus * bus,u16 addr,enum i3c_addr_slot_status status)361*4882a593Smuzhiyun static void i3c_bus_set_addr_slot_status(struct i3c_bus *bus, u16 addr,
362*4882a593Smuzhiyun 					 enum i3c_addr_slot_status status)
363*4882a593Smuzhiyun {
364*4882a593Smuzhiyun 	int bitpos = addr * 2;
365*4882a593Smuzhiyun 	unsigned long *ptr;
366*4882a593Smuzhiyun 
367*4882a593Smuzhiyun 	if (addr > I2C_MAX_ADDR)
368*4882a593Smuzhiyun 		return;
369*4882a593Smuzhiyun 
370*4882a593Smuzhiyun 	ptr = bus->addrslots + (bitpos / BITS_PER_LONG);
371*4882a593Smuzhiyun 	*ptr &= ~((unsigned long)I3C_ADDR_SLOT_STATUS_MASK <<
372*4882a593Smuzhiyun 						(bitpos % BITS_PER_LONG));
373*4882a593Smuzhiyun 	*ptr |= (unsigned long)status << (bitpos % BITS_PER_LONG);
374*4882a593Smuzhiyun }
375*4882a593Smuzhiyun 
i3c_bus_dev_addr_is_avail(struct i3c_bus * bus,u8 addr)376*4882a593Smuzhiyun static bool i3c_bus_dev_addr_is_avail(struct i3c_bus *bus, u8 addr)
377*4882a593Smuzhiyun {
378*4882a593Smuzhiyun 	enum i3c_addr_slot_status status;
379*4882a593Smuzhiyun 
380*4882a593Smuzhiyun 	status = i3c_bus_get_addr_slot_status(bus, addr);
381*4882a593Smuzhiyun 
382*4882a593Smuzhiyun 	return status == I3C_ADDR_SLOT_FREE;
383*4882a593Smuzhiyun }
384*4882a593Smuzhiyun 
i3c_bus_get_free_addr(struct i3c_bus * bus,u8 start_addr)385*4882a593Smuzhiyun static int i3c_bus_get_free_addr(struct i3c_bus *bus, u8 start_addr)
386*4882a593Smuzhiyun {
387*4882a593Smuzhiyun 	enum i3c_addr_slot_status status;
388*4882a593Smuzhiyun 	u8 addr;
389*4882a593Smuzhiyun 
390*4882a593Smuzhiyun 	for (addr = start_addr; addr < I3C_MAX_ADDR; addr++) {
391*4882a593Smuzhiyun 		status = i3c_bus_get_addr_slot_status(bus, addr);
392*4882a593Smuzhiyun 		if (status == I3C_ADDR_SLOT_FREE)
393*4882a593Smuzhiyun 			return addr;
394*4882a593Smuzhiyun 	}
395*4882a593Smuzhiyun 
396*4882a593Smuzhiyun 	return -ENOMEM;
397*4882a593Smuzhiyun }
398*4882a593Smuzhiyun 
i3c_bus_init_addrslots(struct i3c_bus * bus)399*4882a593Smuzhiyun static void i3c_bus_init_addrslots(struct i3c_bus *bus)
400*4882a593Smuzhiyun {
401*4882a593Smuzhiyun 	int i;
402*4882a593Smuzhiyun 
403*4882a593Smuzhiyun 	/* Addresses 0 to 7 are reserved. */
404*4882a593Smuzhiyun 	for (i = 0; i < 8; i++)
405*4882a593Smuzhiyun 		i3c_bus_set_addr_slot_status(bus, i, I3C_ADDR_SLOT_RSVD);
406*4882a593Smuzhiyun 
407*4882a593Smuzhiyun 	/*
408*4882a593Smuzhiyun 	 * Reserve broadcast address and all addresses that might collide
409*4882a593Smuzhiyun 	 * with the broadcast address when facing a single bit error.
410*4882a593Smuzhiyun 	 */
411*4882a593Smuzhiyun 	i3c_bus_set_addr_slot_status(bus, I3C_BROADCAST_ADDR,
412*4882a593Smuzhiyun 				     I3C_ADDR_SLOT_RSVD);
413*4882a593Smuzhiyun 	for (i = 0; i < 7; i++)
414*4882a593Smuzhiyun 		i3c_bus_set_addr_slot_status(bus, I3C_BROADCAST_ADDR ^ BIT(i),
415*4882a593Smuzhiyun 					     I3C_ADDR_SLOT_RSVD);
416*4882a593Smuzhiyun }
417*4882a593Smuzhiyun 
i3c_bus_cleanup(struct i3c_bus * i3cbus)418*4882a593Smuzhiyun static void i3c_bus_cleanup(struct i3c_bus *i3cbus)
419*4882a593Smuzhiyun {
420*4882a593Smuzhiyun 	mutex_lock(&i3c_core_lock);
421*4882a593Smuzhiyun 	idr_remove(&i3c_bus_idr, i3cbus->id);
422*4882a593Smuzhiyun 	mutex_unlock(&i3c_core_lock);
423*4882a593Smuzhiyun }
424*4882a593Smuzhiyun 
i3c_bus_init(struct i3c_bus * i3cbus)425*4882a593Smuzhiyun static int i3c_bus_init(struct i3c_bus *i3cbus)
426*4882a593Smuzhiyun {
427*4882a593Smuzhiyun 	int ret;
428*4882a593Smuzhiyun 
429*4882a593Smuzhiyun 	init_rwsem(&i3cbus->lock);
430*4882a593Smuzhiyun 	INIT_LIST_HEAD(&i3cbus->devs.i2c);
431*4882a593Smuzhiyun 	INIT_LIST_HEAD(&i3cbus->devs.i3c);
432*4882a593Smuzhiyun 	i3c_bus_init_addrslots(i3cbus);
433*4882a593Smuzhiyun 	i3cbus->mode = I3C_BUS_MODE_PURE;
434*4882a593Smuzhiyun 
435*4882a593Smuzhiyun 	mutex_lock(&i3c_core_lock);
436*4882a593Smuzhiyun 	ret = idr_alloc(&i3c_bus_idr, i3cbus, 0, 0, GFP_KERNEL);
437*4882a593Smuzhiyun 	mutex_unlock(&i3c_core_lock);
438*4882a593Smuzhiyun 
439*4882a593Smuzhiyun 	if (ret < 0)
440*4882a593Smuzhiyun 		return ret;
441*4882a593Smuzhiyun 
442*4882a593Smuzhiyun 	i3cbus->id = ret;
443*4882a593Smuzhiyun 
444*4882a593Smuzhiyun 	return 0;
445*4882a593Smuzhiyun }
446*4882a593Smuzhiyun 
447*4882a593Smuzhiyun static const char * const i3c_bus_mode_strings[] = {
448*4882a593Smuzhiyun 	[I3C_BUS_MODE_PURE] = "pure",
449*4882a593Smuzhiyun 	[I3C_BUS_MODE_MIXED_FAST] = "mixed-fast",
450*4882a593Smuzhiyun 	[I3C_BUS_MODE_MIXED_LIMITED] = "mixed-limited",
451*4882a593Smuzhiyun 	[I3C_BUS_MODE_MIXED_SLOW] = "mixed-slow",
452*4882a593Smuzhiyun };
453*4882a593Smuzhiyun 
mode_show(struct device * dev,struct device_attribute * da,char * buf)454*4882a593Smuzhiyun static ssize_t mode_show(struct device *dev,
455*4882a593Smuzhiyun 			 struct device_attribute *da,
456*4882a593Smuzhiyun 			 char *buf)
457*4882a593Smuzhiyun {
458*4882a593Smuzhiyun 	struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
459*4882a593Smuzhiyun 	ssize_t ret;
460*4882a593Smuzhiyun 
461*4882a593Smuzhiyun 	i3c_bus_normaluse_lock(i3cbus);
462*4882a593Smuzhiyun 	if (i3cbus->mode < 0 ||
463*4882a593Smuzhiyun 	    i3cbus->mode >= ARRAY_SIZE(i3c_bus_mode_strings) ||
464*4882a593Smuzhiyun 	    !i3c_bus_mode_strings[i3cbus->mode])
465*4882a593Smuzhiyun 		ret = sprintf(buf, "unknown\n");
466*4882a593Smuzhiyun 	else
467*4882a593Smuzhiyun 		ret = sprintf(buf, "%s\n", i3c_bus_mode_strings[i3cbus->mode]);
468*4882a593Smuzhiyun 	i3c_bus_normaluse_unlock(i3cbus);
469*4882a593Smuzhiyun 
470*4882a593Smuzhiyun 	return ret;
471*4882a593Smuzhiyun }
472*4882a593Smuzhiyun static DEVICE_ATTR_RO(mode);
473*4882a593Smuzhiyun 
current_master_show(struct device * dev,struct device_attribute * da,char * buf)474*4882a593Smuzhiyun static ssize_t current_master_show(struct device *dev,
475*4882a593Smuzhiyun 				   struct device_attribute *da,
476*4882a593Smuzhiyun 				   char *buf)
477*4882a593Smuzhiyun {
478*4882a593Smuzhiyun 	struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
479*4882a593Smuzhiyun 	ssize_t ret;
480*4882a593Smuzhiyun 
481*4882a593Smuzhiyun 	i3c_bus_normaluse_lock(i3cbus);
482*4882a593Smuzhiyun 	ret = sprintf(buf, "%d-%llx\n", i3cbus->id,
483*4882a593Smuzhiyun 		      i3cbus->cur_master->info.pid);
484*4882a593Smuzhiyun 	i3c_bus_normaluse_unlock(i3cbus);
485*4882a593Smuzhiyun 
486*4882a593Smuzhiyun 	return ret;
487*4882a593Smuzhiyun }
488*4882a593Smuzhiyun static DEVICE_ATTR_RO(current_master);
489*4882a593Smuzhiyun 
i3c_scl_frequency_show(struct device * dev,struct device_attribute * da,char * buf)490*4882a593Smuzhiyun static ssize_t i3c_scl_frequency_show(struct device *dev,
491*4882a593Smuzhiyun 				      struct device_attribute *da,
492*4882a593Smuzhiyun 				      char *buf)
493*4882a593Smuzhiyun {
494*4882a593Smuzhiyun 	struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
495*4882a593Smuzhiyun 	ssize_t ret;
496*4882a593Smuzhiyun 
497*4882a593Smuzhiyun 	i3c_bus_normaluse_lock(i3cbus);
498*4882a593Smuzhiyun 	ret = sprintf(buf, "%ld\n", i3cbus->scl_rate.i3c);
499*4882a593Smuzhiyun 	i3c_bus_normaluse_unlock(i3cbus);
500*4882a593Smuzhiyun 
501*4882a593Smuzhiyun 	return ret;
502*4882a593Smuzhiyun }
503*4882a593Smuzhiyun static DEVICE_ATTR_RO(i3c_scl_frequency);
504*4882a593Smuzhiyun 
i2c_scl_frequency_show(struct device * dev,struct device_attribute * da,char * buf)505*4882a593Smuzhiyun static ssize_t i2c_scl_frequency_show(struct device *dev,
506*4882a593Smuzhiyun 				      struct device_attribute *da,
507*4882a593Smuzhiyun 				      char *buf)
508*4882a593Smuzhiyun {
509*4882a593Smuzhiyun 	struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
510*4882a593Smuzhiyun 	ssize_t ret;
511*4882a593Smuzhiyun 
512*4882a593Smuzhiyun 	i3c_bus_normaluse_lock(i3cbus);
513*4882a593Smuzhiyun 	ret = sprintf(buf, "%ld\n", i3cbus->scl_rate.i2c);
514*4882a593Smuzhiyun 	i3c_bus_normaluse_unlock(i3cbus);
515*4882a593Smuzhiyun 
516*4882a593Smuzhiyun 	return ret;
517*4882a593Smuzhiyun }
518*4882a593Smuzhiyun static DEVICE_ATTR_RO(i2c_scl_frequency);
519*4882a593Smuzhiyun 
520*4882a593Smuzhiyun static struct attribute *i3c_masterdev_attrs[] = {
521*4882a593Smuzhiyun 	&dev_attr_mode.attr,
522*4882a593Smuzhiyun 	&dev_attr_current_master.attr,
523*4882a593Smuzhiyun 	&dev_attr_i3c_scl_frequency.attr,
524*4882a593Smuzhiyun 	&dev_attr_i2c_scl_frequency.attr,
525*4882a593Smuzhiyun 	&dev_attr_bcr.attr,
526*4882a593Smuzhiyun 	&dev_attr_dcr.attr,
527*4882a593Smuzhiyun 	&dev_attr_pid.attr,
528*4882a593Smuzhiyun 	&dev_attr_dynamic_address.attr,
529*4882a593Smuzhiyun 	&dev_attr_hdrcap.attr,
530*4882a593Smuzhiyun 	NULL,
531*4882a593Smuzhiyun };
532*4882a593Smuzhiyun ATTRIBUTE_GROUPS(i3c_masterdev);
533*4882a593Smuzhiyun 
i3c_masterdev_release(struct device * dev)534*4882a593Smuzhiyun static void i3c_masterdev_release(struct device *dev)
535*4882a593Smuzhiyun {
536*4882a593Smuzhiyun 	struct i3c_master_controller *master = dev_to_i3cmaster(dev);
537*4882a593Smuzhiyun 	struct i3c_bus *bus = dev_to_i3cbus(dev);
538*4882a593Smuzhiyun 
539*4882a593Smuzhiyun 	if (master->wq)
540*4882a593Smuzhiyun 		destroy_workqueue(master->wq);
541*4882a593Smuzhiyun 
542*4882a593Smuzhiyun 	WARN_ON(!list_empty(&bus->devs.i2c) || !list_empty(&bus->devs.i3c));
543*4882a593Smuzhiyun 	i3c_bus_cleanup(bus);
544*4882a593Smuzhiyun 
545*4882a593Smuzhiyun 	of_node_put(dev->of_node);
546*4882a593Smuzhiyun }
547*4882a593Smuzhiyun 
548*4882a593Smuzhiyun static const struct device_type i3c_masterdev_type = {
549*4882a593Smuzhiyun 	.groups	= i3c_masterdev_groups,
550*4882a593Smuzhiyun };
551*4882a593Smuzhiyun 
i3c_bus_set_mode(struct i3c_bus * i3cbus,enum i3c_bus_mode mode,unsigned long max_i2c_scl_rate)552*4882a593Smuzhiyun static int i3c_bus_set_mode(struct i3c_bus *i3cbus, enum i3c_bus_mode mode,
553*4882a593Smuzhiyun 			    unsigned long max_i2c_scl_rate)
554*4882a593Smuzhiyun {
555*4882a593Smuzhiyun 	struct i3c_master_controller *master = i3c_bus_to_i3c_master(i3cbus);
556*4882a593Smuzhiyun 
557*4882a593Smuzhiyun 	i3cbus->mode = mode;
558*4882a593Smuzhiyun 
559*4882a593Smuzhiyun 	switch (i3cbus->mode) {
560*4882a593Smuzhiyun 	case I3C_BUS_MODE_PURE:
561*4882a593Smuzhiyun 		if (!i3cbus->scl_rate.i3c)
562*4882a593Smuzhiyun 			i3cbus->scl_rate.i3c = I3C_BUS_TYP_I3C_SCL_RATE;
563*4882a593Smuzhiyun 		break;
564*4882a593Smuzhiyun 	case I3C_BUS_MODE_MIXED_FAST:
565*4882a593Smuzhiyun 	case I3C_BUS_MODE_MIXED_LIMITED:
566*4882a593Smuzhiyun 		if (!i3cbus->scl_rate.i3c)
567*4882a593Smuzhiyun 			i3cbus->scl_rate.i3c = I3C_BUS_TYP_I3C_SCL_RATE;
568*4882a593Smuzhiyun 		if (!i3cbus->scl_rate.i2c)
569*4882a593Smuzhiyun 			i3cbus->scl_rate.i2c = max_i2c_scl_rate;
570*4882a593Smuzhiyun 		break;
571*4882a593Smuzhiyun 	case I3C_BUS_MODE_MIXED_SLOW:
572*4882a593Smuzhiyun 		if (!i3cbus->scl_rate.i2c)
573*4882a593Smuzhiyun 			i3cbus->scl_rate.i2c = max_i2c_scl_rate;
574*4882a593Smuzhiyun 		if (!i3cbus->scl_rate.i3c ||
575*4882a593Smuzhiyun 		    i3cbus->scl_rate.i3c > i3cbus->scl_rate.i2c)
576*4882a593Smuzhiyun 			i3cbus->scl_rate.i3c = i3cbus->scl_rate.i2c;
577*4882a593Smuzhiyun 		break;
578*4882a593Smuzhiyun 	default:
579*4882a593Smuzhiyun 		return -EINVAL;
580*4882a593Smuzhiyun 	}
581*4882a593Smuzhiyun 
582*4882a593Smuzhiyun 	dev_dbg(&master->dev, "i2c-scl = %ld Hz i3c-scl = %ld Hz\n",
583*4882a593Smuzhiyun 		i3cbus->scl_rate.i2c, i3cbus->scl_rate.i3c);
584*4882a593Smuzhiyun 
585*4882a593Smuzhiyun 	/*
586*4882a593Smuzhiyun 	 * I3C/I2C frequency may have been overridden, check that user-provided
587*4882a593Smuzhiyun 	 * values are not exceeding max possible frequency.
588*4882a593Smuzhiyun 	 */
589*4882a593Smuzhiyun 	if (i3cbus->scl_rate.i3c > I3C_BUS_MAX_I3C_SCL_RATE ||
590*4882a593Smuzhiyun 	    i3cbus->scl_rate.i2c > I3C_BUS_I2C_FM_PLUS_SCL_RATE)
591*4882a593Smuzhiyun 		return -EINVAL;
592*4882a593Smuzhiyun 
593*4882a593Smuzhiyun 	return 0;
594*4882a593Smuzhiyun }
595*4882a593Smuzhiyun 
596*4882a593Smuzhiyun static struct i3c_master_controller *
i2c_adapter_to_i3c_master(struct i2c_adapter * adap)597*4882a593Smuzhiyun i2c_adapter_to_i3c_master(struct i2c_adapter *adap)
598*4882a593Smuzhiyun {
599*4882a593Smuzhiyun 	return container_of(adap, struct i3c_master_controller, i2c);
600*4882a593Smuzhiyun }
601*4882a593Smuzhiyun 
602*4882a593Smuzhiyun static struct i2c_adapter *
i3c_master_to_i2c_adapter(struct i3c_master_controller * master)603*4882a593Smuzhiyun i3c_master_to_i2c_adapter(struct i3c_master_controller *master)
604*4882a593Smuzhiyun {
605*4882a593Smuzhiyun 	return &master->i2c;
606*4882a593Smuzhiyun }
607*4882a593Smuzhiyun 
i3c_master_free_i2c_dev(struct i2c_dev_desc * dev)608*4882a593Smuzhiyun static void i3c_master_free_i2c_dev(struct i2c_dev_desc *dev)
609*4882a593Smuzhiyun {
610*4882a593Smuzhiyun 	kfree(dev);
611*4882a593Smuzhiyun }
612*4882a593Smuzhiyun 
613*4882a593Smuzhiyun static struct i2c_dev_desc *
i3c_master_alloc_i2c_dev(struct i3c_master_controller * master,const struct i2c_dev_boardinfo * boardinfo)614*4882a593Smuzhiyun i3c_master_alloc_i2c_dev(struct i3c_master_controller *master,
615*4882a593Smuzhiyun 			 const struct i2c_dev_boardinfo *boardinfo)
616*4882a593Smuzhiyun {
617*4882a593Smuzhiyun 	struct i2c_dev_desc *dev;
618*4882a593Smuzhiyun 
619*4882a593Smuzhiyun 	dev = kzalloc(sizeof(*dev), GFP_KERNEL);
620*4882a593Smuzhiyun 	if (!dev)
621*4882a593Smuzhiyun 		return ERR_PTR(-ENOMEM);
622*4882a593Smuzhiyun 
623*4882a593Smuzhiyun 	dev->common.master = master;
624*4882a593Smuzhiyun 	dev->boardinfo = boardinfo;
625*4882a593Smuzhiyun 	dev->addr = boardinfo->base.addr;
626*4882a593Smuzhiyun 	dev->lvr = boardinfo->lvr;
627*4882a593Smuzhiyun 
628*4882a593Smuzhiyun 	return dev;
629*4882a593Smuzhiyun }
630*4882a593Smuzhiyun 
i3c_ccc_cmd_dest_init(struct i3c_ccc_cmd_dest * dest,u8 addr,u16 payloadlen)631*4882a593Smuzhiyun static void *i3c_ccc_cmd_dest_init(struct i3c_ccc_cmd_dest *dest, u8 addr,
632*4882a593Smuzhiyun 				   u16 payloadlen)
633*4882a593Smuzhiyun {
634*4882a593Smuzhiyun 	dest->addr = addr;
635*4882a593Smuzhiyun 	dest->payload.len = payloadlen;
636*4882a593Smuzhiyun 	if (payloadlen)
637*4882a593Smuzhiyun 		dest->payload.data = kzalloc(payloadlen, GFP_KERNEL);
638*4882a593Smuzhiyun 	else
639*4882a593Smuzhiyun 		dest->payload.data = NULL;
640*4882a593Smuzhiyun 
641*4882a593Smuzhiyun 	return dest->payload.data;
642*4882a593Smuzhiyun }
643*4882a593Smuzhiyun 
i3c_ccc_cmd_dest_cleanup(struct i3c_ccc_cmd_dest * dest)644*4882a593Smuzhiyun static void i3c_ccc_cmd_dest_cleanup(struct i3c_ccc_cmd_dest *dest)
645*4882a593Smuzhiyun {
646*4882a593Smuzhiyun 	kfree(dest->payload.data);
647*4882a593Smuzhiyun }
648*4882a593Smuzhiyun 
i3c_ccc_cmd_init(struct i3c_ccc_cmd * cmd,bool rnw,u8 id,struct i3c_ccc_cmd_dest * dests,unsigned int ndests)649*4882a593Smuzhiyun static void i3c_ccc_cmd_init(struct i3c_ccc_cmd *cmd, bool rnw, u8 id,
650*4882a593Smuzhiyun 			     struct i3c_ccc_cmd_dest *dests,
651*4882a593Smuzhiyun 			     unsigned int ndests)
652*4882a593Smuzhiyun {
653*4882a593Smuzhiyun 	cmd->rnw = rnw ? 1 : 0;
654*4882a593Smuzhiyun 	cmd->id = id;
655*4882a593Smuzhiyun 	cmd->dests = dests;
656*4882a593Smuzhiyun 	cmd->ndests = ndests;
657*4882a593Smuzhiyun 	cmd->err = I3C_ERROR_UNKNOWN;
658*4882a593Smuzhiyun }
659*4882a593Smuzhiyun 
i3c_master_send_ccc_cmd_locked(struct i3c_master_controller * master,struct i3c_ccc_cmd * cmd)660*4882a593Smuzhiyun static int i3c_master_send_ccc_cmd_locked(struct i3c_master_controller *master,
661*4882a593Smuzhiyun 					  struct i3c_ccc_cmd *cmd)
662*4882a593Smuzhiyun {
663*4882a593Smuzhiyun 	int ret;
664*4882a593Smuzhiyun 
665*4882a593Smuzhiyun 	if (!cmd || !master)
666*4882a593Smuzhiyun 		return -EINVAL;
667*4882a593Smuzhiyun 
668*4882a593Smuzhiyun 	if (WARN_ON(master->init_done &&
669*4882a593Smuzhiyun 		    !rwsem_is_locked(&master->bus.lock)))
670*4882a593Smuzhiyun 		return -EINVAL;
671*4882a593Smuzhiyun 
672*4882a593Smuzhiyun 	if (!master->ops->send_ccc_cmd)
673*4882a593Smuzhiyun 		return -ENOTSUPP;
674*4882a593Smuzhiyun 
675*4882a593Smuzhiyun 	if ((cmd->id & I3C_CCC_DIRECT) && (!cmd->dests || !cmd->ndests))
676*4882a593Smuzhiyun 		return -EINVAL;
677*4882a593Smuzhiyun 
678*4882a593Smuzhiyun 	if (master->ops->supports_ccc_cmd &&
679*4882a593Smuzhiyun 	    !master->ops->supports_ccc_cmd(master, cmd))
680*4882a593Smuzhiyun 		return -ENOTSUPP;
681*4882a593Smuzhiyun 
682*4882a593Smuzhiyun 	ret = master->ops->send_ccc_cmd(master, cmd);
683*4882a593Smuzhiyun 	if (ret) {
684*4882a593Smuzhiyun 		if (cmd->err != I3C_ERROR_UNKNOWN)
685*4882a593Smuzhiyun 			return cmd->err;
686*4882a593Smuzhiyun 
687*4882a593Smuzhiyun 		return ret;
688*4882a593Smuzhiyun 	}
689*4882a593Smuzhiyun 
690*4882a593Smuzhiyun 	return 0;
691*4882a593Smuzhiyun }
692*4882a593Smuzhiyun 
693*4882a593Smuzhiyun static struct i2c_dev_desc *
i3c_master_find_i2c_dev_by_addr(const struct i3c_master_controller * master,u16 addr)694*4882a593Smuzhiyun i3c_master_find_i2c_dev_by_addr(const struct i3c_master_controller *master,
695*4882a593Smuzhiyun 				u16 addr)
696*4882a593Smuzhiyun {
697*4882a593Smuzhiyun 	struct i2c_dev_desc *dev;
698*4882a593Smuzhiyun 
699*4882a593Smuzhiyun 	i3c_bus_for_each_i2cdev(&master->bus, dev) {
700*4882a593Smuzhiyun 		if (dev->boardinfo->base.addr == addr)
701*4882a593Smuzhiyun 			return dev;
702*4882a593Smuzhiyun 	}
703*4882a593Smuzhiyun 
704*4882a593Smuzhiyun 	return NULL;
705*4882a593Smuzhiyun }
706*4882a593Smuzhiyun 
707*4882a593Smuzhiyun /**
708*4882a593Smuzhiyun  * i3c_master_get_free_addr() - get a free address on the bus
709*4882a593Smuzhiyun  * @master: I3C master object
710*4882a593Smuzhiyun  * @start_addr: where to start searching
711*4882a593Smuzhiyun  *
712*4882a593Smuzhiyun  * This function must be called with the bus lock held in write mode.
713*4882a593Smuzhiyun  *
714*4882a593Smuzhiyun  * Return: the first free address starting at @start_addr (included) or -ENOMEM
715*4882a593Smuzhiyun  * if there's no more address available.
716*4882a593Smuzhiyun  */
i3c_master_get_free_addr(struct i3c_master_controller * master,u8 start_addr)717*4882a593Smuzhiyun int i3c_master_get_free_addr(struct i3c_master_controller *master,
718*4882a593Smuzhiyun 			     u8 start_addr)
719*4882a593Smuzhiyun {
720*4882a593Smuzhiyun 	return i3c_bus_get_free_addr(&master->bus, start_addr);
721*4882a593Smuzhiyun }
722*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(i3c_master_get_free_addr);
723*4882a593Smuzhiyun 
i3c_device_release(struct device * dev)724*4882a593Smuzhiyun static void i3c_device_release(struct device *dev)
725*4882a593Smuzhiyun {
726*4882a593Smuzhiyun 	struct i3c_device *i3cdev = dev_to_i3cdev(dev);
727*4882a593Smuzhiyun 
728*4882a593Smuzhiyun 	WARN_ON(i3cdev->desc);
729*4882a593Smuzhiyun 
730*4882a593Smuzhiyun 	of_node_put(i3cdev->dev.of_node);
731*4882a593Smuzhiyun 	kfree(i3cdev);
732*4882a593Smuzhiyun }
733*4882a593Smuzhiyun 
i3c_master_free_i3c_dev(struct i3c_dev_desc * dev)734*4882a593Smuzhiyun static void i3c_master_free_i3c_dev(struct i3c_dev_desc *dev)
735*4882a593Smuzhiyun {
736*4882a593Smuzhiyun 	kfree(dev);
737*4882a593Smuzhiyun }
738*4882a593Smuzhiyun 
739*4882a593Smuzhiyun static struct i3c_dev_desc *
i3c_master_alloc_i3c_dev(struct i3c_master_controller * master,const struct i3c_device_info * info)740*4882a593Smuzhiyun i3c_master_alloc_i3c_dev(struct i3c_master_controller *master,
741*4882a593Smuzhiyun 			 const struct i3c_device_info *info)
742*4882a593Smuzhiyun {
743*4882a593Smuzhiyun 	struct i3c_dev_desc *dev;
744*4882a593Smuzhiyun 
745*4882a593Smuzhiyun 	dev = kzalloc(sizeof(*dev), GFP_KERNEL);
746*4882a593Smuzhiyun 	if (!dev)
747*4882a593Smuzhiyun 		return ERR_PTR(-ENOMEM);
748*4882a593Smuzhiyun 
749*4882a593Smuzhiyun 	dev->common.master = master;
750*4882a593Smuzhiyun 	dev->info = *info;
751*4882a593Smuzhiyun 	mutex_init(&dev->ibi_lock);
752*4882a593Smuzhiyun 
753*4882a593Smuzhiyun 	return dev;
754*4882a593Smuzhiyun }
755*4882a593Smuzhiyun 
i3c_master_rstdaa_locked(struct i3c_master_controller * master,u8 addr)756*4882a593Smuzhiyun static int i3c_master_rstdaa_locked(struct i3c_master_controller *master,
757*4882a593Smuzhiyun 				    u8 addr)
758*4882a593Smuzhiyun {
759*4882a593Smuzhiyun 	enum i3c_addr_slot_status addrstat;
760*4882a593Smuzhiyun 	struct i3c_ccc_cmd_dest dest;
761*4882a593Smuzhiyun 	struct i3c_ccc_cmd cmd;
762*4882a593Smuzhiyun 	int ret;
763*4882a593Smuzhiyun 
764*4882a593Smuzhiyun 	if (!master)
765*4882a593Smuzhiyun 		return -EINVAL;
766*4882a593Smuzhiyun 
767*4882a593Smuzhiyun 	addrstat = i3c_bus_get_addr_slot_status(&master->bus, addr);
768*4882a593Smuzhiyun 	if (addr != I3C_BROADCAST_ADDR && addrstat != I3C_ADDR_SLOT_I3C_DEV)
769*4882a593Smuzhiyun 		return -EINVAL;
770*4882a593Smuzhiyun 
771*4882a593Smuzhiyun 	i3c_ccc_cmd_dest_init(&dest, addr, 0);
772*4882a593Smuzhiyun 	i3c_ccc_cmd_init(&cmd, false,
773*4882a593Smuzhiyun 			 I3C_CCC_RSTDAA(addr == I3C_BROADCAST_ADDR),
774*4882a593Smuzhiyun 			 &dest, 1);
775*4882a593Smuzhiyun 	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
776*4882a593Smuzhiyun 	i3c_ccc_cmd_dest_cleanup(&dest);
777*4882a593Smuzhiyun 
778*4882a593Smuzhiyun 	return ret;
779*4882a593Smuzhiyun }
780*4882a593Smuzhiyun 
781*4882a593Smuzhiyun /**
782*4882a593Smuzhiyun  * i3c_master_entdaa_locked() - start a DAA (Dynamic Address Assignment)
783*4882a593Smuzhiyun  *				procedure
784*4882a593Smuzhiyun  * @master: master used to send frames on the bus
785*4882a593Smuzhiyun  *
786*4882a593Smuzhiyun  * Send a ENTDAA CCC command to start a DAA procedure.
787*4882a593Smuzhiyun  *
788*4882a593Smuzhiyun  * Note that this function only sends the ENTDAA CCC command, all the logic
789*4882a593Smuzhiyun  * behind dynamic address assignment has to be handled in the I3C master
790*4882a593Smuzhiyun  * driver.
791*4882a593Smuzhiyun  *
792*4882a593Smuzhiyun  * This function must be called with the bus lock held in write mode.
793*4882a593Smuzhiyun  *
794*4882a593Smuzhiyun  * Return: 0 in case of success, a positive I3C error code if the error is
795*4882a593Smuzhiyun  * one of the official Mx error codes, and a negative error code otherwise.
796*4882a593Smuzhiyun  */
i3c_master_entdaa_locked(struct i3c_master_controller * master)797*4882a593Smuzhiyun int i3c_master_entdaa_locked(struct i3c_master_controller *master)
798*4882a593Smuzhiyun {
799*4882a593Smuzhiyun 	struct i3c_ccc_cmd_dest dest;
800*4882a593Smuzhiyun 	struct i3c_ccc_cmd cmd;
801*4882a593Smuzhiyun 	int ret;
802*4882a593Smuzhiyun 
803*4882a593Smuzhiyun 	i3c_ccc_cmd_dest_init(&dest, I3C_BROADCAST_ADDR, 0);
804*4882a593Smuzhiyun 	i3c_ccc_cmd_init(&cmd, false, I3C_CCC_ENTDAA, &dest, 1);
805*4882a593Smuzhiyun 	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
806*4882a593Smuzhiyun 	i3c_ccc_cmd_dest_cleanup(&dest);
807*4882a593Smuzhiyun 
808*4882a593Smuzhiyun 	return ret;
809*4882a593Smuzhiyun }
810*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(i3c_master_entdaa_locked);
811*4882a593Smuzhiyun 
i3c_master_enec_disec_locked(struct i3c_master_controller * master,u8 addr,bool enable,u8 evts)812*4882a593Smuzhiyun static int i3c_master_enec_disec_locked(struct i3c_master_controller *master,
813*4882a593Smuzhiyun 					u8 addr, bool enable, u8 evts)
814*4882a593Smuzhiyun {
815*4882a593Smuzhiyun 	struct i3c_ccc_events *events;
816*4882a593Smuzhiyun 	struct i3c_ccc_cmd_dest dest;
817*4882a593Smuzhiyun 	struct i3c_ccc_cmd cmd;
818*4882a593Smuzhiyun 	int ret;
819*4882a593Smuzhiyun 
820*4882a593Smuzhiyun 	events = i3c_ccc_cmd_dest_init(&dest, addr, sizeof(*events));
821*4882a593Smuzhiyun 	if (!events)
822*4882a593Smuzhiyun 		return -ENOMEM;
823*4882a593Smuzhiyun 
824*4882a593Smuzhiyun 	events->events = evts;
825*4882a593Smuzhiyun 	i3c_ccc_cmd_init(&cmd, false,
826*4882a593Smuzhiyun 			 enable ?
827*4882a593Smuzhiyun 			 I3C_CCC_ENEC(addr == I3C_BROADCAST_ADDR) :
828*4882a593Smuzhiyun 			 I3C_CCC_DISEC(addr == I3C_BROADCAST_ADDR),
829*4882a593Smuzhiyun 			 &dest, 1);
830*4882a593Smuzhiyun 	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
831*4882a593Smuzhiyun 	i3c_ccc_cmd_dest_cleanup(&dest);
832*4882a593Smuzhiyun 
833*4882a593Smuzhiyun 	return ret;
834*4882a593Smuzhiyun }
835*4882a593Smuzhiyun 
836*4882a593Smuzhiyun /**
837*4882a593Smuzhiyun  * i3c_master_disec_locked() - send a DISEC CCC command
838*4882a593Smuzhiyun  * @master: master used to send frames on the bus
839*4882a593Smuzhiyun  * @addr: a valid I3C slave address or %I3C_BROADCAST_ADDR
840*4882a593Smuzhiyun  * @evts: events to disable
841*4882a593Smuzhiyun  *
842*4882a593Smuzhiyun  * Send a DISEC CCC command to disable some or all events coming from a
843*4882a593Smuzhiyun  * specific slave, or all devices if @addr is %I3C_BROADCAST_ADDR.
844*4882a593Smuzhiyun  *
845*4882a593Smuzhiyun  * This function must be called with the bus lock held in write mode.
846*4882a593Smuzhiyun  *
847*4882a593Smuzhiyun  * Return: 0 in case of success, a positive I3C error code if the error is
848*4882a593Smuzhiyun  * one of the official Mx error codes, and a negative error code otherwise.
849*4882a593Smuzhiyun  */
i3c_master_disec_locked(struct i3c_master_controller * master,u8 addr,u8 evts)850*4882a593Smuzhiyun int i3c_master_disec_locked(struct i3c_master_controller *master, u8 addr,
851*4882a593Smuzhiyun 			    u8 evts)
852*4882a593Smuzhiyun {
853*4882a593Smuzhiyun 	return i3c_master_enec_disec_locked(master, addr, false, evts);
854*4882a593Smuzhiyun }
855*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(i3c_master_disec_locked);
856*4882a593Smuzhiyun 
857*4882a593Smuzhiyun /**
858*4882a593Smuzhiyun  * i3c_master_enec_locked() - send an ENEC CCC command
859*4882a593Smuzhiyun  * @master: master used to send frames on the bus
860*4882a593Smuzhiyun  * @addr: a valid I3C slave address or %I3C_BROADCAST_ADDR
861*4882a593Smuzhiyun  * @evts: events to disable
862*4882a593Smuzhiyun  *
863*4882a593Smuzhiyun  * Sends an ENEC CCC command to enable some or all events coming from a
864*4882a593Smuzhiyun  * specific slave, or all devices if @addr is %I3C_BROADCAST_ADDR.
865*4882a593Smuzhiyun  *
866*4882a593Smuzhiyun  * This function must be called with the bus lock held in write mode.
867*4882a593Smuzhiyun  *
868*4882a593Smuzhiyun  * Return: 0 in case of success, a positive I3C error code if the error is
869*4882a593Smuzhiyun  * one of the official Mx error codes, and a negative error code otherwise.
870*4882a593Smuzhiyun  */
i3c_master_enec_locked(struct i3c_master_controller * master,u8 addr,u8 evts)871*4882a593Smuzhiyun int i3c_master_enec_locked(struct i3c_master_controller *master, u8 addr,
872*4882a593Smuzhiyun 			   u8 evts)
873*4882a593Smuzhiyun {
874*4882a593Smuzhiyun 	return i3c_master_enec_disec_locked(master, addr, true, evts);
875*4882a593Smuzhiyun }
876*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(i3c_master_enec_locked);
877*4882a593Smuzhiyun 
878*4882a593Smuzhiyun /**
879*4882a593Smuzhiyun  * i3c_master_defslvs_locked() - send a DEFSLVS CCC command
880*4882a593Smuzhiyun  * @master: master used to send frames on the bus
881*4882a593Smuzhiyun  *
882*4882a593Smuzhiyun  * Send a DEFSLVS CCC command containing all the devices known to the @master.
883*4882a593Smuzhiyun  * This is useful when you have secondary masters on the bus to propagate
884*4882a593Smuzhiyun  * device information.
885*4882a593Smuzhiyun  *
886*4882a593Smuzhiyun  * This should be called after all I3C devices have been discovered (in other
887*4882a593Smuzhiyun  * words, after the DAA procedure has finished) and instantiated in
888*4882a593Smuzhiyun  * &i3c_master_controller_ops->bus_init().
889*4882a593Smuzhiyun  * It should also be called if a master ACKed an Hot-Join request and assigned
890*4882a593Smuzhiyun  * a dynamic address to the device joining the bus.
891*4882a593Smuzhiyun  *
892*4882a593Smuzhiyun  * This function must be called with the bus lock held in write mode.
893*4882a593Smuzhiyun  *
894*4882a593Smuzhiyun  * Return: 0 in case of success, a positive I3C error code if the error is
895*4882a593Smuzhiyun  * one of the official Mx error codes, and a negative error code otherwise.
896*4882a593Smuzhiyun  */
i3c_master_defslvs_locked(struct i3c_master_controller * master)897*4882a593Smuzhiyun int i3c_master_defslvs_locked(struct i3c_master_controller *master)
898*4882a593Smuzhiyun {
899*4882a593Smuzhiyun 	struct i3c_ccc_defslvs *defslvs;
900*4882a593Smuzhiyun 	struct i3c_ccc_dev_desc *desc;
901*4882a593Smuzhiyun 	struct i3c_ccc_cmd_dest dest;
902*4882a593Smuzhiyun 	struct i3c_dev_desc *i3cdev;
903*4882a593Smuzhiyun 	struct i2c_dev_desc *i2cdev;
904*4882a593Smuzhiyun 	struct i3c_ccc_cmd cmd;
905*4882a593Smuzhiyun 	struct i3c_bus *bus;
906*4882a593Smuzhiyun 	bool send = false;
907*4882a593Smuzhiyun 	int ndevs = 0, ret;
908*4882a593Smuzhiyun 
909*4882a593Smuzhiyun 	if (!master)
910*4882a593Smuzhiyun 		return -EINVAL;
911*4882a593Smuzhiyun 
912*4882a593Smuzhiyun 	bus = i3c_master_get_bus(master);
913*4882a593Smuzhiyun 	i3c_bus_for_each_i3cdev(bus, i3cdev) {
914*4882a593Smuzhiyun 		ndevs++;
915*4882a593Smuzhiyun 
916*4882a593Smuzhiyun 		if (i3cdev == master->this)
917*4882a593Smuzhiyun 			continue;
918*4882a593Smuzhiyun 
919*4882a593Smuzhiyun 		if (I3C_BCR_DEVICE_ROLE(i3cdev->info.bcr) ==
920*4882a593Smuzhiyun 		    I3C_BCR_I3C_MASTER)
921*4882a593Smuzhiyun 			send = true;
922*4882a593Smuzhiyun 	}
923*4882a593Smuzhiyun 
924*4882a593Smuzhiyun 	/* No other master on the bus, skip DEFSLVS. */
925*4882a593Smuzhiyun 	if (!send)
926*4882a593Smuzhiyun 		return 0;
927*4882a593Smuzhiyun 
928*4882a593Smuzhiyun 	i3c_bus_for_each_i2cdev(bus, i2cdev)
929*4882a593Smuzhiyun 		ndevs++;
930*4882a593Smuzhiyun 
931*4882a593Smuzhiyun 	defslvs = i3c_ccc_cmd_dest_init(&dest, I3C_BROADCAST_ADDR,
932*4882a593Smuzhiyun 					struct_size(defslvs, slaves,
933*4882a593Smuzhiyun 						    ndevs - 1));
934*4882a593Smuzhiyun 	if (!defslvs)
935*4882a593Smuzhiyun 		return -ENOMEM;
936*4882a593Smuzhiyun 
937*4882a593Smuzhiyun 	defslvs->count = ndevs;
938*4882a593Smuzhiyun 	defslvs->master.bcr = master->this->info.bcr;
939*4882a593Smuzhiyun 	defslvs->master.dcr = master->this->info.dcr;
940*4882a593Smuzhiyun 	defslvs->master.dyn_addr = master->this->info.dyn_addr << 1;
941*4882a593Smuzhiyun 	defslvs->master.static_addr = I3C_BROADCAST_ADDR << 1;
942*4882a593Smuzhiyun 
943*4882a593Smuzhiyun 	desc = defslvs->slaves;
944*4882a593Smuzhiyun 	i3c_bus_for_each_i2cdev(bus, i2cdev) {
945*4882a593Smuzhiyun 		desc->lvr = i2cdev->lvr;
946*4882a593Smuzhiyun 		desc->static_addr = i2cdev->addr << 1;
947*4882a593Smuzhiyun 		desc++;
948*4882a593Smuzhiyun 	}
949*4882a593Smuzhiyun 
950*4882a593Smuzhiyun 	i3c_bus_for_each_i3cdev(bus, i3cdev) {
951*4882a593Smuzhiyun 		/* Skip the I3C dev representing this master. */
952*4882a593Smuzhiyun 		if (i3cdev == master->this)
953*4882a593Smuzhiyun 			continue;
954*4882a593Smuzhiyun 
955*4882a593Smuzhiyun 		desc->bcr = i3cdev->info.bcr;
956*4882a593Smuzhiyun 		desc->dcr = i3cdev->info.dcr;
957*4882a593Smuzhiyun 		desc->dyn_addr = i3cdev->info.dyn_addr << 1;
958*4882a593Smuzhiyun 		desc->static_addr = i3cdev->info.static_addr << 1;
959*4882a593Smuzhiyun 		desc++;
960*4882a593Smuzhiyun 	}
961*4882a593Smuzhiyun 
962*4882a593Smuzhiyun 	i3c_ccc_cmd_init(&cmd, false, I3C_CCC_DEFSLVS, &dest, 1);
963*4882a593Smuzhiyun 	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
964*4882a593Smuzhiyun 	i3c_ccc_cmd_dest_cleanup(&dest);
965*4882a593Smuzhiyun 
966*4882a593Smuzhiyun 	return ret;
967*4882a593Smuzhiyun }
968*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(i3c_master_defslvs_locked);
969*4882a593Smuzhiyun 
i3c_master_setda_locked(struct i3c_master_controller * master,u8 oldaddr,u8 newaddr,bool setdasa)970*4882a593Smuzhiyun static int i3c_master_setda_locked(struct i3c_master_controller *master,
971*4882a593Smuzhiyun 				   u8 oldaddr, u8 newaddr, bool setdasa)
972*4882a593Smuzhiyun {
973*4882a593Smuzhiyun 	struct i3c_ccc_cmd_dest dest;
974*4882a593Smuzhiyun 	struct i3c_ccc_setda *setda;
975*4882a593Smuzhiyun 	struct i3c_ccc_cmd cmd;
976*4882a593Smuzhiyun 	int ret;
977*4882a593Smuzhiyun 
978*4882a593Smuzhiyun 	if (!oldaddr || !newaddr)
979*4882a593Smuzhiyun 		return -EINVAL;
980*4882a593Smuzhiyun 
981*4882a593Smuzhiyun 	setda = i3c_ccc_cmd_dest_init(&dest, oldaddr, sizeof(*setda));
982*4882a593Smuzhiyun 	if (!setda)
983*4882a593Smuzhiyun 		return -ENOMEM;
984*4882a593Smuzhiyun 
985*4882a593Smuzhiyun 	setda->addr = newaddr << 1;
986*4882a593Smuzhiyun 	i3c_ccc_cmd_init(&cmd, false,
987*4882a593Smuzhiyun 			 setdasa ? I3C_CCC_SETDASA : I3C_CCC_SETNEWDA,
988*4882a593Smuzhiyun 			 &dest, 1);
989*4882a593Smuzhiyun 	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
990*4882a593Smuzhiyun 	i3c_ccc_cmd_dest_cleanup(&dest);
991*4882a593Smuzhiyun 
992*4882a593Smuzhiyun 	return ret;
993*4882a593Smuzhiyun }
994*4882a593Smuzhiyun 
i3c_master_setdasa_locked(struct i3c_master_controller * master,u8 static_addr,u8 dyn_addr)995*4882a593Smuzhiyun static int i3c_master_setdasa_locked(struct i3c_master_controller *master,
996*4882a593Smuzhiyun 				     u8 static_addr, u8 dyn_addr)
997*4882a593Smuzhiyun {
998*4882a593Smuzhiyun 	return i3c_master_setda_locked(master, static_addr, dyn_addr, true);
999*4882a593Smuzhiyun }
1000*4882a593Smuzhiyun 
i3c_master_setnewda_locked(struct i3c_master_controller * master,u8 oldaddr,u8 newaddr)1001*4882a593Smuzhiyun static int i3c_master_setnewda_locked(struct i3c_master_controller *master,
1002*4882a593Smuzhiyun 				      u8 oldaddr, u8 newaddr)
1003*4882a593Smuzhiyun {
1004*4882a593Smuzhiyun 	return i3c_master_setda_locked(master, oldaddr, newaddr, false);
1005*4882a593Smuzhiyun }
1006*4882a593Smuzhiyun 
i3c_master_getmrl_locked(struct i3c_master_controller * master,struct i3c_device_info * info)1007*4882a593Smuzhiyun static int i3c_master_getmrl_locked(struct i3c_master_controller *master,
1008*4882a593Smuzhiyun 				    struct i3c_device_info *info)
1009*4882a593Smuzhiyun {
1010*4882a593Smuzhiyun 	struct i3c_ccc_cmd_dest dest;
1011*4882a593Smuzhiyun 	struct i3c_ccc_mrl *mrl;
1012*4882a593Smuzhiyun 	struct i3c_ccc_cmd cmd;
1013*4882a593Smuzhiyun 	int ret;
1014*4882a593Smuzhiyun 
1015*4882a593Smuzhiyun 	mrl = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*mrl));
1016*4882a593Smuzhiyun 	if (!mrl)
1017*4882a593Smuzhiyun 		return -ENOMEM;
1018*4882a593Smuzhiyun 
1019*4882a593Smuzhiyun 	/*
1020*4882a593Smuzhiyun 	 * When the device does not have IBI payload GETMRL only returns 2
1021*4882a593Smuzhiyun 	 * bytes of data.
1022*4882a593Smuzhiyun 	 */
1023*4882a593Smuzhiyun 	if (!(info->bcr & I3C_BCR_IBI_PAYLOAD))
1024*4882a593Smuzhiyun 		dest.payload.len -= 1;
1025*4882a593Smuzhiyun 
1026*4882a593Smuzhiyun 	i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMRL, &dest, 1);
1027*4882a593Smuzhiyun 	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1028*4882a593Smuzhiyun 	if (ret)
1029*4882a593Smuzhiyun 		goto out;
1030*4882a593Smuzhiyun 
1031*4882a593Smuzhiyun 	switch (dest.payload.len) {
1032*4882a593Smuzhiyun 	case 3:
1033*4882a593Smuzhiyun 		info->max_ibi_len = mrl->ibi_len;
1034*4882a593Smuzhiyun 		fallthrough;
1035*4882a593Smuzhiyun 	case 2:
1036*4882a593Smuzhiyun 		info->max_read_len = be16_to_cpu(mrl->read_len);
1037*4882a593Smuzhiyun 		break;
1038*4882a593Smuzhiyun 	default:
1039*4882a593Smuzhiyun 		ret = -EIO;
1040*4882a593Smuzhiyun 		goto out;
1041*4882a593Smuzhiyun 	}
1042*4882a593Smuzhiyun 
1043*4882a593Smuzhiyun out:
1044*4882a593Smuzhiyun 	i3c_ccc_cmd_dest_cleanup(&dest);
1045*4882a593Smuzhiyun 
1046*4882a593Smuzhiyun 	return ret;
1047*4882a593Smuzhiyun }
1048*4882a593Smuzhiyun 
i3c_master_getmwl_locked(struct i3c_master_controller * master,struct i3c_device_info * info)1049*4882a593Smuzhiyun static int i3c_master_getmwl_locked(struct i3c_master_controller *master,
1050*4882a593Smuzhiyun 				    struct i3c_device_info *info)
1051*4882a593Smuzhiyun {
1052*4882a593Smuzhiyun 	struct i3c_ccc_cmd_dest dest;
1053*4882a593Smuzhiyun 	struct i3c_ccc_mwl *mwl;
1054*4882a593Smuzhiyun 	struct i3c_ccc_cmd cmd;
1055*4882a593Smuzhiyun 	int ret;
1056*4882a593Smuzhiyun 
1057*4882a593Smuzhiyun 	mwl = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*mwl));
1058*4882a593Smuzhiyun 	if (!mwl)
1059*4882a593Smuzhiyun 		return -ENOMEM;
1060*4882a593Smuzhiyun 
1061*4882a593Smuzhiyun 	i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMWL, &dest, 1);
1062*4882a593Smuzhiyun 	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1063*4882a593Smuzhiyun 	if (ret)
1064*4882a593Smuzhiyun 		goto out;
1065*4882a593Smuzhiyun 
1066*4882a593Smuzhiyun 	if (dest.payload.len != sizeof(*mwl)) {
1067*4882a593Smuzhiyun 		ret = -EIO;
1068*4882a593Smuzhiyun 		goto out;
1069*4882a593Smuzhiyun 	}
1070*4882a593Smuzhiyun 
1071*4882a593Smuzhiyun 	info->max_write_len = be16_to_cpu(mwl->len);
1072*4882a593Smuzhiyun 
1073*4882a593Smuzhiyun out:
1074*4882a593Smuzhiyun 	i3c_ccc_cmd_dest_cleanup(&dest);
1075*4882a593Smuzhiyun 
1076*4882a593Smuzhiyun 	return ret;
1077*4882a593Smuzhiyun }
1078*4882a593Smuzhiyun 
i3c_master_getmxds_locked(struct i3c_master_controller * master,struct i3c_device_info * info)1079*4882a593Smuzhiyun static int i3c_master_getmxds_locked(struct i3c_master_controller *master,
1080*4882a593Smuzhiyun 				     struct i3c_device_info *info)
1081*4882a593Smuzhiyun {
1082*4882a593Smuzhiyun 	struct i3c_ccc_getmxds *getmaxds;
1083*4882a593Smuzhiyun 	struct i3c_ccc_cmd_dest dest;
1084*4882a593Smuzhiyun 	struct i3c_ccc_cmd cmd;
1085*4882a593Smuzhiyun 	int ret;
1086*4882a593Smuzhiyun 
1087*4882a593Smuzhiyun 	getmaxds = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr,
1088*4882a593Smuzhiyun 					 sizeof(*getmaxds));
1089*4882a593Smuzhiyun 	if (!getmaxds)
1090*4882a593Smuzhiyun 		return -ENOMEM;
1091*4882a593Smuzhiyun 
1092*4882a593Smuzhiyun 	i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMXDS, &dest, 1);
1093*4882a593Smuzhiyun 	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1094*4882a593Smuzhiyun 	if (ret)
1095*4882a593Smuzhiyun 		goto out;
1096*4882a593Smuzhiyun 
1097*4882a593Smuzhiyun 	if (dest.payload.len != 2 && dest.payload.len != 5) {
1098*4882a593Smuzhiyun 		ret = -EIO;
1099*4882a593Smuzhiyun 		goto out;
1100*4882a593Smuzhiyun 	}
1101*4882a593Smuzhiyun 
1102*4882a593Smuzhiyun 	info->max_read_ds = getmaxds->maxrd;
1103*4882a593Smuzhiyun 	info->max_write_ds = getmaxds->maxwr;
1104*4882a593Smuzhiyun 	if (dest.payload.len == 5)
1105*4882a593Smuzhiyun 		info->max_read_turnaround = getmaxds->maxrdturn[0] |
1106*4882a593Smuzhiyun 					    ((u32)getmaxds->maxrdturn[1] << 8) |
1107*4882a593Smuzhiyun 					    ((u32)getmaxds->maxrdturn[2] << 16);
1108*4882a593Smuzhiyun 
1109*4882a593Smuzhiyun out:
1110*4882a593Smuzhiyun 	i3c_ccc_cmd_dest_cleanup(&dest);
1111*4882a593Smuzhiyun 
1112*4882a593Smuzhiyun 	return ret;
1113*4882a593Smuzhiyun }
1114*4882a593Smuzhiyun 
i3c_master_gethdrcap_locked(struct i3c_master_controller * master,struct i3c_device_info * info)1115*4882a593Smuzhiyun static int i3c_master_gethdrcap_locked(struct i3c_master_controller *master,
1116*4882a593Smuzhiyun 				       struct i3c_device_info *info)
1117*4882a593Smuzhiyun {
1118*4882a593Smuzhiyun 	struct i3c_ccc_gethdrcap *gethdrcap;
1119*4882a593Smuzhiyun 	struct i3c_ccc_cmd_dest dest;
1120*4882a593Smuzhiyun 	struct i3c_ccc_cmd cmd;
1121*4882a593Smuzhiyun 	int ret;
1122*4882a593Smuzhiyun 
1123*4882a593Smuzhiyun 	gethdrcap = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr,
1124*4882a593Smuzhiyun 					  sizeof(*gethdrcap));
1125*4882a593Smuzhiyun 	if (!gethdrcap)
1126*4882a593Smuzhiyun 		return -ENOMEM;
1127*4882a593Smuzhiyun 
1128*4882a593Smuzhiyun 	i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETHDRCAP, &dest, 1);
1129*4882a593Smuzhiyun 	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1130*4882a593Smuzhiyun 	if (ret)
1131*4882a593Smuzhiyun 		goto out;
1132*4882a593Smuzhiyun 
1133*4882a593Smuzhiyun 	if (dest.payload.len != 1) {
1134*4882a593Smuzhiyun 		ret = -EIO;
1135*4882a593Smuzhiyun 		goto out;
1136*4882a593Smuzhiyun 	}
1137*4882a593Smuzhiyun 
1138*4882a593Smuzhiyun 	info->hdr_cap = gethdrcap->modes;
1139*4882a593Smuzhiyun 
1140*4882a593Smuzhiyun out:
1141*4882a593Smuzhiyun 	i3c_ccc_cmd_dest_cleanup(&dest);
1142*4882a593Smuzhiyun 
1143*4882a593Smuzhiyun 	return ret;
1144*4882a593Smuzhiyun }
1145*4882a593Smuzhiyun 
i3c_master_getpid_locked(struct i3c_master_controller * master,struct i3c_device_info * info)1146*4882a593Smuzhiyun static int i3c_master_getpid_locked(struct i3c_master_controller *master,
1147*4882a593Smuzhiyun 				    struct i3c_device_info *info)
1148*4882a593Smuzhiyun {
1149*4882a593Smuzhiyun 	struct i3c_ccc_getpid *getpid;
1150*4882a593Smuzhiyun 	struct i3c_ccc_cmd_dest dest;
1151*4882a593Smuzhiyun 	struct i3c_ccc_cmd cmd;
1152*4882a593Smuzhiyun 	int ret, i;
1153*4882a593Smuzhiyun 
1154*4882a593Smuzhiyun 	getpid = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getpid));
1155*4882a593Smuzhiyun 	if (!getpid)
1156*4882a593Smuzhiyun 		return -ENOMEM;
1157*4882a593Smuzhiyun 
1158*4882a593Smuzhiyun 	i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETPID, &dest, 1);
1159*4882a593Smuzhiyun 	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1160*4882a593Smuzhiyun 	if (ret)
1161*4882a593Smuzhiyun 		goto out;
1162*4882a593Smuzhiyun 
1163*4882a593Smuzhiyun 	info->pid = 0;
1164*4882a593Smuzhiyun 	for (i = 0; i < sizeof(getpid->pid); i++) {
1165*4882a593Smuzhiyun 		int sft = (sizeof(getpid->pid) - i - 1) * 8;
1166*4882a593Smuzhiyun 
1167*4882a593Smuzhiyun 		info->pid |= (u64)getpid->pid[i] << sft;
1168*4882a593Smuzhiyun 	}
1169*4882a593Smuzhiyun 
1170*4882a593Smuzhiyun out:
1171*4882a593Smuzhiyun 	i3c_ccc_cmd_dest_cleanup(&dest);
1172*4882a593Smuzhiyun 
1173*4882a593Smuzhiyun 	return ret;
1174*4882a593Smuzhiyun }
1175*4882a593Smuzhiyun 
i3c_master_getbcr_locked(struct i3c_master_controller * master,struct i3c_device_info * info)1176*4882a593Smuzhiyun static int i3c_master_getbcr_locked(struct i3c_master_controller *master,
1177*4882a593Smuzhiyun 				    struct i3c_device_info *info)
1178*4882a593Smuzhiyun {
1179*4882a593Smuzhiyun 	struct i3c_ccc_getbcr *getbcr;
1180*4882a593Smuzhiyun 	struct i3c_ccc_cmd_dest dest;
1181*4882a593Smuzhiyun 	struct i3c_ccc_cmd cmd;
1182*4882a593Smuzhiyun 	int ret;
1183*4882a593Smuzhiyun 
1184*4882a593Smuzhiyun 	getbcr = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getbcr));
1185*4882a593Smuzhiyun 	if (!getbcr)
1186*4882a593Smuzhiyun 		return -ENOMEM;
1187*4882a593Smuzhiyun 
1188*4882a593Smuzhiyun 	i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETBCR, &dest, 1);
1189*4882a593Smuzhiyun 	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1190*4882a593Smuzhiyun 	if (ret)
1191*4882a593Smuzhiyun 		goto out;
1192*4882a593Smuzhiyun 
1193*4882a593Smuzhiyun 	info->bcr = getbcr->bcr;
1194*4882a593Smuzhiyun 
1195*4882a593Smuzhiyun out:
1196*4882a593Smuzhiyun 	i3c_ccc_cmd_dest_cleanup(&dest);
1197*4882a593Smuzhiyun 
1198*4882a593Smuzhiyun 	return ret;
1199*4882a593Smuzhiyun }
1200*4882a593Smuzhiyun 
i3c_master_getdcr_locked(struct i3c_master_controller * master,struct i3c_device_info * info)1201*4882a593Smuzhiyun static int i3c_master_getdcr_locked(struct i3c_master_controller *master,
1202*4882a593Smuzhiyun 				    struct i3c_device_info *info)
1203*4882a593Smuzhiyun {
1204*4882a593Smuzhiyun 	struct i3c_ccc_getdcr *getdcr;
1205*4882a593Smuzhiyun 	struct i3c_ccc_cmd_dest dest;
1206*4882a593Smuzhiyun 	struct i3c_ccc_cmd cmd;
1207*4882a593Smuzhiyun 	int ret;
1208*4882a593Smuzhiyun 
1209*4882a593Smuzhiyun 	getdcr = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getdcr));
1210*4882a593Smuzhiyun 	if (!getdcr)
1211*4882a593Smuzhiyun 		return -ENOMEM;
1212*4882a593Smuzhiyun 
1213*4882a593Smuzhiyun 	i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETDCR, &dest, 1);
1214*4882a593Smuzhiyun 	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1215*4882a593Smuzhiyun 	if (ret)
1216*4882a593Smuzhiyun 		goto out;
1217*4882a593Smuzhiyun 
1218*4882a593Smuzhiyun 	info->dcr = getdcr->dcr;
1219*4882a593Smuzhiyun 
1220*4882a593Smuzhiyun out:
1221*4882a593Smuzhiyun 	i3c_ccc_cmd_dest_cleanup(&dest);
1222*4882a593Smuzhiyun 
1223*4882a593Smuzhiyun 	return ret;
1224*4882a593Smuzhiyun }
1225*4882a593Smuzhiyun 
i3c_master_retrieve_dev_info(struct i3c_dev_desc * dev)1226*4882a593Smuzhiyun static int i3c_master_retrieve_dev_info(struct i3c_dev_desc *dev)
1227*4882a593Smuzhiyun {
1228*4882a593Smuzhiyun 	struct i3c_master_controller *master = i3c_dev_get_master(dev);
1229*4882a593Smuzhiyun 	enum i3c_addr_slot_status slot_status;
1230*4882a593Smuzhiyun 	int ret;
1231*4882a593Smuzhiyun 
1232*4882a593Smuzhiyun 	if (!dev->info.dyn_addr)
1233*4882a593Smuzhiyun 		return -EINVAL;
1234*4882a593Smuzhiyun 
1235*4882a593Smuzhiyun 	slot_status = i3c_bus_get_addr_slot_status(&master->bus,
1236*4882a593Smuzhiyun 						   dev->info.dyn_addr);
1237*4882a593Smuzhiyun 	if (slot_status == I3C_ADDR_SLOT_RSVD ||
1238*4882a593Smuzhiyun 	    slot_status == I3C_ADDR_SLOT_I2C_DEV)
1239*4882a593Smuzhiyun 		return -EINVAL;
1240*4882a593Smuzhiyun 
1241*4882a593Smuzhiyun 	ret = i3c_master_getpid_locked(master, &dev->info);
1242*4882a593Smuzhiyun 	if (ret)
1243*4882a593Smuzhiyun 		return ret;
1244*4882a593Smuzhiyun 
1245*4882a593Smuzhiyun 	ret = i3c_master_getbcr_locked(master, &dev->info);
1246*4882a593Smuzhiyun 	if (ret)
1247*4882a593Smuzhiyun 		return ret;
1248*4882a593Smuzhiyun 
1249*4882a593Smuzhiyun 	ret = i3c_master_getdcr_locked(master, &dev->info);
1250*4882a593Smuzhiyun 	if (ret)
1251*4882a593Smuzhiyun 		return ret;
1252*4882a593Smuzhiyun 
1253*4882a593Smuzhiyun 	if (dev->info.bcr & I3C_BCR_MAX_DATA_SPEED_LIM) {
1254*4882a593Smuzhiyun 		ret = i3c_master_getmxds_locked(master, &dev->info);
1255*4882a593Smuzhiyun 		if (ret)
1256*4882a593Smuzhiyun 			return ret;
1257*4882a593Smuzhiyun 	}
1258*4882a593Smuzhiyun 
1259*4882a593Smuzhiyun 	if (dev->info.bcr & I3C_BCR_IBI_PAYLOAD)
1260*4882a593Smuzhiyun 		dev->info.max_ibi_len = 1;
1261*4882a593Smuzhiyun 
1262*4882a593Smuzhiyun 	i3c_master_getmrl_locked(master, &dev->info);
1263*4882a593Smuzhiyun 	i3c_master_getmwl_locked(master, &dev->info);
1264*4882a593Smuzhiyun 
1265*4882a593Smuzhiyun 	if (dev->info.bcr & I3C_BCR_HDR_CAP) {
1266*4882a593Smuzhiyun 		ret = i3c_master_gethdrcap_locked(master, &dev->info);
1267*4882a593Smuzhiyun 		if (ret)
1268*4882a593Smuzhiyun 			return ret;
1269*4882a593Smuzhiyun 	}
1270*4882a593Smuzhiyun 
1271*4882a593Smuzhiyun 	return 0;
1272*4882a593Smuzhiyun }
1273*4882a593Smuzhiyun 
i3c_master_put_i3c_addrs(struct i3c_dev_desc * dev)1274*4882a593Smuzhiyun static void i3c_master_put_i3c_addrs(struct i3c_dev_desc *dev)
1275*4882a593Smuzhiyun {
1276*4882a593Smuzhiyun 	struct i3c_master_controller *master = i3c_dev_get_master(dev);
1277*4882a593Smuzhiyun 
1278*4882a593Smuzhiyun 	if (dev->info.static_addr)
1279*4882a593Smuzhiyun 		i3c_bus_set_addr_slot_status(&master->bus,
1280*4882a593Smuzhiyun 					     dev->info.static_addr,
1281*4882a593Smuzhiyun 					     I3C_ADDR_SLOT_FREE);
1282*4882a593Smuzhiyun 
1283*4882a593Smuzhiyun 	if (dev->info.dyn_addr)
1284*4882a593Smuzhiyun 		i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr,
1285*4882a593Smuzhiyun 					     I3C_ADDR_SLOT_FREE);
1286*4882a593Smuzhiyun 
1287*4882a593Smuzhiyun 	if (dev->boardinfo && dev->boardinfo->init_dyn_addr)
1288*4882a593Smuzhiyun 		i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr,
1289*4882a593Smuzhiyun 					     I3C_ADDR_SLOT_FREE);
1290*4882a593Smuzhiyun }
1291*4882a593Smuzhiyun 
i3c_master_get_i3c_addrs(struct i3c_dev_desc * dev)1292*4882a593Smuzhiyun static int i3c_master_get_i3c_addrs(struct i3c_dev_desc *dev)
1293*4882a593Smuzhiyun {
1294*4882a593Smuzhiyun 	struct i3c_master_controller *master = i3c_dev_get_master(dev);
1295*4882a593Smuzhiyun 	enum i3c_addr_slot_status status;
1296*4882a593Smuzhiyun 
1297*4882a593Smuzhiyun 	if (!dev->info.static_addr && !dev->info.dyn_addr)
1298*4882a593Smuzhiyun 		return 0;
1299*4882a593Smuzhiyun 
1300*4882a593Smuzhiyun 	if (dev->info.static_addr) {
1301*4882a593Smuzhiyun 		status = i3c_bus_get_addr_slot_status(&master->bus,
1302*4882a593Smuzhiyun 						      dev->info.static_addr);
1303*4882a593Smuzhiyun 		if (status != I3C_ADDR_SLOT_FREE)
1304*4882a593Smuzhiyun 			return -EBUSY;
1305*4882a593Smuzhiyun 
1306*4882a593Smuzhiyun 		i3c_bus_set_addr_slot_status(&master->bus,
1307*4882a593Smuzhiyun 					     dev->info.static_addr,
1308*4882a593Smuzhiyun 					     I3C_ADDR_SLOT_I3C_DEV);
1309*4882a593Smuzhiyun 	}
1310*4882a593Smuzhiyun 
1311*4882a593Smuzhiyun 	/*
1312*4882a593Smuzhiyun 	 * ->init_dyn_addr should have been reserved before that, so, if we're
1313*4882a593Smuzhiyun 	 * trying to apply a pre-reserved dynamic address, we should not try
1314*4882a593Smuzhiyun 	 * to reserve the address slot a second time.
1315*4882a593Smuzhiyun 	 */
1316*4882a593Smuzhiyun 	if (dev->info.dyn_addr &&
1317*4882a593Smuzhiyun 	    (!dev->boardinfo ||
1318*4882a593Smuzhiyun 	     dev->boardinfo->init_dyn_addr != dev->info.dyn_addr)) {
1319*4882a593Smuzhiyun 		status = i3c_bus_get_addr_slot_status(&master->bus,
1320*4882a593Smuzhiyun 						      dev->info.dyn_addr);
1321*4882a593Smuzhiyun 		if (status != I3C_ADDR_SLOT_FREE)
1322*4882a593Smuzhiyun 			goto err_release_static_addr;
1323*4882a593Smuzhiyun 
1324*4882a593Smuzhiyun 		i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr,
1325*4882a593Smuzhiyun 					     I3C_ADDR_SLOT_I3C_DEV);
1326*4882a593Smuzhiyun 	}
1327*4882a593Smuzhiyun 
1328*4882a593Smuzhiyun 	return 0;
1329*4882a593Smuzhiyun 
1330*4882a593Smuzhiyun err_release_static_addr:
1331*4882a593Smuzhiyun 	if (dev->info.static_addr)
1332*4882a593Smuzhiyun 		i3c_bus_set_addr_slot_status(&master->bus,
1333*4882a593Smuzhiyun 					     dev->info.static_addr,
1334*4882a593Smuzhiyun 					     I3C_ADDR_SLOT_FREE);
1335*4882a593Smuzhiyun 
1336*4882a593Smuzhiyun 	return -EBUSY;
1337*4882a593Smuzhiyun }
1338*4882a593Smuzhiyun 
i3c_master_attach_i3c_dev(struct i3c_master_controller * master,struct i3c_dev_desc * dev)1339*4882a593Smuzhiyun static int i3c_master_attach_i3c_dev(struct i3c_master_controller *master,
1340*4882a593Smuzhiyun 				     struct i3c_dev_desc *dev)
1341*4882a593Smuzhiyun {
1342*4882a593Smuzhiyun 	int ret;
1343*4882a593Smuzhiyun 
1344*4882a593Smuzhiyun 	/*
1345*4882a593Smuzhiyun 	 * We don't attach devices to the controller until they are
1346*4882a593Smuzhiyun 	 * addressable on the bus.
1347*4882a593Smuzhiyun 	 */
1348*4882a593Smuzhiyun 	if (!dev->info.static_addr && !dev->info.dyn_addr)
1349*4882a593Smuzhiyun 		return 0;
1350*4882a593Smuzhiyun 
1351*4882a593Smuzhiyun 	ret = i3c_master_get_i3c_addrs(dev);
1352*4882a593Smuzhiyun 	if (ret)
1353*4882a593Smuzhiyun 		return ret;
1354*4882a593Smuzhiyun 
1355*4882a593Smuzhiyun 	/* Do not attach the master device itself. */
1356*4882a593Smuzhiyun 	if (master->this != dev && master->ops->attach_i3c_dev) {
1357*4882a593Smuzhiyun 		ret = master->ops->attach_i3c_dev(dev);
1358*4882a593Smuzhiyun 		if (ret) {
1359*4882a593Smuzhiyun 			i3c_master_put_i3c_addrs(dev);
1360*4882a593Smuzhiyun 			return ret;
1361*4882a593Smuzhiyun 		}
1362*4882a593Smuzhiyun 	}
1363*4882a593Smuzhiyun 
1364*4882a593Smuzhiyun 	list_add_tail(&dev->common.node, &master->bus.devs.i3c);
1365*4882a593Smuzhiyun 
1366*4882a593Smuzhiyun 	return 0;
1367*4882a593Smuzhiyun }
1368*4882a593Smuzhiyun 
i3c_master_reattach_i3c_dev(struct i3c_dev_desc * dev,u8 old_dyn_addr)1369*4882a593Smuzhiyun static int i3c_master_reattach_i3c_dev(struct i3c_dev_desc *dev,
1370*4882a593Smuzhiyun 				       u8 old_dyn_addr)
1371*4882a593Smuzhiyun {
1372*4882a593Smuzhiyun 	struct i3c_master_controller *master = i3c_dev_get_master(dev);
1373*4882a593Smuzhiyun 	enum i3c_addr_slot_status status;
1374*4882a593Smuzhiyun 	int ret;
1375*4882a593Smuzhiyun 
1376*4882a593Smuzhiyun 	if (dev->info.dyn_addr != old_dyn_addr &&
1377*4882a593Smuzhiyun 	    (!dev->boardinfo ||
1378*4882a593Smuzhiyun 	     dev->info.dyn_addr != dev->boardinfo->init_dyn_addr)) {
1379*4882a593Smuzhiyun 		status = i3c_bus_get_addr_slot_status(&master->bus,
1380*4882a593Smuzhiyun 						      dev->info.dyn_addr);
1381*4882a593Smuzhiyun 		if (status != I3C_ADDR_SLOT_FREE)
1382*4882a593Smuzhiyun 			return -EBUSY;
1383*4882a593Smuzhiyun 		i3c_bus_set_addr_slot_status(&master->bus,
1384*4882a593Smuzhiyun 					     dev->info.dyn_addr,
1385*4882a593Smuzhiyun 					     I3C_ADDR_SLOT_I3C_DEV);
1386*4882a593Smuzhiyun 	}
1387*4882a593Smuzhiyun 
1388*4882a593Smuzhiyun 	if (master->ops->reattach_i3c_dev) {
1389*4882a593Smuzhiyun 		ret = master->ops->reattach_i3c_dev(dev, old_dyn_addr);
1390*4882a593Smuzhiyun 		if (ret) {
1391*4882a593Smuzhiyun 			i3c_master_put_i3c_addrs(dev);
1392*4882a593Smuzhiyun 			return ret;
1393*4882a593Smuzhiyun 		}
1394*4882a593Smuzhiyun 	}
1395*4882a593Smuzhiyun 
1396*4882a593Smuzhiyun 	return 0;
1397*4882a593Smuzhiyun }
1398*4882a593Smuzhiyun 
i3c_master_detach_i3c_dev(struct i3c_dev_desc * dev)1399*4882a593Smuzhiyun static void i3c_master_detach_i3c_dev(struct i3c_dev_desc *dev)
1400*4882a593Smuzhiyun {
1401*4882a593Smuzhiyun 	struct i3c_master_controller *master = i3c_dev_get_master(dev);
1402*4882a593Smuzhiyun 
1403*4882a593Smuzhiyun 	/* Do not detach the master device itself. */
1404*4882a593Smuzhiyun 	if (master->this != dev && master->ops->detach_i3c_dev)
1405*4882a593Smuzhiyun 		master->ops->detach_i3c_dev(dev);
1406*4882a593Smuzhiyun 
1407*4882a593Smuzhiyun 	i3c_master_put_i3c_addrs(dev);
1408*4882a593Smuzhiyun 	list_del(&dev->common.node);
1409*4882a593Smuzhiyun }
1410*4882a593Smuzhiyun 
i3c_master_attach_i2c_dev(struct i3c_master_controller * master,struct i2c_dev_desc * dev)1411*4882a593Smuzhiyun static int i3c_master_attach_i2c_dev(struct i3c_master_controller *master,
1412*4882a593Smuzhiyun 				     struct i2c_dev_desc *dev)
1413*4882a593Smuzhiyun {
1414*4882a593Smuzhiyun 	int ret;
1415*4882a593Smuzhiyun 
1416*4882a593Smuzhiyun 	if (master->ops->attach_i2c_dev) {
1417*4882a593Smuzhiyun 		ret = master->ops->attach_i2c_dev(dev);
1418*4882a593Smuzhiyun 		if (ret)
1419*4882a593Smuzhiyun 			return ret;
1420*4882a593Smuzhiyun 	}
1421*4882a593Smuzhiyun 
1422*4882a593Smuzhiyun 	list_add_tail(&dev->common.node, &master->bus.devs.i2c);
1423*4882a593Smuzhiyun 
1424*4882a593Smuzhiyun 	return 0;
1425*4882a593Smuzhiyun }
1426*4882a593Smuzhiyun 
i3c_master_detach_i2c_dev(struct i2c_dev_desc * dev)1427*4882a593Smuzhiyun static void i3c_master_detach_i2c_dev(struct i2c_dev_desc *dev)
1428*4882a593Smuzhiyun {
1429*4882a593Smuzhiyun 	struct i3c_master_controller *master = i2c_dev_get_master(dev);
1430*4882a593Smuzhiyun 
1431*4882a593Smuzhiyun 	list_del(&dev->common.node);
1432*4882a593Smuzhiyun 
1433*4882a593Smuzhiyun 	if (master->ops->detach_i2c_dev)
1434*4882a593Smuzhiyun 		master->ops->detach_i2c_dev(dev);
1435*4882a593Smuzhiyun }
1436*4882a593Smuzhiyun 
i3c_master_early_i3c_dev_add(struct i3c_master_controller * master,struct i3c_dev_boardinfo * boardinfo)1437*4882a593Smuzhiyun static int i3c_master_early_i3c_dev_add(struct i3c_master_controller *master,
1438*4882a593Smuzhiyun 					  struct i3c_dev_boardinfo *boardinfo)
1439*4882a593Smuzhiyun {
1440*4882a593Smuzhiyun 	struct i3c_device_info info = {
1441*4882a593Smuzhiyun 		.static_addr = boardinfo->static_addr,
1442*4882a593Smuzhiyun 	};
1443*4882a593Smuzhiyun 	struct i3c_dev_desc *i3cdev;
1444*4882a593Smuzhiyun 	int ret;
1445*4882a593Smuzhiyun 
1446*4882a593Smuzhiyun 	i3cdev = i3c_master_alloc_i3c_dev(master, &info);
1447*4882a593Smuzhiyun 	if (IS_ERR(i3cdev))
1448*4882a593Smuzhiyun 		return -ENOMEM;
1449*4882a593Smuzhiyun 
1450*4882a593Smuzhiyun 	i3cdev->boardinfo = boardinfo;
1451*4882a593Smuzhiyun 
1452*4882a593Smuzhiyun 	ret = i3c_master_attach_i3c_dev(master, i3cdev);
1453*4882a593Smuzhiyun 	if (ret)
1454*4882a593Smuzhiyun 		goto err_free_dev;
1455*4882a593Smuzhiyun 
1456*4882a593Smuzhiyun 	ret = i3c_master_setdasa_locked(master, i3cdev->info.static_addr,
1457*4882a593Smuzhiyun 					i3cdev->boardinfo->init_dyn_addr);
1458*4882a593Smuzhiyun 	if (ret)
1459*4882a593Smuzhiyun 		goto err_detach_dev;
1460*4882a593Smuzhiyun 
1461*4882a593Smuzhiyun 	i3cdev->info.dyn_addr = i3cdev->boardinfo->init_dyn_addr;
1462*4882a593Smuzhiyun 	ret = i3c_master_reattach_i3c_dev(i3cdev, 0);
1463*4882a593Smuzhiyun 	if (ret)
1464*4882a593Smuzhiyun 		goto err_rstdaa;
1465*4882a593Smuzhiyun 
1466*4882a593Smuzhiyun 	ret = i3c_master_retrieve_dev_info(i3cdev);
1467*4882a593Smuzhiyun 	if (ret)
1468*4882a593Smuzhiyun 		goto err_rstdaa;
1469*4882a593Smuzhiyun 
1470*4882a593Smuzhiyun 	return 0;
1471*4882a593Smuzhiyun 
1472*4882a593Smuzhiyun err_rstdaa:
1473*4882a593Smuzhiyun 	i3c_master_rstdaa_locked(master, i3cdev->boardinfo->init_dyn_addr);
1474*4882a593Smuzhiyun err_detach_dev:
1475*4882a593Smuzhiyun 	i3c_master_detach_i3c_dev(i3cdev);
1476*4882a593Smuzhiyun err_free_dev:
1477*4882a593Smuzhiyun 	i3c_master_free_i3c_dev(i3cdev);
1478*4882a593Smuzhiyun 
1479*4882a593Smuzhiyun 	return ret;
1480*4882a593Smuzhiyun }
1481*4882a593Smuzhiyun 
1482*4882a593Smuzhiyun static void
i3c_master_register_new_i3c_devs(struct i3c_master_controller * master)1483*4882a593Smuzhiyun i3c_master_register_new_i3c_devs(struct i3c_master_controller *master)
1484*4882a593Smuzhiyun {
1485*4882a593Smuzhiyun 	struct i3c_dev_desc *desc;
1486*4882a593Smuzhiyun 	int ret;
1487*4882a593Smuzhiyun 
1488*4882a593Smuzhiyun 	if (!master->init_done)
1489*4882a593Smuzhiyun 		return;
1490*4882a593Smuzhiyun 
1491*4882a593Smuzhiyun 	i3c_bus_for_each_i3cdev(&master->bus, desc) {
1492*4882a593Smuzhiyun 		if (desc->dev || !desc->info.dyn_addr || desc == master->this)
1493*4882a593Smuzhiyun 			continue;
1494*4882a593Smuzhiyun 
1495*4882a593Smuzhiyun 		desc->dev = kzalloc(sizeof(*desc->dev), GFP_KERNEL);
1496*4882a593Smuzhiyun 		if (!desc->dev)
1497*4882a593Smuzhiyun 			continue;
1498*4882a593Smuzhiyun 
1499*4882a593Smuzhiyun 		desc->dev->bus = &master->bus;
1500*4882a593Smuzhiyun 		desc->dev->desc = desc;
1501*4882a593Smuzhiyun 		desc->dev->dev.parent = &master->dev;
1502*4882a593Smuzhiyun 		desc->dev->dev.type = &i3c_device_type;
1503*4882a593Smuzhiyun 		desc->dev->dev.bus = &i3c_bus_type;
1504*4882a593Smuzhiyun 		desc->dev->dev.release = i3c_device_release;
1505*4882a593Smuzhiyun 		dev_set_name(&desc->dev->dev, "%d-%llx", master->bus.id,
1506*4882a593Smuzhiyun 			     desc->info.pid);
1507*4882a593Smuzhiyun 
1508*4882a593Smuzhiyun 		if (desc->boardinfo)
1509*4882a593Smuzhiyun 			desc->dev->dev.of_node = desc->boardinfo->of_node;
1510*4882a593Smuzhiyun 
1511*4882a593Smuzhiyun 		ret = device_register(&desc->dev->dev);
1512*4882a593Smuzhiyun 		if (ret)
1513*4882a593Smuzhiyun 			dev_err(&master->dev,
1514*4882a593Smuzhiyun 				"Failed to add I3C device (err = %d)\n", ret);
1515*4882a593Smuzhiyun 	}
1516*4882a593Smuzhiyun }
1517*4882a593Smuzhiyun 
1518*4882a593Smuzhiyun /**
1519*4882a593Smuzhiyun  * i3c_master_do_daa() - do a DAA (Dynamic Address Assignment)
1520*4882a593Smuzhiyun  * @master: master doing the DAA
1521*4882a593Smuzhiyun  *
1522*4882a593Smuzhiyun  * This function is instantiating an I3C device object and adding it to the
1523*4882a593Smuzhiyun  * I3C device list. All device information are automatically retrieved using
1524*4882a593Smuzhiyun  * standard CCC commands.
1525*4882a593Smuzhiyun  *
1526*4882a593Smuzhiyun  * The I3C device object is returned in case the master wants to attach
1527*4882a593Smuzhiyun  * private data to it using i3c_dev_set_master_data().
1528*4882a593Smuzhiyun  *
1529*4882a593Smuzhiyun  * This function must be called with the bus lock held in write mode.
1530*4882a593Smuzhiyun  *
1531*4882a593Smuzhiyun  * Return: a 0 in case of success, an negative error code otherwise.
1532*4882a593Smuzhiyun  */
i3c_master_do_daa(struct i3c_master_controller * master)1533*4882a593Smuzhiyun int i3c_master_do_daa(struct i3c_master_controller *master)
1534*4882a593Smuzhiyun {
1535*4882a593Smuzhiyun 	int ret;
1536*4882a593Smuzhiyun 
1537*4882a593Smuzhiyun 	i3c_bus_maintenance_lock(&master->bus);
1538*4882a593Smuzhiyun 	ret = master->ops->do_daa(master);
1539*4882a593Smuzhiyun 	i3c_bus_maintenance_unlock(&master->bus);
1540*4882a593Smuzhiyun 
1541*4882a593Smuzhiyun 	if (ret)
1542*4882a593Smuzhiyun 		return ret;
1543*4882a593Smuzhiyun 
1544*4882a593Smuzhiyun 	i3c_bus_normaluse_lock(&master->bus);
1545*4882a593Smuzhiyun 	i3c_master_register_new_i3c_devs(master);
1546*4882a593Smuzhiyun 	i3c_bus_normaluse_unlock(&master->bus);
1547*4882a593Smuzhiyun 
1548*4882a593Smuzhiyun 	return 0;
1549*4882a593Smuzhiyun }
1550*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(i3c_master_do_daa);
1551*4882a593Smuzhiyun 
1552*4882a593Smuzhiyun /**
1553*4882a593Smuzhiyun  * i3c_master_set_info() - set master device information
1554*4882a593Smuzhiyun  * @master: master used to send frames on the bus
1555*4882a593Smuzhiyun  * @info: I3C device information
1556*4882a593Smuzhiyun  *
1557*4882a593Smuzhiyun  * Set master device info. This should be called from
1558*4882a593Smuzhiyun  * &i3c_master_controller_ops->bus_init().
1559*4882a593Smuzhiyun  *
1560*4882a593Smuzhiyun  * Not all &i3c_device_info fields are meaningful for a master device.
1561*4882a593Smuzhiyun  * Here is a list of fields that should be properly filled:
1562*4882a593Smuzhiyun  *
1563*4882a593Smuzhiyun  * - &i3c_device_info->dyn_addr
1564*4882a593Smuzhiyun  * - &i3c_device_info->bcr
1565*4882a593Smuzhiyun  * - &i3c_device_info->dcr
1566*4882a593Smuzhiyun  * - &i3c_device_info->pid
1567*4882a593Smuzhiyun  * - &i3c_device_info->hdr_cap if %I3C_BCR_HDR_CAP bit is set in
1568*4882a593Smuzhiyun  *   &i3c_device_info->bcr
1569*4882a593Smuzhiyun  *
1570*4882a593Smuzhiyun  * This function must be called with the bus lock held in maintenance mode.
1571*4882a593Smuzhiyun  *
1572*4882a593Smuzhiyun  * Return: 0 if @info contains valid information (not every piece of
1573*4882a593Smuzhiyun  * information can be checked, but we can at least make sure @info->dyn_addr
1574*4882a593Smuzhiyun  * and @info->bcr are correct), -EINVAL otherwise.
1575*4882a593Smuzhiyun  */
i3c_master_set_info(struct i3c_master_controller * master,const struct i3c_device_info * info)1576*4882a593Smuzhiyun int i3c_master_set_info(struct i3c_master_controller *master,
1577*4882a593Smuzhiyun 			const struct i3c_device_info *info)
1578*4882a593Smuzhiyun {
1579*4882a593Smuzhiyun 	struct i3c_dev_desc *i3cdev;
1580*4882a593Smuzhiyun 	int ret;
1581*4882a593Smuzhiyun 
1582*4882a593Smuzhiyun 	if (!i3c_bus_dev_addr_is_avail(&master->bus, info->dyn_addr))
1583*4882a593Smuzhiyun 		return -EINVAL;
1584*4882a593Smuzhiyun 
1585*4882a593Smuzhiyun 	if (I3C_BCR_DEVICE_ROLE(info->bcr) == I3C_BCR_I3C_MASTER &&
1586*4882a593Smuzhiyun 	    master->secondary)
1587*4882a593Smuzhiyun 		return -EINVAL;
1588*4882a593Smuzhiyun 
1589*4882a593Smuzhiyun 	if (master->this)
1590*4882a593Smuzhiyun 		return -EINVAL;
1591*4882a593Smuzhiyun 
1592*4882a593Smuzhiyun 	i3cdev = i3c_master_alloc_i3c_dev(master, info);
1593*4882a593Smuzhiyun 	if (IS_ERR(i3cdev))
1594*4882a593Smuzhiyun 		return PTR_ERR(i3cdev);
1595*4882a593Smuzhiyun 
1596*4882a593Smuzhiyun 	master->this = i3cdev;
1597*4882a593Smuzhiyun 	master->bus.cur_master = master->this;
1598*4882a593Smuzhiyun 
1599*4882a593Smuzhiyun 	ret = i3c_master_attach_i3c_dev(master, i3cdev);
1600*4882a593Smuzhiyun 	if (ret)
1601*4882a593Smuzhiyun 		goto err_free_dev;
1602*4882a593Smuzhiyun 
1603*4882a593Smuzhiyun 	return 0;
1604*4882a593Smuzhiyun 
1605*4882a593Smuzhiyun err_free_dev:
1606*4882a593Smuzhiyun 	i3c_master_free_i3c_dev(i3cdev);
1607*4882a593Smuzhiyun 
1608*4882a593Smuzhiyun 	return ret;
1609*4882a593Smuzhiyun }
1610*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(i3c_master_set_info);
1611*4882a593Smuzhiyun 
i3c_master_detach_free_devs(struct i3c_master_controller * master)1612*4882a593Smuzhiyun static void i3c_master_detach_free_devs(struct i3c_master_controller *master)
1613*4882a593Smuzhiyun {
1614*4882a593Smuzhiyun 	struct i3c_dev_desc *i3cdev, *i3ctmp;
1615*4882a593Smuzhiyun 	struct i2c_dev_desc *i2cdev, *i2ctmp;
1616*4882a593Smuzhiyun 
1617*4882a593Smuzhiyun 	list_for_each_entry_safe(i3cdev, i3ctmp, &master->bus.devs.i3c,
1618*4882a593Smuzhiyun 				 common.node) {
1619*4882a593Smuzhiyun 		i3c_master_detach_i3c_dev(i3cdev);
1620*4882a593Smuzhiyun 
1621*4882a593Smuzhiyun 		if (i3cdev->boardinfo && i3cdev->boardinfo->init_dyn_addr)
1622*4882a593Smuzhiyun 			i3c_bus_set_addr_slot_status(&master->bus,
1623*4882a593Smuzhiyun 					i3cdev->boardinfo->init_dyn_addr,
1624*4882a593Smuzhiyun 					I3C_ADDR_SLOT_FREE);
1625*4882a593Smuzhiyun 
1626*4882a593Smuzhiyun 		i3c_master_free_i3c_dev(i3cdev);
1627*4882a593Smuzhiyun 	}
1628*4882a593Smuzhiyun 
1629*4882a593Smuzhiyun 	list_for_each_entry_safe(i2cdev, i2ctmp, &master->bus.devs.i2c,
1630*4882a593Smuzhiyun 				 common.node) {
1631*4882a593Smuzhiyun 		i3c_master_detach_i2c_dev(i2cdev);
1632*4882a593Smuzhiyun 		i3c_bus_set_addr_slot_status(&master->bus,
1633*4882a593Smuzhiyun 					     i2cdev->addr,
1634*4882a593Smuzhiyun 					     I3C_ADDR_SLOT_FREE);
1635*4882a593Smuzhiyun 		i3c_master_free_i2c_dev(i2cdev);
1636*4882a593Smuzhiyun 	}
1637*4882a593Smuzhiyun }
1638*4882a593Smuzhiyun 
1639*4882a593Smuzhiyun /**
1640*4882a593Smuzhiyun  * i3c_master_bus_init() - initialize an I3C bus
1641*4882a593Smuzhiyun  * @master: main master initializing the bus
1642*4882a593Smuzhiyun  *
1643*4882a593Smuzhiyun  * This function is following all initialisation steps described in the I3C
1644*4882a593Smuzhiyun  * specification:
1645*4882a593Smuzhiyun  *
1646*4882a593Smuzhiyun  * 1. Attach I2C devs to the master so that the master can fill its internal
1647*4882a593Smuzhiyun  *    device table appropriately
1648*4882a593Smuzhiyun  *
1649*4882a593Smuzhiyun  * 2. Call &i3c_master_controller_ops->bus_init() method to initialize
1650*4882a593Smuzhiyun  *    the master controller. That's usually where the bus mode is selected
1651*4882a593Smuzhiyun  *    (pure bus or mixed fast/slow bus)
1652*4882a593Smuzhiyun  *
1653*4882a593Smuzhiyun  * 3. Instruct all devices on the bus to drop their dynamic address. This is
1654*4882a593Smuzhiyun  *    particularly important when the bus was previously configured by someone
1655*4882a593Smuzhiyun  *    else (for example the bootloader)
1656*4882a593Smuzhiyun  *
1657*4882a593Smuzhiyun  * 4. Disable all slave events.
1658*4882a593Smuzhiyun  *
1659*4882a593Smuzhiyun  * 5. Reserve address slots for I3C devices with init_dyn_addr. And if devices
1660*4882a593Smuzhiyun  *    also have static_addr, try to pre-assign dynamic addresses requested by
1661*4882a593Smuzhiyun  *    the FW with SETDASA and attach corresponding statically defined I3C
1662*4882a593Smuzhiyun  *    devices to the master.
1663*4882a593Smuzhiyun  *
1664*4882a593Smuzhiyun  * 6. Do a DAA (Dynamic Address Assignment) to assign dynamic addresses to all
1665*4882a593Smuzhiyun  *    remaining I3C devices
1666*4882a593Smuzhiyun  *
1667*4882a593Smuzhiyun  * Once this is done, all I3C and I2C devices should be usable.
1668*4882a593Smuzhiyun  *
1669*4882a593Smuzhiyun  * Return: a 0 in case of success, an negative error code otherwise.
1670*4882a593Smuzhiyun  */
i3c_master_bus_init(struct i3c_master_controller * master)1671*4882a593Smuzhiyun static int i3c_master_bus_init(struct i3c_master_controller *master)
1672*4882a593Smuzhiyun {
1673*4882a593Smuzhiyun 	enum i3c_addr_slot_status status;
1674*4882a593Smuzhiyun 	struct i2c_dev_boardinfo *i2cboardinfo;
1675*4882a593Smuzhiyun 	struct i3c_dev_boardinfo *i3cboardinfo;
1676*4882a593Smuzhiyun 	struct i2c_dev_desc *i2cdev;
1677*4882a593Smuzhiyun 	int ret;
1678*4882a593Smuzhiyun 
1679*4882a593Smuzhiyun 	/*
1680*4882a593Smuzhiyun 	 * First attach all devices with static definitions provided by the
1681*4882a593Smuzhiyun 	 * FW.
1682*4882a593Smuzhiyun 	 */
1683*4882a593Smuzhiyun 	list_for_each_entry(i2cboardinfo, &master->boardinfo.i2c, node) {
1684*4882a593Smuzhiyun 		status = i3c_bus_get_addr_slot_status(&master->bus,
1685*4882a593Smuzhiyun 						      i2cboardinfo->base.addr);
1686*4882a593Smuzhiyun 		if (status != I3C_ADDR_SLOT_FREE) {
1687*4882a593Smuzhiyun 			ret = -EBUSY;
1688*4882a593Smuzhiyun 			goto err_detach_devs;
1689*4882a593Smuzhiyun 		}
1690*4882a593Smuzhiyun 
1691*4882a593Smuzhiyun 		i3c_bus_set_addr_slot_status(&master->bus,
1692*4882a593Smuzhiyun 					     i2cboardinfo->base.addr,
1693*4882a593Smuzhiyun 					     I3C_ADDR_SLOT_I2C_DEV);
1694*4882a593Smuzhiyun 
1695*4882a593Smuzhiyun 		i2cdev = i3c_master_alloc_i2c_dev(master, i2cboardinfo);
1696*4882a593Smuzhiyun 		if (IS_ERR(i2cdev)) {
1697*4882a593Smuzhiyun 			ret = PTR_ERR(i2cdev);
1698*4882a593Smuzhiyun 			goto err_detach_devs;
1699*4882a593Smuzhiyun 		}
1700*4882a593Smuzhiyun 
1701*4882a593Smuzhiyun 		ret = i3c_master_attach_i2c_dev(master, i2cdev);
1702*4882a593Smuzhiyun 		if (ret) {
1703*4882a593Smuzhiyun 			i3c_master_free_i2c_dev(i2cdev);
1704*4882a593Smuzhiyun 			goto err_detach_devs;
1705*4882a593Smuzhiyun 		}
1706*4882a593Smuzhiyun 	}
1707*4882a593Smuzhiyun 
1708*4882a593Smuzhiyun 	/*
1709*4882a593Smuzhiyun 	 * Now execute the controller specific ->bus_init() routine, which
1710*4882a593Smuzhiyun 	 * might configure its internal logic to match the bus limitations.
1711*4882a593Smuzhiyun 	 */
1712*4882a593Smuzhiyun 	ret = master->ops->bus_init(master);
1713*4882a593Smuzhiyun 	if (ret)
1714*4882a593Smuzhiyun 		goto err_detach_devs;
1715*4882a593Smuzhiyun 
1716*4882a593Smuzhiyun 	/*
1717*4882a593Smuzhiyun 	 * The master device should have been instantiated in ->bus_init(),
1718*4882a593Smuzhiyun 	 * complain if this was not the case.
1719*4882a593Smuzhiyun 	 */
1720*4882a593Smuzhiyun 	if (!master->this) {
1721*4882a593Smuzhiyun 		dev_err(&master->dev,
1722*4882a593Smuzhiyun 			"master_set_info() was not called in ->bus_init()\n");
1723*4882a593Smuzhiyun 		ret = -EINVAL;
1724*4882a593Smuzhiyun 		goto err_bus_cleanup;
1725*4882a593Smuzhiyun 	}
1726*4882a593Smuzhiyun 
1727*4882a593Smuzhiyun 	/*
1728*4882a593Smuzhiyun 	 * Reset all dynamic address that may have been assigned before
1729*4882a593Smuzhiyun 	 * (assigned by the bootloader for example).
1730*4882a593Smuzhiyun 	 */
1731*4882a593Smuzhiyun 	ret = i3c_master_rstdaa_locked(master, I3C_BROADCAST_ADDR);
1732*4882a593Smuzhiyun 	if (ret && ret != I3C_ERROR_M2)
1733*4882a593Smuzhiyun 		goto err_bus_cleanup;
1734*4882a593Smuzhiyun 
1735*4882a593Smuzhiyun 	/* Disable all slave events before starting DAA. */
1736*4882a593Smuzhiyun 	ret = i3c_master_disec_locked(master, I3C_BROADCAST_ADDR,
1737*4882a593Smuzhiyun 				      I3C_CCC_EVENT_SIR | I3C_CCC_EVENT_MR |
1738*4882a593Smuzhiyun 				      I3C_CCC_EVENT_HJ);
1739*4882a593Smuzhiyun 	if (ret && ret != I3C_ERROR_M2)
1740*4882a593Smuzhiyun 		goto err_bus_cleanup;
1741*4882a593Smuzhiyun 
1742*4882a593Smuzhiyun 	/*
1743*4882a593Smuzhiyun 	 * Reserve init_dyn_addr first, and then try to pre-assign dynamic
1744*4882a593Smuzhiyun 	 * address and retrieve device information if needed.
1745*4882a593Smuzhiyun 	 * In case pre-assign dynamic address fails, setting dynamic address to
1746*4882a593Smuzhiyun 	 * the requested init_dyn_addr is retried after DAA is done in
1747*4882a593Smuzhiyun 	 * i3c_master_add_i3c_dev_locked().
1748*4882a593Smuzhiyun 	 */
1749*4882a593Smuzhiyun 	list_for_each_entry(i3cboardinfo, &master->boardinfo.i3c, node) {
1750*4882a593Smuzhiyun 
1751*4882a593Smuzhiyun 		/*
1752*4882a593Smuzhiyun 		 * We don't reserve a dynamic address for devices that
1753*4882a593Smuzhiyun 		 * don't explicitly request one.
1754*4882a593Smuzhiyun 		 */
1755*4882a593Smuzhiyun 		if (!i3cboardinfo->init_dyn_addr)
1756*4882a593Smuzhiyun 			continue;
1757*4882a593Smuzhiyun 
1758*4882a593Smuzhiyun 		ret = i3c_bus_get_addr_slot_status(&master->bus,
1759*4882a593Smuzhiyun 						   i3cboardinfo->init_dyn_addr);
1760*4882a593Smuzhiyun 		if (ret != I3C_ADDR_SLOT_FREE) {
1761*4882a593Smuzhiyun 			ret = -EBUSY;
1762*4882a593Smuzhiyun 			goto err_rstdaa;
1763*4882a593Smuzhiyun 		}
1764*4882a593Smuzhiyun 
1765*4882a593Smuzhiyun 		i3c_bus_set_addr_slot_status(&master->bus,
1766*4882a593Smuzhiyun 					     i3cboardinfo->init_dyn_addr,
1767*4882a593Smuzhiyun 					     I3C_ADDR_SLOT_I3C_DEV);
1768*4882a593Smuzhiyun 
1769*4882a593Smuzhiyun 		/*
1770*4882a593Smuzhiyun 		 * Only try to create/attach devices that have a static
1771*4882a593Smuzhiyun 		 * address. Other devices will be created/attached when
1772*4882a593Smuzhiyun 		 * DAA happens, and the requested dynamic address will
1773*4882a593Smuzhiyun 		 * be set using SETNEWDA once those devices become
1774*4882a593Smuzhiyun 		 * addressable.
1775*4882a593Smuzhiyun 		 */
1776*4882a593Smuzhiyun 
1777*4882a593Smuzhiyun 		if (i3cboardinfo->static_addr)
1778*4882a593Smuzhiyun 			i3c_master_early_i3c_dev_add(master, i3cboardinfo);
1779*4882a593Smuzhiyun 	}
1780*4882a593Smuzhiyun 
1781*4882a593Smuzhiyun 	ret = i3c_master_do_daa(master);
1782*4882a593Smuzhiyun 	if (ret)
1783*4882a593Smuzhiyun 		goto err_rstdaa;
1784*4882a593Smuzhiyun 
1785*4882a593Smuzhiyun 	return 0;
1786*4882a593Smuzhiyun 
1787*4882a593Smuzhiyun err_rstdaa:
1788*4882a593Smuzhiyun 	i3c_master_rstdaa_locked(master, I3C_BROADCAST_ADDR);
1789*4882a593Smuzhiyun 
1790*4882a593Smuzhiyun err_bus_cleanup:
1791*4882a593Smuzhiyun 	if (master->ops->bus_cleanup)
1792*4882a593Smuzhiyun 		master->ops->bus_cleanup(master);
1793*4882a593Smuzhiyun 
1794*4882a593Smuzhiyun err_detach_devs:
1795*4882a593Smuzhiyun 	i3c_master_detach_free_devs(master);
1796*4882a593Smuzhiyun 
1797*4882a593Smuzhiyun 	return ret;
1798*4882a593Smuzhiyun }
1799*4882a593Smuzhiyun 
i3c_master_bus_cleanup(struct i3c_master_controller * master)1800*4882a593Smuzhiyun static void i3c_master_bus_cleanup(struct i3c_master_controller *master)
1801*4882a593Smuzhiyun {
1802*4882a593Smuzhiyun 	if (master->ops->bus_cleanup)
1803*4882a593Smuzhiyun 		master->ops->bus_cleanup(master);
1804*4882a593Smuzhiyun 
1805*4882a593Smuzhiyun 	i3c_master_detach_free_devs(master);
1806*4882a593Smuzhiyun }
1807*4882a593Smuzhiyun 
i3c_master_attach_boardinfo(struct i3c_dev_desc * i3cdev)1808*4882a593Smuzhiyun static void i3c_master_attach_boardinfo(struct i3c_dev_desc *i3cdev)
1809*4882a593Smuzhiyun {
1810*4882a593Smuzhiyun 	struct i3c_master_controller *master = i3cdev->common.master;
1811*4882a593Smuzhiyun 	struct i3c_dev_boardinfo *i3cboardinfo;
1812*4882a593Smuzhiyun 
1813*4882a593Smuzhiyun 	list_for_each_entry(i3cboardinfo, &master->boardinfo.i3c, node) {
1814*4882a593Smuzhiyun 		if (i3cdev->info.pid != i3cboardinfo->pid)
1815*4882a593Smuzhiyun 			continue;
1816*4882a593Smuzhiyun 
1817*4882a593Smuzhiyun 		i3cdev->boardinfo = i3cboardinfo;
1818*4882a593Smuzhiyun 		i3cdev->info.static_addr = i3cboardinfo->static_addr;
1819*4882a593Smuzhiyun 		return;
1820*4882a593Smuzhiyun 	}
1821*4882a593Smuzhiyun }
1822*4882a593Smuzhiyun 
1823*4882a593Smuzhiyun static struct i3c_dev_desc *
i3c_master_search_i3c_dev_duplicate(struct i3c_dev_desc * refdev)1824*4882a593Smuzhiyun i3c_master_search_i3c_dev_duplicate(struct i3c_dev_desc *refdev)
1825*4882a593Smuzhiyun {
1826*4882a593Smuzhiyun 	struct i3c_master_controller *master = i3c_dev_get_master(refdev);
1827*4882a593Smuzhiyun 	struct i3c_dev_desc *i3cdev;
1828*4882a593Smuzhiyun 
1829*4882a593Smuzhiyun 	i3c_bus_for_each_i3cdev(&master->bus, i3cdev) {
1830*4882a593Smuzhiyun 		if (i3cdev != refdev && i3cdev->info.pid == refdev->info.pid)
1831*4882a593Smuzhiyun 			return i3cdev;
1832*4882a593Smuzhiyun 	}
1833*4882a593Smuzhiyun 
1834*4882a593Smuzhiyun 	return NULL;
1835*4882a593Smuzhiyun }
1836*4882a593Smuzhiyun 
1837*4882a593Smuzhiyun /**
1838*4882a593Smuzhiyun  * i3c_master_add_i3c_dev_locked() - add an I3C slave to the bus
1839*4882a593Smuzhiyun  * @master: master used to send frames on the bus
1840*4882a593Smuzhiyun  * @addr: I3C slave dynamic address assigned to the device
1841*4882a593Smuzhiyun  *
1842*4882a593Smuzhiyun  * This function is instantiating an I3C device object and adding it to the
1843*4882a593Smuzhiyun  * I3C device list. All device information are automatically retrieved using
1844*4882a593Smuzhiyun  * standard CCC commands.
1845*4882a593Smuzhiyun  *
1846*4882a593Smuzhiyun  * The I3C device object is returned in case the master wants to attach
1847*4882a593Smuzhiyun  * private data to it using i3c_dev_set_master_data().
1848*4882a593Smuzhiyun  *
1849*4882a593Smuzhiyun  * This function must be called with the bus lock held in write mode.
1850*4882a593Smuzhiyun  *
1851*4882a593Smuzhiyun  * Return: a 0 in case of success, an negative error code otherwise.
1852*4882a593Smuzhiyun  */
i3c_master_add_i3c_dev_locked(struct i3c_master_controller * master,u8 addr)1853*4882a593Smuzhiyun int i3c_master_add_i3c_dev_locked(struct i3c_master_controller *master,
1854*4882a593Smuzhiyun 				  u8 addr)
1855*4882a593Smuzhiyun {
1856*4882a593Smuzhiyun 	struct i3c_device_info info = { .dyn_addr = addr };
1857*4882a593Smuzhiyun 	struct i3c_dev_desc *newdev, *olddev;
1858*4882a593Smuzhiyun 	u8 old_dyn_addr = addr, expected_dyn_addr;
1859*4882a593Smuzhiyun 	struct i3c_ibi_setup ibireq = { };
1860*4882a593Smuzhiyun 	bool enable_ibi = false;
1861*4882a593Smuzhiyun 	int ret;
1862*4882a593Smuzhiyun 
1863*4882a593Smuzhiyun 	if (!master)
1864*4882a593Smuzhiyun 		return -EINVAL;
1865*4882a593Smuzhiyun 
1866*4882a593Smuzhiyun 	newdev = i3c_master_alloc_i3c_dev(master, &info);
1867*4882a593Smuzhiyun 	if (IS_ERR(newdev))
1868*4882a593Smuzhiyun 		return PTR_ERR(newdev);
1869*4882a593Smuzhiyun 
1870*4882a593Smuzhiyun 	ret = i3c_master_attach_i3c_dev(master, newdev);
1871*4882a593Smuzhiyun 	if (ret)
1872*4882a593Smuzhiyun 		goto err_free_dev;
1873*4882a593Smuzhiyun 
1874*4882a593Smuzhiyun 	ret = i3c_master_retrieve_dev_info(newdev);
1875*4882a593Smuzhiyun 	if (ret)
1876*4882a593Smuzhiyun 		goto err_detach_dev;
1877*4882a593Smuzhiyun 
1878*4882a593Smuzhiyun 	i3c_master_attach_boardinfo(newdev);
1879*4882a593Smuzhiyun 
1880*4882a593Smuzhiyun 	olddev = i3c_master_search_i3c_dev_duplicate(newdev);
1881*4882a593Smuzhiyun 	if (olddev) {
1882*4882a593Smuzhiyun 		newdev->dev = olddev->dev;
1883*4882a593Smuzhiyun 		if (newdev->dev)
1884*4882a593Smuzhiyun 			newdev->dev->desc = newdev;
1885*4882a593Smuzhiyun 
1886*4882a593Smuzhiyun 		/*
1887*4882a593Smuzhiyun 		 * We need to restore the IBI state too, so let's save the
1888*4882a593Smuzhiyun 		 * IBI information and try to restore them after olddev has
1889*4882a593Smuzhiyun 		 * been detached+released and its IBI has been stopped and
1890*4882a593Smuzhiyun 		 * the associated resources have been freed.
1891*4882a593Smuzhiyun 		 */
1892*4882a593Smuzhiyun 		mutex_lock(&olddev->ibi_lock);
1893*4882a593Smuzhiyun 		if (olddev->ibi) {
1894*4882a593Smuzhiyun 			ibireq.handler = olddev->ibi->handler;
1895*4882a593Smuzhiyun 			ibireq.max_payload_len = olddev->ibi->max_payload_len;
1896*4882a593Smuzhiyun 			ibireq.num_slots = olddev->ibi->num_slots;
1897*4882a593Smuzhiyun 
1898*4882a593Smuzhiyun 			if (olddev->ibi->enabled) {
1899*4882a593Smuzhiyun 				enable_ibi = true;
1900*4882a593Smuzhiyun 				i3c_dev_disable_ibi_locked(olddev);
1901*4882a593Smuzhiyun 			}
1902*4882a593Smuzhiyun 
1903*4882a593Smuzhiyun 			i3c_dev_free_ibi_locked(olddev);
1904*4882a593Smuzhiyun 		}
1905*4882a593Smuzhiyun 		mutex_unlock(&olddev->ibi_lock);
1906*4882a593Smuzhiyun 
1907*4882a593Smuzhiyun 		old_dyn_addr = olddev->info.dyn_addr;
1908*4882a593Smuzhiyun 
1909*4882a593Smuzhiyun 		i3c_master_detach_i3c_dev(olddev);
1910*4882a593Smuzhiyun 		i3c_master_free_i3c_dev(olddev);
1911*4882a593Smuzhiyun 	}
1912*4882a593Smuzhiyun 
1913*4882a593Smuzhiyun 	ret = i3c_master_reattach_i3c_dev(newdev, old_dyn_addr);
1914*4882a593Smuzhiyun 	if (ret)
1915*4882a593Smuzhiyun 		goto err_detach_dev;
1916*4882a593Smuzhiyun 
1917*4882a593Smuzhiyun 	/*
1918*4882a593Smuzhiyun 	 * Depending on our previous state, the expected dynamic address might
1919*4882a593Smuzhiyun 	 * differ:
1920*4882a593Smuzhiyun 	 * - if the device already had a dynamic address assigned, let's try to
1921*4882a593Smuzhiyun 	 *   re-apply this one
1922*4882a593Smuzhiyun 	 * - if the device did not have a dynamic address and the firmware
1923*4882a593Smuzhiyun 	 *   requested a specific address, pick this one
1924*4882a593Smuzhiyun 	 * - in any other case, keep the address automatically assigned by the
1925*4882a593Smuzhiyun 	 *   master
1926*4882a593Smuzhiyun 	 */
1927*4882a593Smuzhiyun 	if (old_dyn_addr && old_dyn_addr != newdev->info.dyn_addr)
1928*4882a593Smuzhiyun 		expected_dyn_addr = old_dyn_addr;
1929*4882a593Smuzhiyun 	else if (newdev->boardinfo && newdev->boardinfo->init_dyn_addr)
1930*4882a593Smuzhiyun 		expected_dyn_addr = newdev->boardinfo->init_dyn_addr;
1931*4882a593Smuzhiyun 	else
1932*4882a593Smuzhiyun 		expected_dyn_addr = newdev->info.dyn_addr;
1933*4882a593Smuzhiyun 
1934*4882a593Smuzhiyun 	if (newdev->info.dyn_addr != expected_dyn_addr) {
1935*4882a593Smuzhiyun 		/*
1936*4882a593Smuzhiyun 		 * Try to apply the expected dynamic address. If it fails, keep
1937*4882a593Smuzhiyun 		 * the address assigned by the master.
1938*4882a593Smuzhiyun 		 */
1939*4882a593Smuzhiyun 		ret = i3c_master_setnewda_locked(master,
1940*4882a593Smuzhiyun 						 newdev->info.dyn_addr,
1941*4882a593Smuzhiyun 						 expected_dyn_addr);
1942*4882a593Smuzhiyun 		if (!ret) {
1943*4882a593Smuzhiyun 			old_dyn_addr = newdev->info.dyn_addr;
1944*4882a593Smuzhiyun 			newdev->info.dyn_addr = expected_dyn_addr;
1945*4882a593Smuzhiyun 			i3c_master_reattach_i3c_dev(newdev, old_dyn_addr);
1946*4882a593Smuzhiyun 		} else {
1947*4882a593Smuzhiyun 			dev_err(&master->dev,
1948*4882a593Smuzhiyun 				"Failed to assign reserved/old address to device %d%llx",
1949*4882a593Smuzhiyun 				master->bus.id, newdev->info.pid);
1950*4882a593Smuzhiyun 		}
1951*4882a593Smuzhiyun 	}
1952*4882a593Smuzhiyun 
1953*4882a593Smuzhiyun 	/*
1954*4882a593Smuzhiyun 	 * Now is time to try to restore the IBI setup. If we're lucky,
1955*4882a593Smuzhiyun 	 * everything works as before, otherwise, all we can do is complain.
1956*4882a593Smuzhiyun 	 * FIXME: maybe we should add callback to inform the driver that it
1957*4882a593Smuzhiyun 	 * should request the IBI again instead of trying to hide that from
1958*4882a593Smuzhiyun 	 * him.
1959*4882a593Smuzhiyun 	 */
1960*4882a593Smuzhiyun 	if (ibireq.handler) {
1961*4882a593Smuzhiyun 		mutex_lock(&newdev->ibi_lock);
1962*4882a593Smuzhiyun 		ret = i3c_dev_request_ibi_locked(newdev, &ibireq);
1963*4882a593Smuzhiyun 		if (ret) {
1964*4882a593Smuzhiyun 			dev_err(&master->dev,
1965*4882a593Smuzhiyun 				"Failed to request IBI on device %d-%llx",
1966*4882a593Smuzhiyun 				master->bus.id, newdev->info.pid);
1967*4882a593Smuzhiyun 		} else if (enable_ibi) {
1968*4882a593Smuzhiyun 			ret = i3c_dev_enable_ibi_locked(newdev);
1969*4882a593Smuzhiyun 			if (ret)
1970*4882a593Smuzhiyun 				dev_err(&master->dev,
1971*4882a593Smuzhiyun 					"Failed to re-enable IBI on device %d-%llx",
1972*4882a593Smuzhiyun 					master->bus.id, newdev->info.pid);
1973*4882a593Smuzhiyun 		}
1974*4882a593Smuzhiyun 		mutex_unlock(&newdev->ibi_lock);
1975*4882a593Smuzhiyun 	}
1976*4882a593Smuzhiyun 
1977*4882a593Smuzhiyun 	return 0;
1978*4882a593Smuzhiyun 
1979*4882a593Smuzhiyun err_detach_dev:
1980*4882a593Smuzhiyun 	if (newdev->dev && newdev->dev->desc)
1981*4882a593Smuzhiyun 		newdev->dev->desc = NULL;
1982*4882a593Smuzhiyun 
1983*4882a593Smuzhiyun 	i3c_master_detach_i3c_dev(newdev);
1984*4882a593Smuzhiyun 
1985*4882a593Smuzhiyun err_free_dev:
1986*4882a593Smuzhiyun 	i3c_master_free_i3c_dev(newdev);
1987*4882a593Smuzhiyun 
1988*4882a593Smuzhiyun 	return ret;
1989*4882a593Smuzhiyun }
1990*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(i3c_master_add_i3c_dev_locked);
1991*4882a593Smuzhiyun 
1992*4882a593Smuzhiyun #define OF_I3C_REG1_IS_I2C_DEV			BIT(31)
1993*4882a593Smuzhiyun 
1994*4882a593Smuzhiyun static int
of_i3c_master_add_i2c_boardinfo(struct i3c_master_controller * master,struct device_node * node,u32 * reg)1995*4882a593Smuzhiyun of_i3c_master_add_i2c_boardinfo(struct i3c_master_controller *master,
1996*4882a593Smuzhiyun 				struct device_node *node, u32 *reg)
1997*4882a593Smuzhiyun {
1998*4882a593Smuzhiyun 	struct i2c_dev_boardinfo *boardinfo;
1999*4882a593Smuzhiyun 	struct device *dev = &master->dev;
2000*4882a593Smuzhiyun 	int ret;
2001*4882a593Smuzhiyun 
2002*4882a593Smuzhiyun 	boardinfo = devm_kzalloc(dev, sizeof(*boardinfo), GFP_KERNEL);
2003*4882a593Smuzhiyun 	if (!boardinfo)
2004*4882a593Smuzhiyun 		return -ENOMEM;
2005*4882a593Smuzhiyun 
2006*4882a593Smuzhiyun 	ret = of_i2c_get_board_info(dev, node, &boardinfo->base);
2007*4882a593Smuzhiyun 	if (ret)
2008*4882a593Smuzhiyun 		return ret;
2009*4882a593Smuzhiyun 
2010*4882a593Smuzhiyun 	/*
2011*4882a593Smuzhiyun 	 * The I3C Specification does not clearly say I2C devices with 10-bit
2012*4882a593Smuzhiyun 	 * address are supported. These devices can't be passed properly through
2013*4882a593Smuzhiyun 	 * DEFSLVS command.
2014*4882a593Smuzhiyun 	 */
2015*4882a593Smuzhiyun 	if (boardinfo->base.flags & I2C_CLIENT_TEN) {
2016*4882a593Smuzhiyun 		dev_err(dev, "I2C device with 10 bit address not supported.");
2017*4882a593Smuzhiyun 		return -ENOTSUPP;
2018*4882a593Smuzhiyun 	}
2019*4882a593Smuzhiyun 
2020*4882a593Smuzhiyun 	/* LVR is encoded in reg[2]. */
2021*4882a593Smuzhiyun 	boardinfo->lvr = reg[2];
2022*4882a593Smuzhiyun 
2023*4882a593Smuzhiyun 	list_add_tail(&boardinfo->node, &master->boardinfo.i2c);
2024*4882a593Smuzhiyun 	of_node_get(node);
2025*4882a593Smuzhiyun 
2026*4882a593Smuzhiyun 	return 0;
2027*4882a593Smuzhiyun }
2028*4882a593Smuzhiyun 
2029*4882a593Smuzhiyun static int
of_i3c_master_add_i3c_boardinfo(struct i3c_master_controller * master,struct device_node * node,u32 * reg)2030*4882a593Smuzhiyun of_i3c_master_add_i3c_boardinfo(struct i3c_master_controller *master,
2031*4882a593Smuzhiyun 				struct device_node *node, u32 *reg)
2032*4882a593Smuzhiyun {
2033*4882a593Smuzhiyun 	struct i3c_dev_boardinfo *boardinfo;
2034*4882a593Smuzhiyun 	struct device *dev = &master->dev;
2035*4882a593Smuzhiyun 	enum i3c_addr_slot_status addrstatus;
2036*4882a593Smuzhiyun 	u32 init_dyn_addr = 0;
2037*4882a593Smuzhiyun 
2038*4882a593Smuzhiyun 	boardinfo = devm_kzalloc(dev, sizeof(*boardinfo), GFP_KERNEL);
2039*4882a593Smuzhiyun 	if (!boardinfo)
2040*4882a593Smuzhiyun 		return -ENOMEM;
2041*4882a593Smuzhiyun 
2042*4882a593Smuzhiyun 	if (reg[0]) {
2043*4882a593Smuzhiyun 		if (reg[0] > I3C_MAX_ADDR)
2044*4882a593Smuzhiyun 			return -EINVAL;
2045*4882a593Smuzhiyun 
2046*4882a593Smuzhiyun 		addrstatus = i3c_bus_get_addr_slot_status(&master->bus,
2047*4882a593Smuzhiyun 							  reg[0]);
2048*4882a593Smuzhiyun 		if (addrstatus != I3C_ADDR_SLOT_FREE)
2049*4882a593Smuzhiyun 			return -EINVAL;
2050*4882a593Smuzhiyun 	}
2051*4882a593Smuzhiyun 
2052*4882a593Smuzhiyun 	boardinfo->static_addr = reg[0];
2053*4882a593Smuzhiyun 
2054*4882a593Smuzhiyun 	if (!of_property_read_u32(node, "assigned-address", &init_dyn_addr)) {
2055*4882a593Smuzhiyun 		if (init_dyn_addr > I3C_MAX_ADDR)
2056*4882a593Smuzhiyun 			return -EINVAL;
2057*4882a593Smuzhiyun 
2058*4882a593Smuzhiyun 		addrstatus = i3c_bus_get_addr_slot_status(&master->bus,
2059*4882a593Smuzhiyun 							  init_dyn_addr);
2060*4882a593Smuzhiyun 		if (addrstatus != I3C_ADDR_SLOT_FREE)
2061*4882a593Smuzhiyun 			return -EINVAL;
2062*4882a593Smuzhiyun 	}
2063*4882a593Smuzhiyun 
2064*4882a593Smuzhiyun 	boardinfo->pid = ((u64)reg[1] << 32) | reg[2];
2065*4882a593Smuzhiyun 
2066*4882a593Smuzhiyun 	if ((boardinfo->pid & GENMASK_ULL(63, 48)) ||
2067*4882a593Smuzhiyun 	    I3C_PID_RND_LOWER_32BITS(boardinfo->pid))
2068*4882a593Smuzhiyun 		return -EINVAL;
2069*4882a593Smuzhiyun 
2070*4882a593Smuzhiyun 	boardinfo->init_dyn_addr = init_dyn_addr;
2071*4882a593Smuzhiyun 	boardinfo->of_node = of_node_get(node);
2072*4882a593Smuzhiyun 	list_add_tail(&boardinfo->node, &master->boardinfo.i3c);
2073*4882a593Smuzhiyun 
2074*4882a593Smuzhiyun 	return 0;
2075*4882a593Smuzhiyun }
2076*4882a593Smuzhiyun 
of_i3c_master_add_dev(struct i3c_master_controller * master,struct device_node * node)2077*4882a593Smuzhiyun static int of_i3c_master_add_dev(struct i3c_master_controller *master,
2078*4882a593Smuzhiyun 				 struct device_node *node)
2079*4882a593Smuzhiyun {
2080*4882a593Smuzhiyun 	u32 reg[3];
2081*4882a593Smuzhiyun 	int ret;
2082*4882a593Smuzhiyun 
2083*4882a593Smuzhiyun 	if (!master || !node)
2084*4882a593Smuzhiyun 		return -EINVAL;
2085*4882a593Smuzhiyun 
2086*4882a593Smuzhiyun 	ret = of_property_read_u32_array(node, "reg", reg, ARRAY_SIZE(reg));
2087*4882a593Smuzhiyun 	if (ret)
2088*4882a593Smuzhiyun 		return ret;
2089*4882a593Smuzhiyun 
2090*4882a593Smuzhiyun 	/*
2091*4882a593Smuzhiyun 	 * The manufacturer ID can't be 0. If reg[1] == 0 that means we're
2092*4882a593Smuzhiyun 	 * dealing with an I2C device.
2093*4882a593Smuzhiyun 	 */
2094*4882a593Smuzhiyun 	if (!reg[1])
2095*4882a593Smuzhiyun 		ret = of_i3c_master_add_i2c_boardinfo(master, node, reg);
2096*4882a593Smuzhiyun 	else
2097*4882a593Smuzhiyun 		ret = of_i3c_master_add_i3c_boardinfo(master, node, reg);
2098*4882a593Smuzhiyun 
2099*4882a593Smuzhiyun 	return ret;
2100*4882a593Smuzhiyun }
2101*4882a593Smuzhiyun 
of_populate_i3c_bus(struct i3c_master_controller * master)2102*4882a593Smuzhiyun static int of_populate_i3c_bus(struct i3c_master_controller *master)
2103*4882a593Smuzhiyun {
2104*4882a593Smuzhiyun 	struct device *dev = &master->dev;
2105*4882a593Smuzhiyun 	struct device_node *i3cbus_np = dev->of_node;
2106*4882a593Smuzhiyun 	struct device_node *node;
2107*4882a593Smuzhiyun 	int ret;
2108*4882a593Smuzhiyun 	u32 val;
2109*4882a593Smuzhiyun 
2110*4882a593Smuzhiyun 	if (!i3cbus_np)
2111*4882a593Smuzhiyun 		return 0;
2112*4882a593Smuzhiyun 
2113*4882a593Smuzhiyun 	for_each_available_child_of_node(i3cbus_np, node) {
2114*4882a593Smuzhiyun 		ret = of_i3c_master_add_dev(master, node);
2115*4882a593Smuzhiyun 		if (ret) {
2116*4882a593Smuzhiyun 			of_node_put(node);
2117*4882a593Smuzhiyun 			return ret;
2118*4882a593Smuzhiyun 		}
2119*4882a593Smuzhiyun 	}
2120*4882a593Smuzhiyun 
2121*4882a593Smuzhiyun 	/*
2122*4882a593Smuzhiyun 	 * The user might want to limit I2C and I3C speed in case some devices
2123*4882a593Smuzhiyun 	 * on the bus are not supporting typical rates, or if the bus topology
2124*4882a593Smuzhiyun 	 * prevents it from using max possible rate.
2125*4882a593Smuzhiyun 	 */
2126*4882a593Smuzhiyun 	if (!of_property_read_u32(i3cbus_np, "i2c-scl-hz", &val))
2127*4882a593Smuzhiyun 		master->bus.scl_rate.i2c = val;
2128*4882a593Smuzhiyun 
2129*4882a593Smuzhiyun 	if (!of_property_read_u32(i3cbus_np, "i3c-scl-hz", &val))
2130*4882a593Smuzhiyun 		master->bus.scl_rate.i3c = val;
2131*4882a593Smuzhiyun 
2132*4882a593Smuzhiyun 	return 0;
2133*4882a593Smuzhiyun }
2134*4882a593Smuzhiyun 
i3c_master_i2c_adapter_xfer(struct i2c_adapter * adap,struct i2c_msg * xfers,int nxfers)2135*4882a593Smuzhiyun static int i3c_master_i2c_adapter_xfer(struct i2c_adapter *adap,
2136*4882a593Smuzhiyun 				       struct i2c_msg *xfers, int nxfers)
2137*4882a593Smuzhiyun {
2138*4882a593Smuzhiyun 	struct i3c_master_controller *master = i2c_adapter_to_i3c_master(adap);
2139*4882a593Smuzhiyun 	struct i2c_dev_desc *dev;
2140*4882a593Smuzhiyun 	int i, ret;
2141*4882a593Smuzhiyun 	u16 addr;
2142*4882a593Smuzhiyun 
2143*4882a593Smuzhiyun 	if (!xfers || !master || nxfers <= 0)
2144*4882a593Smuzhiyun 		return -EINVAL;
2145*4882a593Smuzhiyun 
2146*4882a593Smuzhiyun 	if (!master->ops->i2c_xfers)
2147*4882a593Smuzhiyun 		return -ENOTSUPP;
2148*4882a593Smuzhiyun 
2149*4882a593Smuzhiyun 	/* Doing transfers to different devices is not supported. */
2150*4882a593Smuzhiyun 	addr = xfers[0].addr;
2151*4882a593Smuzhiyun 	for (i = 1; i < nxfers; i++) {
2152*4882a593Smuzhiyun 		if (addr != xfers[i].addr)
2153*4882a593Smuzhiyun 			return -ENOTSUPP;
2154*4882a593Smuzhiyun 	}
2155*4882a593Smuzhiyun 
2156*4882a593Smuzhiyun 	i3c_bus_normaluse_lock(&master->bus);
2157*4882a593Smuzhiyun 	dev = i3c_master_find_i2c_dev_by_addr(master, addr);
2158*4882a593Smuzhiyun 	if (!dev)
2159*4882a593Smuzhiyun 		ret = -ENOENT;
2160*4882a593Smuzhiyun 	else
2161*4882a593Smuzhiyun 		ret = master->ops->i2c_xfers(dev, xfers, nxfers);
2162*4882a593Smuzhiyun 	i3c_bus_normaluse_unlock(&master->bus);
2163*4882a593Smuzhiyun 
2164*4882a593Smuzhiyun 	return ret ? ret : nxfers;
2165*4882a593Smuzhiyun }
2166*4882a593Smuzhiyun 
i3c_master_i2c_funcs(struct i2c_adapter * adapter)2167*4882a593Smuzhiyun static u32 i3c_master_i2c_funcs(struct i2c_adapter *adapter)
2168*4882a593Smuzhiyun {
2169*4882a593Smuzhiyun 	return I2C_FUNC_SMBUS_EMUL | I2C_FUNC_I2C;
2170*4882a593Smuzhiyun }
2171*4882a593Smuzhiyun 
2172*4882a593Smuzhiyun static const struct i2c_algorithm i3c_master_i2c_algo = {
2173*4882a593Smuzhiyun 	.master_xfer = i3c_master_i2c_adapter_xfer,
2174*4882a593Smuzhiyun 	.functionality = i3c_master_i2c_funcs,
2175*4882a593Smuzhiyun };
2176*4882a593Smuzhiyun 
i3c_master_i2c_adapter_init(struct i3c_master_controller * master)2177*4882a593Smuzhiyun static int i3c_master_i2c_adapter_init(struct i3c_master_controller *master)
2178*4882a593Smuzhiyun {
2179*4882a593Smuzhiyun 	struct i2c_adapter *adap = i3c_master_to_i2c_adapter(master);
2180*4882a593Smuzhiyun 	struct i2c_dev_desc *i2cdev;
2181*4882a593Smuzhiyun 	int ret;
2182*4882a593Smuzhiyun 
2183*4882a593Smuzhiyun 	adap->dev.parent = master->dev.parent;
2184*4882a593Smuzhiyun 	adap->owner = master->dev.parent->driver->owner;
2185*4882a593Smuzhiyun 	adap->algo = &i3c_master_i2c_algo;
2186*4882a593Smuzhiyun 	strncpy(adap->name, dev_name(master->dev.parent), sizeof(adap->name));
2187*4882a593Smuzhiyun 
2188*4882a593Smuzhiyun 	/* FIXME: Should we allow i3c masters to override these values? */
2189*4882a593Smuzhiyun 	adap->timeout = 1000;
2190*4882a593Smuzhiyun 	adap->retries = 3;
2191*4882a593Smuzhiyun 
2192*4882a593Smuzhiyun 	ret = i2c_add_adapter(adap);
2193*4882a593Smuzhiyun 	if (ret)
2194*4882a593Smuzhiyun 		return ret;
2195*4882a593Smuzhiyun 
2196*4882a593Smuzhiyun 	/*
2197*4882a593Smuzhiyun 	 * We silently ignore failures here. The bus should keep working
2198*4882a593Smuzhiyun 	 * correctly even if one or more i2c devices are not registered.
2199*4882a593Smuzhiyun 	 */
2200*4882a593Smuzhiyun 	i3c_bus_for_each_i2cdev(&master->bus, i2cdev)
2201*4882a593Smuzhiyun 		i2cdev->dev = i2c_new_client_device(adap, &i2cdev->boardinfo->base);
2202*4882a593Smuzhiyun 
2203*4882a593Smuzhiyun 	return 0;
2204*4882a593Smuzhiyun }
2205*4882a593Smuzhiyun 
i3c_master_i2c_adapter_cleanup(struct i3c_master_controller * master)2206*4882a593Smuzhiyun static void i3c_master_i2c_adapter_cleanup(struct i3c_master_controller *master)
2207*4882a593Smuzhiyun {
2208*4882a593Smuzhiyun 	struct i2c_dev_desc *i2cdev;
2209*4882a593Smuzhiyun 
2210*4882a593Smuzhiyun 	i2c_del_adapter(&master->i2c);
2211*4882a593Smuzhiyun 
2212*4882a593Smuzhiyun 	i3c_bus_for_each_i2cdev(&master->bus, i2cdev)
2213*4882a593Smuzhiyun 		i2cdev->dev = NULL;
2214*4882a593Smuzhiyun }
2215*4882a593Smuzhiyun 
i3c_master_unregister_i3c_devs(struct i3c_master_controller * master)2216*4882a593Smuzhiyun static void i3c_master_unregister_i3c_devs(struct i3c_master_controller *master)
2217*4882a593Smuzhiyun {
2218*4882a593Smuzhiyun 	struct i3c_dev_desc *i3cdev;
2219*4882a593Smuzhiyun 
2220*4882a593Smuzhiyun 	i3c_bus_for_each_i3cdev(&master->bus, i3cdev) {
2221*4882a593Smuzhiyun 		if (!i3cdev->dev)
2222*4882a593Smuzhiyun 			continue;
2223*4882a593Smuzhiyun 
2224*4882a593Smuzhiyun 		i3cdev->dev->desc = NULL;
2225*4882a593Smuzhiyun 		if (device_is_registered(&i3cdev->dev->dev))
2226*4882a593Smuzhiyun 			device_unregister(&i3cdev->dev->dev);
2227*4882a593Smuzhiyun 		else
2228*4882a593Smuzhiyun 			put_device(&i3cdev->dev->dev);
2229*4882a593Smuzhiyun 		i3cdev->dev = NULL;
2230*4882a593Smuzhiyun 	}
2231*4882a593Smuzhiyun }
2232*4882a593Smuzhiyun 
2233*4882a593Smuzhiyun /**
2234*4882a593Smuzhiyun  * i3c_master_queue_ibi() - Queue an IBI
2235*4882a593Smuzhiyun  * @dev: the device this IBI is coming from
2236*4882a593Smuzhiyun  * @slot: the IBI slot used to store the payload
2237*4882a593Smuzhiyun  *
2238*4882a593Smuzhiyun  * Queue an IBI to the controller workqueue. The IBI handler attached to
2239*4882a593Smuzhiyun  * the dev will be called from a workqueue context.
2240*4882a593Smuzhiyun  */
i3c_master_queue_ibi(struct i3c_dev_desc * dev,struct i3c_ibi_slot * slot)2241*4882a593Smuzhiyun void i3c_master_queue_ibi(struct i3c_dev_desc *dev, struct i3c_ibi_slot *slot)
2242*4882a593Smuzhiyun {
2243*4882a593Smuzhiyun 	atomic_inc(&dev->ibi->pending_ibis);
2244*4882a593Smuzhiyun 	queue_work(dev->common.master->wq, &slot->work);
2245*4882a593Smuzhiyun }
2246*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(i3c_master_queue_ibi);
2247*4882a593Smuzhiyun 
i3c_master_handle_ibi(struct work_struct * work)2248*4882a593Smuzhiyun static void i3c_master_handle_ibi(struct work_struct *work)
2249*4882a593Smuzhiyun {
2250*4882a593Smuzhiyun 	struct i3c_ibi_slot *slot = container_of(work, struct i3c_ibi_slot,
2251*4882a593Smuzhiyun 						 work);
2252*4882a593Smuzhiyun 	struct i3c_dev_desc *dev = slot->dev;
2253*4882a593Smuzhiyun 	struct i3c_master_controller *master = i3c_dev_get_master(dev);
2254*4882a593Smuzhiyun 	struct i3c_ibi_payload payload;
2255*4882a593Smuzhiyun 
2256*4882a593Smuzhiyun 	payload.data = slot->data;
2257*4882a593Smuzhiyun 	payload.len = slot->len;
2258*4882a593Smuzhiyun 
2259*4882a593Smuzhiyun 	if (dev->dev)
2260*4882a593Smuzhiyun 		dev->ibi->handler(dev->dev, &payload);
2261*4882a593Smuzhiyun 
2262*4882a593Smuzhiyun 	master->ops->recycle_ibi_slot(dev, slot);
2263*4882a593Smuzhiyun 	if (atomic_dec_and_test(&dev->ibi->pending_ibis))
2264*4882a593Smuzhiyun 		complete(&dev->ibi->all_ibis_handled);
2265*4882a593Smuzhiyun }
2266*4882a593Smuzhiyun 
i3c_master_init_ibi_slot(struct i3c_dev_desc * dev,struct i3c_ibi_slot * slot)2267*4882a593Smuzhiyun static void i3c_master_init_ibi_slot(struct i3c_dev_desc *dev,
2268*4882a593Smuzhiyun 				     struct i3c_ibi_slot *slot)
2269*4882a593Smuzhiyun {
2270*4882a593Smuzhiyun 	slot->dev = dev;
2271*4882a593Smuzhiyun 	INIT_WORK(&slot->work, i3c_master_handle_ibi);
2272*4882a593Smuzhiyun }
2273*4882a593Smuzhiyun 
2274*4882a593Smuzhiyun struct i3c_generic_ibi_slot {
2275*4882a593Smuzhiyun 	struct list_head node;
2276*4882a593Smuzhiyun 	struct i3c_ibi_slot base;
2277*4882a593Smuzhiyun };
2278*4882a593Smuzhiyun 
2279*4882a593Smuzhiyun struct i3c_generic_ibi_pool {
2280*4882a593Smuzhiyun 	spinlock_t lock;
2281*4882a593Smuzhiyun 	unsigned int num_slots;
2282*4882a593Smuzhiyun 	struct i3c_generic_ibi_slot *slots;
2283*4882a593Smuzhiyun 	void *payload_buf;
2284*4882a593Smuzhiyun 	struct list_head free_slots;
2285*4882a593Smuzhiyun 	struct list_head pending;
2286*4882a593Smuzhiyun };
2287*4882a593Smuzhiyun 
2288*4882a593Smuzhiyun /**
2289*4882a593Smuzhiyun  * i3c_generic_ibi_free_pool() - Free a generic IBI pool
2290*4882a593Smuzhiyun  * @pool: the IBI pool to free
2291*4882a593Smuzhiyun  *
2292*4882a593Smuzhiyun  * Free all IBI slots allated by a generic IBI pool.
2293*4882a593Smuzhiyun  */
i3c_generic_ibi_free_pool(struct i3c_generic_ibi_pool * pool)2294*4882a593Smuzhiyun void i3c_generic_ibi_free_pool(struct i3c_generic_ibi_pool *pool)
2295*4882a593Smuzhiyun {
2296*4882a593Smuzhiyun 	struct i3c_generic_ibi_slot *slot;
2297*4882a593Smuzhiyun 	unsigned int nslots = 0;
2298*4882a593Smuzhiyun 
2299*4882a593Smuzhiyun 	while (!list_empty(&pool->free_slots)) {
2300*4882a593Smuzhiyun 		slot = list_first_entry(&pool->free_slots,
2301*4882a593Smuzhiyun 					struct i3c_generic_ibi_slot, node);
2302*4882a593Smuzhiyun 		list_del(&slot->node);
2303*4882a593Smuzhiyun 		nslots++;
2304*4882a593Smuzhiyun 	}
2305*4882a593Smuzhiyun 
2306*4882a593Smuzhiyun 	/*
2307*4882a593Smuzhiyun 	 * If the number of freed slots is not equal to the number of allocated
2308*4882a593Smuzhiyun 	 * slots we have a leak somewhere.
2309*4882a593Smuzhiyun 	 */
2310*4882a593Smuzhiyun 	WARN_ON(nslots != pool->num_slots);
2311*4882a593Smuzhiyun 
2312*4882a593Smuzhiyun 	kfree(pool->payload_buf);
2313*4882a593Smuzhiyun 	kfree(pool->slots);
2314*4882a593Smuzhiyun 	kfree(pool);
2315*4882a593Smuzhiyun }
2316*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(i3c_generic_ibi_free_pool);
2317*4882a593Smuzhiyun 
2318*4882a593Smuzhiyun /**
2319*4882a593Smuzhiyun  * i3c_generic_ibi_alloc_pool() - Create a generic IBI pool
2320*4882a593Smuzhiyun  * @dev: the device this pool will be used for
2321*4882a593Smuzhiyun  * @req: IBI setup request describing what the device driver expects
2322*4882a593Smuzhiyun  *
2323*4882a593Smuzhiyun  * Create a generic IBI pool based on the information provided in @req.
2324*4882a593Smuzhiyun  *
2325*4882a593Smuzhiyun  * Return: a valid IBI pool in case of success, an ERR_PTR() otherwise.
2326*4882a593Smuzhiyun  */
2327*4882a593Smuzhiyun struct i3c_generic_ibi_pool *
i3c_generic_ibi_alloc_pool(struct i3c_dev_desc * dev,const struct i3c_ibi_setup * req)2328*4882a593Smuzhiyun i3c_generic_ibi_alloc_pool(struct i3c_dev_desc *dev,
2329*4882a593Smuzhiyun 			   const struct i3c_ibi_setup *req)
2330*4882a593Smuzhiyun {
2331*4882a593Smuzhiyun 	struct i3c_generic_ibi_pool *pool;
2332*4882a593Smuzhiyun 	struct i3c_generic_ibi_slot *slot;
2333*4882a593Smuzhiyun 	unsigned int i;
2334*4882a593Smuzhiyun 	int ret;
2335*4882a593Smuzhiyun 
2336*4882a593Smuzhiyun 	pool = kzalloc(sizeof(*pool), GFP_KERNEL);
2337*4882a593Smuzhiyun 	if (!pool)
2338*4882a593Smuzhiyun 		return ERR_PTR(-ENOMEM);
2339*4882a593Smuzhiyun 
2340*4882a593Smuzhiyun 	spin_lock_init(&pool->lock);
2341*4882a593Smuzhiyun 	INIT_LIST_HEAD(&pool->free_slots);
2342*4882a593Smuzhiyun 	INIT_LIST_HEAD(&pool->pending);
2343*4882a593Smuzhiyun 
2344*4882a593Smuzhiyun 	pool->slots = kcalloc(req->num_slots, sizeof(*slot), GFP_KERNEL);
2345*4882a593Smuzhiyun 	if (!pool->slots) {
2346*4882a593Smuzhiyun 		ret = -ENOMEM;
2347*4882a593Smuzhiyun 		goto err_free_pool;
2348*4882a593Smuzhiyun 	}
2349*4882a593Smuzhiyun 
2350*4882a593Smuzhiyun 	if (req->max_payload_len) {
2351*4882a593Smuzhiyun 		pool->payload_buf = kcalloc(req->num_slots,
2352*4882a593Smuzhiyun 					    req->max_payload_len, GFP_KERNEL);
2353*4882a593Smuzhiyun 		if (!pool->payload_buf) {
2354*4882a593Smuzhiyun 			ret = -ENOMEM;
2355*4882a593Smuzhiyun 			goto err_free_pool;
2356*4882a593Smuzhiyun 		}
2357*4882a593Smuzhiyun 	}
2358*4882a593Smuzhiyun 
2359*4882a593Smuzhiyun 	for (i = 0; i < req->num_slots; i++) {
2360*4882a593Smuzhiyun 		slot = &pool->slots[i];
2361*4882a593Smuzhiyun 		i3c_master_init_ibi_slot(dev, &slot->base);
2362*4882a593Smuzhiyun 
2363*4882a593Smuzhiyun 		if (req->max_payload_len)
2364*4882a593Smuzhiyun 			slot->base.data = pool->payload_buf +
2365*4882a593Smuzhiyun 					  (i * req->max_payload_len);
2366*4882a593Smuzhiyun 
2367*4882a593Smuzhiyun 		list_add_tail(&slot->node, &pool->free_slots);
2368*4882a593Smuzhiyun 		pool->num_slots++;
2369*4882a593Smuzhiyun 	}
2370*4882a593Smuzhiyun 
2371*4882a593Smuzhiyun 	return pool;
2372*4882a593Smuzhiyun 
2373*4882a593Smuzhiyun err_free_pool:
2374*4882a593Smuzhiyun 	i3c_generic_ibi_free_pool(pool);
2375*4882a593Smuzhiyun 	return ERR_PTR(ret);
2376*4882a593Smuzhiyun }
2377*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(i3c_generic_ibi_alloc_pool);
2378*4882a593Smuzhiyun 
2379*4882a593Smuzhiyun /**
2380*4882a593Smuzhiyun  * i3c_generic_ibi_get_free_slot() - Get a free slot from a generic IBI pool
2381*4882a593Smuzhiyun  * @pool: the pool to query an IBI slot on
2382*4882a593Smuzhiyun  *
2383*4882a593Smuzhiyun  * Search for a free slot in a generic IBI pool.
2384*4882a593Smuzhiyun  * The slot should be returned to the pool using i3c_generic_ibi_recycle_slot()
2385*4882a593Smuzhiyun  * when it's no longer needed.
2386*4882a593Smuzhiyun  *
2387*4882a593Smuzhiyun  * Return: a pointer to a free slot, or NULL if there's no free slot available.
2388*4882a593Smuzhiyun  */
2389*4882a593Smuzhiyun struct i3c_ibi_slot *
i3c_generic_ibi_get_free_slot(struct i3c_generic_ibi_pool * pool)2390*4882a593Smuzhiyun i3c_generic_ibi_get_free_slot(struct i3c_generic_ibi_pool *pool)
2391*4882a593Smuzhiyun {
2392*4882a593Smuzhiyun 	struct i3c_generic_ibi_slot *slot;
2393*4882a593Smuzhiyun 	unsigned long flags;
2394*4882a593Smuzhiyun 
2395*4882a593Smuzhiyun 	spin_lock_irqsave(&pool->lock, flags);
2396*4882a593Smuzhiyun 	slot = list_first_entry_or_null(&pool->free_slots,
2397*4882a593Smuzhiyun 					struct i3c_generic_ibi_slot, node);
2398*4882a593Smuzhiyun 	if (slot)
2399*4882a593Smuzhiyun 		list_del(&slot->node);
2400*4882a593Smuzhiyun 	spin_unlock_irqrestore(&pool->lock, flags);
2401*4882a593Smuzhiyun 
2402*4882a593Smuzhiyun 	return slot ? &slot->base : NULL;
2403*4882a593Smuzhiyun }
2404*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(i3c_generic_ibi_get_free_slot);
2405*4882a593Smuzhiyun 
2406*4882a593Smuzhiyun /**
2407*4882a593Smuzhiyun  * i3c_generic_ibi_recycle_slot() - Return a slot to a generic IBI pool
2408*4882a593Smuzhiyun  * @pool: the pool to return the IBI slot to
2409*4882a593Smuzhiyun  * @s: IBI slot to recycle
2410*4882a593Smuzhiyun  *
2411*4882a593Smuzhiyun  * Add an IBI slot back to its generic IBI pool. Should be called from the
2412*4882a593Smuzhiyun  * master driver struct_master_controller_ops->recycle_ibi() method.
2413*4882a593Smuzhiyun  */
i3c_generic_ibi_recycle_slot(struct i3c_generic_ibi_pool * pool,struct i3c_ibi_slot * s)2414*4882a593Smuzhiyun void i3c_generic_ibi_recycle_slot(struct i3c_generic_ibi_pool *pool,
2415*4882a593Smuzhiyun 				  struct i3c_ibi_slot *s)
2416*4882a593Smuzhiyun {
2417*4882a593Smuzhiyun 	struct i3c_generic_ibi_slot *slot;
2418*4882a593Smuzhiyun 	unsigned long flags;
2419*4882a593Smuzhiyun 
2420*4882a593Smuzhiyun 	if (!s)
2421*4882a593Smuzhiyun 		return;
2422*4882a593Smuzhiyun 
2423*4882a593Smuzhiyun 	slot = container_of(s, struct i3c_generic_ibi_slot, base);
2424*4882a593Smuzhiyun 	spin_lock_irqsave(&pool->lock, flags);
2425*4882a593Smuzhiyun 	list_add_tail(&slot->node, &pool->free_slots);
2426*4882a593Smuzhiyun 	spin_unlock_irqrestore(&pool->lock, flags);
2427*4882a593Smuzhiyun }
2428*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(i3c_generic_ibi_recycle_slot);
2429*4882a593Smuzhiyun 
i3c_master_check_ops(const struct i3c_master_controller_ops * ops)2430*4882a593Smuzhiyun static int i3c_master_check_ops(const struct i3c_master_controller_ops *ops)
2431*4882a593Smuzhiyun {
2432*4882a593Smuzhiyun 	if (!ops || !ops->bus_init || !ops->priv_xfers ||
2433*4882a593Smuzhiyun 	    !ops->send_ccc_cmd || !ops->do_daa || !ops->i2c_xfers)
2434*4882a593Smuzhiyun 		return -EINVAL;
2435*4882a593Smuzhiyun 
2436*4882a593Smuzhiyun 	if (ops->request_ibi &&
2437*4882a593Smuzhiyun 	    (!ops->enable_ibi || !ops->disable_ibi || !ops->free_ibi ||
2438*4882a593Smuzhiyun 	     !ops->recycle_ibi_slot))
2439*4882a593Smuzhiyun 		return -EINVAL;
2440*4882a593Smuzhiyun 
2441*4882a593Smuzhiyun 	return 0;
2442*4882a593Smuzhiyun }
2443*4882a593Smuzhiyun 
2444*4882a593Smuzhiyun /**
2445*4882a593Smuzhiyun  * i3c_master_register() - register an I3C master
2446*4882a593Smuzhiyun  * @master: master used to send frames on the bus
2447*4882a593Smuzhiyun  * @parent: the parent device (the one that provides this I3C master
2448*4882a593Smuzhiyun  *	    controller)
2449*4882a593Smuzhiyun  * @ops: the master controller operations
2450*4882a593Smuzhiyun  * @secondary: true if you are registering a secondary master. Will return
2451*4882a593Smuzhiyun  *	       -ENOTSUPP if set to true since secondary masters are not yet
2452*4882a593Smuzhiyun  *	       supported
2453*4882a593Smuzhiyun  *
2454*4882a593Smuzhiyun  * This function takes care of everything for you:
2455*4882a593Smuzhiyun  *
2456*4882a593Smuzhiyun  * - creates and initializes the I3C bus
2457*4882a593Smuzhiyun  * - populates the bus with static I2C devs if @parent->of_node is not
2458*4882a593Smuzhiyun  *   NULL
2459*4882a593Smuzhiyun  * - registers all I3C devices added by the controller during bus
2460*4882a593Smuzhiyun  *   initialization
2461*4882a593Smuzhiyun  * - registers the I2C adapter and all I2C devices
2462*4882a593Smuzhiyun  *
2463*4882a593Smuzhiyun  * Return: 0 in case of success, a negative error code otherwise.
2464*4882a593Smuzhiyun  */
i3c_master_register(struct i3c_master_controller * master,struct device * parent,const struct i3c_master_controller_ops * ops,bool secondary)2465*4882a593Smuzhiyun int i3c_master_register(struct i3c_master_controller *master,
2466*4882a593Smuzhiyun 			struct device *parent,
2467*4882a593Smuzhiyun 			const struct i3c_master_controller_ops *ops,
2468*4882a593Smuzhiyun 			bool secondary)
2469*4882a593Smuzhiyun {
2470*4882a593Smuzhiyun 	unsigned long i2c_scl_rate = I3C_BUS_I2C_FM_PLUS_SCL_RATE;
2471*4882a593Smuzhiyun 	struct i3c_bus *i3cbus = i3c_master_get_bus(master);
2472*4882a593Smuzhiyun 	enum i3c_bus_mode mode = I3C_BUS_MODE_PURE;
2473*4882a593Smuzhiyun 	struct i2c_dev_boardinfo *i2cbi;
2474*4882a593Smuzhiyun 	int ret;
2475*4882a593Smuzhiyun 
2476*4882a593Smuzhiyun 	/* We do not support secondary masters yet. */
2477*4882a593Smuzhiyun 	if (secondary)
2478*4882a593Smuzhiyun 		return -ENOTSUPP;
2479*4882a593Smuzhiyun 
2480*4882a593Smuzhiyun 	ret = i3c_master_check_ops(ops);
2481*4882a593Smuzhiyun 	if (ret)
2482*4882a593Smuzhiyun 		return ret;
2483*4882a593Smuzhiyun 
2484*4882a593Smuzhiyun 	master->dev.parent = parent;
2485*4882a593Smuzhiyun 	master->dev.of_node = of_node_get(parent->of_node);
2486*4882a593Smuzhiyun 	master->dev.bus = &i3c_bus_type;
2487*4882a593Smuzhiyun 	master->dev.type = &i3c_masterdev_type;
2488*4882a593Smuzhiyun 	master->dev.release = i3c_masterdev_release;
2489*4882a593Smuzhiyun 	master->ops = ops;
2490*4882a593Smuzhiyun 	master->secondary = secondary;
2491*4882a593Smuzhiyun 	INIT_LIST_HEAD(&master->boardinfo.i2c);
2492*4882a593Smuzhiyun 	INIT_LIST_HEAD(&master->boardinfo.i3c);
2493*4882a593Smuzhiyun 
2494*4882a593Smuzhiyun 	ret = i3c_bus_init(i3cbus);
2495*4882a593Smuzhiyun 	if (ret)
2496*4882a593Smuzhiyun 		return ret;
2497*4882a593Smuzhiyun 
2498*4882a593Smuzhiyun 	device_initialize(&master->dev);
2499*4882a593Smuzhiyun 	dev_set_name(&master->dev, "i3c-%d", i3cbus->id);
2500*4882a593Smuzhiyun 
2501*4882a593Smuzhiyun 	ret = of_populate_i3c_bus(master);
2502*4882a593Smuzhiyun 	if (ret)
2503*4882a593Smuzhiyun 		goto err_put_dev;
2504*4882a593Smuzhiyun 
2505*4882a593Smuzhiyun 	list_for_each_entry(i2cbi, &master->boardinfo.i2c, node) {
2506*4882a593Smuzhiyun 		switch (i2cbi->lvr & I3C_LVR_I2C_INDEX_MASK) {
2507*4882a593Smuzhiyun 		case I3C_LVR_I2C_INDEX(0):
2508*4882a593Smuzhiyun 			if (mode < I3C_BUS_MODE_MIXED_FAST)
2509*4882a593Smuzhiyun 				mode = I3C_BUS_MODE_MIXED_FAST;
2510*4882a593Smuzhiyun 			break;
2511*4882a593Smuzhiyun 		case I3C_LVR_I2C_INDEX(1):
2512*4882a593Smuzhiyun 			if (mode < I3C_BUS_MODE_MIXED_LIMITED)
2513*4882a593Smuzhiyun 				mode = I3C_BUS_MODE_MIXED_LIMITED;
2514*4882a593Smuzhiyun 			break;
2515*4882a593Smuzhiyun 		case I3C_LVR_I2C_INDEX(2):
2516*4882a593Smuzhiyun 			if (mode < I3C_BUS_MODE_MIXED_SLOW)
2517*4882a593Smuzhiyun 				mode = I3C_BUS_MODE_MIXED_SLOW;
2518*4882a593Smuzhiyun 			break;
2519*4882a593Smuzhiyun 		default:
2520*4882a593Smuzhiyun 			ret = -EINVAL;
2521*4882a593Smuzhiyun 			goto err_put_dev;
2522*4882a593Smuzhiyun 		}
2523*4882a593Smuzhiyun 
2524*4882a593Smuzhiyun 		if (i2cbi->lvr & I3C_LVR_I2C_FM_MODE)
2525*4882a593Smuzhiyun 			i2c_scl_rate = I3C_BUS_I2C_FM_SCL_RATE;
2526*4882a593Smuzhiyun 	}
2527*4882a593Smuzhiyun 
2528*4882a593Smuzhiyun 	ret = i3c_bus_set_mode(i3cbus, mode, i2c_scl_rate);
2529*4882a593Smuzhiyun 	if (ret)
2530*4882a593Smuzhiyun 		goto err_put_dev;
2531*4882a593Smuzhiyun 
2532*4882a593Smuzhiyun 	master->wq = alloc_workqueue("%s", 0, 0, dev_name(parent));
2533*4882a593Smuzhiyun 	if (!master->wq) {
2534*4882a593Smuzhiyun 		ret = -ENOMEM;
2535*4882a593Smuzhiyun 		goto err_put_dev;
2536*4882a593Smuzhiyun 	}
2537*4882a593Smuzhiyun 
2538*4882a593Smuzhiyun 	ret = i3c_master_bus_init(master);
2539*4882a593Smuzhiyun 	if (ret)
2540*4882a593Smuzhiyun 		goto err_put_dev;
2541*4882a593Smuzhiyun 
2542*4882a593Smuzhiyun 	ret = device_add(&master->dev);
2543*4882a593Smuzhiyun 	if (ret)
2544*4882a593Smuzhiyun 		goto err_cleanup_bus;
2545*4882a593Smuzhiyun 
2546*4882a593Smuzhiyun 	/*
2547*4882a593Smuzhiyun 	 * Expose our I3C bus as an I2C adapter so that I2C devices are exposed
2548*4882a593Smuzhiyun 	 * through the I2C subsystem.
2549*4882a593Smuzhiyun 	 */
2550*4882a593Smuzhiyun 	ret = i3c_master_i2c_adapter_init(master);
2551*4882a593Smuzhiyun 	if (ret)
2552*4882a593Smuzhiyun 		goto err_del_dev;
2553*4882a593Smuzhiyun 
2554*4882a593Smuzhiyun 	/*
2555*4882a593Smuzhiyun 	 * We're done initializing the bus and the controller, we can now
2556*4882a593Smuzhiyun 	 * register I3C devices discovered during the initial DAA.
2557*4882a593Smuzhiyun 	 */
2558*4882a593Smuzhiyun 	master->init_done = true;
2559*4882a593Smuzhiyun 	i3c_bus_normaluse_lock(&master->bus);
2560*4882a593Smuzhiyun 	i3c_master_register_new_i3c_devs(master);
2561*4882a593Smuzhiyun 	i3c_bus_normaluse_unlock(&master->bus);
2562*4882a593Smuzhiyun 
2563*4882a593Smuzhiyun 	return 0;
2564*4882a593Smuzhiyun 
2565*4882a593Smuzhiyun err_del_dev:
2566*4882a593Smuzhiyun 	device_del(&master->dev);
2567*4882a593Smuzhiyun 
2568*4882a593Smuzhiyun err_cleanup_bus:
2569*4882a593Smuzhiyun 	i3c_master_bus_cleanup(master);
2570*4882a593Smuzhiyun 
2571*4882a593Smuzhiyun err_put_dev:
2572*4882a593Smuzhiyun 	put_device(&master->dev);
2573*4882a593Smuzhiyun 
2574*4882a593Smuzhiyun 	return ret;
2575*4882a593Smuzhiyun }
2576*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(i3c_master_register);
2577*4882a593Smuzhiyun 
2578*4882a593Smuzhiyun /**
2579*4882a593Smuzhiyun  * i3c_master_unregister() - unregister an I3C master
2580*4882a593Smuzhiyun  * @master: master used to send frames on the bus
2581*4882a593Smuzhiyun  *
2582*4882a593Smuzhiyun  * Basically undo everything done in i3c_master_register().
2583*4882a593Smuzhiyun  *
2584*4882a593Smuzhiyun  * Return: 0 in case of success, a negative error code otherwise.
2585*4882a593Smuzhiyun  */
i3c_master_unregister(struct i3c_master_controller * master)2586*4882a593Smuzhiyun int i3c_master_unregister(struct i3c_master_controller *master)
2587*4882a593Smuzhiyun {
2588*4882a593Smuzhiyun 	i3c_master_i2c_adapter_cleanup(master);
2589*4882a593Smuzhiyun 	i3c_master_unregister_i3c_devs(master);
2590*4882a593Smuzhiyun 	i3c_master_bus_cleanup(master);
2591*4882a593Smuzhiyun 	device_unregister(&master->dev);
2592*4882a593Smuzhiyun 
2593*4882a593Smuzhiyun 	return 0;
2594*4882a593Smuzhiyun }
2595*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(i3c_master_unregister);
2596*4882a593Smuzhiyun 
i3c_dev_do_priv_xfers_locked(struct i3c_dev_desc * dev,struct i3c_priv_xfer * xfers,int nxfers)2597*4882a593Smuzhiyun int i3c_dev_do_priv_xfers_locked(struct i3c_dev_desc *dev,
2598*4882a593Smuzhiyun 				 struct i3c_priv_xfer *xfers,
2599*4882a593Smuzhiyun 				 int nxfers)
2600*4882a593Smuzhiyun {
2601*4882a593Smuzhiyun 	struct i3c_master_controller *master;
2602*4882a593Smuzhiyun 
2603*4882a593Smuzhiyun 	if (!dev)
2604*4882a593Smuzhiyun 		return -ENOENT;
2605*4882a593Smuzhiyun 
2606*4882a593Smuzhiyun 	master = i3c_dev_get_master(dev);
2607*4882a593Smuzhiyun 	if (!master || !xfers)
2608*4882a593Smuzhiyun 		return -EINVAL;
2609*4882a593Smuzhiyun 
2610*4882a593Smuzhiyun 	if (!master->ops->priv_xfers)
2611*4882a593Smuzhiyun 		return -ENOTSUPP;
2612*4882a593Smuzhiyun 
2613*4882a593Smuzhiyun 	return master->ops->priv_xfers(dev, xfers, nxfers);
2614*4882a593Smuzhiyun }
2615*4882a593Smuzhiyun 
i3c_dev_disable_ibi_locked(struct i3c_dev_desc * dev)2616*4882a593Smuzhiyun int i3c_dev_disable_ibi_locked(struct i3c_dev_desc *dev)
2617*4882a593Smuzhiyun {
2618*4882a593Smuzhiyun 	struct i3c_master_controller *master;
2619*4882a593Smuzhiyun 	int ret;
2620*4882a593Smuzhiyun 
2621*4882a593Smuzhiyun 	if (!dev->ibi)
2622*4882a593Smuzhiyun 		return -EINVAL;
2623*4882a593Smuzhiyun 
2624*4882a593Smuzhiyun 	master = i3c_dev_get_master(dev);
2625*4882a593Smuzhiyun 	ret = master->ops->disable_ibi(dev);
2626*4882a593Smuzhiyun 	if (ret)
2627*4882a593Smuzhiyun 		return ret;
2628*4882a593Smuzhiyun 
2629*4882a593Smuzhiyun 	reinit_completion(&dev->ibi->all_ibis_handled);
2630*4882a593Smuzhiyun 	if (atomic_read(&dev->ibi->pending_ibis))
2631*4882a593Smuzhiyun 		wait_for_completion(&dev->ibi->all_ibis_handled);
2632*4882a593Smuzhiyun 
2633*4882a593Smuzhiyun 	dev->ibi->enabled = false;
2634*4882a593Smuzhiyun 
2635*4882a593Smuzhiyun 	return 0;
2636*4882a593Smuzhiyun }
2637*4882a593Smuzhiyun 
i3c_dev_enable_ibi_locked(struct i3c_dev_desc * dev)2638*4882a593Smuzhiyun int i3c_dev_enable_ibi_locked(struct i3c_dev_desc *dev)
2639*4882a593Smuzhiyun {
2640*4882a593Smuzhiyun 	struct i3c_master_controller *master = i3c_dev_get_master(dev);
2641*4882a593Smuzhiyun 	int ret;
2642*4882a593Smuzhiyun 
2643*4882a593Smuzhiyun 	if (!dev->ibi)
2644*4882a593Smuzhiyun 		return -EINVAL;
2645*4882a593Smuzhiyun 
2646*4882a593Smuzhiyun 	ret = master->ops->enable_ibi(dev);
2647*4882a593Smuzhiyun 	if (!ret)
2648*4882a593Smuzhiyun 		dev->ibi->enabled = true;
2649*4882a593Smuzhiyun 
2650*4882a593Smuzhiyun 	return ret;
2651*4882a593Smuzhiyun }
2652*4882a593Smuzhiyun 
i3c_dev_request_ibi_locked(struct i3c_dev_desc * dev,const struct i3c_ibi_setup * req)2653*4882a593Smuzhiyun int i3c_dev_request_ibi_locked(struct i3c_dev_desc *dev,
2654*4882a593Smuzhiyun 			       const struct i3c_ibi_setup *req)
2655*4882a593Smuzhiyun {
2656*4882a593Smuzhiyun 	struct i3c_master_controller *master = i3c_dev_get_master(dev);
2657*4882a593Smuzhiyun 	struct i3c_device_ibi_info *ibi;
2658*4882a593Smuzhiyun 	int ret;
2659*4882a593Smuzhiyun 
2660*4882a593Smuzhiyun 	if (!master->ops->request_ibi)
2661*4882a593Smuzhiyun 		return -ENOTSUPP;
2662*4882a593Smuzhiyun 
2663*4882a593Smuzhiyun 	if (dev->ibi)
2664*4882a593Smuzhiyun 		return -EBUSY;
2665*4882a593Smuzhiyun 
2666*4882a593Smuzhiyun 	ibi = kzalloc(sizeof(*ibi), GFP_KERNEL);
2667*4882a593Smuzhiyun 	if (!ibi)
2668*4882a593Smuzhiyun 		return -ENOMEM;
2669*4882a593Smuzhiyun 
2670*4882a593Smuzhiyun 	atomic_set(&ibi->pending_ibis, 0);
2671*4882a593Smuzhiyun 	init_completion(&ibi->all_ibis_handled);
2672*4882a593Smuzhiyun 	ibi->handler = req->handler;
2673*4882a593Smuzhiyun 	ibi->max_payload_len = req->max_payload_len;
2674*4882a593Smuzhiyun 	ibi->num_slots = req->num_slots;
2675*4882a593Smuzhiyun 
2676*4882a593Smuzhiyun 	dev->ibi = ibi;
2677*4882a593Smuzhiyun 	ret = master->ops->request_ibi(dev, req);
2678*4882a593Smuzhiyun 	if (ret) {
2679*4882a593Smuzhiyun 		kfree(ibi);
2680*4882a593Smuzhiyun 		dev->ibi = NULL;
2681*4882a593Smuzhiyun 	}
2682*4882a593Smuzhiyun 
2683*4882a593Smuzhiyun 	return ret;
2684*4882a593Smuzhiyun }
2685*4882a593Smuzhiyun 
i3c_dev_free_ibi_locked(struct i3c_dev_desc * dev)2686*4882a593Smuzhiyun void i3c_dev_free_ibi_locked(struct i3c_dev_desc *dev)
2687*4882a593Smuzhiyun {
2688*4882a593Smuzhiyun 	struct i3c_master_controller *master = i3c_dev_get_master(dev);
2689*4882a593Smuzhiyun 
2690*4882a593Smuzhiyun 	if (!dev->ibi)
2691*4882a593Smuzhiyun 		return;
2692*4882a593Smuzhiyun 
2693*4882a593Smuzhiyun 	if (WARN_ON(dev->ibi->enabled))
2694*4882a593Smuzhiyun 		WARN_ON(i3c_dev_disable_ibi_locked(dev));
2695*4882a593Smuzhiyun 
2696*4882a593Smuzhiyun 	master->ops->free_ibi(dev);
2697*4882a593Smuzhiyun 	kfree(dev->ibi);
2698*4882a593Smuzhiyun 	dev->ibi = NULL;
2699*4882a593Smuzhiyun }
2700*4882a593Smuzhiyun 
i3c_init(void)2701*4882a593Smuzhiyun static int __init i3c_init(void)
2702*4882a593Smuzhiyun {
2703*4882a593Smuzhiyun 	return bus_register(&i3c_bus_type);
2704*4882a593Smuzhiyun }
2705*4882a593Smuzhiyun subsys_initcall(i3c_init);
2706*4882a593Smuzhiyun 
i3c_exit(void)2707*4882a593Smuzhiyun static void __exit i3c_exit(void)
2708*4882a593Smuzhiyun {
2709*4882a593Smuzhiyun 	idr_destroy(&i3c_bus_idr);
2710*4882a593Smuzhiyun 	bus_unregister(&i3c_bus_type);
2711*4882a593Smuzhiyun }
2712*4882a593Smuzhiyun module_exit(i3c_exit);
2713*4882a593Smuzhiyun 
2714*4882a593Smuzhiyun MODULE_AUTHOR("Boris Brezillon <boris.brezillon@bootlin.com>");
2715*4882a593Smuzhiyun MODULE_DESCRIPTION("I3C core");
2716*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
2717