xref: /OK3568_Linux_fs/kernel/drivers/i2c/muxes/i2c-mux-pca954x.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * I2C multiplexer
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (c) 2008-2009 Rodolfo Giometti <giometti@linux.it>
6*4882a593Smuzhiyun  * Copyright (c) 2008-2009 Eurotech S.p.A. <info@eurotech.it>
7*4882a593Smuzhiyun  *
8*4882a593Smuzhiyun  * This module supports the PCA954x and PCA984x series of I2C multiplexer/switch
9*4882a593Smuzhiyun  * chips made by NXP Semiconductors.
10*4882a593Smuzhiyun  * This includes the:
11*4882a593Smuzhiyun  *	 PCA9540, PCA9542, PCA9543, PCA9544, PCA9545, PCA9546, PCA9547,
12*4882a593Smuzhiyun  *	 PCA9548, PCA9846, PCA9847, PCA9848 and PCA9849.
13*4882a593Smuzhiyun  *
14*4882a593Smuzhiyun  * These chips are all controlled via the I2C bus itself, and all have a
15*4882a593Smuzhiyun  * single 8-bit register. The upstream "parent" bus fans out to two,
16*4882a593Smuzhiyun  * four, or eight downstream busses or channels; which of these
17*4882a593Smuzhiyun  * are selected is determined by the chip type and register contents. A
18*4882a593Smuzhiyun  * mux can select only one sub-bus at a time; a switch can select any
19*4882a593Smuzhiyun  * combination simultaneously.
20*4882a593Smuzhiyun  *
21*4882a593Smuzhiyun  * Based on:
22*4882a593Smuzhiyun  *	pca954x.c from Kumar Gala <galak@kernel.crashing.org>
23*4882a593Smuzhiyun  * Copyright (C) 2006
24*4882a593Smuzhiyun  *
25*4882a593Smuzhiyun  * Based on:
26*4882a593Smuzhiyun  *	pca954x.c from Ken Harrenstien
27*4882a593Smuzhiyun  * Copyright (C) 2004 Google, Inc. (Ken Harrenstien)
28*4882a593Smuzhiyun  *
29*4882a593Smuzhiyun  * Based on:
30*4882a593Smuzhiyun  *	i2c-virtual_cb.c from Brian Kuschak <bkuschak@yahoo.com>
31*4882a593Smuzhiyun  * and
32*4882a593Smuzhiyun  *	pca9540.c from Jean Delvare <jdelvare@suse.de>.
33*4882a593Smuzhiyun  */
34*4882a593Smuzhiyun 
35*4882a593Smuzhiyun #include <linux/device.h>
36*4882a593Smuzhiyun #include <linux/delay.h>
37*4882a593Smuzhiyun #include <linux/gpio/consumer.h>
38*4882a593Smuzhiyun #include <linux/i2c.h>
39*4882a593Smuzhiyun #include <linux/i2c-mux.h>
40*4882a593Smuzhiyun #include <linux/interrupt.h>
41*4882a593Smuzhiyun #include <linux/irq.h>
42*4882a593Smuzhiyun #include <linux/module.h>
43*4882a593Smuzhiyun #include <linux/pm.h>
44*4882a593Smuzhiyun #include <linux/property.h>
45*4882a593Smuzhiyun #include <linux/slab.h>
46*4882a593Smuzhiyun #include <linux/spinlock.h>
47*4882a593Smuzhiyun #include <dt-bindings/mux/mux.h>
48*4882a593Smuzhiyun 
49*4882a593Smuzhiyun #define PCA954X_MAX_NCHANS 8
50*4882a593Smuzhiyun 
51*4882a593Smuzhiyun #define PCA954X_IRQ_OFFSET 4
52*4882a593Smuzhiyun 
53*4882a593Smuzhiyun enum pca_type {
54*4882a593Smuzhiyun 	pca_9540,
55*4882a593Smuzhiyun 	pca_9542,
56*4882a593Smuzhiyun 	pca_9543,
57*4882a593Smuzhiyun 	pca_9544,
58*4882a593Smuzhiyun 	pca_9545,
59*4882a593Smuzhiyun 	pca_9546,
60*4882a593Smuzhiyun 	pca_9547,
61*4882a593Smuzhiyun 	pca_9548,
62*4882a593Smuzhiyun 	pca_9846,
63*4882a593Smuzhiyun 	pca_9847,
64*4882a593Smuzhiyun 	pca_9848,
65*4882a593Smuzhiyun 	pca_9849,
66*4882a593Smuzhiyun };
67*4882a593Smuzhiyun 
68*4882a593Smuzhiyun struct chip_desc {
69*4882a593Smuzhiyun 	u8 nchans;
70*4882a593Smuzhiyun 	u8 enable;	/* used for muxes only */
71*4882a593Smuzhiyun 	u8 has_irq;
72*4882a593Smuzhiyun 	enum muxtype {
73*4882a593Smuzhiyun 		pca954x_ismux = 0,
74*4882a593Smuzhiyun 		pca954x_isswi
75*4882a593Smuzhiyun 	} muxtype;
76*4882a593Smuzhiyun 	struct i2c_device_identity id;
77*4882a593Smuzhiyun };
78*4882a593Smuzhiyun 
79*4882a593Smuzhiyun struct pca954x {
80*4882a593Smuzhiyun 	const struct chip_desc *chip;
81*4882a593Smuzhiyun 
82*4882a593Smuzhiyun 	u8 last_chan;		/* last register value */
83*4882a593Smuzhiyun 	/* MUX_IDLE_AS_IS, MUX_IDLE_DISCONNECT or >= 0 for channel */
84*4882a593Smuzhiyun 	s32 idle_state;
85*4882a593Smuzhiyun 
86*4882a593Smuzhiyun 	struct i2c_client *client;
87*4882a593Smuzhiyun 
88*4882a593Smuzhiyun 	struct irq_domain *irq;
89*4882a593Smuzhiyun 	unsigned int irq_mask;
90*4882a593Smuzhiyun 	raw_spinlock_t lock;
91*4882a593Smuzhiyun };
92*4882a593Smuzhiyun 
93*4882a593Smuzhiyun /* Provide specs for the PCA954x types we know about */
94*4882a593Smuzhiyun static const struct chip_desc chips[] = {
95*4882a593Smuzhiyun 	[pca_9540] = {
96*4882a593Smuzhiyun 		.nchans = 2,
97*4882a593Smuzhiyun 		.enable = 0x4,
98*4882a593Smuzhiyun 		.muxtype = pca954x_ismux,
99*4882a593Smuzhiyun 		.id = { .manufacturer_id = I2C_DEVICE_ID_NONE },
100*4882a593Smuzhiyun 	},
101*4882a593Smuzhiyun 	[pca_9542] = {
102*4882a593Smuzhiyun 		.nchans = 2,
103*4882a593Smuzhiyun 		.enable = 0x4,
104*4882a593Smuzhiyun 		.has_irq = 1,
105*4882a593Smuzhiyun 		.muxtype = pca954x_ismux,
106*4882a593Smuzhiyun 		.id = { .manufacturer_id = I2C_DEVICE_ID_NONE },
107*4882a593Smuzhiyun 	},
108*4882a593Smuzhiyun 	[pca_9543] = {
109*4882a593Smuzhiyun 		.nchans = 2,
110*4882a593Smuzhiyun 		.has_irq = 1,
111*4882a593Smuzhiyun 		.muxtype = pca954x_isswi,
112*4882a593Smuzhiyun 		.id = { .manufacturer_id = I2C_DEVICE_ID_NONE },
113*4882a593Smuzhiyun 	},
114*4882a593Smuzhiyun 	[pca_9544] = {
115*4882a593Smuzhiyun 		.nchans = 4,
116*4882a593Smuzhiyun 		.enable = 0x4,
117*4882a593Smuzhiyun 		.has_irq = 1,
118*4882a593Smuzhiyun 		.muxtype = pca954x_ismux,
119*4882a593Smuzhiyun 		.id = { .manufacturer_id = I2C_DEVICE_ID_NONE },
120*4882a593Smuzhiyun 	},
121*4882a593Smuzhiyun 	[pca_9545] = {
122*4882a593Smuzhiyun 		.nchans = 4,
123*4882a593Smuzhiyun 		.has_irq = 1,
124*4882a593Smuzhiyun 		.muxtype = pca954x_isswi,
125*4882a593Smuzhiyun 		.id = { .manufacturer_id = I2C_DEVICE_ID_NONE },
126*4882a593Smuzhiyun 	},
127*4882a593Smuzhiyun 	[pca_9546] = {
128*4882a593Smuzhiyun 		.nchans = 4,
129*4882a593Smuzhiyun 		.muxtype = pca954x_isswi,
130*4882a593Smuzhiyun 		.id = { .manufacturer_id = I2C_DEVICE_ID_NONE },
131*4882a593Smuzhiyun 	},
132*4882a593Smuzhiyun 	[pca_9547] = {
133*4882a593Smuzhiyun 		.nchans = 8,
134*4882a593Smuzhiyun 		.enable = 0x8,
135*4882a593Smuzhiyun 		.muxtype = pca954x_ismux,
136*4882a593Smuzhiyun 		.id = { .manufacturer_id = I2C_DEVICE_ID_NONE },
137*4882a593Smuzhiyun 	},
138*4882a593Smuzhiyun 	[pca_9548] = {
139*4882a593Smuzhiyun 		.nchans = 8,
140*4882a593Smuzhiyun 		.muxtype = pca954x_isswi,
141*4882a593Smuzhiyun 		.id = { .manufacturer_id = I2C_DEVICE_ID_NONE },
142*4882a593Smuzhiyun 	},
143*4882a593Smuzhiyun 	[pca_9846] = {
144*4882a593Smuzhiyun 		.nchans = 4,
145*4882a593Smuzhiyun 		.muxtype = pca954x_isswi,
146*4882a593Smuzhiyun 		.id = {
147*4882a593Smuzhiyun 			.manufacturer_id = I2C_DEVICE_ID_NXP_SEMICONDUCTORS,
148*4882a593Smuzhiyun 			.part_id = 0x10b,
149*4882a593Smuzhiyun 		},
150*4882a593Smuzhiyun 	},
151*4882a593Smuzhiyun 	[pca_9847] = {
152*4882a593Smuzhiyun 		.nchans = 8,
153*4882a593Smuzhiyun 		.enable = 0x8,
154*4882a593Smuzhiyun 		.muxtype = pca954x_ismux,
155*4882a593Smuzhiyun 		.id = {
156*4882a593Smuzhiyun 			.manufacturer_id = I2C_DEVICE_ID_NXP_SEMICONDUCTORS,
157*4882a593Smuzhiyun 			.part_id = 0x108,
158*4882a593Smuzhiyun 		},
159*4882a593Smuzhiyun 	},
160*4882a593Smuzhiyun 	[pca_9848] = {
161*4882a593Smuzhiyun 		.nchans = 8,
162*4882a593Smuzhiyun 		.muxtype = pca954x_isswi,
163*4882a593Smuzhiyun 		.id = {
164*4882a593Smuzhiyun 			.manufacturer_id = I2C_DEVICE_ID_NXP_SEMICONDUCTORS,
165*4882a593Smuzhiyun 			.part_id = 0x10a,
166*4882a593Smuzhiyun 		},
167*4882a593Smuzhiyun 	},
168*4882a593Smuzhiyun 	[pca_9849] = {
169*4882a593Smuzhiyun 		.nchans = 4,
170*4882a593Smuzhiyun 		.enable = 0x4,
171*4882a593Smuzhiyun 		.muxtype = pca954x_ismux,
172*4882a593Smuzhiyun 		.id = {
173*4882a593Smuzhiyun 			.manufacturer_id = I2C_DEVICE_ID_NXP_SEMICONDUCTORS,
174*4882a593Smuzhiyun 			.part_id = 0x109,
175*4882a593Smuzhiyun 		},
176*4882a593Smuzhiyun 	},
177*4882a593Smuzhiyun };
178*4882a593Smuzhiyun 
179*4882a593Smuzhiyun static const struct i2c_device_id pca954x_id[] = {
180*4882a593Smuzhiyun 	{ "pca9540", pca_9540 },
181*4882a593Smuzhiyun 	{ "pca9542", pca_9542 },
182*4882a593Smuzhiyun 	{ "pca9543", pca_9543 },
183*4882a593Smuzhiyun 	{ "pca9544", pca_9544 },
184*4882a593Smuzhiyun 	{ "pca9545", pca_9545 },
185*4882a593Smuzhiyun 	{ "pca9546", pca_9546 },
186*4882a593Smuzhiyun 	{ "pca9547", pca_9547 },
187*4882a593Smuzhiyun 	{ "pca9548", pca_9548 },
188*4882a593Smuzhiyun 	{ "pca9846", pca_9846 },
189*4882a593Smuzhiyun 	{ "pca9847", pca_9847 },
190*4882a593Smuzhiyun 	{ "pca9848", pca_9848 },
191*4882a593Smuzhiyun 	{ "pca9849", pca_9849 },
192*4882a593Smuzhiyun 	{ }
193*4882a593Smuzhiyun };
194*4882a593Smuzhiyun MODULE_DEVICE_TABLE(i2c, pca954x_id);
195*4882a593Smuzhiyun 
196*4882a593Smuzhiyun static const struct of_device_id pca954x_of_match[] = {
197*4882a593Smuzhiyun 	{ .compatible = "nxp,pca9540", .data = &chips[pca_9540] },
198*4882a593Smuzhiyun 	{ .compatible = "nxp,pca9542", .data = &chips[pca_9542] },
199*4882a593Smuzhiyun 	{ .compatible = "nxp,pca9543", .data = &chips[pca_9543] },
200*4882a593Smuzhiyun 	{ .compatible = "nxp,pca9544", .data = &chips[pca_9544] },
201*4882a593Smuzhiyun 	{ .compatible = "nxp,pca9545", .data = &chips[pca_9545] },
202*4882a593Smuzhiyun 	{ .compatible = "nxp,pca9546", .data = &chips[pca_9546] },
203*4882a593Smuzhiyun 	{ .compatible = "nxp,pca9547", .data = &chips[pca_9547] },
204*4882a593Smuzhiyun 	{ .compatible = "nxp,pca9548", .data = &chips[pca_9548] },
205*4882a593Smuzhiyun 	{ .compatible = "nxp,pca9846", .data = &chips[pca_9846] },
206*4882a593Smuzhiyun 	{ .compatible = "nxp,pca9847", .data = &chips[pca_9847] },
207*4882a593Smuzhiyun 	{ .compatible = "nxp,pca9848", .data = &chips[pca_9848] },
208*4882a593Smuzhiyun 	{ .compatible = "nxp,pca9849", .data = &chips[pca_9849] },
209*4882a593Smuzhiyun 	{}
210*4882a593Smuzhiyun };
211*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, pca954x_of_match);
212*4882a593Smuzhiyun 
213*4882a593Smuzhiyun /* Write to mux register. Don't use i2c_transfer()/i2c_smbus_xfer()
214*4882a593Smuzhiyun    for this as they will try to lock adapter a second time */
pca954x_reg_write(struct i2c_adapter * adap,struct i2c_client * client,u8 val)215*4882a593Smuzhiyun static int pca954x_reg_write(struct i2c_adapter *adap,
216*4882a593Smuzhiyun 			     struct i2c_client *client, u8 val)
217*4882a593Smuzhiyun {
218*4882a593Smuzhiyun 	union i2c_smbus_data dummy;
219*4882a593Smuzhiyun 
220*4882a593Smuzhiyun 	return __i2c_smbus_xfer(adap, client->addr, client->flags,
221*4882a593Smuzhiyun 				I2C_SMBUS_WRITE, val,
222*4882a593Smuzhiyun 				I2C_SMBUS_BYTE, &dummy);
223*4882a593Smuzhiyun }
224*4882a593Smuzhiyun 
pca954x_regval(struct pca954x * data,u8 chan)225*4882a593Smuzhiyun static u8 pca954x_regval(struct pca954x *data, u8 chan)
226*4882a593Smuzhiyun {
227*4882a593Smuzhiyun 	/* We make switches look like muxes, not sure how to be smarter. */
228*4882a593Smuzhiyun 	if (data->chip->muxtype == pca954x_ismux)
229*4882a593Smuzhiyun 		return chan | data->chip->enable;
230*4882a593Smuzhiyun 	else
231*4882a593Smuzhiyun 		return 1 << chan;
232*4882a593Smuzhiyun }
233*4882a593Smuzhiyun 
pca954x_select_chan(struct i2c_mux_core * muxc,u32 chan)234*4882a593Smuzhiyun static int pca954x_select_chan(struct i2c_mux_core *muxc, u32 chan)
235*4882a593Smuzhiyun {
236*4882a593Smuzhiyun 	struct pca954x *data = i2c_mux_priv(muxc);
237*4882a593Smuzhiyun 	struct i2c_client *client = data->client;
238*4882a593Smuzhiyun 	u8 regval;
239*4882a593Smuzhiyun 	int ret = 0;
240*4882a593Smuzhiyun 
241*4882a593Smuzhiyun 	regval = pca954x_regval(data, chan);
242*4882a593Smuzhiyun 	/* Only select the channel if its different from the last channel */
243*4882a593Smuzhiyun 	if (data->last_chan != regval) {
244*4882a593Smuzhiyun 		ret = pca954x_reg_write(muxc->parent, client, regval);
245*4882a593Smuzhiyun 		data->last_chan = ret < 0 ? 0 : regval;
246*4882a593Smuzhiyun 	}
247*4882a593Smuzhiyun 
248*4882a593Smuzhiyun 	return ret;
249*4882a593Smuzhiyun }
250*4882a593Smuzhiyun 
pca954x_deselect_mux(struct i2c_mux_core * muxc,u32 chan)251*4882a593Smuzhiyun static int pca954x_deselect_mux(struct i2c_mux_core *muxc, u32 chan)
252*4882a593Smuzhiyun {
253*4882a593Smuzhiyun 	struct pca954x *data = i2c_mux_priv(muxc);
254*4882a593Smuzhiyun 	struct i2c_client *client = data->client;
255*4882a593Smuzhiyun 	s32 idle_state;
256*4882a593Smuzhiyun 
257*4882a593Smuzhiyun 	idle_state = READ_ONCE(data->idle_state);
258*4882a593Smuzhiyun 	if (idle_state >= 0)
259*4882a593Smuzhiyun 		/* Set the mux back to a predetermined channel */
260*4882a593Smuzhiyun 		return pca954x_select_chan(muxc, idle_state);
261*4882a593Smuzhiyun 
262*4882a593Smuzhiyun 	if (idle_state == MUX_IDLE_DISCONNECT) {
263*4882a593Smuzhiyun 		/* Deselect active channel */
264*4882a593Smuzhiyun 		data->last_chan = 0;
265*4882a593Smuzhiyun 		return pca954x_reg_write(muxc->parent, client,
266*4882a593Smuzhiyun 					 data->last_chan);
267*4882a593Smuzhiyun 	}
268*4882a593Smuzhiyun 
269*4882a593Smuzhiyun 	/* otherwise leave as-is */
270*4882a593Smuzhiyun 
271*4882a593Smuzhiyun 	return 0;
272*4882a593Smuzhiyun }
273*4882a593Smuzhiyun 
idle_state_show(struct device * dev,struct device_attribute * attr,char * buf)274*4882a593Smuzhiyun static ssize_t idle_state_show(struct device *dev,
275*4882a593Smuzhiyun 				    struct device_attribute *attr,
276*4882a593Smuzhiyun 				    char *buf)
277*4882a593Smuzhiyun {
278*4882a593Smuzhiyun 	struct i2c_client *client = to_i2c_client(dev);
279*4882a593Smuzhiyun 	struct i2c_mux_core *muxc = i2c_get_clientdata(client);
280*4882a593Smuzhiyun 	struct pca954x *data = i2c_mux_priv(muxc);
281*4882a593Smuzhiyun 
282*4882a593Smuzhiyun 	return sprintf(buf, "%d\n", READ_ONCE(data->idle_state));
283*4882a593Smuzhiyun }
284*4882a593Smuzhiyun 
idle_state_store(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)285*4882a593Smuzhiyun static ssize_t idle_state_store(struct device *dev,
286*4882a593Smuzhiyun 				struct device_attribute *attr,
287*4882a593Smuzhiyun 				const char *buf, size_t count)
288*4882a593Smuzhiyun {
289*4882a593Smuzhiyun 	struct i2c_client *client = to_i2c_client(dev);
290*4882a593Smuzhiyun 	struct i2c_mux_core *muxc = i2c_get_clientdata(client);
291*4882a593Smuzhiyun 	struct pca954x *data = i2c_mux_priv(muxc);
292*4882a593Smuzhiyun 	int val;
293*4882a593Smuzhiyun 	int ret;
294*4882a593Smuzhiyun 
295*4882a593Smuzhiyun 	ret = kstrtoint(buf, 0, &val);
296*4882a593Smuzhiyun 	if (ret < 0)
297*4882a593Smuzhiyun 		return ret;
298*4882a593Smuzhiyun 
299*4882a593Smuzhiyun 	if (val != MUX_IDLE_AS_IS && val != MUX_IDLE_DISCONNECT &&
300*4882a593Smuzhiyun 	    (val < 0 || val >= data->chip->nchans))
301*4882a593Smuzhiyun 		return -EINVAL;
302*4882a593Smuzhiyun 
303*4882a593Smuzhiyun 	i2c_lock_bus(muxc->parent, I2C_LOCK_SEGMENT);
304*4882a593Smuzhiyun 
305*4882a593Smuzhiyun 	WRITE_ONCE(data->idle_state, val);
306*4882a593Smuzhiyun 	/*
307*4882a593Smuzhiyun 	 * Set the mux into a state consistent with the new
308*4882a593Smuzhiyun 	 * idle_state.
309*4882a593Smuzhiyun 	 */
310*4882a593Smuzhiyun 	if (data->last_chan || val != MUX_IDLE_DISCONNECT)
311*4882a593Smuzhiyun 		ret = pca954x_deselect_mux(muxc, 0);
312*4882a593Smuzhiyun 
313*4882a593Smuzhiyun 	i2c_unlock_bus(muxc->parent, I2C_LOCK_SEGMENT);
314*4882a593Smuzhiyun 
315*4882a593Smuzhiyun 	return ret < 0 ? ret : count;
316*4882a593Smuzhiyun }
317*4882a593Smuzhiyun 
318*4882a593Smuzhiyun static DEVICE_ATTR_RW(idle_state);
319*4882a593Smuzhiyun 
pca954x_irq_handler(int irq,void * dev_id)320*4882a593Smuzhiyun static irqreturn_t pca954x_irq_handler(int irq, void *dev_id)
321*4882a593Smuzhiyun {
322*4882a593Smuzhiyun 	struct pca954x *data = dev_id;
323*4882a593Smuzhiyun 	unsigned long pending;
324*4882a593Smuzhiyun 	int ret, i;
325*4882a593Smuzhiyun 
326*4882a593Smuzhiyun 	ret = i2c_smbus_read_byte(data->client);
327*4882a593Smuzhiyun 	if (ret < 0)
328*4882a593Smuzhiyun 		return IRQ_NONE;
329*4882a593Smuzhiyun 
330*4882a593Smuzhiyun 	pending = (ret >> PCA954X_IRQ_OFFSET) & (BIT(data->chip->nchans) - 1);
331*4882a593Smuzhiyun 	for_each_set_bit(i, &pending, data->chip->nchans)
332*4882a593Smuzhiyun 		handle_nested_irq(irq_linear_revmap(data->irq, i));
333*4882a593Smuzhiyun 
334*4882a593Smuzhiyun 	return IRQ_RETVAL(pending);
335*4882a593Smuzhiyun }
336*4882a593Smuzhiyun 
pca954x_irq_set_type(struct irq_data * idata,unsigned int type)337*4882a593Smuzhiyun static int pca954x_irq_set_type(struct irq_data *idata, unsigned int type)
338*4882a593Smuzhiyun {
339*4882a593Smuzhiyun 	if ((type & IRQ_TYPE_SENSE_MASK) != IRQ_TYPE_LEVEL_LOW)
340*4882a593Smuzhiyun 		return -EINVAL;
341*4882a593Smuzhiyun 	return 0;
342*4882a593Smuzhiyun }
343*4882a593Smuzhiyun 
344*4882a593Smuzhiyun static struct irq_chip pca954x_irq_chip = {
345*4882a593Smuzhiyun 	.name = "i2c-mux-pca954x",
346*4882a593Smuzhiyun 	.irq_set_type = pca954x_irq_set_type,
347*4882a593Smuzhiyun };
348*4882a593Smuzhiyun 
pca954x_irq_setup(struct i2c_mux_core * muxc)349*4882a593Smuzhiyun static int pca954x_irq_setup(struct i2c_mux_core *muxc)
350*4882a593Smuzhiyun {
351*4882a593Smuzhiyun 	struct pca954x *data = i2c_mux_priv(muxc);
352*4882a593Smuzhiyun 	struct i2c_client *client = data->client;
353*4882a593Smuzhiyun 	int c, irq;
354*4882a593Smuzhiyun 
355*4882a593Smuzhiyun 	if (!data->chip->has_irq || client->irq <= 0)
356*4882a593Smuzhiyun 		return 0;
357*4882a593Smuzhiyun 
358*4882a593Smuzhiyun 	raw_spin_lock_init(&data->lock);
359*4882a593Smuzhiyun 
360*4882a593Smuzhiyun 	data->irq = irq_domain_add_linear(client->dev.of_node,
361*4882a593Smuzhiyun 					  data->chip->nchans,
362*4882a593Smuzhiyun 					  &irq_domain_simple_ops, data);
363*4882a593Smuzhiyun 	if (!data->irq)
364*4882a593Smuzhiyun 		return -ENODEV;
365*4882a593Smuzhiyun 
366*4882a593Smuzhiyun 	for (c = 0; c < data->chip->nchans; c++) {
367*4882a593Smuzhiyun 		irq = irq_create_mapping(data->irq, c);
368*4882a593Smuzhiyun 		if (!irq) {
369*4882a593Smuzhiyun 			dev_err(&client->dev, "failed irq create map\n");
370*4882a593Smuzhiyun 			return -EINVAL;
371*4882a593Smuzhiyun 		}
372*4882a593Smuzhiyun 		irq_set_chip_data(irq, data);
373*4882a593Smuzhiyun 		irq_set_chip_and_handler(irq, &pca954x_irq_chip,
374*4882a593Smuzhiyun 			handle_simple_irq);
375*4882a593Smuzhiyun 	}
376*4882a593Smuzhiyun 
377*4882a593Smuzhiyun 	return 0;
378*4882a593Smuzhiyun }
379*4882a593Smuzhiyun 
pca954x_cleanup(struct i2c_mux_core * muxc)380*4882a593Smuzhiyun static void pca954x_cleanup(struct i2c_mux_core *muxc)
381*4882a593Smuzhiyun {
382*4882a593Smuzhiyun 	struct pca954x *data = i2c_mux_priv(muxc);
383*4882a593Smuzhiyun 	int c, irq;
384*4882a593Smuzhiyun 
385*4882a593Smuzhiyun 	if (data->irq) {
386*4882a593Smuzhiyun 		for (c = 0; c < data->chip->nchans; c++) {
387*4882a593Smuzhiyun 			irq = irq_find_mapping(data->irq, c);
388*4882a593Smuzhiyun 			irq_dispose_mapping(irq);
389*4882a593Smuzhiyun 		}
390*4882a593Smuzhiyun 		irq_domain_remove(data->irq);
391*4882a593Smuzhiyun 	}
392*4882a593Smuzhiyun 	i2c_mux_del_adapters(muxc);
393*4882a593Smuzhiyun }
394*4882a593Smuzhiyun 
pca954x_init(struct i2c_client * client,struct pca954x * data)395*4882a593Smuzhiyun static int pca954x_init(struct i2c_client *client, struct pca954x *data)
396*4882a593Smuzhiyun {
397*4882a593Smuzhiyun 	int ret;
398*4882a593Smuzhiyun 
399*4882a593Smuzhiyun 	if (data->idle_state >= 0)
400*4882a593Smuzhiyun 		data->last_chan = pca954x_regval(data, data->idle_state);
401*4882a593Smuzhiyun 	else
402*4882a593Smuzhiyun 		data->last_chan = 0; /* Disconnect multiplexer */
403*4882a593Smuzhiyun 
404*4882a593Smuzhiyun 	ret = i2c_smbus_write_byte(client, data->last_chan);
405*4882a593Smuzhiyun 	if (ret < 0)
406*4882a593Smuzhiyun 		data->last_chan = 0;
407*4882a593Smuzhiyun 
408*4882a593Smuzhiyun 	return ret;
409*4882a593Smuzhiyun }
410*4882a593Smuzhiyun 
411*4882a593Smuzhiyun /*
412*4882a593Smuzhiyun  * I2C init/probing/exit functions
413*4882a593Smuzhiyun  */
pca954x_probe(struct i2c_client * client,const struct i2c_device_id * id)414*4882a593Smuzhiyun static int pca954x_probe(struct i2c_client *client,
415*4882a593Smuzhiyun 			 const struct i2c_device_id *id)
416*4882a593Smuzhiyun {
417*4882a593Smuzhiyun 	struct i2c_adapter *adap = client->adapter;
418*4882a593Smuzhiyun 	struct device *dev = &client->dev;
419*4882a593Smuzhiyun 	struct gpio_desc *gpio;
420*4882a593Smuzhiyun 	struct i2c_mux_core *muxc;
421*4882a593Smuzhiyun 	struct pca954x *data;
422*4882a593Smuzhiyun 	int num;
423*4882a593Smuzhiyun 	int ret;
424*4882a593Smuzhiyun 
425*4882a593Smuzhiyun 	if (!i2c_check_functionality(adap, I2C_FUNC_SMBUS_BYTE))
426*4882a593Smuzhiyun 		return -ENODEV;
427*4882a593Smuzhiyun 
428*4882a593Smuzhiyun 	muxc = i2c_mux_alloc(adap, dev, PCA954X_MAX_NCHANS, sizeof(*data), 0,
429*4882a593Smuzhiyun 			     pca954x_select_chan, pca954x_deselect_mux);
430*4882a593Smuzhiyun 	if (!muxc)
431*4882a593Smuzhiyun 		return -ENOMEM;
432*4882a593Smuzhiyun 	data = i2c_mux_priv(muxc);
433*4882a593Smuzhiyun 
434*4882a593Smuzhiyun 	i2c_set_clientdata(client, muxc);
435*4882a593Smuzhiyun 	data->client = client;
436*4882a593Smuzhiyun 
437*4882a593Smuzhiyun 	/* Reset the mux if a reset GPIO is specified. */
438*4882a593Smuzhiyun 	gpio = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_HIGH);
439*4882a593Smuzhiyun 	if (IS_ERR(gpio))
440*4882a593Smuzhiyun 		return PTR_ERR(gpio);
441*4882a593Smuzhiyun 	if (gpio) {
442*4882a593Smuzhiyun 		udelay(1);
443*4882a593Smuzhiyun 		gpiod_set_value_cansleep(gpio, 0);
444*4882a593Smuzhiyun 		/* Give the chip some time to recover. */
445*4882a593Smuzhiyun 		udelay(1);
446*4882a593Smuzhiyun 	}
447*4882a593Smuzhiyun 
448*4882a593Smuzhiyun 	data->chip = device_get_match_data(dev);
449*4882a593Smuzhiyun 	if (!data->chip)
450*4882a593Smuzhiyun 		data->chip = &chips[id->driver_data];
451*4882a593Smuzhiyun 
452*4882a593Smuzhiyun 	if (data->chip->id.manufacturer_id != I2C_DEVICE_ID_NONE) {
453*4882a593Smuzhiyun 		struct i2c_device_identity id;
454*4882a593Smuzhiyun 
455*4882a593Smuzhiyun 		ret = i2c_get_device_id(client, &id);
456*4882a593Smuzhiyun 		if (ret && ret != -EOPNOTSUPP)
457*4882a593Smuzhiyun 			return ret;
458*4882a593Smuzhiyun 
459*4882a593Smuzhiyun 		if (!ret &&
460*4882a593Smuzhiyun 		    (id.manufacturer_id != data->chip->id.manufacturer_id ||
461*4882a593Smuzhiyun 		     id.part_id != data->chip->id.part_id)) {
462*4882a593Smuzhiyun 			dev_warn(dev, "unexpected device id %03x-%03x-%x\n",
463*4882a593Smuzhiyun 				 id.manufacturer_id, id.part_id,
464*4882a593Smuzhiyun 				 id.die_revision);
465*4882a593Smuzhiyun 			return -ENODEV;
466*4882a593Smuzhiyun 		}
467*4882a593Smuzhiyun 	}
468*4882a593Smuzhiyun 
469*4882a593Smuzhiyun 	data->idle_state = MUX_IDLE_AS_IS;
470*4882a593Smuzhiyun 	if (device_property_read_u32(dev, "idle-state", &data->idle_state)) {
471*4882a593Smuzhiyun 		if (device_property_read_bool(dev, "i2c-mux-idle-disconnect"))
472*4882a593Smuzhiyun 			data->idle_state = MUX_IDLE_DISCONNECT;
473*4882a593Smuzhiyun 	}
474*4882a593Smuzhiyun 
475*4882a593Smuzhiyun 	/*
476*4882a593Smuzhiyun 	 * Write the mux register at addr to verify
477*4882a593Smuzhiyun 	 * that the mux is in fact present. This also
478*4882a593Smuzhiyun 	 * initializes the mux to a channel
479*4882a593Smuzhiyun 	 * or disconnected state.
480*4882a593Smuzhiyun 	 */
481*4882a593Smuzhiyun 	ret = pca954x_init(client, data);
482*4882a593Smuzhiyun 	if (ret < 0) {
483*4882a593Smuzhiyun 		dev_warn(dev, "probe failed\n");
484*4882a593Smuzhiyun 		return -ENODEV;
485*4882a593Smuzhiyun 	}
486*4882a593Smuzhiyun 
487*4882a593Smuzhiyun 	ret = pca954x_irq_setup(muxc);
488*4882a593Smuzhiyun 	if (ret)
489*4882a593Smuzhiyun 		goto fail_cleanup;
490*4882a593Smuzhiyun 
491*4882a593Smuzhiyun 	/* Now create an adapter for each channel */
492*4882a593Smuzhiyun 	for (num = 0; num < data->chip->nchans; num++) {
493*4882a593Smuzhiyun 		ret = i2c_mux_add_adapter(muxc, 0, num, 0);
494*4882a593Smuzhiyun 		if (ret)
495*4882a593Smuzhiyun 			goto fail_cleanup;
496*4882a593Smuzhiyun 	}
497*4882a593Smuzhiyun 
498*4882a593Smuzhiyun 	if (data->irq) {
499*4882a593Smuzhiyun 		ret = devm_request_threaded_irq(dev, data->client->irq,
500*4882a593Smuzhiyun 						NULL, pca954x_irq_handler,
501*4882a593Smuzhiyun 						IRQF_ONESHOT | IRQF_SHARED,
502*4882a593Smuzhiyun 						"pca954x", data);
503*4882a593Smuzhiyun 		if (ret)
504*4882a593Smuzhiyun 			goto fail_cleanup;
505*4882a593Smuzhiyun 	}
506*4882a593Smuzhiyun 
507*4882a593Smuzhiyun 	/*
508*4882a593Smuzhiyun 	 * The attr probably isn't going to be needed in most cases,
509*4882a593Smuzhiyun 	 * so don't fail completely on error.
510*4882a593Smuzhiyun 	 */
511*4882a593Smuzhiyun 	device_create_file(dev, &dev_attr_idle_state);
512*4882a593Smuzhiyun 
513*4882a593Smuzhiyun 	dev_info(dev, "registered %d multiplexed busses for I2C %s %s\n",
514*4882a593Smuzhiyun 		 num, data->chip->muxtype == pca954x_ismux
515*4882a593Smuzhiyun 				? "mux" : "switch", client->name);
516*4882a593Smuzhiyun 
517*4882a593Smuzhiyun 	return 0;
518*4882a593Smuzhiyun 
519*4882a593Smuzhiyun fail_cleanup:
520*4882a593Smuzhiyun 	pca954x_cleanup(muxc);
521*4882a593Smuzhiyun 	return ret;
522*4882a593Smuzhiyun }
523*4882a593Smuzhiyun 
pca954x_remove(struct i2c_client * client)524*4882a593Smuzhiyun static int pca954x_remove(struct i2c_client *client)
525*4882a593Smuzhiyun {
526*4882a593Smuzhiyun 	struct i2c_mux_core *muxc = i2c_get_clientdata(client);
527*4882a593Smuzhiyun 
528*4882a593Smuzhiyun 	device_remove_file(&client->dev, &dev_attr_idle_state);
529*4882a593Smuzhiyun 
530*4882a593Smuzhiyun 	pca954x_cleanup(muxc);
531*4882a593Smuzhiyun 	return 0;
532*4882a593Smuzhiyun }
533*4882a593Smuzhiyun 
534*4882a593Smuzhiyun #ifdef CONFIG_PM_SLEEP
pca954x_resume(struct device * dev)535*4882a593Smuzhiyun static int pca954x_resume(struct device *dev)
536*4882a593Smuzhiyun {
537*4882a593Smuzhiyun 	struct i2c_client *client = to_i2c_client(dev);
538*4882a593Smuzhiyun 	struct i2c_mux_core *muxc = i2c_get_clientdata(client);
539*4882a593Smuzhiyun 	struct pca954x *data = i2c_mux_priv(muxc);
540*4882a593Smuzhiyun 	int ret;
541*4882a593Smuzhiyun 
542*4882a593Smuzhiyun 	ret = pca954x_init(client, data);
543*4882a593Smuzhiyun 	if (ret < 0)
544*4882a593Smuzhiyun 		dev_err(&client->dev, "failed to verify mux presence\n");
545*4882a593Smuzhiyun 
546*4882a593Smuzhiyun 	return ret;
547*4882a593Smuzhiyun }
548*4882a593Smuzhiyun #endif
549*4882a593Smuzhiyun 
550*4882a593Smuzhiyun static SIMPLE_DEV_PM_OPS(pca954x_pm, NULL, pca954x_resume);
551*4882a593Smuzhiyun 
552*4882a593Smuzhiyun static struct i2c_driver pca954x_driver = {
553*4882a593Smuzhiyun 	.driver		= {
554*4882a593Smuzhiyun 		.name	= "pca954x",
555*4882a593Smuzhiyun 		.pm	= &pca954x_pm,
556*4882a593Smuzhiyun 		.of_match_table = pca954x_of_match,
557*4882a593Smuzhiyun 	},
558*4882a593Smuzhiyun 	.probe		= pca954x_probe,
559*4882a593Smuzhiyun 	.remove		= pca954x_remove,
560*4882a593Smuzhiyun 	.id_table	= pca954x_id,
561*4882a593Smuzhiyun };
562*4882a593Smuzhiyun 
563*4882a593Smuzhiyun module_i2c_driver(pca954x_driver);
564*4882a593Smuzhiyun 
565*4882a593Smuzhiyun MODULE_AUTHOR("Rodolfo Giometti <giometti@linux.it>");
566*4882a593Smuzhiyun MODULE_DESCRIPTION("PCA954x I2C mux/switch driver");
567*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
568