1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun i2c Support for the Apple `Hydra' Mac I/O
4*4882a593Smuzhiyun
5*4882a593Smuzhiyun Copyright (c) 1999-2004 Geert Uytterhoeven <geert@linux-m68k.org>
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun Based on i2c Support for Via Technologies 82C586B South Bridge
8*4882a593Smuzhiyun Copyright (c) 1998, 1999 Kyösti Mälkki <kmalkki@cc.hut.fi>
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun */
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun #include <linux/kernel.h>
13*4882a593Smuzhiyun #include <linux/module.h>
14*4882a593Smuzhiyun #include <linux/pci.h>
15*4882a593Smuzhiyun #include <linux/types.h>
16*4882a593Smuzhiyun #include <linux/i2c.h>
17*4882a593Smuzhiyun #include <linux/i2c-algo-bit.h>
18*4882a593Smuzhiyun #include <linux/io.h>
19*4882a593Smuzhiyun #include <asm/hydra.h>
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun #define HYDRA_CPD_PD0 0x00000001 /* CachePD lines */
23*4882a593Smuzhiyun #define HYDRA_CPD_PD1 0x00000002
24*4882a593Smuzhiyun #define HYDRA_CPD_PD2 0x00000004
25*4882a593Smuzhiyun #define HYDRA_CPD_PD3 0x00000008
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun #define HYDRA_SCLK HYDRA_CPD_PD0
28*4882a593Smuzhiyun #define HYDRA_SDAT HYDRA_CPD_PD1
29*4882a593Smuzhiyun #define HYDRA_SCLK_OE 0x00000010
30*4882a593Smuzhiyun #define HYDRA_SDAT_OE 0x00000020
31*4882a593Smuzhiyun
pdregw(void * data,u32 val)32*4882a593Smuzhiyun static inline void pdregw(void *data, u32 val)
33*4882a593Smuzhiyun {
34*4882a593Smuzhiyun struct Hydra *hydra = (struct Hydra *)data;
35*4882a593Smuzhiyun writel(val, &hydra->CachePD);
36*4882a593Smuzhiyun }
37*4882a593Smuzhiyun
pdregr(void * data)38*4882a593Smuzhiyun static inline u32 pdregr(void *data)
39*4882a593Smuzhiyun {
40*4882a593Smuzhiyun struct Hydra *hydra = (struct Hydra *)data;
41*4882a593Smuzhiyun return readl(&hydra->CachePD);
42*4882a593Smuzhiyun }
43*4882a593Smuzhiyun
hydra_bit_setscl(void * data,int state)44*4882a593Smuzhiyun static void hydra_bit_setscl(void *data, int state)
45*4882a593Smuzhiyun {
46*4882a593Smuzhiyun u32 val = pdregr(data);
47*4882a593Smuzhiyun if (state)
48*4882a593Smuzhiyun val &= ~HYDRA_SCLK_OE;
49*4882a593Smuzhiyun else {
50*4882a593Smuzhiyun val &= ~HYDRA_SCLK;
51*4882a593Smuzhiyun val |= HYDRA_SCLK_OE;
52*4882a593Smuzhiyun }
53*4882a593Smuzhiyun pdregw(data, val);
54*4882a593Smuzhiyun }
55*4882a593Smuzhiyun
hydra_bit_setsda(void * data,int state)56*4882a593Smuzhiyun static void hydra_bit_setsda(void *data, int state)
57*4882a593Smuzhiyun {
58*4882a593Smuzhiyun u32 val = pdregr(data);
59*4882a593Smuzhiyun if (state)
60*4882a593Smuzhiyun val &= ~HYDRA_SDAT_OE;
61*4882a593Smuzhiyun else {
62*4882a593Smuzhiyun val &= ~HYDRA_SDAT;
63*4882a593Smuzhiyun val |= HYDRA_SDAT_OE;
64*4882a593Smuzhiyun }
65*4882a593Smuzhiyun pdregw(data, val);
66*4882a593Smuzhiyun }
67*4882a593Smuzhiyun
hydra_bit_getscl(void * data)68*4882a593Smuzhiyun static int hydra_bit_getscl(void *data)
69*4882a593Smuzhiyun {
70*4882a593Smuzhiyun return (pdregr(data) & HYDRA_SCLK) != 0;
71*4882a593Smuzhiyun }
72*4882a593Smuzhiyun
hydra_bit_getsda(void * data)73*4882a593Smuzhiyun static int hydra_bit_getsda(void *data)
74*4882a593Smuzhiyun {
75*4882a593Smuzhiyun return (pdregr(data) & HYDRA_SDAT) != 0;
76*4882a593Smuzhiyun }
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun /* ------------------------------------------------------------------------ */
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun static struct i2c_algo_bit_data hydra_bit_data = {
81*4882a593Smuzhiyun .setsda = hydra_bit_setsda,
82*4882a593Smuzhiyun .setscl = hydra_bit_setscl,
83*4882a593Smuzhiyun .getsda = hydra_bit_getsda,
84*4882a593Smuzhiyun .getscl = hydra_bit_getscl,
85*4882a593Smuzhiyun .udelay = 5,
86*4882a593Smuzhiyun .timeout = HZ
87*4882a593Smuzhiyun };
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun static struct i2c_adapter hydra_adap = {
90*4882a593Smuzhiyun .owner = THIS_MODULE,
91*4882a593Smuzhiyun .name = "Hydra i2c",
92*4882a593Smuzhiyun .algo_data = &hydra_bit_data,
93*4882a593Smuzhiyun };
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun static const struct pci_device_id hydra_ids[] = {
96*4882a593Smuzhiyun { PCI_DEVICE(PCI_VENDOR_ID_APPLE, PCI_DEVICE_ID_APPLE_HYDRA) },
97*4882a593Smuzhiyun { 0, }
98*4882a593Smuzhiyun };
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun MODULE_DEVICE_TABLE (pci, hydra_ids);
101*4882a593Smuzhiyun
hydra_probe(struct pci_dev * dev,const struct pci_device_id * id)102*4882a593Smuzhiyun static int hydra_probe(struct pci_dev *dev,
103*4882a593Smuzhiyun const struct pci_device_id *id)
104*4882a593Smuzhiyun {
105*4882a593Smuzhiyun unsigned long base = pci_resource_start(dev, 0);
106*4882a593Smuzhiyun int res;
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun if (!request_mem_region(base+offsetof(struct Hydra, CachePD), 4,
109*4882a593Smuzhiyun hydra_adap.name))
110*4882a593Smuzhiyun return -EBUSY;
111*4882a593Smuzhiyun
112*4882a593Smuzhiyun hydra_bit_data.data = pci_ioremap_bar(dev, 0);
113*4882a593Smuzhiyun if (hydra_bit_data.data == NULL) {
114*4882a593Smuzhiyun release_mem_region(base+offsetof(struct Hydra, CachePD), 4);
115*4882a593Smuzhiyun return -ENODEV;
116*4882a593Smuzhiyun }
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun pdregw(hydra_bit_data.data, 0); /* clear SCLK_OE and SDAT_OE */
119*4882a593Smuzhiyun hydra_adap.dev.parent = &dev->dev;
120*4882a593Smuzhiyun res = i2c_bit_add_bus(&hydra_adap);
121*4882a593Smuzhiyun if (res < 0) {
122*4882a593Smuzhiyun iounmap(hydra_bit_data.data);
123*4882a593Smuzhiyun release_mem_region(base+offsetof(struct Hydra, CachePD), 4);
124*4882a593Smuzhiyun return res;
125*4882a593Smuzhiyun }
126*4882a593Smuzhiyun return 0;
127*4882a593Smuzhiyun }
128*4882a593Smuzhiyun
hydra_remove(struct pci_dev * dev)129*4882a593Smuzhiyun static void hydra_remove(struct pci_dev *dev)
130*4882a593Smuzhiyun {
131*4882a593Smuzhiyun pdregw(hydra_bit_data.data, 0); /* clear SCLK_OE and SDAT_OE */
132*4882a593Smuzhiyun i2c_del_adapter(&hydra_adap);
133*4882a593Smuzhiyun iounmap(hydra_bit_data.data);
134*4882a593Smuzhiyun release_mem_region(pci_resource_start(dev, 0)+
135*4882a593Smuzhiyun offsetof(struct Hydra, CachePD), 4);
136*4882a593Smuzhiyun }
137*4882a593Smuzhiyun
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun static struct pci_driver hydra_driver = {
140*4882a593Smuzhiyun .name = "hydra_smbus",
141*4882a593Smuzhiyun .id_table = hydra_ids,
142*4882a593Smuzhiyun .probe = hydra_probe,
143*4882a593Smuzhiyun .remove = hydra_remove,
144*4882a593Smuzhiyun };
145*4882a593Smuzhiyun
146*4882a593Smuzhiyun module_pci_driver(hydra_driver);
147*4882a593Smuzhiyun
148*4882a593Smuzhiyun MODULE_AUTHOR("Geert Uytterhoeven <geert@linux-m68k.org>");
149*4882a593Smuzhiyun MODULE_DESCRIPTION("i2c for Apple Hydra Mac I/O");
150*4882a593Smuzhiyun MODULE_LICENSE("GPL");
151