1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * AMD MP2 PCIe communication driver
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Authors: Shyam Sundar S K <Shyam-sundar.S-k@amd.com>
6*4882a593Smuzhiyun * Elie Morisse <syniurge@gmail.com>
7*4882a593Smuzhiyun */
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun #include <linux/dma-mapping.h>
10*4882a593Smuzhiyun #include <linux/interrupt.h>
11*4882a593Smuzhiyun #include <linux/module.h>
12*4882a593Smuzhiyun #include <linux/pci.h>
13*4882a593Smuzhiyun #include <linux/slab.h>
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun #include "i2c-amd-mp2.h"
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun #include <linux/io-64-nonatomic-lo-hi.h>
18*4882a593Smuzhiyun
amd_mp2_c2p_mutex_lock(struct amd_i2c_common * i2c_common)19*4882a593Smuzhiyun static void amd_mp2_c2p_mutex_lock(struct amd_i2c_common *i2c_common)
20*4882a593Smuzhiyun {
21*4882a593Smuzhiyun struct amd_mp2_dev *privdata = i2c_common->mp2_dev;
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun /* there is only one data mailbox for two i2c adapters */
24*4882a593Smuzhiyun mutex_lock(&privdata->c2p_lock);
25*4882a593Smuzhiyun privdata->c2p_lock_busid = i2c_common->bus_id;
26*4882a593Smuzhiyun }
27*4882a593Smuzhiyun
amd_mp2_c2p_mutex_unlock(struct amd_i2c_common * i2c_common)28*4882a593Smuzhiyun static void amd_mp2_c2p_mutex_unlock(struct amd_i2c_common *i2c_common)
29*4882a593Smuzhiyun {
30*4882a593Smuzhiyun struct amd_mp2_dev *privdata = i2c_common->mp2_dev;
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun if (unlikely(privdata->c2p_lock_busid != i2c_common->bus_id)) {
33*4882a593Smuzhiyun dev_warn(ndev_dev(privdata),
34*4882a593Smuzhiyun "bus %d attempting to unlock C2P locked by bus %d\n",
35*4882a593Smuzhiyun i2c_common->bus_id, privdata->c2p_lock_busid);
36*4882a593Smuzhiyun return;
37*4882a593Smuzhiyun }
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun mutex_unlock(&privdata->c2p_lock);
40*4882a593Smuzhiyun }
41*4882a593Smuzhiyun
amd_mp2_cmd(struct amd_i2c_common * i2c_common,union i2c_cmd_base i2c_cmd_base)42*4882a593Smuzhiyun static int amd_mp2_cmd(struct amd_i2c_common *i2c_common,
43*4882a593Smuzhiyun union i2c_cmd_base i2c_cmd_base)
44*4882a593Smuzhiyun {
45*4882a593Smuzhiyun struct amd_mp2_dev *privdata = i2c_common->mp2_dev;
46*4882a593Smuzhiyun void __iomem *reg;
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun i2c_common->reqcmd = i2c_cmd_base.s.i2c_cmd;
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun reg = privdata->mmio + ((i2c_cmd_base.s.bus_id == 1) ?
51*4882a593Smuzhiyun AMD_C2P_MSG1 : AMD_C2P_MSG0);
52*4882a593Smuzhiyun writel(i2c_cmd_base.ul, reg);
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun return 0;
55*4882a593Smuzhiyun }
56*4882a593Smuzhiyun
amd_mp2_bus_enable_set(struct amd_i2c_common * i2c_common,bool enable)57*4882a593Smuzhiyun int amd_mp2_bus_enable_set(struct amd_i2c_common *i2c_common, bool enable)
58*4882a593Smuzhiyun {
59*4882a593Smuzhiyun struct amd_mp2_dev *privdata = i2c_common->mp2_dev;
60*4882a593Smuzhiyun union i2c_cmd_base i2c_cmd_base;
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun dev_dbg(ndev_dev(privdata), "%s id: %d\n", __func__,
63*4882a593Smuzhiyun i2c_common->bus_id);
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun i2c_cmd_base.ul = 0;
66*4882a593Smuzhiyun i2c_cmd_base.s.i2c_cmd = enable ? i2c_enable : i2c_disable;
67*4882a593Smuzhiyun i2c_cmd_base.s.bus_id = i2c_common->bus_id;
68*4882a593Smuzhiyun i2c_cmd_base.s.i2c_speed = i2c_common->i2c_speed;
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun amd_mp2_c2p_mutex_lock(i2c_common);
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun return amd_mp2_cmd(i2c_common, i2c_cmd_base);
73*4882a593Smuzhiyun }
74*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(amd_mp2_bus_enable_set);
75*4882a593Smuzhiyun
amd_mp2_cmd_rw_fill(struct amd_i2c_common * i2c_common,union i2c_cmd_base * i2c_cmd_base,enum i2c_cmd reqcmd)76*4882a593Smuzhiyun static void amd_mp2_cmd_rw_fill(struct amd_i2c_common *i2c_common,
77*4882a593Smuzhiyun union i2c_cmd_base *i2c_cmd_base,
78*4882a593Smuzhiyun enum i2c_cmd reqcmd)
79*4882a593Smuzhiyun {
80*4882a593Smuzhiyun i2c_cmd_base->s.i2c_cmd = reqcmd;
81*4882a593Smuzhiyun i2c_cmd_base->s.bus_id = i2c_common->bus_id;
82*4882a593Smuzhiyun i2c_cmd_base->s.i2c_speed = i2c_common->i2c_speed;
83*4882a593Smuzhiyun i2c_cmd_base->s.slave_addr = i2c_common->msg->addr;
84*4882a593Smuzhiyun i2c_cmd_base->s.length = i2c_common->msg->len;
85*4882a593Smuzhiyun }
86*4882a593Smuzhiyun
amd_mp2_rw(struct amd_i2c_common * i2c_common,enum i2c_cmd reqcmd)87*4882a593Smuzhiyun int amd_mp2_rw(struct amd_i2c_common *i2c_common, enum i2c_cmd reqcmd)
88*4882a593Smuzhiyun {
89*4882a593Smuzhiyun struct amd_mp2_dev *privdata = i2c_common->mp2_dev;
90*4882a593Smuzhiyun union i2c_cmd_base i2c_cmd_base;
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun amd_mp2_cmd_rw_fill(i2c_common, &i2c_cmd_base, reqcmd);
93*4882a593Smuzhiyun amd_mp2_c2p_mutex_lock(i2c_common);
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun if (i2c_common->msg->len <= 32) {
96*4882a593Smuzhiyun i2c_cmd_base.s.mem_type = use_c2pmsg;
97*4882a593Smuzhiyun if (reqcmd == i2c_write)
98*4882a593Smuzhiyun memcpy_toio(privdata->mmio + AMD_C2P_MSG2,
99*4882a593Smuzhiyun i2c_common->msg->buf,
100*4882a593Smuzhiyun i2c_common->msg->len);
101*4882a593Smuzhiyun } else {
102*4882a593Smuzhiyun i2c_cmd_base.s.mem_type = use_dram;
103*4882a593Smuzhiyun writeq((u64)i2c_common->dma_addr,
104*4882a593Smuzhiyun privdata->mmio + AMD_C2P_MSG2);
105*4882a593Smuzhiyun }
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun return amd_mp2_cmd(i2c_common, i2c_cmd_base);
108*4882a593Smuzhiyun }
109*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(amd_mp2_rw);
110*4882a593Smuzhiyun
amd_mp2_pci_check_rw_event(struct amd_i2c_common * i2c_common)111*4882a593Smuzhiyun static void amd_mp2_pci_check_rw_event(struct amd_i2c_common *i2c_common)
112*4882a593Smuzhiyun {
113*4882a593Smuzhiyun struct amd_mp2_dev *privdata = i2c_common->mp2_dev;
114*4882a593Smuzhiyun int len = i2c_common->eventval.r.length;
115*4882a593Smuzhiyun u32 slave_addr = i2c_common->eventval.r.slave_addr;
116*4882a593Smuzhiyun bool err = false;
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun if (unlikely(len != i2c_common->msg->len)) {
119*4882a593Smuzhiyun dev_err(ndev_dev(privdata),
120*4882a593Smuzhiyun "length %d in event doesn't match buffer length %d!\n",
121*4882a593Smuzhiyun len, i2c_common->msg->len);
122*4882a593Smuzhiyun err = true;
123*4882a593Smuzhiyun }
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun if (unlikely(slave_addr != i2c_common->msg->addr)) {
126*4882a593Smuzhiyun dev_err(ndev_dev(privdata),
127*4882a593Smuzhiyun "unexpected slave address %x (expected: %x)!\n",
128*4882a593Smuzhiyun slave_addr, i2c_common->msg->addr);
129*4882a593Smuzhiyun err = true;
130*4882a593Smuzhiyun }
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun if (!err)
133*4882a593Smuzhiyun i2c_common->cmd_success = true;
134*4882a593Smuzhiyun }
135*4882a593Smuzhiyun
__amd_mp2_process_event(struct amd_i2c_common * i2c_common)136*4882a593Smuzhiyun static void __amd_mp2_process_event(struct amd_i2c_common *i2c_common)
137*4882a593Smuzhiyun {
138*4882a593Smuzhiyun struct amd_mp2_dev *privdata = i2c_common->mp2_dev;
139*4882a593Smuzhiyun enum status_type sts = i2c_common->eventval.r.status;
140*4882a593Smuzhiyun enum response_type res = i2c_common->eventval.r.response;
141*4882a593Smuzhiyun int len = i2c_common->eventval.r.length;
142*4882a593Smuzhiyun
143*4882a593Smuzhiyun if (res != command_success) {
144*4882a593Smuzhiyun if (res != command_failed)
145*4882a593Smuzhiyun dev_err(ndev_dev(privdata), "invalid response to i2c command!\n");
146*4882a593Smuzhiyun return;
147*4882a593Smuzhiyun }
148*4882a593Smuzhiyun
149*4882a593Smuzhiyun switch (i2c_common->reqcmd) {
150*4882a593Smuzhiyun case i2c_read:
151*4882a593Smuzhiyun if (sts == i2c_readcomplete_event) {
152*4882a593Smuzhiyun amd_mp2_pci_check_rw_event(i2c_common);
153*4882a593Smuzhiyun if (len <= 32)
154*4882a593Smuzhiyun memcpy_fromio(i2c_common->msg->buf,
155*4882a593Smuzhiyun privdata->mmio + AMD_C2P_MSG2,
156*4882a593Smuzhiyun len);
157*4882a593Smuzhiyun } else if (sts != i2c_readfail_event) {
158*4882a593Smuzhiyun dev_err(ndev_dev(privdata),
159*4882a593Smuzhiyun "invalid i2c status after read (%d)!\n", sts);
160*4882a593Smuzhiyun }
161*4882a593Smuzhiyun break;
162*4882a593Smuzhiyun case i2c_write:
163*4882a593Smuzhiyun if (sts == i2c_writecomplete_event)
164*4882a593Smuzhiyun amd_mp2_pci_check_rw_event(i2c_common);
165*4882a593Smuzhiyun else if (sts != i2c_writefail_event)
166*4882a593Smuzhiyun dev_err(ndev_dev(privdata),
167*4882a593Smuzhiyun "invalid i2c status after write (%d)!\n", sts);
168*4882a593Smuzhiyun break;
169*4882a593Smuzhiyun case i2c_enable:
170*4882a593Smuzhiyun if (sts == i2c_busenable_complete)
171*4882a593Smuzhiyun i2c_common->cmd_success = true;
172*4882a593Smuzhiyun else if (sts != i2c_busenable_failed)
173*4882a593Smuzhiyun dev_err(ndev_dev(privdata),
174*4882a593Smuzhiyun "invalid i2c status after bus enable (%d)!\n",
175*4882a593Smuzhiyun sts);
176*4882a593Smuzhiyun break;
177*4882a593Smuzhiyun case i2c_disable:
178*4882a593Smuzhiyun if (sts == i2c_busdisable_complete)
179*4882a593Smuzhiyun i2c_common->cmd_success = true;
180*4882a593Smuzhiyun else if (sts != i2c_busdisable_failed)
181*4882a593Smuzhiyun dev_err(ndev_dev(privdata),
182*4882a593Smuzhiyun "invalid i2c status after bus disable (%d)!\n",
183*4882a593Smuzhiyun sts);
184*4882a593Smuzhiyun break;
185*4882a593Smuzhiyun default:
186*4882a593Smuzhiyun break;
187*4882a593Smuzhiyun }
188*4882a593Smuzhiyun }
189*4882a593Smuzhiyun
amd_mp2_process_event(struct amd_i2c_common * i2c_common)190*4882a593Smuzhiyun void amd_mp2_process_event(struct amd_i2c_common *i2c_common)
191*4882a593Smuzhiyun {
192*4882a593Smuzhiyun struct amd_mp2_dev *privdata = i2c_common->mp2_dev;
193*4882a593Smuzhiyun
194*4882a593Smuzhiyun if (unlikely(i2c_common->reqcmd == i2c_none)) {
195*4882a593Smuzhiyun dev_warn(ndev_dev(privdata),
196*4882a593Smuzhiyun "received msg but no cmd was sent (bus = %d)!\n",
197*4882a593Smuzhiyun i2c_common->bus_id);
198*4882a593Smuzhiyun return;
199*4882a593Smuzhiyun }
200*4882a593Smuzhiyun
201*4882a593Smuzhiyun __amd_mp2_process_event(i2c_common);
202*4882a593Smuzhiyun
203*4882a593Smuzhiyun i2c_common->reqcmd = i2c_none;
204*4882a593Smuzhiyun amd_mp2_c2p_mutex_unlock(i2c_common);
205*4882a593Smuzhiyun }
206*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(amd_mp2_process_event);
207*4882a593Smuzhiyun
amd_mp2_irq_isr(int irq,void * dev)208*4882a593Smuzhiyun static irqreturn_t amd_mp2_irq_isr(int irq, void *dev)
209*4882a593Smuzhiyun {
210*4882a593Smuzhiyun struct amd_mp2_dev *privdata = dev;
211*4882a593Smuzhiyun struct amd_i2c_common *i2c_common;
212*4882a593Smuzhiyun u32 val;
213*4882a593Smuzhiyun unsigned int bus_id;
214*4882a593Smuzhiyun void __iomem *reg;
215*4882a593Smuzhiyun enum irqreturn ret = IRQ_NONE;
216*4882a593Smuzhiyun
217*4882a593Smuzhiyun for (bus_id = 0; bus_id < 2; bus_id++) {
218*4882a593Smuzhiyun i2c_common = privdata->busses[bus_id];
219*4882a593Smuzhiyun if (!i2c_common)
220*4882a593Smuzhiyun continue;
221*4882a593Smuzhiyun
222*4882a593Smuzhiyun reg = privdata->mmio + ((bus_id == 0) ?
223*4882a593Smuzhiyun AMD_P2C_MSG1 : AMD_P2C_MSG2);
224*4882a593Smuzhiyun val = readl(reg);
225*4882a593Smuzhiyun if (val != 0) {
226*4882a593Smuzhiyun writel(0, reg);
227*4882a593Smuzhiyun writel(0, privdata->mmio + AMD_P2C_MSG_INTEN);
228*4882a593Smuzhiyun i2c_common->eventval.ul = val;
229*4882a593Smuzhiyun i2c_common->cmd_completion(i2c_common);
230*4882a593Smuzhiyun
231*4882a593Smuzhiyun ret = IRQ_HANDLED;
232*4882a593Smuzhiyun }
233*4882a593Smuzhiyun }
234*4882a593Smuzhiyun
235*4882a593Smuzhiyun if (ret != IRQ_HANDLED) {
236*4882a593Smuzhiyun val = readl(privdata->mmio + AMD_P2C_MSG_INTEN);
237*4882a593Smuzhiyun if (val != 0) {
238*4882a593Smuzhiyun writel(0, privdata->mmio + AMD_P2C_MSG_INTEN);
239*4882a593Smuzhiyun dev_warn(ndev_dev(privdata),
240*4882a593Smuzhiyun "received irq without message\n");
241*4882a593Smuzhiyun ret = IRQ_HANDLED;
242*4882a593Smuzhiyun }
243*4882a593Smuzhiyun }
244*4882a593Smuzhiyun
245*4882a593Smuzhiyun return ret;
246*4882a593Smuzhiyun }
247*4882a593Smuzhiyun
amd_mp2_rw_timeout(struct amd_i2c_common * i2c_common)248*4882a593Smuzhiyun void amd_mp2_rw_timeout(struct amd_i2c_common *i2c_common)
249*4882a593Smuzhiyun {
250*4882a593Smuzhiyun i2c_common->reqcmd = i2c_none;
251*4882a593Smuzhiyun amd_mp2_c2p_mutex_unlock(i2c_common);
252*4882a593Smuzhiyun }
253*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(amd_mp2_rw_timeout);
254*4882a593Smuzhiyun
amd_mp2_register_cb(struct amd_i2c_common * i2c_common)255*4882a593Smuzhiyun int amd_mp2_register_cb(struct amd_i2c_common *i2c_common)
256*4882a593Smuzhiyun {
257*4882a593Smuzhiyun struct amd_mp2_dev *privdata = i2c_common->mp2_dev;
258*4882a593Smuzhiyun
259*4882a593Smuzhiyun if (i2c_common->bus_id > 1)
260*4882a593Smuzhiyun return -EINVAL;
261*4882a593Smuzhiyun
262*4882a593Smuzhiyun if (privdata->busses[i2c_common->bus_id]) {
263*4882a593Smuzhiyun dev_err(ndev_dev(privdata),
264*4882a593Smuzhiyun "Bus %d already taken!\n", i2c_common->bus_id);
265*4882a593Smuzhiyun return -EINVAL;
266*4882a593Smuzhiyun }
267*4882a593Smuzhiyun
268*4882a593Smuzhiyun privdata->busses[i2c_common->bus_id] = i2c_common;
269*4882a593Smuzhiyun
270*4882a593Smuzhiyun return 0;
271*4882a593Smuzhiyun }
272*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(amd_mp2_register_cb);
273*4882a593Smuzhiyun
amd_mp2_unregister_cb(struct amd_i2c_common * i2c_common)274*4882a593Smuzhiyun int amd_mp2_unregister_cb(struct amd_i2c_common *i2c_common)
275*4882a593Smuzhiyun {
276*4882a593Smuzhiyun struct amd_mp2_dev *privdata = i2c_common->mp2_dev;
277*4882a593Smuzhiyun
278*4882a593Smuzhiyun privdata->busses[i2c_common->bus_id] = NULL;
279*4882a593Smuzhiyun
280*4882a593Smuzhiyun return 0;
281*4882a593Smuzhiyun }
282*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(amd_mp2_unregister_cb);
283*4882a593Smuzhiyun
amd_mp2_clear_reg(struct amd_mp2_dev * privdata)284*4882a593Smuzhiyun static void amd_mp2_clear_reg(struct amd_mp2_dev *privdata)
285*4882a593Smuzhiyun {
286*4882a593Smuzhiyun int reg;
287*4882a593Smuzhiyun
288*4882a593Smuzhiyun for (reg = AMD_C2P_MSG0; reg <= AMD_C2P_MSG9; reg += 4)
289*4882a593Smuzhiyun writel(0, privdata->mmio + reg);
290*4882a593Smuzhiyun
291*4882a593Smuzhiyun for (reg = AMD_P2C_MSG1; reg <= AMD_P2C_MSG2; reg += 4)
292*4882a593Smuzhiyun writel(0, privdata->mmio + reg);
293*4882a593Smuzhiyun }
294*4882a593Smuzhiyun
amd_mp2_pci_init(struct amd_mp2_dev * privdata,struct pci_dev * pci_dev)295*4882a593Smuzhiyun static int amd_mp2_pci_init(struct amd_mp2_dev *privdata,
296*4882a593Smuzhiyun struct pci_dev *pci_dev)
297*4882a593Smuzhiyun {
298*4882a593Smuzhiyun int rc;
299*4882a593Smuzhiyun
300*4882a593Smuzhiyun pci_set_drvdata(pci_dev, privdata);
301*4882a593Smuzhiyun
302*4882a593Smuzhiyun rc = pcim_enable_device(pci_dev);
303*4882a593Smuzhiyun if (rc) {
304*4882a593Smuzhiyun dev_err(ndev_dev(privdata), "Failed to enable MP2 PCI device\n");
305*4882a593Smuzhiyun goto err_pci_enable;
306*4882a593Smuzhiyun }
307*4882a593Smuzhiyun
308*4882a593Smuzhiyun rc = pcim_iomap_regions(pci_dev, 1 << 2, pci_name(pci_dev));
309*4882a593Smuzhiyun if (rc) {
310*4882a593Smuzhiyun dev_err(ndev_dev(privdata), "I/O memory remapping failed\n");
311*4882a593Smuzhiyun goto err_pci_enable;
312*4882a593Smuzhiyun }
313*4882a593Smuzhiyun privdata->mmio = pcim_iomap_table(pci_dev)[2];
314*4882a593Smuzhiyun
315*4882a593Smuzhiyun pci_set_master(pci_dev);
316*4882a593Smuzhiyun
317*4882a593Smuzhiyun rc = pci_set_dma_mask(pci_dev, DMA_BIT_MASK(64));
318*4882a593Smuzhiyun if (rc) {
319*4882a593Smuzhiyun rc = pci_set_dma_mask(pci_dev, DMA_BIT_MASK(32));
320*4882a593Smuzhiyun if (rc)
321*4882a593Smuzhiyun goto err_dma_mask;
322*4882a593Smuzhiyun }
323*4882a593Smuzhiyun
324*4882a593Smuzhiyun /* Set up intx irq */
325*4882a593Smuzhiyun writel(0, privdata->mmio + AMD_P2C_MSG_INTEN);
326*4882a593Smuzhiyun pci_intx(pci_dev, 1);
327*4882a593Smuzhiyun rc = devm_request_irq(&pci_dev->dev, pci_dev->irq, amd_mp2_irq_isr,
328*4882a593Smuzhiyun IRQF_SHARED, dev_name(&pci_dev->dev), privdata);
329*4882a593Smuzhiyun if (rc)
330*4882a593Smuzhiyun dev_err(&pci_dev->dev, "Failure requesting irq %i: %d\n",
331*4882a593Smuzhiyun pci_dev->irq, rc);
332*4882a593Smuzhiyun
333*4882a593Smuzhiyun return rc;
334*4882a593Smuzhiyun
335*4882a593Smuzhiyun err_dma_mask:
336*4882a593Smuzhiyun pci_clear_master(pci_dev);
337*4882a593Smuzhiyun err_pci_enable:
338*4882a593Smuzhiyun pci_set_drvdata(pci_dev, NULL);
339*4882a593Smuzhiyun return rc;
340*4882a593Smuzhiyun }
341*4882a593Smuzhiyun
amd_mp2_pci_probe(struct pci_dev * pci_dev,const struct pci_device_id * id)342*4882a593Smuzhiyun static int amd_mp2_pci_probe(struct pci_dev *pci_dev,
343*4882a593Smuzhiyun const struct pci_device_id *id)
344*4882a593Smuzhiyun {
345*4882a593Smuzhiyun struct amd_mp2_dev *privdata;
346*4882a593Smuzhiyun int rc;
347*4882a593Smuzhiyun
348*4882a593Smuzhiyun privdata = devm_kzalloc(&pci_dev->dev, sizeof(*privdata), GFP_KERNEL);
349*4882a593Smuzhiyun if (!privdata)
350*4882a593Smuzhiyun return -ENOMEM;
351*4882a593Smuzhiyun
352*4882a593Smuzhiyun privdata->pci_dev = pci_dev;
353*4882a593Smuzhiyun rc = amd_mp2_pci_init(privdata, pci_dev);
354*4882a593Smuzhiyun if (rc)
355*4882a593Smuzhiyun return rc;
356*4882a593Smuzhiyun
357*4882a593Smuzhiyun mutex_init(&privdata->c2p_lock);
358*4882a593Smuzhiyun
359*4882a593Smuzhiyun pm_runtime_set_autosuspend_delay(&pci_dev->dev, 1000);
360*4882a593Smuzhiyun pm_runtime_use_autosuspend(&pci_dev->dev);
361*4882a593Smuzhiyun pm_runtime_put_autosuspend(&pci_dev->dev);
362*4882a593Smuzhiyun pm_runtime_allow(&pci_dev->dev);
363*4882a593Smuzhiyun
364*4882a593Smuzhiyun privdata->probed = true;
365*4882a593Smuzhiyun
366*4882a593Smuzhiyun dev_info(&pci_dev->dev, "MP2 device registered.\n");
367*4882a593Smuzhiyun return 0;
368*4882a593Smuzhiyun }
369*4882a593Smuzhiyun
amd_mp2_pci_remove(struct pci_dev * pci_dev)370*4882a593Smuzhiyun static void amd_mp2_pci_remove(struct pci_dev *pci_dev)
371*4882a593Smuzhiyun {
372*4882a593Smuzhiyun struct amd_mp2_dev *privdata = pci_get_drvdata(pci_dev);
373*4882a593Smuzhiyun
374*4882a593Smuzhiyun pm_runtime_forbid(&pci_dev->dev);
375*4882a593Smuzhiyun pm_runtime_get_noresume(&pci_dev->dev);
376*4882a593Smuzhiyun
377*4882a593Smuzhiyun pci_intx(pci_dev, 0);
378*4882a593Smuzhiyun pci_clear_master(pci_dev);
379*4882a593Smuzhiyun
380*4882a593Smuzhiyun amd_mp2_clear_reg(privdata);
381*4882a593Smuzhiyun }
382*4882a593Smuzhiyun
383*4882a593Smuzhiyun #ifdef CONFIG_PM
amd_mp2_pci_suspend(struct device * dev)384*4882a593Smuzhiyun static int amd_mp2_pci_suspend(struct device *dev)
385*4882a593Smuzhiyun {
386*4882a593Smuzhiyun struct pci_dev *pci_dev = to_pci_dev(dev);
387*4882a593Smuzhiyun struct amd_mp2_dev *privdata = pci_get_drvdata(pci_dev);
388*4882a593Smuzhiyun struct amd_i2c_common *i2c_common;
389*4882a593Smuzhiyun unsigned int bus_id;
390*4882a593Smuzhiyun int ret = 0;
391*4882a593Smuzhiyun
392*4882a593Smuzhiyun for (bus_id = 0; bus_id < 2; bus_id++) {
393*4882a593Smuzhiyun i2c_common = privdata->busses[bus_id];
394*4882a593Smuzhiyun if (i2c_common)
395*4882a593Smuzhiyun i2c_common->suspend(i2c_common);
396*4882a593Smuzhiyun }
397*4882a593Smuzhiyun
398*4882a593Smuzhiyun ret = pci_save_state(pci_dev);
399*4882a593Smuzhiyun if (ret) {
400*4882a593Smuzhiyun dev_err(ndev_dev(privdata),
401*4882a593Smuzhiyun "pci_save_state failed = %d\n", ret);
402*4882a593Smuzhiyun return ret;
403*4882a593Smuzhiyun }
404*4882a593Smuzhiyun
405*4882a593Smuzhiyun pci_disable_device(pci_dev);
406*4882a593Smuzhiyun return ret;
407*4882a593Smuzhiyun }
408*4882a593Smuzhiyun
amd_mp2_pci_resume(struct device * dev)409*4882a593Smuzhiyun static int amd_mp2_pci_resume(struct device *dev)
410*4882a593Smuzhiyun {
411*4882a593Smuzhiyun struct pci_dev *pci_dev = to_pci_dev(dev);
412*4882a593Smuzhiyun struct amd_mp2_dev *privdata = pci_get_drvdata(pci_dev);
413*4882a593Smuzhiyun struct amd_i2c_common *i2c_common;
414*4882a593Smuzhiyun unsigned int bus_id;
415*4882a593Smuzhiyun int ret = 0;
416*4882a593Smuzhiyun
417*4882a593Smuzhiyun pci_restore_state(pci_dev);
418*4882a593Smuzhiyun ret = pci_enable_device(pci_dev);
419*4882a593Smuzhiyun if (ret < 0) {
420*4882a593Smuzhiyun dev_err(ndev_dev(privdata),
421*4882a593Smuzhiyun "pci_enable_device failed = %d\n", ret);
422*4882a593Smuzhiyun return ret;
423*4882a593Smuzhiyun }
424*4882a593Smuzhiyun
425*4882a593Smuzhiyun for (bus_id = 0; bus_id < 2; bus_id++) {
426*4882a593Smuzhiyun i2c_common = privdata->busses[bus_id];
427*4882a593Smuzhiyun if (i2c_common) {
428*4882a593Smuzhiyun ret = i2c_common->resume(i2c_common);
429*4882a593Smuzhiyun if (ret < 0)
430*4882a593Smuzhiyun return ret;
431*4882a593Smuzhiyun }
432*4882a593Smuzhiyun }
433*4882a593Smuzhiyun
434*4882a593Smuzhiyun return ret;
435*4882a593Smuzhiyun }
436*4882a593Smuzhiyun
437*4882a593Smuzhiyun static UNIVERSAL_DEV_PM_OPS(amd_mp2_pci_pm_ops, amd_mp2_pci_suspend,
438*4882a593Smuzhiyun amd_mp2_pci_resume, NULL);
439*4882a593Smuzhiyun #endif /* CONFIG_PM */
440*4882a593Smuzhiyun
441*4882a593Smuzhiyun static const struct pci_device_id amd_mp2_pci_tbl[] = {
442*4882a593Smuzhiyun {PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_MP2)},
443*4882a593Smuzhiyun {0}
444*4882a593Smuzhiyun };
445*4882a593Smuzhiyun MODULE_DEVICE_TABLE(pci, amd_mp2_pci_tbl);
446*4882a593Smuzhiyun
447*4882a593Smuzhiyun static struct pci_driver amd_mp2_pci_driver = {
448*4882a593Smuzhiyun .name = "i2c_amd_mp2",
449*4882a593Smuzhiyun .id_table = amd_mp2_pci_tbl,
450*4882a593Smuzhiyun .probe = amd_mp2_pci_probe,
451*4882a593Smuzhiyun .remove = amd_mp2_pci_remove,
452*4882a593Smuzhiyun #ifdef CONFIG_PM
453*4882a593Smuzhiyun .driver = {
454*4882a593Smuzhiyun .pm = &amd_mp2_pci_pm_ops,
455*4882a593Smuzhiyun },
456*4882a593Smuzhiyun #endif
457*4882a593Smuzhiyun };
458*4882a593Smuzhiyun module_pci_driver(amd_mp2_pci_driver);
459*4882a593Smuzhiyun
amd_mp2_find_device(void)460*4882a593Smuzhiyun struct amd_mp2_dev *amd_mp2_find_device(void)
461*4882a593Smuzhiyun {
462*4882a593Smuzhiyun struct device *dev;
463*4882a593Smuzhiyun struct pci_dev *pci_dev;
464*4882a593Smuzhiyun
465*4882a593Smuzhiyun dev = driver_find_next_device(&amd_mp2_pci_driver.driver, NULL);
466*4882a593Smuzhiyun if (!dev)
467*4882a593Smuzhiyun return NULL;
468*4882a593Smuzhiyun
469*4882a593Smuzhiyun pci_dev = to_pci_dev(dev);
470*4882a593Smuzhiyun return (struct amd_mp2_dev *)pci_get_drvdata(pci_dev);
471*4882a593Smuzhiyun }
472*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(amd_mp2_find_device);
473*4882a593Smuzhiyun
474*4882a593Smuzhiyun MODULE_DESCRIPTION("AMD(R) PCI-E MP2 I2C Controller Driver");
475*4882a593Smuzhiyun MODULE_AUTHOR("Shyam Sundar S K <Shyam-sundar.S-k@amd.com>");
476*4882a593Smuzhiyun MODULE_AUTHOR("Elie Morisse <syniurge@gmail.com>");
477*4882a593Smuzhiyun MODULE_LICENSE("Dual BSD/GPL");
478