xref: /OK3568_Linux_fs/kernel/drivers/i2c/busses/i2c-ali15x3.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun     Copyright (c) 1999  Frodo Looijaard <frodol@dds.nl> and
4*4882a593Smuzhiyun     Philip Edelbrock <phil@netroedge.com> and
5*4882a593Smuzhiyun     Mark D. Studebaker <mdsxyz123@yahoo.com>
6*4882a593Smuzhiyun 
7*4882a593Smuzhiyun */
8*4882a593Smuzhiyun 
9*4882a593Smuzhiyun /*
10*4882a593Smuzhiyun     This is the driver for the SMB Host controller on
11*4882a593Smuzhiyun     Acer Labs Inc. (ALI) M1541 and M1543C South Bridges.
12*4882a593Smuzhiyun 
13*4882a593Smuzhiyun     The M1543C is a South bridge for desktop systems.
14*4882a593Smuzhiyun     The M1533 is a South bridge for portable systems.
15*4882a593Smuzhiyun     They are part of the following ALI chipsets:
16*4882a593Smuzhiyun        "Aladdin Pro 2": Includes the M1621 Slot 1 North bridge
17*4882a593Smuzhiyun        with AGP and 100MHz CPU Front Side bus
18*4882a593Smuzhiyun        "Aladdin V": Includes the M1541 Socket 7 North bridge
19*4882a593Smuzhiyun        with AGP and 100MHz CPU Front Side bus
20*4882a593Smuzhiyun        "Aladdin IV": Includes the M1541 Socket 7 North bridge
21*4882a593Smuzhiyun        with host bus up to 83.3 MHz.
22*4882a593Smuzhiyun     For an overview of these chips see http://www.acerlabs.com
23*4882a593Smuzhiyun 
24*4882a593Smuzhiyun     The M1533/M1543C devices appear as FOUR separate devices
25*4882a593Smuzhiyun     on the PCI bus. An output of lspci will show something similar
26*4882a593Smuzhiyun     to the following:
27*4882a593Smuzhiyun 
28*4882a593Smuzhiyun 	00:02.0 USB Controller: Acer Laboratories Inc. M5237
29*4882a593Smuzhiyun 	00:03.0 Bridge: Acer Laboratories Inc. M7101
30*4882a593Smuzhiyun 	00:07.0 ISA bridge: Acer Laboratories Inc. M1533
31*4882a593Smuzhiyun 	00:0f.0 IDE interface: Acer Laboratories Inc. M5229
32*4882a593Smuzhiyun 
33*4882a593Smuzhiyun     The SMB controller is part of the 7101 device, which is an
34*4882a593Smuzhiyun     ACPI-compliant Power Management Unit (PMU).
35*4882a593Smuzhiyun 
36*4882a593Smuzhiyun     The whole 7101 device has to be enabled for the SMB to work.
37*4882a593Smuzhiyun     You can't just enable the SMB alone.
38*4882a593Smuzhiyun     The SMB and the ACPI have separate I/O spaces.
39*4882a593Smuzhiyun     We make sure that the SMB is enabled. We leave the ACPI alone.
40*4882a593Smuzhiyun 
41*4882a593Smuzhiyun     This driver controls the SMB Host only.
42*4882a593Smuzhiyun     The SMB Slave controller on the M15X3 is not enabled.
43*4882a593Smuzhiyun 
44*4882a593Smuzhiyun     This driver does not use interrupts.
45*4882a593Smuzhiyun */
46*4882a593Smuzhiyun 
47*4882a593Smuzhiyun /* Note: we assume there can only be one ALI15X3, with one SMBus interface */
48*4882a593Smuzhiyun 
49*4882a593Smuzhiyun #include <linux/module.h>
50*4882a593Smuzhiyun #include <linux/pci.h>
51*4882a593Smuzhiyun #include <linux/kernel.h>
52*4882a593Smuzhiyun #include <linux/stddef.h>
53*4882a593Smuzhiyun #include <linux/ioport.h>
54*4882a593Smuzhiyun #include <linux/delay.h>
55*4882a593Smuzhiyun #include <linux/i2c.h>
56*4882a593Smuzhiyun #include <linux/acpi.h>
57*4882a593Smuzhiyun #include <linux/io.h>
58*4882a593Smuzhiyun 
59*4882a593Smuzhiyun /* ALI15X3 SMBus address offsets */
60*4882a593Smuzhiyun #define SMBHSTSTS	(0 + ali15x3_smba)
61*4882a593Smuzhiyun #define SMBHSTCNT	(1 + ali15x3_smba)
62*4882a593Smuzhiyun #define SMBHSTSTART	(2 + ali15x3_smba)
63*4882a593Smuzhiyun #define SMBHSTCMD	(7 + ali15x3_smba)
64*4882a593Smuzhiyun #define SMBHSTADD	(3 + ali15x3_smba)
65*4882a593Smuzhiyun #define SMBHSTDAT0	(4 + ali15x3_smba)
66*4882a593Smuzhiyun #define SMBHSTDAT1	(5 + ali15x3_smba)
67*4882a593Smuzhiyun #define SMBBLKDAT	(6 + ali15x3_smba)
68*4882a593Smuzhiyun 
69*4882a593Smuzhiyun /* PCI Address Constants */
70*4882a593Smuzhiyun #define SMBCOM		0x004
71*4882a593Smuzhiyun #define SMBBA		0x014
72*4882a593Smuzhiyun #define SMBATPC		0x05B	/* used to unlock xxxBA registers */
73*4882a593Smuzhiyun #define SMBHSTCFG	0x0E0
74*4882a593Smuzhiyun #define SMBSLVC		0x0E1
75*4882a593Smuzhiyun #define SMBCLK		0x0E2
76*4882a593Smuzhiyun #define SMBREV		0x008
77*4882a593Smuzhiyun 
78*4882a593Smuzhiyun /* Other settings */
79*4882a593Smuzhiyun #define MAX_TIMEOUT		200	/* times 1/100 sec */
80*4882a593Smuzhiyun #define ALI15X3_SMB_IOSIZE	32
81*4882a593Smuzhiyun 
82*4882a593Smuzhiyun /* this is what the Award 1004 BIOS sets them to on a ASUS P5A MB.
83*4882a593Smuzhiyun    We don't use these here. If the bases aren't set to some value we
84*4882a593Smuzhiyun    tell user to upgrade BIOS and we fail.
85*4882a593Smuzhiyun */
86*4882a593Smuzhiyun #define ALI15X3_SMB_DEFAULTBASE	0xE800
87*4882a593Smuzhiyun 
88*4882a593Smuzhiyun /* ALI15X3 address lock bits */
89*4882a593Smuzhiyun #define ALI15X3_LOCK		0x06
90*4882a593Smuzhiyun 
91*4882a593Smuzhiyun /* ALI15X3 command constants */
92*4882a593Smuzhiyun #define ALI15X3_ABORT		0x02
93*4882a593Smuzhiyun #define ALI15X3_T_OUT		0x04
94*4882a593Smuzhiyun #define ALI15X3_QUICK		0x00
95*4882a593Smuzhiyun #define ALI15X3_BYTE		0x10
96*4882a593Smuzhiyun #define ALI15X3_BYTE_DATA	0x20
97*4882a593Smuzhiyun #define ALI15X3_WORD_DATA	0x30
98*4882a593Smuzhiyun #define ALI15X3_BLOCK_DATA	0x40
99*4882a593Smuzhiyun #define ALI15X3_BLOCK_CLR	0x80
100*4882a593Smuzhiyun 
101*4882a593Smuzhiyun /* ALI15X3 status register bits */
102*4882a593Smuzhiyun #define ALI15X3_STS_IDLE	0x04
103*4882a593Smuzhiyun #define ALI15X3_STS_BUSY	0x08
104*4882a593Smuzhiyun #define ALI15X3_STS_DONE	0x10
105*4882a593Smuzhiyun #define ALI15X3_STS_DEV		0x20	/* device error */
106*4882a593Smuzhiyun #define ALI15X3_STS_COLL	0x40	/* collision or no response */
107*4882a593Smuzhiyun #define ALI15X3_STS_TERM	0x80	/* terminated by abort */
108*4882a593Smuzhiyun #define ALI15X3_STS_ERR		0xE0	/* all the bad error bits */
109*4882a593Smuzhiyun 
110*4882a593Smuzhiyun 
111*4882a593Smuzhiyun /* If force_addr is set to anything different from 0, we forcibly enable
112*4882a593Smuzhiyun    the device at the given address. */
113*4882a593Smuzhiyun static u16 force_addr;
114*4882a593Smuzhiyun module_param_hw(force_addr, ushort, ioport, 0);
115*4882a593Smuzhiyun MODULE_PARM_DESC(force_addr,
116*4882a593Smuzhiyun 		 "Initialize the base address of the i2c controller");
117*4882a593Smuzhiyun 
118*4882a593Smuzhiyun static struct pci_driver ali15x3_driver;
119*4882a593Smuzhiyun static unsigned short ali15x3_smba;
120*4882a593Smuzhiyun 
ali15x3_setup(struct pci_dev * ALI15X3_dev)121*4882a593Smuzhiyun static int ali15x3_setup(struct pci_dev *ALI15X3_dev)
122*4882a593Smuzhiyun {
123*4882a593Smuzhiyun 	u16 a;
124*4882a593Smuzhiyun 	unsigned char temp;
125*4882a593Smuzhiyun 
126*4882a593Smuzhiyun 	/* Check the following things:
127*4882a593Smuzhiyun 		- SMB I/O address is initialized
128*4882a593Smuzhiyun 		- Device is enabled
129*4882a593Smuzhiyun 		- We can use the addresses
130*4882a593Smuzhiyun 	*/
131*4882a593Smuzhiyun 
132*4882a593Smuzhiyun 	/* Unlock the register.
133*4882a593Smuzhiyun 	   The data sheet says that the address registers are read-only
134*4882a593Smuzhiyun 	   if the lock bits are 1, but in fact the address registers
135*4882a593Smuzhiyun 	   are zero unless you clear the lock bits.
136*4882a593Smuzhiyun 	*/
137*4882a593Smuzhiyun 	pci_read_config_byte(ALI15X3_dev, SMBATPC, &temp);
138*4882a593Smuzhiyun 	if (temp & ALI15X3_LOCK) {
139*4882a593Smuzhiyun 		temp &= ~ALI15X3_LOCK;
140*4882a593Smuzhiyun 		pci_write_config_byte(ALI15X3_dev, SMBATPC, temp);
141*4882a593Smuzhiyun 	}
142*4882a593Smuzhiyun 
143*4882a593Smuzhiyun 	/* Determine the address of the SMBus area */
144*4882a593Smuzhiyun 	pci_read_config_word(ALI15X3_dev, SMBBA, &ali15x3_smba);
145*4882a593Smuzhiyun 	ali15x3_smba &= (0xffff & ~(ALI15X3_SMB_IOSIZE - 1));
146*4882a593Smuzhiyun 	if (ali15x3_smba == 0 && force_addr == 0) {
147*4882a593Smuzhiyun 		dev_err(&ALI15X3_dev->dev, "ALI15X3_smb region uninitialized "
148*4882a593Smuzhiyun 			"- upgrade BIOS or use force_addr=0xaddr\n");
149*4882a593Smuzhiyun 		return -ENODEV;
150*4882a593Smuzhiyun 	}
151*4882a593Smuzhiyun 
152*4882a593Smuzhiyun 	if(force_addr)
153*4882a593Smuzhiyun 		ali15x3_smba = force_addr & ~(ALI15X3_SMB_IOSIZE - 1);
154*4882a593Smuzhiyun 
155*4882a593Smuzhiyun 	if (acpi_check_region(ali15x3_smba, ALI15X3_SMB_IOSIZE,
156*4882a593Smuzhiyun 			      ali15x3_driver.name))
157*4882a593Smuzhiyun 		return -EBUSY;
158*4882a593Smuzhiyun 
159*4882a593Smuzhiyun 	if (!request_region(ali15x3_smba, ALI15X3_SMB_IOSIZE,
160*4882a593Smuzhiyun 			    ali15x3_driver.name)) {
161*4882a593Smuzhiyun 		dev_err(&ALI15X3_dev->dev,
162*4882a593Smuzhiyun 			"ALI15X3_smb region 0x%x already in use!\n",
163*4882a593Smuzhiyun 			ali15x3_smba);
164*4882a593Smuzhiyun 		return -ENODEV;
165*4882a593Smuzhiyun 	}
166*4882a593Smuzhiyun 
167*4882a593Smuzhiyun 	if(force_addr) {
168*4882a593Smuzhiyun 		dev_info(&ALI15X3_dev->dev, "forcing ISA address 0x%04X\n",
169*4882a593Smuzhiyun 			ali15x3_smba);
170*4882a593Smuzhiyun 		if (PCIBIOS_SUCCESSFUL != pci_write_config_word(ALI15X3_dev,
171*4882a593Smuzhiyun 								SMBBA,
172*4882a593Smuzhiyun 								ali15x3_smba))
173*4882a593Smuzhiyun 			goto error;
174*4882a593Smuzhiyun 		if (PCIBIOS_SUCCESSFUL != pci_read_config_word(ALI15X3_dev,
175*4882a593Smuzhiyun 								SMBBA, &a))
176*4882a593Smuzhiyun 			goto error;
177*4882a593Smuzhiyun 		if ((a & ~(ALI15X3_SMB_IOSIZE - 1)) != ali15x3_smba) {
178*4882a593Smuzhiyun 			/* make sure it works */
179*4882a593Smuzhiyun 			dev_err(&ALI15X3_dev->dev,
180*4882a593Smuzhiyun 				"force address failed - not supported?\n");
181*4882a593Smuzhiyun 			goto error;
182*4882a593Smuzhiyun 		}
183*4882a593Smuzhiyun 	}
184*4882a593Smuzhiyun 	/* check if whole device is enabled */
185*4882a593Smuzhiyun 	pci_read_config_byte(ALI15X3_dev, SMBCOM, &temp);
186*4882a593Smuzhiyun 	if ((temp & 1) == 0) {
187*4882a593Smuzhiyun 		dev_info(&ALI15X3_dev->dev, "enabling SMBus device\n");
188*4882a593Smuzhiyun 		pci_write_config_byte(ALI15X3_dev, SMBCOM, temp | 0x01);
189*4882a593Smuzhiyun 	}
190*4882a593Smuzhiyun 
191*4882a593Smuzhiyun 	/* Is SMB Host controller enabled? */
192*4882a593Smuzhiyun 	pci_read_config_byte(ALI15X3_dev, SMBHSTCFG, &temp);
193*4882a593Smuzhiyun 	if ((temp & 1) == 0) {
194*4882a593Smuzhiyun 		dev_info(&ALI15X3_dev->dev, "enabling SMBus controller\n");
195*4882a593Smuzhiyun 		pci_write_config_byte(ALI15X3_dev, SMBHSTCFG, temp | 0x01);
196*4882a593Smuzhiyun 	}
197*4882a593Smuzhiyun 
198*4882a593Smuzhiyun 	/* set SMB clock to 74KHz as recommended in data sheet */
199*4882a593Smuzhiyun 	pci_write_config_byte(ALI15X3_dev, SMBCLK, 0x20);
200*4882a593Smuzhiyun 
201*4882a593Smuzhiyun 	/*
202*4882a593Smuzhiyun 	  The interrupt routing for SMB is set up in register 0x77 in the
203*4882a593Smuzhiyun 	  1533 ISA Bridge device, NOT in the 7101 device.
204*4882a593Smuzhiyun 	  Don't bother with finding the 1533 device and reading the register.
205*4882a593Smuzhiyun 	if ((....... & 0x0F) == 1)
206*4882a593Smuzhiyun 		dev_dbg(&ALI15X3_dev->dev, "ALI15X3 using Interrupt 9 for SMBus.\n");
207*4882a593Smuzhiyun 	*/
208*4882a593Smuzhiyun 	pci_read_config_byte(ALI15X3_dev, SMBREV, &temp);
209*4882a593Smuzhiyun 	dev_dbg(&ALI15X3_dev->dev, "SMBREV = 0x%X\n", temp);
210*4882a593Smuzhiyun 	dev_dbg(&ALI15X3_dev->dev, "iALI15X3_smba = 0x%X\n", ali15x3_smba);
211*4882a593Smuzhiyun 
212*4882a593Smuzhiyun 	return 0;
213*4882a593Smuzhiyun error:
214*4882a593Smuzhiyun 	release_region(ali15x3_smba, ALI15X3_SMB_IOSIZE);
215*4882a593Smuzhiyun 	return -ENODEV;
216*4882a593Smuzhiyun }
217*4882a593Smuzhiyun 
218*4882a593Smuzhiyun /* Another internally used function */
ali15x3_transaction(struct i2c_adapter * adap)219*4882a593Smuzhiyun static int ali15x3_transaction(struct i2c_adapter *adap)
220*4882a593Smuzhiyun {
221*4882a593Smuzhiyun 	int temp;
222*4882a593Smuzhiyun 	int result = 0;
223*4882a593Smuzhiyun 	int timeout = 0;
224*4882a593Smuzhiyun 
225*4882a593Smuzhiyun 	dev_dbg(&adap->dev, "Transaction (pre): STS=%02x, CNT=%02x, CMD=%02x, "
226*4882a593Smuzhiyun 		"ADD=%02x, DAT0=%02x, DAT1=%02x\n", inb_p(SMBHSTSTS),
227*4882a593Smuzhiyun 		inb_p(SMBHSTCNT), inb_p(SMBHSTCMD), inb_p(SMBHSTADD),
228*4882a593Smuzhiyun 		inb_p(SMBHSTDAT0), inb_p(SMBHSTDAT1));
229*4882a593Smuzhiyun 
230*4882a593Smuzhiyun 	/* get status */
231*4882a593Smuzhiyun 	temp = inb_p(SMBHSTSTS);
232*4882a593Smuzhiyun 
233*4882a593Smuzhiyun 	/* Make sure the SMBus host is ready to start transmitting */
234*4882a593Smuzhiyun 	/* Check the busy bit first */
235*4882a593Smuzhiyun 	if (temp & ALI15X3_STS_BUSY) {
236*4882a593Smuzhiyun 	/*
237*4882a593Smuzhiyun 	   If the host controller is still busy, it may have timed out in the
238*4882a593Smuzhiyun 	   previous transaction, resulting in a "SMBus Timeout" Dev.
239*4882a593Smuzhiyun 	   I've tried the following to reset a stuck busy bit.
240*4882a593Smuzhiyun 		1. Reset the controller with an ABORT command.
241*4882a593Smuzhiyun 		   (this doesn't seem to clear the controller if an external
242*4882a593Smuzhiyun 		   device is hung)
243*4882a593Smuzhiyun 		2. Reset the controller and the other SMBus devices with a
244*4882a593Smuzhiyun 		   T_OUT command.  (this clears the host busy bit if an
245*4882a593Smuzhiyun 		   external device is hung, but it comes back upon a new access
246*4882a593Smuzhiyun 		   to a device)
247*4882a593Smuzhiyun 		3. Disable and reenable the controller in SMBHSTCFG
248*4882a593Smuzhiyun 	   Worst case, nothing seems to work except power reset.
249*4882a593Smuzhiyun 	*/
250*4882a593Smuzhiyun 	/* Abort - reset the host controller */
251*4882a593Smuzhiyun 	/*
252*4882a593Smuzhiyun 	   Try resetting entire SMB bus, including other devices -
253*4882a593Smuzhiyun 	   This may not work either - it clears the BUSY bit but
254*4882a593Smuzhiyun 	   then the BUSY bit may come back on when you try and use the chip again.
255*4882a593Smuzhiyun 	   If that's the case you are stuck.
256*4882a593Smuzhiyun 	*/
257*4882a593Smuzhiyun 		dev_info(&adap->dev, "Resetting entire SMB Bus to "
258*4882a593Smuzhiyun 			"clear busy condition (%02x)\n", temp);
259*4882a593Smuzhiyun 		outb_p(ALI15X3_T_OUT, SMBHSTCNT);
260*4882a593Smuzhiyun 		temp = inb_p(SMBHSTSTS);
261*4882a593Smuzhiyun 	}
262*4882a593Smuzhiyun 
263*4882a593Smuzhiyun 	/* now check the error bits and the busy bit */
264*4882a593Smuzhiyun 	if (temp & (ALI15X3_STS_ERR | ALI15X3_STS_BUSY)) {
265*4882a593Smuzhiyun 		/* do a clear-on-write */
266*4882a593Smuzhiyun 		outb_p(0xFF, SMBHSTSTS);
267*4882a593Smuzhiyun 		if ((temp = inb_p(SMBHSTSTS)) &
268*4882a593Smuzhiyun 		    (ALI15X3_STS_ERR | ALI15X3_STS_BUSY)) {
269*4882a593Smuzhiyun 			/* this is probably going to be correctable only by a power reset
270*4882a593Smuzhiyun 			   as one of the bits now appears to be stuck */
271*4882a593Smuzhiyun 			/* This may be a bus or device with electrical problems. */
272*4882a593Smuzhiyun 			dev_err(&adap->dev, "SMBus reset failed! (0x%02x) - "
273*4882a593Smuzhiyun 				"controller or device on bus is probably hung\n",
274*4882a593Smuzhiyun 				temp);
275*4882a593Smuzhiyun 			return -EBUSY;
276*4882a593Smuzhiyun 		}
277*4882a593Smuzhiyun 	} else {
278*4882a593Smuzhiyun 		/* check and clear done bit */
279*4882a593Smuzhiyun 		if (temp & ALI15X3_STS_DONE) {
280*4882a593Smuzhiyun 			outb_p(temp, SMBHSTSTS);
281*4882a593Smuzhiyun 		}
282*4882a593Smuzhiyun 	}
283*4882a593Smuzhiyun 
284*4882a593Smuzhiyun 	/* start the transaction by writing anything to the start register */
285*4882a593Smuzhiyun 	outb_p(0xFF, SMBHSTSTART);
286*4882a593Smuzhiyun 
287*4882a593Smuzhiyun 	/* We will always wait for a fraction of a second! */
288*4882a593Smuzhiyun 	timeout = 0;
289*4882a593Smuzhiyun 	do {
290*4882a593Smuzhiyun 		msleep(1);
291*4882a593Smuzhiyun 		temp = inb_p(SMBHSTSTS);
292*4882a593Smuzhiyun 	} while ((!(temp & (ALI15X3_STS_ERR | ALI15X3_STS_DONE)))
293*4882a593Smuzhiyun 		 && (timeout++ < MAX_TIMEOUT));
294*4882a593Smuzhiyun 
295*4882a593Smuzhiyun 	/* If the SMBus is still busy, we give up */
296*4882a593Smuzhiyun 	if (timeout > MAX_TIMEOUT) {
297*4882a593Smuzhiyun 		result = -ETIMEDOUT;
298*4882a593Smuzhiyun 		dev_err(&adap->dev, "SMBus Timeout!\n");
299*4882a593Smuzhiyun 	}
300*4882a593Smuzhiyun 
301*4882a593Smuzhiyun 	if (temp & ALI15X3_STS_TERM) {
302*4882a593Smuzhiyun 		result = -EIO;
303*4882a593Smuzhiyun 		dev_dbg(&adap->dev, "Error: Failed bus transaction\n");
304*4882a593Smuzhiyun 	}
305*4882a593Smuzhiyun 
306*4882a593Smuzhiyun 	/*
307*4882a593Smuzhiyun 	  Unfortunately the ALI SMB controller maps "no response" and "bus
308*4882a593Smuzhiyun 	  collision" into a single bit. No response is the usual case so don't
309*4882a593Smuzhiyun 	  do a printk.
310*4882a593Smuzhiyun 	  This means that bus collisions go unreported.
311*4882a593Smuzhiyun 	*/
312*4882a593Smuzhiyun 	if (temp & ALI15X3_STS_COLL) {
313*4882a593Smuzhiyun 		result = -ENXIO;
314*4882a593Smuzhiyun 		dev_dbg(&adap->dev,
315*4882a593Smuzhiyun 			"Error: no response or bus collision ADD=%02x\n",
316*4882a593Smuzhiyun 			inb_p(SMBHSTADD));
317*4882a593Smuzhiyun 	}
318*4882a593Smuzhiyun 
319*4882a593Smuzhiyun 	/* haven't ever seen this */
320*4882a593Smuzhiyun 	if (temp & ALI15X3_STS_DEV) {
321*4882a593Smuzhiyun 		result = -EIO;
322*4882a593Smuzhiyun 		dev_err(&adap->dev, "Error: device error\n");
323*4882a593Smuzhiyun 	}
324*4882a593Smuzhiyun 	dev_dbg(&adap->dev, "Transaction (post): STS=%02x, CNT=%02x, CMD=%02x, "
325*4882a593Smuzhiyun 		"ADD=%02x, DAT0=%02x, DAT1=%02x\n", inb_p(SMBHSTSTS),
326*4882a593Smuzhiyun 		inb_p(SMBHSTCNT), inb_p(SMBHSTCMD), inb_p(SMBHSTADD),
327*4882a593Smuzhiyun 		inb_p(SMBHSTDAT0), inb_p(SMBHSTDAT1));
328*4882a593Smuzhiyun 	return result;
329*4882a593Smuzhiyun }
330*4882a593Smuzhiyun 
331*4882a593Smuzhiyun /* Return negative errno on error. */
ali15x3_access(struct i2c_adapter * adap,u16 addr,unsigned short flags,char read_write,u8 command,int size,union i2c_smbus_data * data)332*4882a593Smuzhiyun static s32 ali15x3_access(struct i2c_adapter * adap, u16 addr,
333*4882a593Smuzhiyun 		   unsigned short flags, char read_write, u8 command,
334*4882a593Smuzhiyun 		   int size, union i2c_smbus_data * data)
335*4882a593Smuzhiyun {
336*4882a593Smuzhiyun 	int i, len;
337*4882a593Smuzhiyun 	int temp;
338*4882a593Smuzhiyun 	int timeout;
339*4882a593Smuzhiyun 
340*4882a593Smuzhiyun 	/* clear all the bits (clear-on-write) */
341*4882a593Smuzhiyun 	outb_p(0xFF, SMBHSTSTS);
342*4882a593Smuzhiyun 	/* make sure SMBus is idle */
343*4882a593Smuzhiyun 	temp = inb_p(SMBHSTSTS);
344*4882a593Smuzhiyun 	for (timeout = 0;
345*4882a593Smuzhiyun 	     (timeout < MAX_TIMEOUT) && !(temp & ALI15X3_STS_IDLE);
346*4882a593Smuzhiyun 	     timeout++) {
347*4882a593Smuzhiyun 		msleep(1);
348*4882a593Smuzhiyun 		temp = inb_p(SMBHSTSTS);
349*4882a593Smuzhiyun 	}
350*4882a593Smuzhiyun 	if (timeout >= MAX_TIMEOUT) {
351*4882a593Smuzhiyun 		dev_err(&adap->dev, "Idle wait Timeout! STS=0x%02x\n", temp);
352*4882a593Smuzhiyun 	}
353*4882a593Smuzhiyun 
354*4882a593Smuzhiyun 	switch (size) {
355*4882a593Smuzhiyun 	case I2C_SMBUS_QUICK:
356*4882a593Smuzhiyun 		outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
357*4882a593Smuzhiyun 		       SMBHSTADD);
358*4882a593Smuzhiyun 		size = ALI15X3_QUICK;
359*4882a593Smuzhiyun 		break;
360*4882a593Smuzhiyun 	case I2C_SMBUS_BYTE:
361*4882a593Smuzhiyun 		outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
362*4882a593Smuzhiyun 		       SMBHSTADD);
363*4882a593Smuzhiyun 		if (read_write == I2C_SMBUS_WRITE)
364*4882a593Smuzhiyun 			outb_p(command, SMBHSTCMD);
365*4882a593Smuzhiyun 		size = ALI15X3_BYTE;
366*4882a593Smuzhiyun 		break;
367*4882a593Smuzhiyun 	case I2C_SMBUS_BYTE_DATA:
368*4882a593Smuzhiyun 		outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
369*4882a593Smuzhiyun 		       SMBHSTADD);
370*4882a593Smuzhiyun 		outb_p(command, SMBHSTCMD);
371*4882a593Smuzhiyun 		if (read_write == I2C_SMBUS_WRITE)
372*4882a593Smuzhiyun 			outb_p(data->byte, SMBHSTDAT0);
373*4882a593Smuzhiyun 		size = ALI15X3_BYTE_DATA;
374*4882a593Smuzhiyun 		break;
375*4882a593Smuzhiyun 	case I2C_SMBUS_WORD_DATA:
376*4882a593Smuzhiyun 		outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
377*4882a593Smuzhiyun 		       SMBHSTADD);
378*4882a593Smuzhiyun 		outb_p(command, SMBHSTCMD);
379*4882a593Smuzhiyun 		if (read_write == I2C_SMBUS_WRITE) {
380*4882a593Smuzhiyun 			outb_p(data->word & 0xff, SMBHSTDAT0);
381*4882a593Smuzhiyun 			outb_p((data->word & 0xff00) >> 8, SMBHSTDAT1);
382*4882a593Smuzhiyun 		}
383*4882a593Smuzhiyun 		size = ALI15X3_WORD_DATA;
384*4882a593Smuzhiyun 		break;
385*4882a593Smuzhiyun 	case I2C_SMBUS_BLOCK_DATA:
386*4882a593Smuzhiyun 		outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
387*4882a593Smuzhiyun 		       SMBHSTADD);
388*4882a593Smuzhiyun 		outb_p(command, SMBHSTCMD);
389*4882a593Smuzhiyun 		if (read_write == I2C_SMBUS_WRITE) {
390*4882a593Smuzhiyun 			len = data->block[0];
391*4882a593Smuzhiyun 			if (len < 0) {
392*4882a593Smuzhiyun 				len = 0;
393*4882a593Smuzhiyun 				data->block[0] = len;
394*4882a593Smuzhiyun 			}
395*4882a593Smuzhiyun 			if (len > 32) {
396*4882a593Smuzhiyun 				len = 32;
397*4882a593Smuzhiyun 				data->block[0] = len;
398*4882a593Smuzhiyun 			}
399*4882a593Smuzhiyun 			outb_p(len, SMBHSTDAT0);
400*4882a593Smuzhiyun 			/* Reset SMBBLKDAT */
401*4882a593Smuzhiyun 			outb_p(inb_p(SMBHSTCNT) | ALI15X3_BLOCK_CLR, SMBHSTCNT);
402*4882a593Smuzhiyun 			for (i = 1; i <= len; i++)
403*4882a593Smuzhiyun 				outb_p(data->block[i], SMBBLKDAT);
404*4882a593Smuzhiyun 		}
405*4882a593Smuzhiyun 		size = ALI15X3_BLOCK_DATA;
406*4882a593Smuzhiyun 		break;
407*4882a593Smuzhiyun 	default:
408*4882a593Smuzhiyun 		dev_warn(&adap->dev, "Unsupported transaction %d\n", size);
409*4882a593Smuzhiyun 		return -EOPNOTSUPP;
410*4882a593Smuzhiyun 	}
411*4882a593Smuzhiyun 
412*4882a593Smuzhiyun 	outb_p(size, SMBHSTCNT);	/* output command */
413*4882a593Smuzhiyun 
414*4882a593Smuzhiyun 	temp = ali15x3_transaction(adap);
415*4882a593Smuzhiyun 	if (temp)
416*4882a593Smuzhiyun 		return temp;
417*4882a593Smuzhiyun 
418*4882a593Smuzhiyun 	if ((read_write == I2C_SMBUS_WRITE) || (size == ALI15X3_QUICK))
419*4882a593Smuzhiyun 		return 0;
420*4882a593Smuzhiyun 
421*4882a593Smuzhiyun 
422*4882a593Smuzhiyun 	switch (size) {
423*4882a593Smuzhiyun 	case ALI15X3_BYTE:	/* Result put in SMBHSTDAT0 */
424*4882a593Smuzhiyun 		data->byte = inb_p(SMBHSTDAT0);
425*4882a593Smuzhiyun 		break;
426*4882a593Smuzhiyun 	case ALI15X3_BYTE_DATA:
427*4882a593Smuzhiyun 		data->byte = inb_p(SMBHSTDAT0);
428*4882a593Smuzhiyun 		break;
429*4882a593Smuzhiyun 	case ALI15X3_WORD_DATA:
430*4882a593Smuzhiyun 		data->word = inb_p(SMBHSTDAT0) + (inb_p(SMBHSTDAT1) << 8);
431*4882a593Smuzhiyun 		break;
432*4882a593Smuzhiyun 	case ALI15X3_BLOCK_DATA:
433*4882a593Smuzhiyun 		len = inb_p(SMBHSTDAT0);
434*4882a593Smuzhiyun 		if (len > 32)
435*4882a593Smuzhiyun 			len = 32;
436*4882a593Smuzhiyun 		data->block[0] = len;
437*4882a593Smuzhiyun 		/* Reset SMBBLKDAT */
438*4882a593Smuzhiyun 		outb_p(inb_p(SMBHSTCNT) | ALI15X3_BLOCK_CLR, SMBHSTCNT);
439*4882a593Smuzhiyun 		for (i = 1; i <= data->block[0]; i++) {
440*4882a593Smuzhiyun 			data->block[i] = inb_p(SMBBLKDAT);
441*4882a593Smuzhiyun 			dev_dbg(&adap->dev, "Blk: len=%d, i=%d, data=%02x\n",
442*4882a593Smuzhiyun 				len, i, data->block[i]);
443*4882a593Smuzhiyun 		}
444*4882a593Smuzhiyun 		break;
445*4882a593Smuzhiyun 	}
446*4882a593Smuzhiyun 	return 0;
447*4882a593Smuzhiyun }
448*4882a593Smuzhiyun 
ali15x3_func(struct i2c_adapter * adapter)449*4882a593Smuzhiyun static u32 ali15x3_func(struct i2c_adapter *adapter)
450*4882a593Smuzhiyun {
451*4882a593Smuzhiyun 	return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
452*4882a593Smuzhiyun 	    I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
453*4882a593Smuzhiyun 	    I2C_FUNC_SMBUS_BLOCK_DATA;
454*4882a593Smuzhiyun }
455*4882a593Smuzhiyun 
456*4882a593Smuzhiyun static const struct i2c_algorithm smbus_algorithm = {
457*4882a593Smuzhiyun 	.smbus_xfer	= ali15x3_access,
458*4882a593Smuzhiyun 	.functionality	= ali15x3_func,
459*4882a593Smuzhiyun };
460*4882a593Smuzhiyun 
461*4882a593Smuzhiyun static struct i2c_adapter ali15x3_adapter = {
462*4882a593Smuzhiyun 	.owner		= THIS_MODULE,
463*4882a593Smuzhiyun 	.class          = I2C_CLASS_HWMON | I2C_CLASS_SPD,
464*4882a593Smuzhiyun 	.algo		= &smbus_algorithm,
465*4882a593Smuzhiyun };
466*4882a593Smuzhiyun 
467*4882a593Smuzhiyun static const struct pci_device_id ali15x3_ids[] = {
468*4882a593Smuzhiyun 	{ PCI_DEVICE(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M7101) },
469*4882a593Smuzhiyun 	{ 0, }
470*4882a593Smuzhiyun };
471*4882a593Smuzhiyun 
472*4882a593Smuzhiyun MODULE_DEVICE_TABLE (pci, ali15x3_ids);
473*4882a593Smuzhiyun 
ali15x3_probe(struct pci_dev * dev,const struct pci_device_id * id)474*4882a593Smuzhiyun static int ali15x3_probe(struct pci_dev *dev, const struct pci_device_id *id)
475*4882a593Smuzhiyun {
476*4882a593Smuzhiyun 	if (ali15x3_setup(dev)) {
477*4882a593Smuzhiyun 		dev_err(&dev->dev,
478*4882a593Smuzhiyun 			"ALI15X3 not detected, module not inserted.\n");
479*4882a593Smuzhiyun 		return -ENODEV;
480*4882a593Smuzhiyun 	}
481*4882a593Smuzhiyun 
482*4882a593Smuzhiyun 	/* set up the sysfs linkage to our parent device */
483*4882a593Smuzhiyun 	ali15x3_adapter.dev.parent = &dev->dev;
484*4882a593Smuzhiyun 
485*4882a593Smuzhiyun 	snprintf(ali15x3_adapter.name, sizeof(ali15x3_adapter.name),
486*4882a593Smuzhiyun 		"SMBus ALI15X3 adapter at %04x", ali15x3_smba);
487*4882a593Smuzhiyun 	return i2c_add_adapter(&ali15x3_adapter);
488*4882a593Smuzhiyun }
489*4882a593Smuzhiyun 
ali15x3_remove(struct pci_dev * dev)490*4882a593Smuzhiyun static void ali15x3_remove(struct pci_dev *dev)
491*4882a593Smuzhiyun {
492*4882a593Smuzhiyun 	i2c_del_adapter(&ali15x3_adapter);
493*4882a593Smuzhiyun 	release_region(ali15x3_smba, ALI15X3_SMB_IOSIZE);
494*4882a593Smuzhiyun }
495*4882a593Smuzhiyun 
496*4882a593Smuzhiyun static struct pci_driver ali15x3_driver = {
497*4882a593Smuzhiyun 	.name		= "ali15x3_smbus",
498*4882a593Smuzhiyun 	.id_table	= ali15x3_ids,
499*4882a593Smuzhiyun 	.probe		= ali15x3_probe,
500*4882a593Smuzhiyun 	.remove		= ali15x3_remove,
501*4882a593Smuzhiyun };
502*4882a593Smuzhiyun 
503*4882a593Smuzhiyun module_pci_driver(ali15x3_driver);
504*4882a593Smuzhiyun 
505*4882a593Smuzhiyun MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>");
506*4882a593Smuzhiyun MODULE_AUTHOR("Philip Edelbrock <phil@netroedge.com>");
507*4882a593Smuzhiyun MODULE_AUTHOR("Mark D. Studebaker <mdsxyz123@yahoo.com>");
508*4882a593Smuzhiyun MODULE_DESCRIPTION("ALI15X3 SMBus driver");
509*4882a593Smuzhiyun MODULE_LICENSE("GPL");
510