1*4882a593Smuzhiyun# SPDX-License-Identifier: GPL-2.0 2*4882a593Smuzhiyun# 3*4882a593Smuzhiyun# Generic HWSPINLOCK framework 4*4882a593Smuzhiyun# 5*4882a593Smuzhiyun 6*4882a593Smuzhiyunmenuconfig HWSPINLOCK 7*4882a593Smuzhiyun bool "Hardware Spinlock drivers" 8*4882a593Smuzhiyun 9*4882a593Smuzhiyunif HWSPINLOCK 10*4882a593Smuzhiyun 11*4882a593Smuzhiyunconfig HWSPINLOCK_OMAP 12*4882a593Smuzhiyun tristate "OMAP Hardware Spinlock device" 13*4882a593Smuzhiyun depends on ARCH_OMAP4 || SOC_OMAP5 || SOC_DRA7XX || SOC_AM33XX || SOC_AM43XX || ARCH_K3 || COMPILE_TEST 14*4882a593Smuzhiyun help 15*4882a593Smuzhiyun Say y here to support the OMAP Hardware Spinlock device (firstly 16*4882a593Smuzhiyun introduced in OMAP4). 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun If unsure, say N. 19*4882a593Smuzhiyun 20*4882a593Smuzhiyunconfig HWSPINLOCK_QCOM 21*4882a593Smuzhiyun tristate "Qualcomm Hardware Spinlock device" 22*4882a593Smuzhiyun depends on ARCH_QCOM || COMPILE_TEST 23*4882a593Smuzhiyun select MFD_SYSCON 24*4882a593Smuzhiyun help 25*4882a593Smuzhiyun Say y here to support the Qualcomm Hardware Mutex functionality, which 26*4882a593Smuzhiyun provides a synchronisation mechanism for the various processors on 27*4882a593Smuzhiyun the SoC. 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun If unsure, say N. 30*4882a593Smuzhiyun 31*4882a593Smuzhiyunconfig HWSPINLOCK_ROCKCHIP 32*4882a593Smuzhiyun tristate "Rockchip Hardware Spinlock device" 33*4882a593Smuzhiyun depends on ARCH_ROCKCHIP || COMPILE_TEST 34*4882a593Smuzhiyun help 35*4882a593Smuzhiyun Say y here to support the Rockchip Hardware Spinlock device, which 36*4882a593Smuzhiyun provides a synchronisation mechanism for the various processors 37*4882a593Smuzhiyun on the SoC. 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun If unsure, say N. 40*4882a593Smuzhiyun 41*4882a593Smuzhiyunconfig HWSPINLOCK_SIRF 42*4882a593Smuzhiyun tristate "SIRF Hardware Spinlock device" 43*4882a593Smuzhiyun depends on ARCH_SIRF || COMPILE_TEST 44*4882a593Smuzhiyun help 45*4882a593Smuzhiyun Say y here to support the SIRF Hardware Spinlock device, which 46*4882a593Smuzhiyun provides a synchronisation mechanism for the various processors 47*4882a593Smuzhiyun on the SoC. 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun It's safe to say n here if you're not interested in SIRF hardware 50*4882a593Smuzhiyun spinlock or just want a bare minimum kernel. 51*4882a593Smuzhiyun 52*4882a593Smuzhiyunconfig HWSPINLOCK_SPRD 53*4882a593Smuzhiyun tristate "SPRD Hardware Spinlock device" 54*4882a593Smuzhiyun depends on ARCH_SPRD || COMPILE_TEST 55*4882a593Smuzhiyun help 56*4882a593Smuzhiyun Say y here to support the SPRD Hardware Spinlock device. 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun If unsure, say N. 59*4882a593Smuzhiyun 60*4882a593Smuzhiyunconfig HWSPINLOCK_STM32 61*4882a593Smuzhiyun tristate "STM32 Hardware Spinlock device" 62*4882a593Smuzhiyun depends on MACH_STM32MP157 || COMPILE_TEST 63*4882a593Smuzhiyun help 64*4882a593Smuzhiyun Say y here to support the STM32 Hardware Spinlock device. 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun If unsure, say N. 67*4882a593Smuzhiyun 68*4882a593Smuzhiyunconfig HSEM_U8500 69*4882a593Smuzhiyun tristate "STE Hardware Semaphore functionality" 70*4882a593Smuzhiyun depends on ARCH_U8500 || COMPILE_TEST 71*4882a593Smuzhiyun help 72*4882a593Smuzhiyun Say y here to support the STE Hardware Semaphore functionality, which 73*4882a593Smuzhiyun provides a synchronisation mechanism for the various processor on the 74*4882a593Smuzhiyun SoC. 75*4882a593Smuzhiyun 76*4882a593Smuzhiyun If unsure, say N. 77*4882a593Smuzhiyun 78*4882a593Smuzhiyunendif # HWSPINLOCK 79