1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Hardware monitoring driver for ZL6100 and compatibles
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (c) 2011 Ericsson AB.
6*4882a593Smuzhiyun * Copyright (c) 2012 Guenter Roeck
7*4882a593Smuzhiyun */
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun #include <linux/bitops.h>
10*4882a593Smuzhiyun #include <linux/kernel.h>
11*4882a593Smuzhiyun #include <linux/module.h>
12*4882a593Smuzhiyun #include <linux/init.h>
13*4882a593Smuzhiyun #include <linux/err.h>
14*4882a593Smuzhiyun #include <linux/slab.h>
15*4882a593Smuzhiyun #include <linux/i2c.h>
16*4882a593Smuzhiyun #include <linux/ktime.h>
17*4882a593Smuzhiyun #include <linux/delay.h>
18*4882a593Smuzhiyun #include "pmbus.h"
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun enum chips { zl2004, zl2005, zl2006, zl2008, zl2105, zl2106, zl6100, zl6105,
21*4882a593Smuzhiyun zl9101, zl9117 };
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun struct zl6100_data {
24*4882a593Smuzhiyun int id;
25*4882a593Smuzhiyun ktime_t access; /* chip access time */
26*4882a593Smuzhiyun int delay; /* Delay between chip accesses in uS */
27*4882a593Smuzhiyun struct pmbus_driver_info info;
28*4882a593Smuzhiyun };
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun #define to_zl6100_data(x) container_of(x, struct zl6100_data, info)
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun #define ZL6100_MFR_CONFIG 0xd0
33*4882a593Smuzhiyun #define ZL6100_DEVICE_ID 0xe4
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun #define ZL6100_MFR_XTEMP_ENABLE BIT(7)
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun #define MFR_VMON_OV_FAULT_LIMIT 0xf5
38*4882a593Smuzhiyun #define MFR_VMON_UV_FAULT_LIMIT 0xf6
39*4882a593Smuzhiyun #define MFR_READ_VMON 0xf7
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun #define VMON_UV_WARNING BIT(5)
42*4882a593Smuzhiyun #define VMON_OV_WARNING BIT(4)
43*4882a593Smuzhiyun #define VMON_UV_FAULT BIT(1)
44*4882a593Smuzhiyun #define VMON_OV_FAULT BIT(0)
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun #define ZL6100_WAIT_TIME 1000 /* uS */
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun static ushort delay = ZL6100_WAIT_TIME;
49*4882a593Smuzhiyun module_param(delay, ushort, 0644);
50*4882a593Smuzhiyun MODULE_PARM_DESC(delay, "Delay between chip accesses in uS");
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun /* Convert linear sensor value to milli-units */
zl6100_l2d(s16 l)53*4882a593Smuzhiyun static long zl6100_l2d(s16 l)
54*4882a593Smuzhiyun {
55*4882a593Smuzhiyun s16 exponent;
56*4882a593Smuzhiyun s32 mantissa;
57*4882a593Smuzhiyun long val;
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun exponent = l >> 11;
60*4882a593Smuzhiyun mantissa = ((s16)((l & 0x7ff) << 5)) >> 5;
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun val = mantissa;
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun /* scale result to milli-units */
65*4882a593Smuzhiyun val = val * 1000L;
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun if (exponent >= 0)
68*4882a593Smuzhiyun val <<= exponent;
69*4882a593Smuzhiyun else
70*4882a593Smuzhiyun val >>= -exponent;
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun return val;
73*4882a593Smuzhiyun }
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun #define MAX_MANTISSA (1023 * 1000)
76*4882a593Smuzhiyun #define MIN_MANTISSA (511 * 1000)
77*4882a593Smuzhiyun
zl6100_d2l(long val)78*4882a593Smuzhiyun static u16 zl6100_d2l(long val)
79*4882a593Smuzhiyun {
80*4882a593Smuzhiyun s16 exponent = 0, mantissa;
81*4882a593Smuzhiyun bool negative = false;
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun /* simple case */
84*4882a593Smuzhiyun if (val == 0)
85*4882a593Smuzhiyun return 0;
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun if (val < 0) {
88*4882a593Smuzhiyun negative = true;
89*4882a593Smuzhiyun val = -val;
90*4882a593Smuzhiyun }
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun /* Reduce large mantissa until it fits into 10 bit */
93*4882a593Smuzhiyun while (val >= MAX_MANTISSA && exponent < 15) {
94*4882a593Smuzhiyun exponent++;
95*4882a593Smuzhiyun val >>= 1;
96*4882a593Smuzhiyun }
97*4882a593Smuzhiyun /* Increase small mantissa to improve precision */
98*4882a593Smuzhiyun while (val < MIN_MANTISSA && exponent > -15) {
99*4882a593Smuzhiyun exponent--;
100*4882a593Smuzhiyun val <<= 1;
101*4882a593Smuzhiyun }
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun /* Convert mantissa from milli-units to units */
104*4882a593Smuzhiyun mantissa = DIV_ROUND_CLOSEST(val, 1000);
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun /* Ensure that resulting number is within range */
107*4882a593Smuzhiyun if (mantissa > 0x3ff)
108*4882a593Smuzhiyun mantissa = 0x3ff;
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun /* restore sign */
111*4882a593Smuzhiyun if (negative)
112*4882a593Smuzhiyun mantissa = -mantissa;
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun /* Convert to 5 bit exponent, 11 bit mantissa */
115*4882a593Smuzhiyun return (mantissa & 0x7ff) | ((exponent << 11) & 0xf800);
116*4882a593Smuzhiyun }
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun /* Some chips need a delay between accesses */
zl6100_wait(const struct zl6100_data * data)119*4882a593Smuzhiyun static inline void zl6100_wait(const struct zl6100_data *data)
120*4882a593Smuzhiyun {
121*4882a593Smuzhiyun if (data->delay) {
122*4882a593Smuzhiyun s64 delta = ktime_us_delta(ktime_get(), data->access);
123*4882a593Smuzhiyun if (delta < data->delay)
124*4882a593Smuzhiyun udelay(data->delay - delta);
125*4882a593Smuzhiyun }
126*4882a593Smuzhiyun }
127*4882a593Smuzhiyun
zl6100_read_word_data(struct i2c_client * client,int page,int phase,int reg)128*4882a593Smuzhiyun static int zl6100_read_word_data(struct i2c_client *client, int page,
129*4882a593Smuzhiyun int phase, int reg)
130*4882a593Smuzhiyun {
131*4882a593Smuzhiyun const struct pmbus_driver_info *info = pmbus_get_driver_info(client);
132*4882a593Smuzhiyun struct zl6100_data *data = to_zl6100_data(info);
133*4882a593Smuzhiyun int ret, vreg;
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun if (page > 0)
136*4882a593Smuzhiyun return -ENXIO;
137*4882a593Smuzhiyun
138*4882a593Smuzhiyun if (data->id == zl2005) {
139*4882a593Smuzhiyun /*
140*4882a593Smuzhiyun * Limit register detection is not reliable on ZL2005.
141*4882a593Smuzhiyun * Make sure registers are not erroneously detected.
142*4882a593Smuzhiyun */
143*4882a593Smuzhiyun switch (reg) {
144*4882a593Smuzhiyun case PMBUS_VOUT_OV_WARN_LIMIT:
145*4882a593Smuzhiyun case PMBUS_VOUT_UV_WARN_LIMIT:
146*4882a593Smuzhiyun case PMBUS_IOUT_OC_WARN_LIMIT:
147*4882a593Smuzhiyun return -ENXIO;
148*4882a593Smuzhiyun }
149*4882a593Smuzhiyun }
150*4882a593Smuzhiyun
151*4882a593Smuzhiyun switch (reg) {
152*4882a593Smuzhiyun case PMBUS_VIRT_READ_VMON:
153*4882a593Smuzhiyun vreg = MFR_READ_VMON;
154*4882a593Smuzhiyun break;
155*4882a593Smuzhiyun case PMBUS_VIRT_VMON_OV_WARN_LIMIT:
156*4882a593Smuzhiyun case PMBUS_VIRT_VMON_OV_FAULT_LIMIT:
157*4882a593Smuzhiyun vreg = MFR_VMON_OV_FAULT_LIMIT;
158*4882a593Smuzhiyun break;
159*4882a593Smuzhiyun case PMBUS_VIRT_VMON_UV_WARN_LIMIT:
160*4882a593Smuzhiyun case PMBUS_VIRT_VMON_UV_FAULT_LIMIT:
161*4882a593Smuzhiyun vreg = MFR_VMON_UV_FAULT_LIMIT;
162*4882a593Smuzhiyun break;
163*4882a593Smuzhiyun default:
164*4882a593Smuzhiyun if (reg >= PMBUS_VIRT_BASE)
165*4882a593Smuzhiyun return -ENXIO;
166*4882a593Smuzhiyun vreg = reg;
167*4882a593Smuzhiyun break;
168*4882a593Smuzhiyun }
169*4882a593Smuzhiyun
170*4882a593Smuzhiyun zl6100_wait(data);
171*4882a593Smuzhiyun ret = pmbus_read_word_data(client, page, phase, vreg);
172*4882a593Smuzhiyun data->access = ktime_get();
173*4882a593Smuzhiyun if (ret < 0)
174*4882a593Smuzhiyun return ret;
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun switch (reg) {
177*4882a593Smuzhiyun case PMBUS_VIRT_VMON_OV_WARN_LIMIT:
178*4882a593Smuzhiyun ret = zl6100_d2l(DIV_ROUND_CLOSEST(zl6100_l2d(ret) * 9, 10));
179*4882a593Smuzhiyun break;
180*4882a593Smuzhiyun case PMBUS_VIRT_VMON_UV_WARN_LIMIT:
181*4882a593Smuzhiyun ret = zl6100_d2l(DIV_ROUND_CLOSEST(zl6100_l2d(ret) * 11, 10));
182*4882a593Smuzhiyun break;
183*4882a593Smuzhiyun }
184*4882a593Smuzhiyun
185*4882a593Smuzhiyun return ret;
186*4882a593Smuzhiyun }
187*4882a593Smuzhiyun
zl6100_read_byte_data(struct i2c_client * client,int page,int reg)188*4882a593Smuzhiyun static int zl6100_read_byte_data(struct i2c_client *client, int page, int reg)
189*4882a593Smuzhiyun {
190*4882a593Smuzhiyun const struct pmbus_driver_info *info = pmbus_get_driver_info(client);
191*4882a593Smuzhiyun struct zl6100_data *data = to_zl6100_data(info);
192*4882a593Smuzhiyun int ret, status;
193*4882a593Smuzhiyun
194*4882a593Smuzhiyun if (page > 0)
195*4882a593Smuzhiyun return -ENXIO;
196*4882a593Smuzhiyun
197*4882a593Smuzhiyun zl6100_wait(data);
198*4882a593Smuzhiyun
199*4882a593Smuzhiyun switch (reg) {
200*4882a593Smuzhiyun case PMBUS_VIRT_STATUS_VMON:
201*4882a593Smuzhiyun ret = pmbus_read_byte_data(client, 0,
202*4882a593Smuzhiyun PMBUS_STATUS_MFR_SPECIFIC);
203*4882a593Smuzhiyun if (ret < 0)
204*4882a593Smuzhiyun break;
205*4882a593Smuzhiyun
206*4882a593Smuzhiyun status = 0;
207*4882a593Smuzhiyun if (ret & VMON_UV_WARNING)
208*4882a593Smuzhiyun status |= PB_VOLTAGE_UV_WARNING;
209*4882a593Smuzhiyun if (ret & VMON_OV_WARNING)
210*4882a593Smuzhiyun status |= PB_VOLTAGE_OV_WARNING;
211*4882a593Smuzhiyun if (ret & VMON_UV_FAULT)
212*4882a593Smuzhiyun status |= PB_VOLTAGE_UV_FAULT;
213*4882a593Smuzhiyun if (ret & VMON_OV_FAULT)
214*4882a593Smuzhiyun status |= PB_VOLTAGE_OV_FAULT;
215*4882a593Smuzhiyun ret = status;
216*4882a593Smuzhiyun break;
217*4882a593Smuzhiyun default:
218*4882a593Smuzhiyun ret = pmbus_read_byte_data(client, page, reg);
219*4882a593Smuzhiyun break;
220*4882a593Smuzhiyun }
221*4882a593Smuzhiyun data->access = ktime_get();
222*4882a593Smuzhiyun
223*4882a593Smuzhiyun return ret;
224*4882a593Smuzhiyun }
225*4882a593Smuzhiyun
zl6100_write_word_data(struct i2c_client * client,int page,int reg,u16 word)226*4882a593Smuzhiyun static int zl6100_write_word_data(struct i2c_client *client, int page, int reg,
227*4882a593Smuzhiyun u16 word)
228*4882a593Smuzhiyun {
229*4882a593Smuzhiyun const struct pmbus_driver_info *info = pmbus_get_driver_info(client);
230*4882a593Smuzhiyun struct zl6100_data *data = to_zl6100_data(info);
231*4882a593Smuzhiyun int ret, vreg;
232*4882a593Smuzhiyun
233*4882a593Smuzhiyun if (page > 0)
234*4882a593Smuzhiyun return -ENXIO;
235*4882a593Smuzhiyun
236*4882a593Smuzhiyun switch (reg) {
237*4882a593Smuzhiyun case PMBUS_VIRT_VMON_OV_WARN_LIMIT:
238*4882a593Smuzhiyun word = zl6100_d2l(DIV_ROUND_CLOSEST(zl6100_l2d(word) * 10, 9));
239*4882a593Smuzhiyun vreg = MFR_VMON_OV_FAULT_LIMIT;
240*4882a593Smuzhiyun pmbus_clear_cache(client);
241*4882a593Smuzhiyun break;
242*4882a593Smuzhiyun case PMBUS_VIRT_VMON_OV_FAULT_LIMIT:
243*4882a593Smuzhiyun vreg = MFR_VMON_OV_FAULT_LIMIT;
244*4882a593Smuzhiyun pmbus_clear_cache(client);
245*4882a593Smuzhiyun break;
246*4882a593Smuzhiyun case PMBUS_VIRT_VMON_UV_WARN_LIMIT:
247*4882a593Smuzhiyun word = zl6100_d2l(DIV_ROUND_CLOSEST(zl6100_l2d(word) * 10, 11));
248*4882a593Smuzhiyun vreg = MFR_VMON_UV_FAULT_LIMIT;
249*4882a593Smuzhiyun pmbus_clear_cache(client);
250*4882a593Smuzhiyun break;
251*4882a593Smuzhiyun case PMBUS_VIRT_VMON_UV_FAULT_LIMIT:
252*4882a593Smuzhiyun vreg = MFR_VMON_UV_FAULT_LIMIT;
253*4882a593Smuzhiyun pmbus_clear_cache(client);
254*4882a593Smuzhiyun break;
255*4882a593Smuzhiyun default:
256*4882a593Smuzhiyun if (reg >= PMBUS_VIRT_BASE)
257*4882a593Smuzhiyun return -ENXIO;
258*4882a593Smuzhiyun vreg = reg;
259*4882a593Smuzhiyun }
260*4882a593Smuzhiyun
261*4882a593Smuzhiyun zl6100_wait(data);
262*4882a593Smuzhiyun ret = pmbus_write_word_data(client, page, vreg, word);
263*4882a593Smuzhiyun data->access = ktime_get();
264*4882a593Smuzhiyun
265*4882a593Smuzhiyun return ret;
266*4882a593Smuzhiyun }
267*4882a593Smuzhiyun
zl6100_write_byte(struct i2c_client * client,int page,u8 value)268*4882a593Smuzhiyun static int zl6100_write_byte(struct i2c_client *client, int page, u8 value)
269*4882a593Smuzhiyun {
270*4882a593Smuzhiyun const struct pmbus_driver_info *info = pmbus_get_driver_info(client);
271*4882a593Smuzhiyun struct zl6100_data *data = to_zl6100_data(info);
272*4882a593Smuzhiyun int ret;
273*4882a593Smuzhiyun
274*4882a593Smuzhiyun if (page > 0)
275*4882a593Smuzhiyun return -ENXIO;
276*4882a593Smuzhiyun
277*4882a593Smuzhiyun zl6100_wait(data);
278*4882a593Smuzhiyun ret = pmbus_write_byte(client, page, value);
279*4882a593Smuzhiyun data->access = ktime_get();
280*4882a593Smuzhiyun
281*4882a593Smuzhiyun return ret;
282*4882a593Smuzhiyun }
283*4882a593Smuzhiyun
284*4882a593Smuzhiyun static const struct i2c_device_id zl6100_id[] = {
285*4882a593Smuzhiyun {"bmr450", zl2005},
286*4882a593Smuzhiyun {"bmr451", zl2005},
287*4882a593Smuzhiyun {"bmr462", zl2008},
288*4882a593Smuzhiyun {"bmr463", zl2008},
289*4882a593Smuzhiyun {"bmr464", zl2008},
290*4882a593Smuzhiyun {"zl2004", zl2004},
291*4882a593Smuzhiyun {"zl2005", zl2005},
292*4882a593Smuzhiyun {"zl2006", zl2006},
293*4882a593Smuzhiyun {"zl2008", zl2008},
294*4882a593Smuzhiyun {"zl2105", zl2105},
295*4882a593Smuzhiyun {"zl2106", zl2106},
296*4882a593Smuzhiyun {"zl6100", zl6100},
297*4882a593Smuzhiyun {"zl6105", zl6105},
298*4882a593Smuzhiyun {"zl9101", zl9101},
299*4882a593Smuzhiyun {"zl9117", zl9117},
300*4882a593Smuzhiyun { }
301*4882a593Smuzhiyun };
302*4882a593Smuzhiyun MODULE_DEVICE_TABLE(i2c, zl6100_id);
303*4882a593Smuzhiyun
zl6100_probe(struct i2c_client * client)304*4882a593Smuzhiyun static int zl6100_probe(struct i2c_client *client)
305*4882a593Smuzhiyun {
306*4882a593Smuzhiyun int ret;
307*4882a593Smuzhiyun struct zl6100_data *data;
308*4882a593Smuzhiyun struct pmbus_driver_info *info;
309*4882a593Smuzhiyun u8 device_id[I2C_SMBUS_BLOCK_MAX + 1];
310*4882a593Smuzhiyun const struct i2c_device_id *mid;
311*4882a593Smuzhiyun
312*4882a593Smuzhiyun if (!i2c_check_functionality(client->adapter,
313*4882a593Smuzhiyun I2C_FUNC_SMBUS_READ_WORD_DATA
314*4882a593Smuzhiyun | I2C_FUNC_SMBUS_READ_BLOCK_DATA))
315*4882a593Smuzhiyun return -ENODEV;
316*4882a593Smuzhiyun
317*4882a593Smuzhiyun ret = i2c_smbus_read_block_data(client, ZL6100_DEVICE_ID,
318*4882a593Smuzhiyun device_id);
319*4882a593Smuzhiyun if (ret < 0) {
320*4882a593Smuzhiyun dev_err(&client->dev, "Failed to read device ID\n");
321*4882a593Smuzhiyun return ret;
322*4882a593Smuzhiyun }
323*4882a593Smuzhiyun device_id[ret] = '\0';
324*4882a593Smuzhiyun dev_info(&client->dev, "Device ID %s\n", device_id);
325*4882a593Smuzhiyun
326*4882a593Smuzhiyun mid = NULL;
327*4882a593Smuzhiyun for (mid = zl6100_id; mid->name[0]; mid++) {
328*4882a593Smuzhiyun if (!strncasecmp(mid->name, device_id, strlen(mid->name)))
329*4882a593Smuzhiyun break;
330*4882a593Smuzhiyun }
331*4882a593Smuzhiyun if (!mid->name[0]) {
332*4882a593Smuzhiyun dev_err(&client->dev, "Unsupported device\n");
333*4882a593Smuzhiyun return -ENODEV;
334*4882a593Smuzhiyun }
335*4882a593Smuzhiyun if (strcmp(client->name, mid->name) != 0)
336*4882a593Smuzhiyun dev_notice(&client->dev,
337*4882a593Smuzhiyun "Device mismatch: Configured %s, detected %s\n",
338*4882a593Smuzhiyun client->name, mid->name);
339*4882a593Smuzhiyun
340*4882a593Smuzhiyun data = devm_kzalloc(&client->dev, sizeof(struct zl6100_data),
341*4882a593Smuzhiyun GFP_KERNEL);
342*4882a593Smuzhiyun if (!data)
343*4882a593Smuzhiyun return -ENOMEM;
344*4882a593Smuzhiyun
345*4882a593Smuzhiyun data->id = mid->driver_data;
346*4882a593Smuzhiyun
347*4882a593Smuzhiyun /*
348*4882a593Smuzhiyun * According to information from the chip vendor, all currently
349*4882a593Smuzhiyun * supported chips are known to require a wait time between I2C
350*4882a593Smuzhiyun * accesses.
351*4882a593Smuzhiyun */
352*4882a593Smuzhiyun data->delay = delay;
353*4882a593Smuzhiyun
354*4882a593Smuzhiyun /*
355*4882a593Smuzhiyun * Since there was a direct I2C device access above, wait before
356*4882a593Smuzhiyun * accessing the chip again.
357*4882a593Smuzhiyun */
358*4882a593Smuzhiyun data->access = ktime_get();
359*4882a593Smuzhiyun zl6100_wait(data);
360*4882a593Smuzhiyun
361*4882a593Smuzhiyun info = &data->info;
362*4882a593Smuzhiyun
363*4882a593Smuzhiyun info->pages = 1;
364*4882a593Smuzhiyun info->func[0] = PMBUS_HAVE_VIN | PMBUS_HAVE_STATUS_INPUT
365*4882a593Smuzhiyun | PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT
366*4882a593Smuzhiyun | PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT
367*4882a593Smuzhiyun | PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP;
368*4882a593Smuzhiyun
369*4882a593Smuzhiyun /*
370*4882a593Smuzhiyun * ZL2004, ZL9101M, and ZL9117M support monitoring an extra voltage
371*4882a593Smuzhiyun * (VMON for ZL2004, VDRV for ZL9101M and ZL9117M). Report it as vmon.
372*4882a593Smuzhiyun */
373*4882a593Smuzhiyun if (data->id == zl2004 || data->id == zl9101 || data->id == zl9117)
374*4882a593Smuzhiyun info->func[0] |= PMBUS_HAVE_VMON | PMBUS_HAVE_STATUS_VMON;
375*4882a593Smuzhiyun
376*4882a593Smuzhiyun ret = i2c_smbus_read_word_data(client, ZL6100_MFR_CONFIG);
377*4882a593Smuzhiyun if (ret < 0)
378*4882a593Smuzhiyun return ret;
379*4882a593Smuzhiyun
380*4882a593Smuzhiyun if (ret & ZL6100_MFR_XTEMP_ENABLE)
381*4882a593Smuzhiyun info->func[0] |= PMBUS_HAVE_TEMP2;
382*4882a593Smuzhiyun
383*4882a593Smuzhiyun data->access = ktime_get();
384*4882a593Smuzhiyun zl6100_wait(data);
385*4882a593Smuzhiyun
386*4882a593Smuzhiyun info->read_word_data = zl6100_read_word_data;
387*4882a593Smuzhiyun info->read_byte_data = zl6100_read_byte_data;
388*4882a593Smuzhiyun info->write_word_data = zl6100_write_word_data;
389*4882a593Smuzhiyun info->write_byte = zl6100_write_byte;
390*4882a593Smuzhiyun
391*4882a593Smuzhiyun return pmbus_do_probe(client, info);
392*4882a593Smuzhiyun }
393*4882a593Smuzhiyun
394*4882a593Smuzhiyun static struct i2c_driver zl6100_driver = {
395*4882a593Smuzhiyun .driver = {
396*4882a593Smuzhiyun .name = "zl6100",
397*4882a593Smuzhiyun },
398*4882a593Smuzhiyun .probe_new = zl6100_probe,
399*4882a593Smuzhiyun .remove = pmbus_do_remove,
400*4882a593Smuzhiyun .id_table = zl6100_id,
401*4882a593Smuzhiyun };
402*4882a593Smuzhiyun
403*4882a593Smuzhiyun module_i2c_driver(zl6100_driver);
404*4882a593Smuzhiyun
405*4882a593Smuzhiyun MODULE_AUTHOR("Guenter Roeck");
406*4882a593Smuzhiyun MODULE_DESCRIPTION("PMBus driver for ZL6100 and compatibles");
407*4882a593Smuzhiyun MODULE_LICENSE("GPL");
408