1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Hardware monitoring driver for ucd9200 series Digital PWM System Controllers
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2011 Ericsson AB.
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun #include <linux/kernel.h>
9*4882a593Smuzhiyun #include <linux/module.h>
10*4882a593Smuzhiyun #include <linux/of_device.h>
11*4882a593Smuzhiyun #include <linux/init.h>
12*4882a593Smuzhiyun #include <linux/err.h>
13*4882a593Smuzhiyun #include <linux/slab.h>
14*4882a593Smuzhiyun #include <linux/i2c.h>
15*4882a593Smuzhiyun #include <linux/pmbus.h>
16*4882a593Smuzhiyun #include "pmbus.h"
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun #define UCD9200_PHASE_INFO 0xd2
19*4882a593Smuzhiyun #define UCD9200_DEVICE_ID 0xfd
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun enum chips { ucd9200, ucd9220, ucd9222, ucd9224, ucd9240, ucd9244, ucd9246,
22*4882a593Smuzhiyun ucd9248 };
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun static const struct i2c_device_id ucd9200_id[] = {
25*4882a593Smuzhiyun {"ucd9200", ucd9200},
26*4882a593Smuzhiyun {"ucd9220", ucd9220},
27*4882a593Smuzhiyun {"ucd9222", ucd9222},
28*4882a593Smuzhiyun {"ucd9224", ucd9224},
29*4882a593Smuzhiyun {"ucd9240", ucd9240},
30*4882a593Smuzhiyun {"ucd9244", ucd9244},
31*4882a593Smuzhiyun {"ucd9246", ucd9246},
32*4882a593Smuzhiyun {"ucd9248", ucd9248},
33*4882a593Smuzhiyun {}
34*4882a593Smuzhiyun };
35*4882a593Smuzhiyun MODULE_DEVICE_TABLE(i2c, ucd9200_id);
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun static const struct of_device_id __maybe_unused ucd9200_of_match[] = {
38*4882a593Smuzhiyun {
39*4882a593Smuzhiyun .compatible = "ti,cd9200",
40*4882a593Smuzhiyun .data = (void *)ucd9200
41*4882a593Smuzhiyun },
42*4882a593Smuzhiyun {
43*4882a593Smuzhiyun .compatible = "ti,cd9220",
44*4882a593Smuzhiyun .data = (void *)ucd9220
45*4882a593Smuzhiyun },
46*4882a593Smuzhiyun {
47*4882a593Smuzhiyun .compatible = "ti,cd9222",
48*4882a593Smuzhiyun .data = (void *)ucd9222
49*4882a593Smuzhiyun },
50*4882a593Smuzhiyun {
51*4882a593Smuzhiyun .compatible = "ti,cd9224",
52*4882a593Smuzhiyun .data = (void *)ucd9224
53*4882a593Smuzhiyun },
54*4882a593Smuzhiyun {
55*4882a593Smuzhiyun .compatible = "ti,cd9240",
56*4882a593Smuzhiyun .data = (void *)ucd9240
57*4882a593Smuzhiyun },
58*4882a593Smuzhiyun {
59*4882a593Smuzhiyun .compatible = "ti,cd9244",
60*4882a593Smuzhiyun .data = (void *)ucd9244
61*4882a593Smuzhiyun },
62*4882a593Smuzhiyun {
63*4882a593Smuzhiyun .compatible = "ti,cd9246",
64*4882a593Smuzhiyun .data = (void *)ucd9246
65*4882a593Smuzhiyun },
66*4882a593Smuzhiyun {
67*4882a593Smuzhiyun .compatible = "ti,cd9248",
68*4882a593Smuzhiyun .data = (void *)ucd9248
69*4882a593Smuzhiyun },
70*4882a593Smuzhiyun { },
71*4882a593Smuzhiyun };
72*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, ucd9200_of_match);
73*4882a593Smuzhiyun
ucd9200_probe(struct i2c_client * client)74*4882a593Smuzhiyun static int ucd9200_probe(struct i2c_client *client)
75*4882a593Smuzhiyun {
76*4882a593Smuzhiyun u8 block_buffer[I2C_SMBUS_BLOCK_MAX + 1];
77*4882a593Smuzhiyun struct pmbus_driver_info *info;
78*4882a593Smuzhiyun const struct i2c_device_id *mid;
79*4882a593Smuzhiyun enum chips chip;
80*4882a593Smuzhiyun int i, j, ret;
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun if (!i2c_check_functionality(client->adapter,
83*4882a593Smuzhiyun I2C_FUNC_SMBUS_BYTE_DATA |
84*4882a593Smuzhiyun I2C_FUNC_SMBUS_BLOCK_DATA))
85*4882a593Smuzhiyun return -ENODEV;
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun ret = i2c_smbus_read_block_data(client, UCD9200_DEVICE_ID,
88*4882a593Smuzhiyun block_buffer);
89*4882a593Smuzhiyun if (ret < 0) {
90*4882a593Smuzhiyun dev_err(&client->dev, "Failed to read device ID\n");
91*4882a593Smuzhiyun return ret;
92*4882a593Smuzhiyun }
93*4882a593Smuzhiyun block_buffer[ret] = '\0';
94*4882a593Smuzhiyun dev_info(&client->dev, "Device ID %s\n", block_buffer);
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun for (mid = ucd9200_id; mid->name[0]; mid++) {
97*4882a593Smuzhiyun if (!strncasecmp(mid->name, block_buffer, strlen(mid->name)))
98*4882a593Smuzhiyun break;
99*4882a593Smuzhiyun }
100*4882a593Smuzhiyun if (!mid->name[0]) {
101*4882a593Smuzhiyun dev_err(&client->dev, "Unsupported device\n");
102*4882a593Smuzhiyun return -ENODEV;
103*4882a593Smuzhiyun }
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun if (client->dev.of_node)
106*4882a593Smuzhiyun chip = (enum chips)of_device_get_match_data(&client->dev);
107*4882a593Smuzhiyun else
108*4882a593Smuzhiyun chip = mid->driver_data;
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun if (chip != ucd9200 && strcmp(client->name, mid->name) != 0)
111*4882a593Smuzhiyun dev_notice(&client->dev,
112*4882a593Smuzhiyun "Device mismatch: Configured %s, detected %s\n",
113*4882a593Smuzhiyun client->name, mid->name);
114*4882a593Smuzhiyun
115*4882a593Smuzhiyun info = devm_kzalloc(&client->dev, sizeof(struct pmbus_driver_info),
116*4882a593Smuzhiyun GFP_KERNEL);
117*4882a593Smuzhiyun if (!info)
118*4882a593Smuzhiyun return -ENOMEM;
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun ret = i2c_smbus_read_block_data(client, UCD9200_PHASE_INFO,
121*4882a593Smuzhiyun block_buffer);
122*4882a593Smuzhiyun if (ret < 0) {
123*4882a593Smuzhiyun dev_err(&client->dev, "Failed to read phase information\n");
124*4882a593Smuzhiyun return ret;
125*4882a593Smuzhiyun }
126*4882a593Smuzhiyun
127*4882a593Smuzhiyun /*
128*4882a593Smuzhiyun * Calculate number of configured pages (rails) from PHASE_INFO
129*4882a593Smuzhiyun * register.
130*4882a593Smuzhiyun * Rails have to be sequential, so we can abort after finding
131*4882a593Smuzhiyun * the first unconfigured rail.
132*4882a593Smuzhiyun */
133*4882a593Smuzhiyun info->pages = 0;
134*4882a593Smuzhiyun for (i = 0; i < ret; i++) {
135*4882a593Smuzhiyun if (!block_buffer[i])
136*4882a593Smuzhiyun break;
137*4882a593Smuzhiyun info->pages++;
138*4882a593Smuzhiyun }
139*4882a593Smuzhiyun if (!info->pages) {
140*4882a593Smuzhiyun dev_err(&client->dev, "No rails configured\n");
141*4882a593Smuzhiyun return -ENODEV;
142*4882a593Smuzhiyun }
143*4882a593Smuzhiyun dev_info(&client->dev, "%d rails configured\n", info->pages);
144*4882a593Smuzhiyun
145*4882a593Smuzhiyun /*
146*4882a593Smuzhiyun * Set PHASE registers on all pages to 0xff to ensure that phase
147*4882a593Smuzhiyun * specific commands will apply to all phases of a given page (rail).
148*4882a593Smuzhiyun * This only affects the READ_IOUT and READ_TEMPERATURE2 registers.
149*4882a593Smuzhiyun * READ_IOUT will return the sum of currents of all phases of a rail,
150*4882a593Smuzhiyun * and READ_TEMPERATURE2 will return the maximum temperature detected
151*4882a593Smuzhiyun * for the the phases of the rail.
152*4882a593Smuzhiyun */
153*4882a593Smuzhiyun for (i = 0; i < info->pages; i++) {
154*4882a593Smuzhiyun /*
155*4882a593Smuzhiyun * Setting PAGE & PHASE fails once in a while for no obvious
156*4882a593Smuzhiyun * reason, so we need to retry a couple of times.
157*4882a593Smuzhiyun */
158*4882a593Smuzhiyun for (j = 0; j < 3; j++) {
159*4882a593Smuzhiyun ret = i2c_smbus_write_byte_data(client, PMBUS_PAGE, i);
160*4882a593Smuzhiyun if (ret < 0)
161*4882a593Smuzhiyun continue;
162*4882a593Smuzhiyun ret = i2c_smbus_write_byte_data(client, PMBUS_PHASE,
163*4882a593Smuzhiyun 0xff);
164*4882a593Smuzhiyun if (ret < 0)
165*4882a593Smuzhiyun continue;
166*4882a593Smuzhiyun break;
167*4882a593Smuzhiyun }
168*4882a593Smuzhiyun if (ret < 0) {
169*4882a593Smuzhiyun dev_err(&client->dev,
170*4882a593Smuzhiyun "Failed to initialize PHASE registers\n");
171*4882a593Smuzhiyun return ret;
172*4882a593Smuzhiyun }
173*4882a593Smuzhiyun }
174*4882a593Smuzhiyun if (info->pages > 1)
175*4882a593Smuzhiyun i2c_smbus_write_byte_data(client, PMBUS_PAGE, 0);
176*4882a593Smuzhiyun
177*4882a593Smuzhiyun info->func[0] = PMBUS_HAVE_VIN | PMBUS_HAVE_STATUS_INPUT |
178*4882a593Smuzhiyun PMBUS_HAVE_IIN | PMBUS_HAVE_PIN |
179*4882a593Smuzhiyun PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT |
180*4882a593Smuzhiyun PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT |
181*4882a593Smuzhiyun PMBUS_HAVE_POUT | PMBUS_HAVE_TEMP |
182*4882a593Smuzhiyun PMBUS_HAVE_TEMP2 | PMBUS_HAVE_STATUS_TEMP;
183*4882a593Smuzhiyun
184*4882a593Smuzhiyun for (i = 1; i < info->pages; i++)
185*4882a593Smuzhiyun info->func[i] = PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT |
186*4882a593Smuzhiyun PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT |
187*4882a593Smuzhiyun PMBUS_HAVE_POUT |
188*4882a593Smuzhiyun PMBUS_HAVE_TEMP2 | PMBUS_HAVE_STATUS_TEMP;
189*4882a593Smuzhiyun
190*4882a593Smuzhiyun /* ucd9240 supports a single fan */
191*4882a593Smuzhiyun if (mid->driver_data == ucd9240)
192*4882a593Smuzhiyun info->func[0] |= PMBUS_HAVE_FAN12 | PMBUS_HAVE_STATUS_FAN12;
193*4882a593Smuzhiyun
194*4882a593Smuzhiyun return pmbus_do_probe(client, info);
195*4882a593Smuzhiyun }
196*4882a593Smuzhiyun
197*4882a593Smuzhiyun /* This is the driver that will be inserted */
198*4882a593Smuzhiyun static struct i2c_driver ucd9200_driver = {
199*4882a593Smuzhiyun .driver = {
200*4882a593Smuzhiyun .name = "ucd9200",
201*4882a593Smuzhiyun .of_match_table = of_match_ptr(ucd9200_of_match),
202*4882a593Smuzhiyun },
203*4882a593Smuzhiyun .probe_new = ucd9200_probe,
204*4882a593Smuzhiyun .remove = pmbus_do_remove,
205*4882a593Smuzhiyun .id_table = ucd9200_id,
206*4882a593Smuzhiyun };
207*4882a593Smuzhiyun
208*4882a593Smuzhiyun module_i2c_driver(ucd9200_driver);
209*4882a593Smuzhiyun
210*4882a593Smuzhiyun MODULE_AUTHOR("Guenter Roeck");
211*4882a593Smuzhiyun MODULE_DESCRIPTION("PMBus driver for TI UCD922x, UCD924x");
212*4882a593Smuzhiyun MODULE_LICENSE("GPL");
213