xref: /OK3568_Linux_fs/kernel/drivers/hwmon/pmbus/adm1266.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * ADM1266 - Cascadable Super Sequencer with Margin
4*4882a593Smuzhiyun  * Control and Fault Recording
5*4882a593Smuzhiyun  *
6*4882a593Smuzhiyun  * Copyright 2020 Analog Devices Inc.
7*4882a593Smuzhiyun  */
8*4882a593Smuzhiyun 
9*4882a593Smuzhiyun #include <linux/bitfield.h>
10*4882a593Smuzhiyun #include <linux/crc8.h>
11*4882a593Smuzhiyun #include <linux/debugfs.h>
12*4882a593Smuzhiyun #include <linux/gpio/driver.h>
13*4882a593Smuzhiyun #include <linux/i2c.h>
14*4882a593Smuzhiyun #include <linux/i2c-smbus.h>
15*4882a593Smuzhiyun #include <linux/init.h>
16*4882a593Smuzhiyun #include <linux/kernel.h>
17*4882a593Smuzhiyun #include <linux/module.h>
18*4882a593Smuzhiyun #include <linux/nvmem-consumer.h>
19*4882a593Smuzhiyun #include <linux/nvmem-provider.h>
20*4882a593Smuzhiyun #include "pmbus.h"
21*4882a593Smuzhiyun #include <linux/slab.h>
22*4882a593Smuzhiyun #include <linux/timekeeping.h>
23*4882a593Smuzhiyun 
24*4882a593Smuzhiyun #define ADM1266_BLACKBOX_CONFIG	0xD3
25*4882a593Smuzhiyun #define ADM1266_PDIO_CONFIG	0xD4
26*4882a593Smuzhiyun #define ADM1266_READ_STATE	0xD9
27*4882a593Smuzhiyun #define ADM1266_READ_BLACKBOX	0xDE
28*4882a593Smuzhiyun #define ADM1266_SET_RTC		0xDF
29*4882a593Smuzhiyun #define ADM1266_GPIO_CONFIG	0xE1
30*4882a593Smuzhiyun #define ADM1266_BLACKBOX_INFO	0xE6
31*4882a593Smuzhiyun #define ADM1266_PDIO_STATUS	0xE9
32*4882a593Smuzhiyun #define ADM1266_GPIO_STATUS	0xEA
33*4882a593Smuzhiyun 
34*4882a593Smuzhiyun /* ADM1266 GPIO defines */
35*4882a593Smuzhiyun #define ADM1266_GPIO_NR			9
36*4882a593Smuzhiyun #define ADM1266_GPIO_FUNCTIONS(x)	FIELD_GET(BIT(0), x)
37*4882a593Smuzhiyun #define ADM1266_GPIO_INPUT_EN(x)	FIELD_GET(BIT(2), x)
38*4882a593Smuzhiyun #define ADM1266_GPIO_OUTPUT_EN(x)	FIELD_GET(BIT(3), x)
39*4882a593Smuzhiyun #define ADM1266_GPIO_OPEN_DRAIN(x)	FIELD_GET(BIT(4), x)
40*4882a593Smuzhiyun 
41*4882a593Smuzhiyun /* ADM1266 PDIO defines */
42*4882a593Smuzhiyun #define ADM1266_PDIO_NR			16
43*4882a593Smuzhiyun #define ADM1266_PDIO_PIN_CFG(x)		FIELD_GET(GENMASK(15, 13), x)
44*4882a593Smuzhiyun #define ADM1266_PDIO_GLITCH_FILT(x)	FIELD_GET(GENMASK(12, 9), x)
45*4882a593Smuzhiyun #define ADM1266_PDIO_OUT_CFG(x)		FIELD_GET(GENMASK(2, 0), x)
46*4882a593Smuzhiyun 
47*4882a593Smuzhiyun #define ADM1266_BLACKBOX_OFFSET		0
48*4882a593Smuzhiyun #define ADM1266_BLACKBOX_SIZE		64
49*4882a593Smuzhiyun 
50*4882a593Smuzhiyun #define ADM1266_PMBUS_BLOCK_MAX		255
51*4882a593Smuzhiyun 
52*4882a593Smuzhiyun struct adm1266_data {
53*4882a593Smuzhiyun 	struct pmbus_driver_info info;
54*4882a593Smuzhiyun 	struct gpio_chip gc;
55*4882a593Smuzhiyun 	const char *gpio_names[ADM1266_GPIO_NR + ADM1266_PDIO_NR];
56*4882a593Smuzhiyun 	struct i2c_client *client;
57*4882a593Smuzhiyun 	struct dentry *debugfs_dir;
58*4882a593Smuzhiyun 	struct nvmem_config nvmem_config;
59*4882a593Smuzhiyun 	struct nvmem_device *nvmem;
60*4882a593Smuzhiyun 	u8 *dev_mem;
61*4882a593Smuzhiyun 	struct mutex buf_mutex;
62*4882a593Smuzhiyun 	u8 write_buf[ADM1266_PMBUS_BLOCK_MAX + 1] ____cacheline_aligned;
63*4882a593Smuzhiyun 	u8 read_buf[ADM1266_PMBUS_BLOCK_MAX + 1] ____cacheline_aligned;
64*4882a593Smuzhiyun };
65*4882a593Smuzhiyun 
66*4882a593Smuzhiyun static const struct nvmem_cell_info adm1266_nvmem_cells[] = {
67*4882a593Smuzhiyun 	{
68*4882a593Smuzhiyun 		.name           = "blackbox",
69*4882a593Smuzhiyun 		.offset         = ADM1266_BLACKBOX_OFFSET,
70*4882a593Smuzhiyun 		.bytes          = 2048,
71*4882a593Smuzhiyun 	},
72*4882a593Smuzhiyun };
73*4882a593Smuzhiyun 
74*4882a593Smuzhiyun DECLARE_CRC8_TABLE(pmbus_crc_table);
75*4882a593Smuzhiyun 
76*4882a593Smuzhiyun /*
77*4882a593Smuzhiyun  * Different from Block Read as it sends data and waits for the slave to
78*4882a593Smuzhiyun  * return a value dependent on that data. The protocol is simply a Write Block
79*4882a593Smuzhiyun  * followed by a Read Block without the Read-Block command field and the
80*4882a593Smuzhiyun  * Write-Block STOP bit.
81*4882a593Smuzhiyun  */
adm1266_pmbus_block_xfer(struct adm1266_data * data,u8 cmd,u8 w_len,u8 * data_w,u8 * data_r)82*4882a593Smuzhiyun static int adm1266_pmbus_block_xfer(struct adm1266_data *data, u8 cmd, u8 w_len, u8 *data_w,
83*4882a593Smuzhiyun 				    u8 *data_r)
84*4882a593Smuzhiyun {
85*4882a593Smuzhiyun 	struct i2c_client *client = data->client;
86*4882a593Smuzhiyun 	struct i2c_msg msgs[2] = {
87*4882a593Smuzhiyun 		{
88*4882a593Smuzhiyun 			.addr = client->addr,
89*4882a593Smuzhiyun 			.flags = I2C_M_DMA_SAFE,
90*4882a593Smuzhiyun 			.buf = data->write_buf,
91*4882a593Smuzhiyun 			.len = w_len + 2,
92*4882a593Smuzhiyun 		},
93*4882a593Smuzhiyun 		{
94*4882a593Smuzhiyun 			.addr = client->addr,
95*4882a593Smuzhiyun 			.flags = I2C_M_RD | I2C_M_DMA_SAFE,
96*4882a593Smuzhiyun 			.buf = data->read_buf,
97*4882a593Smuzhiyun 			.len = ADM1266_PMBUS_BLOCK_MAX + 2,
98*4882a593Smuzhiyun 		}
99*4882a593Smuzhiyun 	};
100*4882a593Smuzhiyun 	u8 addr;
101*4882a593Smuzhiyun 	u8 crc;
102*4882a593Smuzhiyun 	int ret;
103*4882a593Smuzhiyun 
104*4882a593Smuzhiyun 	mutex_lock(&data->buf_mutex);
105*4882a593Smuzhiyun 
106*4882a593Smuzhiyun 	msgs[0].buf[0] = cmd;
107*4882a593Smuzhiyun 	msgs[0].buf[1] = w_len;
108*4882a593Smuzhiyun 	memcpy(&msgs[0].buf[2], data_w, w_len);
109*4882a593Smuzhiyun 
110*4882a593Smuzhiyun 	ret = i2c_transfer(client->adapter, msgs, 2);
111*4882a593Smuzhiyun 	if (ret != 2) {
112*4882a593Smuzhiyun 		if (ret >= 0)
113*4882a593Smuzhiyun 			ret = -EPROTO;
114*4882a593Smuzhiyun 
115*4882a593Smuzhiyun 		mutex_unlock(&data->buf_mutex);
116*4882a593Smuzhiyun 
117*4882a593Smuzhiyun 		return ret;
118*4882a593Smuzhiyun 	}
119*4882a593Smuzhiyun 
120*4882a593Smuzhiyun 	if (client->flags & I2C_CLIENT_PEC) {
121*4882a593Smuzhiyun 		addr = i2c_8bit_addr_from_msg(&msgs[0]);
122*4882a593Smuzhiyun 		crc = crc8(pmbus_crc_table, &addr, 1, 0);
123*4882a593Smuzhiyun 		crc = crc8(pmbus_crc_table, msgs[0].buf,  msgs[0].len, crc);
124*4882a593Smuzhiyun 
125*4882a593Smuzhiyun 		addr = i2c_8bit_addr_from_msg(&msgs[1]);
126*4882a593Smuzhiyun 		crc = crc8(pmbus_crc_table, &addr, 1, crc);
127*4882a593Smuzhiyun 		crc = crc8(pmbus_crc_table, msgs[1].buf,  msgs[1].buf[0] + 1, crc);
128*4882a593Smuzhiyun 
129*4882a593Smuzhiyun 		if (crc != msgs[1].buf[msgs[1].buf[0] + 1]) {
130*4882a593Smuzhiyun 			mutex_unlock(&data->buf_mutex);
131*4882a593Smuzhiyun 			return -EBADMSG;
132*4882a593Smuzhiyun 		}
133*4882a593Smuzhiyun 	}
134*4882a593Smuzhiyun 
135*4882a593Smuzhiyun 	memcpy(data_r, &msgs[1].buf[1], msgs[1].buf[0]);
136*4882a593Smuzhiyun 
137*4882a593Smuzhiyun 	ret = msgs[1].buf[0];
138*4882a593Smuzhiyun 	mutex_unlock(&data->buf_mutex);
139*4882a593Smuzhiyun 
140*4882a593Smuzhiyun 	return ret;
141*4882a593Smuzhiyun }
142*4882a593Smuzhiyun 
143*4882a593Smuzhiyun static const unsigned int adm1266_gpio_mapping[ADM1266_GPIO_NR][2] = {
144*4882a593Smuzhiyun 	{1, 0},
145*4882a593Smuzhiyun 	{2, 1},
146*4882a593Smuzhiyun 	{3, 2},
147*4882a593Smuzhiyun 	{4, 8},
148*4882a593Smuzhiyun 	{5, 9},
149*4882a593Smuzhiyun 	{6, 10},
150*4882a593Smuzhiyun 	{7, 11},
151*4882a593Smuzhiyun 	{8, 6},
152*4882a593Smuzhiyun 	{9, 7},
153*4882a593Smuzhiyun };
154*4882a593Smuzhiyun 
155*4882a593Smuzhiyun static const char *adm1266_names[ADM1266_GPIO_NR + ADM1266_PDIO_NR] = {
156*4882a593Smuzhiyun 	"GPIO1", "GPIO2", "GPIO3", "GPIO4", "GPIO5", "GPIO6", "GPIO7", "GPIO8",
157*4882a593Smuzhiyun 	"GPIO9", "PDIO1", "PDIO2", "PDIO3", "PDIO4", "PDIO5", "PDIO6",
158*4882a593Smuzhiyun 	"PDIO7", "PDIO8", "PDIO9", "PDIO10", "PDIO11", "PDIO12", "PDIO13",
159*4882a593Smuzhiyun 	"PDIO14", "PDIO15", "PDIO16",
160*4882a593Smuzhiyun };
161*4882a593Smuzhiyun 
adm1266_gpio_get(struct gpio_chip * chip,unsigned int offset)162*4882a593Smuzhiyun static int adm1266_gpio_get(struct gpio_chip *chip, unsigned int offset)
163*4882a593Smuzhiyun {
164*4882a593Smuzhiyun 	struct adm1266_data *data = gpiochip_get_data(chip);
165*4882a593Smuzhiyun 	u8 read_buf[I2C_SMBUS_BLOCK_MAX + 1];
166*4882a593Smuzhiyun 	unsigned long pins_status;
167*4882a593Smuzhiyun 	unsigned int pmbus_cmd;
168*4882a593Smuzhiyun 	int ret;
169*4882a593Smuzhiyun 
170*4882a593Smuzhiyun 	if (offset < ADM1266_GPIO_NR)
171*4882a593Smuzhiyun 		pmbus_cmd = ADM1266_GPIO_STATUS;
172*4882a593Smuzhiyun 	else
173*4882a593Smuzhiyun 		pmbus_cmd = ADM1266_PDIO_STATUS;
174*4882a593Smuzhiyun 
175*4882a593Smuzhiyun 	ret = i2c_smbus_read_block_data(data->client, pmbus_cmd, read_buf);
176*4882a593Smuzhiyun 	if (ret < 0)
177*4882a593Smuzhiyun 		return ret;
178*4882a593Smuzhiyun 
179*4882a593Smuzhiyun 	pins_status = read_buf[0] + (read_buf[1] << 8);
180*4882a593Smuzhiyun 	if (offset < ADM1266_GPIO_NR)
181*4882a593Smuzhiyun 		return test_bit(adm1266_gpio_mapping[offset][1], &pins_status);
182*4882a593Smuzhiyun 
183*4882a593Smuzhiyun 	return test_bit(offset - ADM1266_GPIO_NR, &pins_status);
184*4882a593Smuzhiyun }
185*4882a593Smuzhiyun 
adm1266_gpio_get_multiple(struct gpio_chip * chip,unsigned long * mask,unsigned long * bits)186*4882a593Smuzhiyun static int adm1266_gpio_get_multiple(struct gpio_chip *chip, unsigned long *mask,
187*4882a593Smuzhiyun 				     unsigned long *bits)
188*4882a593Smuzhiyun {
189*4882a593Smuzhiyun 	struct adm1266_data *data = gpiochip_get_data(chip);
190*4882a593Smuzhiyun 	u8 read_buf[ADM1266_PMBUS_BLOCK_MAX + 1];
191*4882a593Smuzhiyun 	unsigned long status;
192*4882a593Smuzhiyun 	unsigned int gpio_nr;
193*4882a593Smuzhiyun 	int ret;
194*4882a593Smuzhiyun 
195*4882a593Smuzhiyun 	ret = i2c_smbus_read_block_data(data->client, ADM1266_GPIO_STATUS, read_buf);
196*4882a593Smuzhiyun 	if (ret < 0)
197*4882a593Smuzhiyun 		return ret;
198*4882a593Smuzhiyun 
199*4882a593Smuzhiyun 	status = read_buf[0] + (read_buf[1] << 8);
200*4882a593Smuzhiyun 
201*4882a593Smuzhiyun 	*bits = 0;
202*4882a593Smuzhiyun 	for_each_set_bit(gpio_nr, mask, ADM1266_GPIO_NR) {
203*4882a593Smuzhiyun 		if (test_bit(adm1266_gpio_mapping[gpio_nr][1], &status))
204*4882a593Smuzhiyun 			set_bit(gpio_nr, bits);
205*4882a593Smuzhiyun 	}
206*4882a593Smuzhiyun 
207*4882a593Smuzhiyun 	ret = i2c_smbus_read_block_data(data->client, ADM1266_PDIO_STATUS, read_buf);
208*4882a593Smuzhiyun 	if (ret < 0)
209*4882a593Smuzhiyun 		return ret;
210*4882a593Smuzhiyun 
211*4882a593Smuzhiyun 	status = read_buf[0] + (read_buf[1] << 8);
212*4882a593Smuzhiyun 
213*4882a593Smuzhiyun 	*bits = 0;
214*4882a593Smuzhiyun 	for_each_set_bit_from(gpio_nr, mask, ADM1266_GPIO_NR + ADM1266_PDIO_STATUS) {
215*4882a593Smuzhiyun 		if (test_bit(gpio_nr - ADM1266_GPIO_NR, &status))
216*4882a593Smuzhiyun 			set_bit(gpio_nr, bits);
217*4882a593Smuzhiyun 	}
218*4882a593Smuzhiyun 
219*4882a593Smuzhiyun 	return 0;
220*4882a593Smuzhiyun }
221*4882a593Smuzhiyun 
adm1266_gpio_dbg_show(struct seq_file * s,struct gpio_chip * chip)222*4882a593Smuzhiyun static void adm1266_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip)
223*4882a593Smuzhiyun {
224*4882a593Smuzhiyun 	struct adm1266_data *data = gpiochip_get_data(chip);
225*4882a593Smuzhiyun 	u8 read_buf[ADM1266_PMBUS_BLOCK_MAX + 1];
226*4882a593Smuzhiyun 	unsigned long gpio_config;
227*4882a593Smuzhiyun 	unsigned long pdio_config;
228*4882a593Smuzhiyun 	unsigned long pin_cfg;
229*4882a593Smuzhiyun 	u8 write_cmd;
230*4882a593Smuzhiyun 	int ret;
231*4882a593Smuzhiyun 	int i;
232*4882a593Smuzhiyun 
233*4882a593Smuzhiyun 	for (i = 0; i < ADM1266_GPIO_NR; i++) {
234*4882a593Smuzhiyun 		write_cmd = adm1266_gpio_mapping[i][1];
235*4882a593Smuzhiyun 		ret = adm1266_pmbus_block_xfer(data, ADM1266_GPIO_CONFIG, 1, &write_cmd, read_buf);
236*4882a593Smuzhiyun 		if (ret != 2)
237*4882a593Smuzhiyun 			return;
238*4882a593Smuzhiyun 
239*4882a593Smuzhiyun 		gpio_config = read_buf[0];
240*4882a593Smuzhiyun 		seq_puts(s, adm1266_names[i]);
241*4882a593Smuzhiyun 
242*4882a593Smuzhiyun 		seq_puts(s, " ( ");
243*4882a593Smuzhiyun 		if (!ADM1266_GPIO_FUNCTIONS(gpio_config)) {
244*4882a593Smuzhiyun 			seq_puts(s, "high-Z )\n");
245*4882a593Smuzhiyun 			continue;
246*4882a593Smuzhiyun 		}
247*4882a593Smuzhiyun 		if (ADM1266_GPIO_INPUT_EN(gpio_config))
248*4882a593Smuzhiyun 			seq_puts(s, "input ");
249*4882a593Smuzhiyun 		if (ADM1266_GPIO_OUTPUT_EN(gpio_config))
250*4882a593Smuzhiyun 			seq_puts(s, "output ");
251*4882a593Smuzhiyun 		if (ADM1266_GPIO_OPEN_DRAIN(gpio_config))
252*4882a593Smuzhiyun 			seq_puts(s, "open-drain )\n");
253*4882a593Smuzhiyun 		else
254*4882a593Smuzhiyun 			seq_puts(s, "push-pull )\n");
255*4882a593Smuzhiyun 	}
256*4882a593Smuzhiyun 
257*4882a593Smuzhiyun 	write_cmd = 0xFF;
258*4882a593Smuzhiyun 	ret = adm1266_pmbus_block_xfer(data, ADM1266_PDIO_CONFIG, 1, &write_cmd, read_buf);
259*4882a593Smuzhiyun 	if (ret != 32)
260*4882a593Smuzhiyun 		return;
261*4882a593Smuzhiyun 
262*4882a593Smuzhiyun 	for (i = 0; i < ADM1266_PDIO_NR; i++) {
263*4882a593Smuzhiyun 		seq_puts(s, adm1266_names[ADM1266_GPIO_NR + i]);
264*4882a593Smuzhiyun 
265*4882a593Smuzhiyun 		pdio_config = read_buf[2 * i];
266*4882a593Smuzhiyun 		pdio_config += (read_buf[2 * i + 1] << 8);
267*4882a593Smuzhiyun 		pin_cfg = ADM1266_PDIO_PIN_CFG(pdio_config);
268*4882a593Smuzhiyun 
269*4882a593Smuzhiyun 		seq_puts(s, " ( ");
270*4882a593Smuzhiyun 		if (!pin_cfg || pin_cfg > 5) {
271*4882a593Smuzhiyun 			seq_puts(s, "high-Z )\n");
272*4882a593Smuzhiyun 			continue;
273*4882a593Smuzhiyun 		}
274*4882a593Smuzhiyun 
275*4882a593Smuzhiyun 		if (pin_cfg & BIT(0))
276*4882a593Smuzhiyun 			seq_puts(s, "output ");
277*4882a593Smuzhiyun 
278*4882a593Smuzhiyun 		if (pin_cfg & BIT(1))
279*4882a593Smuzhiyun 			seq_puts(s, "input ");
280*4882a593Smuzhiyun 
281*4882a593Smuzhiyun 		seq_puts(s, ")\n");
282*4882a593Smuzhiyun 	}
283*4882a593Smuzhiyun }
284*4882a593Smuzhiyun 
adm1266_config_gpio(struct adm1266_data * data)285*4882a593Smuzhiyun static int adm1266_config_gpio(struct adm1266_data *data)
286*4882a593Smuzhiyun {
287*4882a593Smuzhiyun 	const char *name = dev_name(&data->client->dev);
288*4882a593Smuzhiyun 	char *gpio_name;
289*4882a593Smuzhiyun 	int ret;
290*4882a593Smuzhiyun 	int i;
291*4882a593Smuzhiyun 
292*4882a593Smuzhiyun 	for (i = 0; i < ARRAY_SIZE(data->gpio_names); i++) {
293*4882a593Smuzhiyun 		gpio_name = devm_kasprintf(&data->client->dev, GFP_KERNEL, "adm1266-%x-%s",
294*4882a593Smuzhiyun 					   data->client->addr, adm1266_names[i]);
295*4882a593Smuzhiyun 		if (!gpio_name)
296*4882a593Smuzhiyun 			return -ENOMEM;
297*4882a593Smuzhiyun 
298*4882a593Smuzhiyun 		data->gpio_names[i] = gpio_name;
299*4882a593Smuzhiyun 	}
300*4882a593Smuzhiyun 
301*4882a593Smuzhiyun 	data->gc.label = name;
302*4882a593Smuzhiyun 	data->gc.parent = &data->client->dev;
303*4882a593Smuzhiyun 	data->gc.owner = THIS_MODULE;
304*4882a593Smuzhiyun 	data->gc.base = -1;
305*4882a593Smuzhiyun 	data->gc.names = data->gpio_names;
306*4882a593Smuzhiyun 	data->gc.ngpio = ARRAY_SIZE(data->gpio_names);
307*4882a593Smuzhiyun 	data->gc.get = adm1266_gpio_get;
308*4882a593Smuzhiyun 	data->gc.get_multiple = adm1266_gpio_get_multiple;
309*4882a593Smuzhiyun 	data->gc.dbg_show = adm1266_gpio_dbg_show;
310*4882a593Smuzhiyun 
311*4882a593Smuzhiyun 	ret = devm_gpiochip_add_data(&data->client->dev, &data->gc, data);
312*4882a593Smuzhiyun 	if (ret)
313*4882a593Smuzhiyun 		dev_err(&data->client->dev, "GPIO registering failed (%d)\n", ret);
314*4882a593Smuzhiyun 
315*4882a593Smuzhiyun 	return ret;
316*4882a593Smuzhiyun }
317*4882a593Smuzhiyun 
adm1266_state_read(struct seq_file * s,void * pdata)318*4882a593Smuzhiyun static int adm1266_state_read(struct seq_file *s, void *pdata)
319*4882a593Smuzhiyun {
320*4882a593Smuzhiyun 	struct device *dev = s->private;
321*4882a593Smuzhiyun 	struct i2c_client *client = to_i2c_client(dev);
322*4882a593Smuzhiyun 	int ret;
323*4882a593Smuzhiyun 
324*4882a593Smuzhiyun 	ret = i2c_smbus_read_word_data(client, ADM1266_READ_STATE);
325*4882a593Smuzhiyun 	if (ret < 0)
326*4882a593Smuzhiyun 		return ret;
327*4882a593Smuzhiyun 
328*4882a593Smuzhiyun 	seq_printf(s, "%d\n", ret);
329*4882a593Smuzhiyun 
330*4882a593Smuzhiyun 	return 0;
331*4882a593Smuzhiyun }
332*4882a593Smuzhiyun 
adm1266_init_debugfs(struct adm1266_data * data)333*4882a593Smuzhiyun static void adm1266_init_debugfs(struct adm1266_data *data)
334*4882a593Smuzhiyun {
335*4882a593Smuzhiyun 	struct dentry *root;
336*4882a593Smuzhiyun 
337*4882a593Smuzhiyun 	root = pmbus_get_debugfs_dir(data->client);
338*4882a593Smuzhiyun 	if (!root)
339*4882a593Smuzhiyun 		return;
340*4882a593Smuzhiyun 
341*4882a593Smuzhiyun 	data->debugfs_dir = debugfs_create_dir(data->client->name, root);
342*4882a593Smuzhiyun 	if (!data->debugfs_dir)
343*4882a593Smuzhiyun 		return;
344*4882a593Smuzhiyun 
345*4882a593Smuzhiyun 	debugfs_create_devm_seqfile(&data->client->dev, "sequencer_state", data->debugfs_dir,
346*4882a593Smuzhiyun 				    adm1266_state_read);
347*4882a593Smuzhiyun }
348*4882a593Smuzhiyun 
adm1266_nvmem_read_blackbox(struct adm1266_data * data,u8 * read_buff)349*4882a593Smuzhiyun static int adm1266_nvmem_read_blackbox(struct adm1266_data *data, u8 *read_buff)
350*4882a593Smuzhiyun {
351*4882a593Smuzhiyun 	int record_count;
352*4882a593Smuzhiyun 	char index;
353*4882a593Smuzhiyun 	u8 buf[5];
354*4882a593Smuzhiyun 	int ret;
355*4882a593Smuzhiyun 
356*4882a593Smuzhiyun 	ret = i2c_smbus_read_block_data(data->client, ADM1266_BLACKBOX_INFO, buf);
357*4882a593Smuzhiyun 	if (ret < 0)
358*4882a593Smuzhiyun 		return ret;
359*4882a593Smuzhiyun 
360*4882a593Smuzhiyun 	if (ret != 4)
361*4882a593Smuzhiyun 		return -EIO;
362*4882a593Smuzhiyun 
363*4882a593Smuzhiyun 	record_count = buf[3];
364*4882a593Smuzhiyun 
365*4882a593Smuzhiyun 	for (index = 0; index < record_count; index++) {
366*4882a593Smuzhiyun 		ret = adm1266_pmbus_block_xfer(data, ADM1266_READ_BLACKBOX, 1, &index, read_buff);
367*4882a593Smuzhiyun 		if (ret < 0)
368*4882a593Smuzhiyun 			return ret;
369*4882a593Smuzhiyun 
370*4882a593Smuzhiyun 		if (ret != ADM1266_BLACKBOX_SIZE)
371*4882a593Smuzhiyun 			return -EIO;
372*4882a593Smuzhiyun 
373*4882a593Smuzhiyun 		read_buff += ADM1266_BLACKBOX_SIZE;
374*4882a593Smuzhiyun 	}
375*4882a593Smuzhiyun 
376*4882a593Smuzhiyun 	return 0;
377*4882a593Smuzhiyun }
378*4882a593Smuzhiyun 
adm1266_nvmem_read(void * priv,unsigned int offset,void * val,size_t bytes)379*4882a593Smuzhiyun static int adm1266_nvmem_read(void *priv, unsigned int offset, void *val, size_t bytes)
380*4882a593Smuzhiyun {
381*4882a593Smuzhiyun 	struct adm1266_data *data = priv;
382*4882a593Smuzhiyun 	int ret;
383*4882a593Smuzhiyun 
384*4882a593Smuzhiyun 	if (offset + bytes > data->nvmem_config.size)
385*4882a593Smuzhiyun 		return -EINVAL;
386*4882a593Smuzhiyun 
387*4882a593Smuzhiyun 	if (offset == 0) {
388*4882a593Smuzhiyun 		memset(data->dev_mem, 0, data->nvmem_config.size);
389*4882a593Smuzhiyun 
390*4882a593Smuzhiyun 		ret = adm1266_nvmem_read_blackbox(data, data->dev_mem);
391*4882a593Smuzhiyun 		if (ret) {
392*4882a593Smuzhiyun 			dev_err(&data->client->dev, "Could not read blackbox!");
393*4882a593Smuzhiyun 			return ret;
394*4882a593Smuzhiyun 		}
395*4882a593Smuzhiyun 	}
396*4882a593Smuzhiyun 
397*4882a593Smuzhiyun 	memcpy(val, data->dev_mem + offset, bytes);
398*4882a593Smuzhiyun 
399*4882a593Smuzhiyun 	return 0;
400*4882a593Smuzhiyun }
401*4882a593Smuzhiyun 
adm1266_config_nvmem(struct adm1266_data * data)402*4882a593Smuzhiyun static int adm1266_config_nvmem(struct adm1266_data *data)
403*4882a593Smuzhiyun {
404*4882a593Smuzhiyun 	data->nvmem_config.name = dev_name(&data->client->dev);
405*4882a593Smuzhiyun 	data->nvmem_config.dev = &data->client->dev;
406*4882a593Smuzhiyun 	data->nvmem_config.root_only = true;
407*4882a593Smuzhiyun 	data->nvmem_config.read_only = true;
408*4882a593Smuzhiyun 	data->nvmem_config.owner = THIS_MODULE;
409*4882a593Smuzhiyun 	data->nvmem_config.reg_read = adm1266_nvmem_read;
410*4882a593Smuzhiyun 	data->nvmem_config.cells = adm1266_nvmem_cells;
411*4882a593Smuzhiyun 	data->nvmem_config.ncells = ARRAY_SIZE(adm1266_nvmem_cells);
412*4882a593Smuzhiyun 	data->nvmem_config.priv = data;
413*4882a593Smuzhiyun 	data->nvmem_config.stride = 1;
414*4882a593Smuzhiyun 	data->nvmem_config.word_size = 1;
415*4882a593Smuzhiyun 	data->nvmem_config.size = adm1266_nvmem_cells[0].bytes;
416*4882a593Smuzhiyun 
417*4882a593Smuzhiyun 	data->dev_mem = devm_kzalloc(&data->client->dev, data->nvmem_config.size, GFP_KERNEL);
418*4882a593Smuzhiyun 	if (!data->dev_mem)
419*4882a593Smuzhiyun 		return -ENOMEM;
420*4882a593Smuzhiyun 
421*4882a593Smuzhiyun 	data->nvmem = devm_nvmem_register(&data->client->dev, &data->nvmem_config);
422*4882a593Smuzhiyun 	if (IS_ERR(data->nvmem)) {
423*4882a593Smuzhiyun 		dev_err(&data->client->dev, "Could not register nvmem!");
424*4882a593Smuzhiyun 		return PTR_ERR(data->nvmem);
425*4882a593Smuzhiyun 	}
426*4882a593Smuzhiyun 
427*4882a593Smuzhiyun 	return 0;
428*4882a593Smuzhiyun }
429*4882a593Smuzhiyun 
adm1266_set_rtc(struct adm1266_data * data)430*4882a593Smuzhiyun static int adm1266_set_rtc(struct adm1266_data *data)
431*4882a593Smuzhiyun {
432*4882a593Smuzhiyun 	time64_t kt;
433*4882a593Smuzhiyun 	char write_buf[6];
434*4882a593Smuzhiyun 	int i;
435*4882a593Smuzhiyun 
436*4882a593Smuzhiyun 	kt = ktime_get_seconds();
437*4882a593Smuzhiyun 
438*4882a593Smuzhiyun 	memset(write_buf, 0, sizeof(write_buf));
439*4882a593Smuzhiyun 
440*4882a593Smuzhiyun 	for (i = 0; i < 4; i++)
441*4882a593Smuzhiyun 		write_buf[2 + i] = (kt >> (i * 8)) & 0xFF;
442*4882a593Smuzhiyun 
443*4882a593Smuzhiyun 	return i2c_smbus_write_block_data(data->client, ADM1266_SET_RTC, sizeof(write_buf),
444*4882a593Smuzhiyun 					  write_buf);
445*4882a593Smuzhiyun }
446*4882a593Smuzhiyun 
adm1266_probe(struct i2c_client * client)447*4882a593Smuzhiyun static int adm1266_probe(struct i2c_client *client)
448*4882a593Smuzhiyun {
449*4882a593Smuzhiyun 	struct adm1266_data *data;
450*4882a593Smuzhiyun 	int ret;
451*4882a593Smuzhiyun 	int i;
452*4882a593Smuzhiyun 
453*4882a593Smuzhiyun 	data = devm_kzalloc(&client->dev, sizeof(struct adm1266_data), GFP_KERNEL);
454*4882a593Smuzhiyun 	if (!data)
455*4882a593Smuzhiyun 		return -ENOMEM;
456*4882a593Smuzhiyun 
457*4882a593Smuzhiyun 	data->client = client;
458*4882a593Smuzhiyun 	data->info.pages = 17;
459*4882a593Smuzhiyun 	data->info.format[PSC_VOLTAGE_OUT] = linear;
460*4882a593Smuzhiyun 	for (i = 0; i < data->info.pages; i++)
461*4882a593Smuzhiyun 		data->info.func[i] = PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT;
462*4882a593Smuzhiyun 
463*4882a593Smuzhiyun 	crc8_populate_msb(pmbus_crc_table, 0x7);
464*4882a593Smuzhiyun 	mutex_init(&data->buf_mutex);
465*4882a593Smuzhiyun 
466*4882a593Smuzhiyun 	ret = adm1266_config_gpio(data);
467*4882a593Smuzhiyun 	if (ret < 0)
468*4882a593Smuzhiyun 		return ret;
469*4882a593Smuzhiyun 
470*4882a593Smuzhiyun 	ret = adm1266_set_rtc(data);
471*4882a593Smuzhiyun 	if (ret < 0)
472*4882a593Smuzhiyun 		return ret;
473*4882a593Smuzhiyun 
474*4882a593Smuzhiyun 	ret = adm1266_config_nvmem(data);
475*4882a593Smuzhiyun 	if (ret < 0)
476*4882a593Smuzhiyun 		return ret;
477*4882a593Smuzhiyun 
478*4882a593Smuzhiyun 	ret = pmbus_do_probe(client, &data->info);
479*4882a593Smuzhiyun 	if (ret)
480*4882a593Smuzhiyun 		return ret;
481*4882a593Smuzhiyun 
482*4882a593Smuzhiyun 	adm1266_init_debugfs(data);
483*4882a593Smuzhiyun 
484*4882a593Smuzhiyun 	return 0;
485*4882a593Smuzhiyun }
486*4882a593Smuzhiyun 
487*4882a593Smuzhiyun static const struct of_device_id adm1266_of_match[] = {
488*4882a593Smuzhiyun 	{ .compatible = "adi,adm1266" },
489*4882a593Smuzhiyun 	{ }
490*4882a593Smuzhiyun };
491*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, adm1266_of_match);
492*4882a593Smuzhiyun 
493*4882a593Smuzhiyun static const struct i2c_device_id adm1266_id[] = {
494*4882a593Smuzhiyun 	{ "adm1266", 0 },
495*4882a593Smuzhiyun 	{ }
496*4882a593Smuzhiyun };
497*4882a593Smuzhiyun MODULE_DEVICE_TABLE(i2c, adm1266_id);
498*4882a593Smuzhiyun 
499*4882a593Smuzhiyun static struct i2c_driver adm1266_driver = {
500*4882a593Smuzhiyun 	.driver = {
501*4882a593Smuzhiyun 		   .name = "adm1266",
502*4882a593Smuzhiyun 		   .of_match_table = adm1266_of_match,
503*4882a593Smuzhiyun 		  },
504*4882a593Smuzhiyun 	.probe_new = adm1266_probe,
505*4882a593Smuzhiyun 	.remove = pmbus_do_remove,
506*4882a593Smuzhiyun 	.id_table = adm1266_id,
507*4882a593Smuzhiyun };
508*4882a593Smuzhiyun 
509*4882a593Smuzhiyun module_i2c_driver(adm1266_driver);
510*4882a593Smuzhiyun 
511*4882a593Smuzhiyun MODULE_AUTHOR("Alexandru Tachici <alexandru.tachici@analog.com>");
512*4882a593Smuzhiyun MODULE_DESCRIPTION("PMBus driver for Analog Devices ADM1266");
513*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
514