1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * pc87427.c - hardware monitoring driver for the
4*4882a593Smuzhiyun * National Semiconductor PC87427 Super-I/O chip
5*4882a593Smuzhiyun * Copyright (C) 2006, 2008, 2010 Jean Delvare <jdelvare@suse.de>
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Supports the following chips:
8*4882a593Smuzhiyun *
9*4882a593Smuzhiyun * Chip #vin #fan #pwm #temp devid
10*4882a593Smuzhiyun * PC87427 - 8 4 6 0xF2
11*4882a593Smuzhiyun *
12*4882a593Smuzhiyun * This driver assumes that no more than one chip is present.
13*4882a593Smuzhiyun * Only fans are fully supported so far. Temperatures are in read-only
14*4882a593Smuzhiyun * mode, and voltages aren't supported at all.
15*4882a593Smuzhiyun */
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun #include <linux/module.h>
20*4882a593Smuzhiyun #include <linux/init.h>
21*4882a593Smuzhiyun #include <linux/slab.h>
22*4882a593Smuzhiyun #include <linux/jiffies.h>
23*4882a593Smuzhiyun #include <linux/platform_device.h>
24*4882a593Smuzhiyun #include <linux/hwmon.h>
25*4882a593Smuzhiyun #include <linux/hwmon-sysfs.h>
26*4882a593Smuzhiyun #include <linux/err.h>
27*4882a593Smuzhiyun #include <linux/mutex.h>
28*4882a593Smuzhiyun #include <linux/sysfs.h>
29*4882a593Smuzhiyun #include <linux/ioport.h>
30*4882a593Smuzhiyun #include <linux/acpi.h>
31*4882a593Smuzhiyun #include <linux/io.h>
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun static unsigned short force_id;
34*4882a593Smuzhiyun module_param(force_id, ushort, 0);
35*4882a593Smuzhiyun MODULE_PARM_DESC(force_id, "Override the detected device ID");
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun static struct platform_device *pdev;
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun #define DRVNAME "pc87427"
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun /*
42*4882a593Smuzhiyun * The lock mutex protects both the I/O accesses (needed because the
43*4882a593Smuzhiyun * device is using banked registers) and the register cache (needed to keep
44*4882a593Smuzhiyun * the data in the registers and the cache in sync at any time).
45*4882a593Smuzhiyun */
46*4882a593Smuzhiyun struct pc87427_data {
47*4882a593Smuzhiyun struct device *hwmon_dev;
48*4882a593Smuzhiyun struct mutex lock;
49*4882a593Smuzhiyun int address[2];
50*4882a593Smuzhiyun const char *name;
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun unsigned long last_updated; /* in jiffies */
53*4882a593Smuzhiyun u8 fan_enabled; /* bit vector */
54*4882a593Smuzhiyun u16 fan[8]; /* register values */
55*4882a593Smuzhiyun u16 fan_min[8]; /* register values */
56*4882a593Smuzhiyun u8 fan_status[8]; /* register values */
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun u8 pwm_enabled; /* bit vector */
59*4882a593Smuzhiyun u8 pwm_auto_ok; /* bit vector */
60*4882a593Smuzhiyun u8 pwm_enable[4]; /* register values */
61*4882a593Smuzhiyun u8 pwm[4]; /* register values */
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun u8 temp_enabled; /* bit vector */
64*4882a593Smuzhiyun s16 temp[6]; /* register values */
65*4882a593Smuzhiyun s8 temp_min[6]; /* register values */
66*4882a593Smuzhiyun s8 temp_max[6]; /* register values */
67*4882a593Smuzhiyun s8 temp_crit[6]; /* register values */
68*4882a593Smuzhiyun u8 temp_status[6]; /* register values */
69*4882a593Smuzhiyun u8 temp_type[6]; /* register values */
70*4882a593Smuzhiyun };
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun struct pc87427_sio_data {
73*4882a593Smuzhiyun unsigned short address[2];
74*4882a593Smuzhiyun u8 has_fanin;
75*4882a593Smuzhiyun u8 has_fanout;
76*4882a593Smuzhiyun };
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun /*
79*4882a593Smuzhiyun * Super-I/O registers and operations
80*4882a593Smuzhiyun */
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun #define SIOREG_LDSEL 0x07 /* Logical device select */
83*4882a593Smuzhiyun #define SIOREG_DEVID 0x20 /* Device ID */
84*4882a593Smuzhiyun #define SIOREG_CF2 0x22 /* Configuration 2 */
85*4882a593Smuzhiyun #define SIOREG_CF3 0x23 /* Configuration 3 */
86*4882a593Smuzhiyun #define SIOREG_CF4 0x24 /* Configuration 4 */
87*4882a593Smuzhiyun #define SIOREG_CF5 0x25 /* Configuration 5 */
88*4882a593Smuzhiyun #define SIOREG_CFB 0x2B /* Configuration B */
89*4882a593Smuzhiyun #define SIOREG_CFC 0x2C /* Configuration C */
90*4882a593Smuzhiyun #define SIOREG_CFD 0x2D /* Configuration D */
91*4882a593Smuzhiyun #define SIOREG_ACT 0x30 /* Device activation */
92*4882a593Smuzhiyun #define SIOREG_MAP 0x50 /* I/O or memory mapping */
93*4882a593Smuzhiyun #define SIOREG_IOBASE 0x60 /* I/O base address */
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun static const u8 logdev[2] = { 0x09, 0x14 };
96*4882a593Smuzhiyun static const char *logdev_str[2] = { DRVNAME " FMC", DRVNAME " HMC" };
97*4882a593Smuzhiyun #define LD_FAN 0
98*4882a593Smuzhiyun #define LD_IN 1
99*4882a593Smuzhiyun #define LD_TEMP 1
100*4882a593Smuzhiyun
superio_enter(int sioaddr)101*4882a593Smuzhiyun static inline int superio_enter(int sioaddr)
102*4882a593Smuzhiyun {
103*4882a593Smuzhiyun if (!request_muxed_region(sioaddr, 2, DRVNAME))
104*4882a593Smuzhiyun return -EBUSY;
105*4882a593Smuzhiyun return 0;
106*4882a593Smuzhiyun }
107*4882a593Smuzhiyun
superio_outb(int sioaddr,int reg,int val)108*4882a593Smuzhiyun static inline void superio_outb(int sioaddr, int reg, int val)
109*4882a593Smuzhiyun {
110*4882a593Smuzhiyun outb(reg, sioaddr);
111*4882a593Smuzhiyun outb(val, sioaddr + 1);
112*4882a593Smuzhiyun }
113*4882a593Smuzhiyun
superio_inb(int sioaddr,int reg)114*4882a593Smuzhiyun static inline int superio_inb(int sioaddr, int reg)
115*4882a593Smuzhiyun {
116*4882a593Smuzhiyun outb(reg, sioaddr);
117*4882a593Smuzhiyun return inb(sioaddr + 1);
118*4882a593Smuzhiyun }
119*4882a593Smuzhiyun
superio_exit(int sioaddr)120*4882a593Smuzhiyun static inline void superio_exit(int sioaddr)
121*4882a593Smuzhiyun {
122*4882a593Smuzhiyun outb(0x02, sioaddr);
123*4882a593Smuzhiyun outb(0x02, sioaddr + 1);
124*4882a593Smuzhiyun release_region(sioaddr, 2);
125*4882a593Smuzhiyun }
126*4882a593Smuzhiyun
127*4882a593Smuzhiyun /*
128*4882a593Smuzhiyun * Logical devices
129*4882a593Smuzhiyun */
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun #define REGION_LENGTH 32
132*4882a593Smuzhiyun #define PC87427_REG_BANK 0x0f
133*4882a593Smuzhiyun #define BANK_FM(nr) (nr)
134*4882a593Smuzhiyun #define BANK_FT(nr) (0x08 + (nr))
135*4882a593Smuzhiyun #define BANK_FC(nr) (0x10 + (nr) * 2)
136*4882a593Smuzhiyun #define BANK_TM(nr) (nr)
137*4882a593Smuzhiyun #define BANK_VM(nr) (0x08 + (nr))
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun /*
140*4882a593Smuzhiyun * I/O access functions
141*4882a593Smuzhiyun */
142*4882a593Smuzhiyun
143*4882a593Smuzhiyun /* ldi is the logical device index */
pc87427_read8(struct pc87427_data * data,u8 ldi,u8 reg)144*4882a593Smuzhiyun static inline int pc87427_read8(struct pc87427_data *data, u8 ldi, u8 reg)
145*4882a593Smuzhiyun {
146*4882a593Smuzhiyun return inb(data->address[ldi] + reg);
147*4882a593Smuzhiyun }
148*4882a593Smuzhiyun
149*4882a593Smuzhiyun /* Must be called with data->lock held, except during init */
pc87427_read8_bank(struct pc87427_data * data,u8 ldi,u8 bank,u8 reg)150*4882a593Smuzhiyun static inline int pc87427_read8_bank(struct pc87427_data *data, u8 ldi,
151*4882a593Smuzhiyun u8 bank, u8 reg)
152*4882a593Smuzhiyun {
153*4882a593Smuzhiyun outb(bank, data->address[ldi] + PC87427_REG_BANK);
154*4882a593Smuzhiyun return inb(data->address[ldi] + reg);
155*4882a593Smuzhiyun }
156*4882a593Smuzhiyun
157*4882a593Smuzhiyun /* Must be called with data->lock held, except during init */
pc87427_write8_bank(struct pc87427_data * data,u8 ldi,u8 bank,u8 reg,u8 value)158*4882a593Smuzhiyun static inline void pc87427_write8_bank(struct pc87427_data *data, u8 ldi,
159*4882a593Smuzhiyun u8 bank, u8 reg, u8 value)
160*4882a593Smuzhiyun {
161*4882a593Smuzhiyun outb(bank, data->address[ldi] + PC87427_REG_BANK);
162*4882a593Smuzhiyun outb(value, data->address[ldi] + reg);
163*4882a593Smuzhiyun }
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun /*
166*4882a593Smuzhiyun * Fan registers and conversions
167*4882a593Smuzhiyun */
168*4882a593Smuzhiyun
169*4882a593Smuzhiyun /* fan data registers are 16-bit wide */
170*4882a593Smuzhiyun #define PC87427_REG_FAN 0x12
171*4882a593Smuzhiyun #define PC87427_REG_FAN_MIN 0x14
172*4882a593Smuzhiyun #define PC87427_REG_FAN_STATUS 0x10
173*4882a593Smuzhiyun
174*4882a593Smuzhiyun #define FAN_STATUS_STALL (1 << 3)
175*4882a593Smuzhiyun #define FAN_STATUS_LOSPD (1 << 1)
176*4882a593Smuzhiyun #define FAN_STATUS_MONEN (1 << 0)
177*4882a593Smuzhiyun
178*4882a593Smuzhiyun /*
179*4882a593Smuzhiyun * Dedicated function to read all registers related to a given fan input.
180*4882a593Smuzhiyun * This saves us quite a few locks and bank selections.
181*4882a593Smuzhiyun * Must be called with data->lock held.
182*4882a593Smuzhiyun * nr is from 0 to 7
183*4882a593Smuzhiyun */
pc87427_readall_fan(struct pc87427_data * data,u8 nr)184*4882a593Smuzhiyun static void pc87427_readall_fan(struct pc87427_data *data, u8 nr)
185*4882a593Smuzhiyun {
186*4882a593Smuzhiyun int iobase = data->address[LD_FAN];
187*4882a593Smuzhiyun
188*4882a593Smuzhiyun outb(BANK_FM(nr), iobase + PC87427_REG_BANK);
189*4882a593Smuzhiyun data->fan[nr] = inw(iobase + PC87427_REG_FAN);
190*4882a593Smuzhiyun data->fan_min[nr] = inw(iobase + PC87427_REG_FAN_MIN);
191*4882a593Smuzhiyun data->fan_status[nr] = inb(iobase + PC87427_REG_FAN_STATUS);
192*4882a593Smuzhiyun /* Clear fan alarm bits */
193*4882a593Smuzhiyun outb(data->fan_status[nr], iobase + PC87427_REG_FAN_STATUS);
194*4882a593Smuzhiyun }
195*4882a593Smuzhiyun
196*4882a593Smuzhiyun /*
197*4882a593Smuzhiyun * The 2 LSB of fan speed registers are used for something different.
198*4882a593Smuzhiyun * The actual 2 LSB of the measurements are not available.
199*4882a593Smuzhiyun */
fan_from_reg(u16 reg)200*4882a593Smuzhiyun static inline unsigned long fan_from_reg(u16 reg)
201*4882a593Smuzhiyun {
202*4882a593Smuzhiyun reg &= 0xfffc;
203*4882a593Smuzhiyun if (reg == 0x0000 || reg == 0xfffc)
204*4882a593Smuzhiyun return 0;
205*4882a593Smuzhiyun return 5400000UL / reg;
206*4882a593Smuzhiyun }
207*4882a593Smuzhiyun
208*4882a593Smuzhiyun /* The 2 LSB of the fan speed limit registers are not significant. */
fan_to_reg(unsigned long val)209*4882a593Smuzhiyun static inline u16 fan_to_reg(unsigned long val)
210*4882a593Smuzhiyun {
211*4882a593Smuzhiyun if (val < 83UL)
212*4882a593Smuzhiyun return 0xffff;
213*4882a593Smuzhiyun if (val >= 1350000UL)
214*4882a593Smuzhiyun return 0x0004;
215*4882a593Smuzhiyun return ((1350000UL + val / 2) / val) << 2;
216*4882a593Smuzhiyun }
217*4882a593Smuzhiyun
218*4882a593Smuzhiyun /*
219*4882a593Smuzhiyun * PWM registers and conversions
220*4882a593Smuzhiyun */
221*4882a593Smuzhiyun
222*4882a593Smuzhiyun #define PC87427_REG_PWM_ENABLE 0x10
223*4882a593Smuzhiyun #define PC87427_REG_PWM_DUTY 0x12
224*4882a593Smuzhiyun
225*4882a593Smuzhiyun #define PWM_ENABLE_MODE_MASK (7 << 4)
226*4882a593Smuzhiyun #define PWM_ENABLE_CTLEN (1 << 0)
227*4882a593Smuzhiyun
228*4882a593Smuzhiyun #define PWM_MODE_MANUAL (0 << 4)
229*4882a593Smuzhiyun #define PWM_MODE_AUTO (1 << 4)
230*4882a593Smuzhiyun #define PWM_MODE_OFF (2 << 4)
231*4882a593Smuzhiyun #define PWM_MODE_ON (7 << 4)
232*4882a593Smuzhiyun
233*4882a593Smuzhiyun /*
234*4882a593Smuzhiyun * Dedicated function to read all registers related to a given PWM output.
235*4882a593Smuzhiyun * This saves us quite a few locks and bank selections.
236*4882a593Smuzhiyun * Must be called with data->lock held.
237*4882a593Smuzhiyun * nr is from 0 to 3
238*4882a593Smuzhiyun */
pc87427_readall_pwm(struct pc87427_data * data,u8 nr)239*4882a593Smuzhiyun static void pc87427_readall_pwm(struct pc87427_data *data, u8 nr)
240*4882a593Smuzhiyun {
241*4882a593Smuzhiyun int iobase = data->address[LD_FAN];
242*4882a593Smuzhiyun
243*4882a593Smuzhiyun outb(BANK_FC(nr), iobase + PC87427_REG_BANK);
244*4882a593Smuzhiyun data->pwm_enable[nr] = inb(iobase + PC87427_REG_PWM_ENABLE);
245*4882a593Smuzhiyun data->pwm[nr] = inb(iobase + PC87427_REG_PWM_DUTY);
246*4882a593Smuzhiyun }
247*4882a593Smuzhiyun
pwm_enable_from_reg(u8 reg)248*4882a593Smuzhiyun static inline int pwm_enable_from_reg(u8 reg)
249*4882a593Smuzhiyun {
250*4882a593Smuzhiyun switch (reg & PWM_ENABLE_MODE_MASK) {
251*4882a593Smuzhiyun case PWM_MODE_ON:
252*4882a593Smuzhiyun return 0;
253*4882a593Smuzhiyun case PWM_MODE_MANUAL:
254*4882a593Smuzhiyun case PWM_MODE_OFF:
255*4882a593Smuzhiyun return 1;
256*4882a593Smuzhiyun case PWM_MODE_AUTO:
257*4882a593Smuzhiyun return 2;
258*4882a593Smuzhiyun default:
259*4882a593Smuzhiyun return -EPROTO;
260*4882a593Smuzhiyun }
261*4882a593Smuzhiyun }
262*4882a593Smuzhiyun
pwm_enable_to_reg(unsigned long val,u8 pwmval)263*4882a593Smuzhiyun static inline u8 pwm_enable_to_reg(unsigned long val, u8 pwmval)
264*4882a593Smuzhiyun {
265*4882a593Smuzhiyun switch (val) {
266*4882a593Smuzhiyun default:
267*4882a593Smuzhiyun return PWM_MODE_ON;
268*4882a593Smuzhiyun case 1:
269*4882a593Smuzhiyun return pwmval ? PWM_MODE_MANUAL : PWM_MODE_OFF;
270*4882a593Smuzhiyun case 2:
271*4882a593Smuzhiyun return PWM_MODE_AUTO;
272*4882a593Smuzhiyun }
273*4882a593Smuzhiyun }
274*4882a593Smuzhiyun
275*4882a593Smuzhiyun /*
276*4882a593Smuzhiyun * Temperature registers and conversions
277*4882a593Smuzhiyun */
278*4882a593Smuzhiyun
279*4882a593Smuzhiyun #define PC87427_REG_TEMP_STATUS 0x10
280*4882a593Smuzhiyun #define PC87427_REG_TEMP 0x14
281*4882a593Smuzhiyun #define PC87427_REG_TEMP_MAX 0x18
282*4882a593Smuzhiyun #define PC87427_REG_TEMP_MIN 0x19
283*4882a593Smuzhiyun #define PC87427_REG_TEMP_CRIT 0x1a
284*4882a593Smuzhiyun #define PC87427_REG_TEMP_TYPE 0x1d
285*4882a593Smuzhiyun
286*4882a593Smuzhiyun #define TEMP_STATUS_CHANEN (1 << 0)
287*4882a593Smuzhiyun #define TEMP_STATUS_LOWFLG (1 << 1)
288*4882a593Smuzhiyun #define TEMP_STATUS_HIGHFLG (1 << 2)
289*4882a593Smuzhiyun #define TEMP_STATUS_CRITFLG (1 << 3)
290*4882a593Smuzhiyun #define TEMP_STATUS_SENSERR (1 << 5)
291*4882a593Smuzhiyun #define TEMP_TYPE_MASK (3 << 5)
292*4882a593Smuzhiyun
293*4882a593Smuzhiyun #define TEMP_TYPE_THERMISTOR (1 << 5)
294*4882a593Smuzhiyun #define TEMP_TYPE_REMOTE_DIODE (2 << 5)
295*4882a593Smuzhiyun #define TEMP_TYPE_LOCAL_DIODE (3 << 5)
296*4882a593Smuzhiyun
297*4882a593Smuzhiyun /*
298*4882a593Smuzhiyun * Dedicated function to read all registers related to a given temperature
299*4882a593Smuzhiyun * input. This saves us quite a few locks and bank selections.
300*4882a593Smuzhiyun * Must be called with data->lock held.
301*4882a593Smuzhiyun * nr is from 0 to 5
302*4882a593Smuzhiyun */
pc87427_readall_temp(struct pc87427_data * data,u8 nr)303*4882a593Smuzhiyun static void pc87427_readall_temp(struct pc87427_data *data, u8 nr)
304*4882a593Smuzhiyun {
305*4882a593Smuzhiyun int iobase = data->address[LD_TEMP];
306*4882a593Smuzhiyun
307*4882a593Smuzhiyun outb(BANK_TM(nr), iobase + PC87427_REG_BANK);
308*4882a593Smuzhiyun data->temp[nr] = le16_to_cpu(inw(iobase + PC87427_REG_TEMP));
309*4882a593Smuzhiyun data->temp_max[nr] = inb(iobase + PC87427_REG_TEMP_MAX);
310*4882a593Smuzhiyun data->temp_min[nr] = inb(iobase + PC87427_REG_TEMP_MIN);
311*4882a593Smuzhiyun data->temp_crit[nr] = inb(iobase + PC87427_REG_TEMP_CRIT);
312*4882a593Smuzhiyun data->temp_type[nr] = inb(iobase + PC87427_REG_TEMP_TYPE);
313*4882a593Smuzhiyun data->temp_status[nr] = inb(iobase + PC87427_REG_TEMP_STATUS);
314*4882a593Smuzhiyun /* Clear fan alarm bits */
315*4882a593Smuzhiyun outb(data->temp_status[nr], iobase + PC87427_REG_TEMP_STATUS);
316*4882a593Smuzhiyun }
317*4882a593Smuzhiyun
temp_type_from_reg(u8 reg)318*4882a593Smuzhiyun static inline unsigned int temp_type_from_reg(u8 reg)
319*4882a593Smuzhiyun {
320*4882a593Smuzhiyun switch (reg & TEMP_TYPE_MASK) {
321*4882a593Smuzhiyun case TEMP_TYPE_THERMISTOR:
322*4882a593Smuzhiyun return 4;
323*4882a593Smuzhiyun case TEMP_TYPE_REMOTE_DIODE:
324*4882a593Smuzhiyun case TEMP_TYPE_LOCAL_DIODE:
325*4882a593Smuzhiyun return 3;
326*4882a593Smuzhiyun default:
327*4882a593Smuzhiyun return 0;
328*4882a593Smuzhiyun }
329*4882a593Smuzhiyun }
330*4882a593Smuzhiyun
331*4882a593Smuzhiyun /*
332*4882a593Smuzhiyun * We assume 8-bit thermal sensors; 9-bit thermal sensors are possible
333*4882a593Smuzhiyun * too, but I have no idea how to figure out when they are used.
334*4882a593Smuzhiyun */
temp_from_reg(s16 reg)335*4882a593Smuzhiyun static inline long temp_from_reg(s16 reg)
336*4882a593Smuzhiyun {
337*4882a593Smuzhiyun return reg * 1000 / 256;
338*4882a593Smuzhiyun }
339*4882a593Smuzhiyun
temp_from_reg8(s8 reg)340*4882a593Smuzhiyun static inline long temp_from_reg8(s8 reg)
341*4882a593Smuzhiyun {
342*4882a593Smuzhiyun return reg * 1000;
343*4882a593Smuzhiyun }
344*4882a593Smuzhiyun
345*4882a593Smuzhiyun /*
346*4882a593Smuzhiyun * Data interface
347*4882a593Smuzhiyun */
348*4882a593Smuzhiyun
pc87427_update_device(struct device * dev)349*4882a593Smuzhiyun static struct pc87427_data *pc87427_update_device(struct device *dev)
350*4882a593Smuzhiyun {
351*4882a593Smuzhiyun struct pc87427_data *data = dev_get_drvdata(dev);
352*4882a593Smuzhiyun int i;
353*4882a593Smuzhiyun
354*4882a593Smuzhiyun mutex_lock(&data->lock);
355*4882a593Smuzhiyun if (!time_after(jiffies, data->last_updated + HZ)
356*4882a593Smuzhiyun && data->last_updated)
357*4882a593Smuzhiyun goto done;
358*4882a593Smuzhiyun
359*4882a593Smuzhiyun /* Fans */
360*4882a593Smuzhiyun for (i = 0; i < 8; i++) {
361*4882a593Smuzhiyun if (!(data->fan_enabled & (1 << i)))
362*4882a593Smuzhiyun continue;
363*4882a593Smuzhiyun pc87427_readall_fan(data, i);
364*4882a593Smuzhiyun }
365*4882a593Smuzhiyun
366*4882a593Smuzhiyun /* PWM outputs */
367*4882a593Smuzhiyun for (i = 0; i < 4; i++) {
368*4882a593Smuzhiyun if (!(data->pwm_enabled & (1 << i)))
369*4882a593Smuzhiyun continue;
370*4882a593Smuzhiyun pc87427_readall_pwm(data, i);
371*4882a593Smuzhiyun }
372*4882a593Smuzhiyun
373*4882a593Smuzhiyun /* Temperature channels */
374*4882a593Smuzhiyun for (i = 0; i < 6; i++) {
375*4882a593Smuzhiyun if (!(data->temp_enabled & (1 << i)))
376*4882a593Smuzhiyun continue;
377*4882a593Smuzhiyun pc87427_readall_temp(data, i);
378*4882a593Smuzhiyun }
379*4882a593Smuzhiyun
380*4882a593Smuzhiyun data->last_updated = jiffies;
381*4882a593Smuzhiyun
382*4882a593Smuzhiyun done:
383*4882a593Smuzhiyun mutex_unlock(&data->lock);
384*4882a593Smuzhiyun return data;
385*4882a593Smuzhiyun }
386*4882a593Smuzhiyun
fan_input_show(struct device * dev,struct device_attribute * devattr,char * buf)387*4882a593Smuzhiyun static ssize_t fan_input_show(struct device *dev,
388*4882a593Smuzhiyun struct device_attribute *devattr, char *buf)
389*4882a593Smuzhiyun {
390*4882a593Smuzhiyun struct pc87427_data *data = pc87427_update_device(dev);
391*4882a593Smuzhiyun int nr = to_sensor_dev_attr(devattr)->index;
392*4882a593Smuzhiyun
393*4882a593Smuzhiyun return sprintf(buf, "%lu\n", fan_from_reg(data->fan[nr]));
394*4882a593Smuzhiyun }
395*4882a593Smuzhiyun
fan_min_show(struct device * dev,struct device_attribute * devattr,char * buf)396*4882a593Smuzhiyun static ssize_t fan_min_show(struct device *dev,
397*4882a593Smuzhiyun struct device_attribute *devattr, char *buf)
398*4882a593Smuzhiyun {
399*4882a593Smuzhiyun struct pc87427_data *data = pc87427_update_device(dev);
400*4882a593Smuzhiyun int nr = to_sensor_dev_attr(devattr)->index;
401*4882a593Smuzhiyun
402*4882a593Smuzhiyun return sprintf(buf, "%lu\n", fan_from_reg(data->fan_min[nr]));
403*4882a593Smuzhiyun }
404*4882a593Smuzhiyun
fan_alarm_show(struct device * dev,struct device_attribute * devattr,char * buf)405*4882a593Smuzhiyun static ssize_t fan_alarm_show(struct device *dev,
406*4882a593Smuzhiyun struct device_attribute *devattr, char *buf)
407*4882a593Smuzhiyun {
408*4882a593Smuzhiyun struct pc87427_data *data = pc87427_update_device(dev);
409*4882a593Smuzhiyun int nr = to_sensor_dev_attr(devattr)->index;
410*4882a593Smuzhiyun
411*4882a593Smuzhiyun return sprintf(buf, "%d\n", !!(data->fan_status[nr]
412*4882a593Smuzhiyun & FAN_STATUS_LOSPD));
413*4882a593Smuzhiyun }
414*4882a593Smuzhiyun
fan_fault_show(struct device * dev,struct device_attribute * devattr,char * buf)415*4882a593Smuzhiyun static ssize_t fan_fault_show(struct device *dev,
416*4882a593Smuzhiyun struct device_attribute *devattr, char *buf)
417*4882a593Smuzhiyun {
418*4882a593Smuzhiyun struct pc87427_data *data = pc87427_update_device(dev);
419*4882a593Smuzhiyun int nr = to_sensor_dev_attr(devattr)->index;
420*4882a593Smuzhiyun
421*4882a593Smuzhiyun return sprintf(buf, "%d\n", !!(data->fan_status[nr]
422*4882a593Smuzhiyun & FAN_STATUS_STALL));
423*4882a593Smuzhiyun }
424*4882a593Smuzhiyun
fan_min_store(struct device * dev,struct device_attribute * devattr,const char * buf,size_t count)425*4882a593Smuzhiyun static ssize_t fan_min_store(struct device *dev,
426*4882a593Smuzhiyun struct device_attribute *devattr,
427*4882a593Smuzhiyun const char *buf, size_t count)
428*4882a593Smuzhiyun {
429*4882a593Smuzhiyun struct pc87427_data *data = dev_get_drvdata(dev);
430*4882a593Smuzhiyun int nr = to_sensor_dev_attr(devattr)->index;
431*4882a593Smuzhiyun unsigned long val;
432*4882a593Smuzhiyun int iobase = data->address[LD_FAN];
433*4882a593Smuzhiyun
434*4882a593Smuzhiyun if (kstrtoul(buf, 10, &val) < 0)
435*4882a593Smuzhiyun return -EINVAL;
436*4882a593Smuzhiyun
437*4882a593Smuzhiyun mutex_lock(&data->lock);
438*4882a593Smuzhiyun outb(BANK_FM(nr), iobase + PC87427_REG_BANK);
439*4882a593Smuzhiyun /*
440*4882a593Smuzhiyun * The low speed limit registers are read-only while monitoring
441*4882a593Smuzhiyun * is enabled, so we have to disable monitoring, then change the
442*4882a593Smuzhiyun * limit, and finally enable monitoring again.
443*4882a593Smuzhiyun */
444*4882a593Smuzhiyun outb(0, iobase + PC87427_REG_FAN_STATUS);
445*4882a593Smuzhiyun data->fan_min[nr] = fan_to_reg(val);
446*4882a593Smuzhiyun outw(data->fan_min[nr], iobase + PC87427_REG_FAN_MIN);
447*4882a593Smuzhiyun outb(FAN_STATUS_MONEN, iobase + PC87427_REG_FAN_STATUS);
448*4882a593Smuzhiyun mutex_unlock(&data->lock);
449*4882a593Smuzhiyun
450*4882a593Smuzhiyun return count;
451*4882a593Smuzhiyun }
452*4882a593Smuzhiyun
453*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RO(fan1_input, fan_input, 0);
454*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RO(fan2_input, fan_input, 1);
455*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RO(fan3_input, fan_input, 2);
456*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RO(fan4_input, fan_input, 3);
457*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RO(fan5_input, fan_input, 4);
458*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RO(fan6_input, fan_input, 5);
459*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RO(fan7_input, fan_input, 6);
460*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RO(fan8_input, fan_input, 7);
461*4882a593Smuzhiyun
462*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RW(fan1_min, fan_min, 0);
463*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RW(fan2_min, fan_min, 1);
464*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RW(fan3_min, fan_min, 2);
465*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RW(fan4_min, fan_min, 3);
466*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RW(fan5_min, fan_min, 4);
467*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RW(fan6_min, fan_min, 5);
468*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RW(fan7_min, fan_min, 6);
469*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RW(fan8_min, fan_min, 7);
470*4882a593Smuzhiyun
471*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RO(fan1_alarm, fan_alarm, 0);
472*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RO(fan2_alarm, fan_alarm, 1);
473*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RO(fan3_alarm, fan_alarm, 2);
474*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RO(fan4_alarm, fan_alarm, 3);
475*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RO(fan5_alarm, fan_alarm, 4);
476*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RO(fan6_alarm, fan_alarm, 5);
477*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RO(fan7_alarm, fan_alarm, 6);
478*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RO(fan8_alarm, fan_alarm, 7);
479*4882a593Smuzhiyun
480*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RO(fan1_fault, fan_fault, 0);
481*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RO(fan2_fault, fan_fault, 1);
482*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RO(fan3_fault, fan_fault, 2);
483*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RO(fan4_fault, fan_fault, 3);
484*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RO(fan5_fault, fan_fault, 4);
485*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RO(fan6_fault, fan_fault, 5);
486*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RO(fan7_fault, fan_fault, 6);
487*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RO(fan8_fault, fan_fault, 7);
488*4882a593Smuzhiyun
489*4882a593Smuzhiyun static struct attribute *pc87427_attributes_fan[8][5] = {
490*4882a593Smuzhiyun {
491*4882a593Smuzhiyun &sensor_dev_attr_fan1_input.dev_attr.attr,
492*4882a593Smuzhiyun &sensor_dev_attr_fan1_min.dev_attr.attr,
493*4882a593Smuzhiyun &sensor_dev_attr_fan1_alarm.dev_attr.attr,
494*4882a593Smuzhiyun &sensor_dev_attr_fan1_fault.dev_attr.attr,
495*4882a593Smuzhiyun NULL
496*4882a593Smuzhiyun }, {
497*4882a593Smuzhiyun &sensor_dev_attr_fan2_input.dev_attr.attr,
498*4882a593Smuzhiyun &sensor_dev_attr_fan2_min.dev_attr.attr,
499*4882a593Smuzhiyun &sensor_dev_attr_fan2_alarm.dev_attr.attr,
500*4882a593Smuzhiyun &sensor_dev_attr_fan2_fault.dev_attr.attr,
501*4882a593Smuzhiyun NULL
502*4882a593Smuzhiyun }, {
503*4882a593Smuzhiyun &sensor_dev_attr_fan3_input.dev_attr.attr,
504*4882a593Smuzhiyun &sensor_dev_attr_fan3_min.dev_attr.attr,
505*4882a593Smuzhiyun &sensor_dev_attr_fan3_alarm.dev_attr.attr,
506*4882a593Smuzhiyun &sensor_dev_attr_fan3_fault.dev_attr.attr,
507*4882a593Smuzhiyun NULL
508*4882a593Smuzhiyun }, {
509*4882a593Smuzhiyun &sensor_dev_attr_fan4_input.dev_attr.attr,
510*4882a593Smuzhiyun &sensor_dev_attr_fan4_min.dev_attr.attr,
511*4882a593Smuzhiyun &sensor_dev_attr_fan4_alarm.dev_attr.attr,
512*4882a593Smuzhiyun &sensor_dev_attr_fan4_fault.dev_attr.attr,
513*4882a593Smuzhiyun NULL
514*4882a593Smuzhiyun }, {
515*4882a593Smuzhiyun &sensor_dev_attr_fan5_input.dev_attr.attr,
516*4882a593Smuzhiyun &sensor_dev_attr_fan5_min.dev_attr.attr,
517*4882a593Smuzhiyun &sensor_dev_attr_fan5_alarm.dev_attr.attr,
518*4882a593Smuzhiyun &sensor_dev_attr_fan5_fault.dev_attr.attr,
519*4882a593Smuzhiyun NULL
520*4882a593Smuzhiyun }, {
521*4882a593Smuzhiyun &sensor_dev_attr_fan6_input.dev_attr.attr,
522*4882a593Smuzhiyun &sensor_dev_attr_fan6_min.dev_attr.attr,
523*4882a593Smuzhiyun &sensor_dev_attr_fan6_alarm.dev_attr.attr,
524*4882a593Smuzhiyun &sensor_dev_attr_fan6_fault.dev_attr.attr,
525*4882a593Smuzhiyun NULL
526*4882a593Smuzhiyun }, {
527*4882a593Smuzhiyun &sensor_dev_attr_fan7_input.dev_attr.attr,
528*4882a593Smuzhiyun &sensor_dev_attr_fan7_min.dev_attr.attr,
529*4882a593Smuzhiyun &sensor_dev_attr_fan7_alarm.dev_attr.attr,
530*4882a593Smuzhiyun &sensor_dev_attr_fan7_fault.dev_attr.attr,
531*4882a593Smuzhiyun NULL
532*4882a593Smuzhiyun }, {
533*4882a593Smuzhiyun &sensor_dev_attr_fan8_input.dev_attr.attr,
534*4882a593Smuzhiyun &sensor_dev_attr_fan8_min.dev_attr.attr,
535*4882a593Smuzhiyun &sensor_dev_attr_fan8_alarm.dev_attr.attr,
536*4882a593Smuzhiyun &sensor_dev_attr_fan8_fault.dev_attr.attr,
537*4882a593Smuzhiyun NULL
538*4882a593Smuzhiyun }
539*4882a593Smuzhiyun };
540*4882a593Smuzhiyun
541*4882a593Smuzhiyun static const struct attribute_group pc87427_group_fan[8] = {
542*4882a593Smuzhiyun { .attrs = pc87427_attributes_fan[0] },
543*4882a593Smuzhiyun { .attrs = pc87427_attributes_fan[1] },
544*4882a593Smuzhiyun { .attrs = pc87427_attributes_fan[2] },
545*4882a593Smuzhiyun { .attrs = pc87427_attributes_fan[3] },
546*4882a593Smuzhiyun { .attrs = pc87427_attributes_fan[4] },
547*4882a593Smuzhiyun { .attrs = pc87427_attributes_fan[5] },
548*4882a593Smuzhiyun { .attrs = pc87427_attributes_fan[6] },
549*4882a593Smuzhiyun { .attrs = pc87427_attributes_fan[7] },
550*4882a593Smuzhiyun };
551*4882a593Smuzhiyun
552*4882a593Smuzhiyun /*
553*4882a593Smuzhiyun * Must be called with data->lock held and pc87427_readall_pwm() freshly
554*4882a593Smuzhiyun * called
555*4882a593Smuzhiyun */
update_pwm_enable(struct pc87427_data * data,int nr,u8 mode)556*4882a593Smuzhiyun static void update_pwm_enable(struct pc87427_data *data, int nr, u8 mode)
557*4882a593Smuzhiyun {
558*4882a593Smuzhiyun int iobase = data->address[LD_FAN];
559*4882a593Smuzhiyun data->pwm_enable[nr] &= ~PWM_ENABLE_MODE_MASK;
560*4882a593Smuzhiyun data->pwm_enable[nr] |= mode;
561*4882a593Smuzhiyun outb(data->pwm_enable[nr], iobase + PC87427_REG_PWM_ENABLE);
562*4882a593Smuzhiyun }
563*4882a593Smuzhiyun
pwm_enable_show(struct device * dev,struct device_attribute * devattr,char * buf)564*4882a593Smuzhiyun static ssize_t pwm_enable_show(struct device *dev,
565*4882a593Smuzhiyun struct device_attribute *devattr, char *buf)
566*4882a593Smuzhiyun {
567*4882a593Smuzhiyun struct pc87427_data *data = pc87427_update_device(dev);
568*4882a593Smuzhiyun int nr = to_sensor_dev_attr(devattr)->index;
569*4882a593Smuzhiyun int pwm_enable;
570*4882a593Smuzhiyun
571*4882a593Smuzhiyun pwm_enable = pwm_enable_from_reg(data->pwm_enable[nr]);
572*4882a593Smuzhiyun if (pwm_enable < 0)
573*4882a593Smuzhiyun return pwm_enable;
574*4882a593Smuzhiyun return sprintf(buf, "%d\n", pwm_enable);
575*4882a593Smuzhiyun }
576*4882a593Smuzhiyun
pwm_enable_store(struct device * dev,struct device_attribute * devattr,const char * buf,size_t count)577*4882a593Smuzhiyun static ssize_t pwm_enable_store(struct device *dev,
578*4882a593Smuzhiyun struct device_attribute *devattr,
579*4882a593Smuzhiyun const char *buf, size_t count)
580*4882a593Smuzhiyun {
581*4882a593Smuzhiyun struct pc87427_data *data = dev_get_drvdata(dev);
582*4882a593Smuzhiyun int nr = to_sensor_dev_attr(devattr)->index;
583*4882a593Smuzhiyun unsigned long val;
584*4882a593Smuzhiyun
585*4882a593Smuzhiyun if (kstrtoul(buf, 10, &val) < 0 || val > 2)
586*4882a593Smuzhiyun return -EINVAL;
587*4882a593Smuzhiyun /* Can't go to automatic mode if it isn't configured */
588*4882a593Smuzhiyun if (val == 2 && !(data->pwm_auto_ok & (1 << nr)))
589*4882a593Smuzhiyun return -EINVAL;
590*4882a593Smuzhiyun
591*4882a593Smuzhiyun mutex_lock(&data->lock);
592*4882a593Smuzhiyun pc87427_readall_pwm(data, nr);
593*4882a593Smuzhiyun update_pwm_enable(data, nr, pwm_enable_to_reg(val, data->pwm[nr]));
594*4882a593Smuzhiyun mutex_unlock(&data->lock);
595*4882a593Smuzhiyun
596*4882a593Smuzhiyun return count;
597*4882a593Smuzhiyun }
598*4882a593Smuzhiyun
pwm_show(struct device * dev,struct device_attribute * devattr,char * buf)599*4882a593Smuzhiyun static ssize_t pwm_show(struct device *dev, struct device_attribute *devattr,
600*4882a593Smuzhiyun char *buf)
601*4882a593Smuzhiyun {
602*4882a593Smuzhiyun struct pc87427_data *data = pc87427_update_device(dev);
603*4882a593Smuzhiyun int nr = to_sensor_dev_attr(devattr)->index;
604*4882a593Smuzhiyun
605*4882a593Smuzhiyun return sprintf(buf, "%d\n", (int)data->pwm[nr]);
606*4882a593Smuzhiyun }
607*4882a593Smuzhiyun
pwm_store(struct device * dev,struct device_attribute * devattr,const char * buf,size_t count)608*4882a593Smuzhiyun static ssize_t pwm_store(struct device *dev, struct device_attribute *devattr,
609*4882a593Smuzhiyun const char *buf, size_t count)
610*4882a593Smuzhiyun {
611*4882a593Smuzhiyun struct pc87427_data *data = dev_get_drvdata(dev);
612*4882a593Smuzhiyun int nr = to_sensor_dev_attr(devattr)->index;
613*4882a593Smuzhiyun unsigned long val;
614*4882a593Smuzhiyun int iobase = data->address[LD_FAN];
615*4882a593Smuzhiyun u8 mode;
616*4882a593Smuzhiyun
617*4882a593Smuzhiyun if (kstrtoul(buf, 10, &val) < 0 || val > 0xff)
618*4882a593Smuzhiyun return -EINVAL;
619*4882a593Smuzhiyun
620*4882a593Smuzhiyun mutex_lock(&data->lock);
621*4882a593Smuzhiyun pc87427_readall_pwm(data, nr);
622*4882a593Smuzhiyun mode = data->pwm_enable[nr] & PWM_ENABLE_MODE_MASK;
623*4882a593Smuzhiyun if (mode != PWM_MODE_MANUAL && mode != PWM_MODE_OFF) {
624*4882a593Smuzhiyun dev_notice(dev,
625*4882a593Smuzhiyun "Can't set PWM%d duty cycle while not in manual mode\n",
626*4882a593Smuzhiyun nr + 1);
627*4882a593Smuzhiyun mutex_unlock(&data->lock);
628*4882a593Smuzhiyun return -EPERM;
629*4882a593Smuzhiyun }
630*4882a593Smuzhiyun
631*4882a593Smuzhiyun /* We may have to change the mode */
632*4882a593Smuzhiyun if (mode == PWM_MODE_MANUAL && val == 0) {
633*4882a593Smuzhiyun /* Transition from Manual to Off */
634*4882a593Smuzhiyun update_pwm_enable(data, nr, PWM_MODE_OFF);
635*4882a593Smuzhiyun mode = PWM_MODE_OFF;
636*4882a593Smuzhiyun dev_dbg(dev, "Switching PWM%d from %s to %s\n", nr + 1,
637*4882a593Smuzhiyun "manual", "off");
638*4882a593Smuzhiyun } else if (mode == PWM_MODE_OFF && val != 0) {
639*4882a593Smuzhiyun /* Transition from Off to Manual */
640*4882a593Smuzhiyun update_pwm_enable(data, nr, PWM_MODE_MANUAL);
641*4882a593Smuzhiyun mode = PWM_MODE_MANUAL;
642*4882a593Smuzhiyun dev_dbg(dev, "Switching PWM%d from %s to %s\n", nr + 1,
643*4882a593Smuzhiyun "off", "manual");
644*4882a593Smuzhiyun }
645*4882a593Smuzhiyun
646*4882a593Smuzhiyun data->pwm[nr] = val;
647*4882a593Smuzhiyun if (mode == PWM_MODE_MANUAL)
648*4882a593Smuzhiyun outb(val, iobase + PC87427_REG_PWM_DUTY);
649*4882a593Smuzhiyun mutex_unlock(&data->lock);
650*4882a593Smuzhiyun
651*4882a593Smuzhiyun return count;
652*4882a593Smuzhiyun }
653*4882a593Smuzhiyun
654*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RW(pwm1_enable, pwm_enable, 0);
655*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RW(pwm2_enable, pwm_enable, 1);
656*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RW(pwm3_enable, pwm_enable, 2);
657*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RW(pwm4_enable, pwm_enable, 3);
658*4882a593Smuzhiyun
659*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RW(pwm1, pwm, 0);
660*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RW(pwm2, pwm, 1);
661*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RW(pwm3, pwm, 2);
662*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RW(pwm4, pwm, 3);
663*4882a593Smuzhiyun
664*4882a593Smuzhiyun static struct attribute *pc87427_attributes_pwm[4][3] = {
665*4882a593Smuzhiyun {
666*4882a593Smuzhiyun &sensor_dev_attr_pwm1_enable.dev_attr.attr,
667*4882a593Smuzhiyun &sensor_dev_attr_pwm1.dev_attr.attr,
668*4882a593Smuzhiyun NULL
669*4882a593Smuzhiyun }, {
670*4882a593Smuzhiyun &sensor_dev_attr_pwm2_enable.dev_attr.attr,
671*4882a593Smuzhiyun &sensor_dev_attr_pwm2.dev_attr.attr,
672*4882a593Smuzhiyun NULL
673*4882a593Smuzhiyun }, {
674*4882a593Smuzhiyun &sensor_dev_attr_pwm3_enable.dev_attr.attr,
675*4882a593Smuzhiyun &sensor_dev_attr_pwm3.dev_attr.attr,
676*4882a593Smuzhiyun NULL
677*4882a593Smuzhiyun }, {
678*4882a593Smuzhiyun &sensor_dev_attr_pwm4_enable.dev_attr.attr,
679*4882a593Smuzhiyun &sensor_dev_attr_pwm4.dev_attr.attr,
680*4882a593Smuzhiyun NULL
681*4882a593Smuzhiyun }
682*4882a593Smuzhiyun };
683*4882a593Smuzhiyun
684*4882a593Smuzhiyun static const struct attribute_group pc87427_group_pwm[4] = {
685*4882a593Smuzhiyun { .attrs = pc87427_attributes_pwm[0] },
686*4882a593Smuzhiyun { .attrs = pc87427_attributes_pwm[1] },
687*4882a593Smuzhiyun { .attrs = pc87427_attributes_pwm[2] },
688*4882a593Smuzhiyun { .attrs = pc87427_attributes_pwm[3] },
689*4882a593Smuzhiyun };
690*4882a593Smuzhiyun
temp_input_show(struct device * dev,struct device_attribute * devattr,char * buf)691*4882a593Smuzhiyun static ssize_t temp_input_show(struct device *dev,
692*4882a593Smuzhiyun struct device_attribute *devattr, char *buf)
693*4882a593Smuzhiyun {
694*4882a593Smuzhiyun struct pc87427_data *data = pc87427_update_device(dev);
695*4882a593Smuzhiyun int nr = to_sensor_dev_attr(devattr)->index;
696*4882a593Smuzhiyun
697*4882a593Smuzhiyun return sprintf(buf, "%ld\n", temp_from_reg(data->temp[nr]));
698*4882a593Smuzhiyun }
699*4882a593Smuzhiyun
temp_min_show(struct device * dev,struct device_attribute * devattr,char * buf)700*4882a593Smuzhiyun static ssize_t temp_min_show(struct device *dev,
701*4882a593Smuzhiyun struct device_attribute *devattr, char *buf)
702*4882a593Smuzhiyun {
703*4882a593Smuzhiyun struct pc87427_data *data = pc87427_update_device(dev);
704*4882a593Smuzhiyun int nr = to_sensor_dev_attr(devattr)->index;
705*4882a593Smuzhiyun
706*4882a593Smuzhiyun return sprintf(buf, "%ld\n", temp_from_reg8(data->temp_min[nr]));
707*4882a593Smuzhiyun }
708*4882a593Smuzhiyun
temp_max_show(struct device * dev,struct device_attribute * devattr,char * buf)709*4882a593Smuzhiyun static ssize_t temp_max_show(struct device *dev,
710*4882a593Smuzhiyun struct device_attribute *devattr, char *buf)
711*4882a593Smuzhiyun {
712*4882a593Smuzhiyun struct pc87427_data *data = pc87427_update_device(dev);
713*4882a593Smuzhiyun int nr = to_sensor_dev_attr(devattr)->index;
714*4882a593Smuzhiyun
715*4882a593Smuzhiyun return sprintf(buf, "%ld\n", temp_from_reg8(data->temp_max[nr]));
716*4882a593Smuzhiyun }
717*4882a593Smuzhiyun
temp_crit_show(struct device * dev,struct device_attribute * devattr,char * buf)718*4882a593Smuzhiyun static ssize_t temp_crit_show(struct device *dev,
719*4882a593Smuzhiyun struct device_attribute *devattr, char *buf)
720*4882a593Smuzhiyun {
721*4882a593Smuzhiyun struct pc87427_data *data = pc87427_update_device(dev);
722*4882a593Smuzhiyun int nr = to_sensor_dev_attr(devattr)->index;
723*4882a593Smuzhiyun
724*4882a593Smuzhiyun return sprintf(buf, "%ld\n", temp_from_reg8(data->temp_crit[nr]));
725*4882a593Smuzhiyun }
726*4882a593Smuzhiyun
temp_type_show(struct device * dev,struct device_attribute * devattr,char * buf)727*4882a593Smuzhiyun static ssize_t temp_type_show(struct device *dev,
728*4882a593Smuzhiyun struct device_attribute *devattr, char *buf)
729*4882a593Smuzhiyun {
730*4882a593Smuzhiyun struct pc87427_data *data = pc87427_update_device(dev);
731*4882a593Smuzhiyun int nr = to_sensor_dev_attr(devattr)->index;
732*4882a593Smuzhiyun
733*4882a593Smuzhiyun return sprintf(buf, "%u\n", temp_type_from_reg(data->temp_type[nr]));
734*4882a593Smuzhiyun }
735*4882a593Smuzhiyun
temp_min_alarm_show(struct device * dev,struct device_attribute * devattr,char * buf)736*4882a593Smuzhiyun static ssize_t temp_min_alarm_show(struct device *dev,
737*4882a593Smuzhiyun struct device_attribute *devattr,
738*4882a593Smuzhiyun char *buf)
739*4882a593Smuzhiyun {
740*4882a593Smuzhiyun struct pc87427_data *data = pc87427_update_device(dev);
741*4882a593Smuzhiyun int nr = to_sensor_dev_attr(devattr)->index;
742*4882a593Smuzhiyun
743*4882a593Smuzhiyun return sprintf(buf, "%d\n", !!(data->temp_status[nr]
744*4882a593Smuzhiyun & TEMP_STATUS_LOWFLG));
745*4882a593Smuzhiyun }
746*4882a593Smuzhiyun
temp_max_alarm_show(struct device * dev,struct device_attribute * devattr,char * buf)747*4882a593Smuzhiyun static ssize_t temp_max_alarm_show(struct device *dev,
748*4882a593Smuzhiyun struct device_attribute *devattr,
749*4882a593Smuzhiyun char *buf)
750*4882a593Smuzhiyun {
751*4882a593Smuzhiyun struct pc87427_data *data = pc87427_update_device(dev);
752*4882a593Smuzhiyun int nr = to_sensor_dev_attr(devattr)->index;
753*4882a593Smuzhiyun
754*4882a593Smuzhiyun return sprintf(buf, "%d\n", !!(data->temp_status[nr]
755*4882a593Smuzhiyun & TEMP_STATUS_HIGHFLG));
756*4882a593Smuzhiyun }
757*4882a593Smuzhiyun
temp_crit_alarm_show(struct device * dev,struct device_attribute * devattr,char * buf)758*4882a593Smuzhiyun static ssize_t temp_crit_alarm_show(struct device *dev,
759*4882a593Smuzhiyun struct device_attribute *devattr,
760*4882a593Smuzhiyun char *buf)
761*4882a593Smuzhiyun {
762*4882a593Smuzhiyun struct pc87427_data *data = pc87427_update_device(dev);
763*4882a593Smuzhiyun int nr = to_sensor_dev_attr(devattr)->index;
764*4882a593Smuzhiyun
765*4882a593Smuzhiyun return sprintf(buf, "%d\n", !!(data->temp_status[nr]
766*4882a593Smuzhiyun & TEMP_STATUS_CRITFLG));
767*4882a593Smuzhiyun }
768*4882a593Smuzhiyun
temp_fault_show(struct device * dev,struct device_attribute * devattr,char * buf)769*4882a593Smuzhiyun static ssize_t temp_fault_show(struct device *dev,
770*4882a593Smuzhiyun struct device_attribute *devattr, char *buf)
771*4882a593Smuzhiyun {
772*4882a593Smuzhiyun struct pc87427_data *data = pc87427_update_device(dev);
773*4882a593Smuzhiyun int nr = to_sensor_dev_attr(devattr)->index;
774*4882a593Smuzhiyun
775*4882a593Smuzhiyun return sprintf(buf, "%d\n", !!(data->temp_status[nr]
776*4882a593Smuzhiyun & TEMP_STATUS_SENSERR));
777*4882a593Smuzhiyun }
778*4882a593Smuzhiyun
779*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RO(temp1_input, temp_input, 0);
780*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RO(temp2_input, temp_input, 1);
781*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RO(temp3_input, temp_input, 2);
782*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RO(temp4_input, temp_input, 3);
783*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RO(temp5_input, temp_input, 4);
784*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RO(temp6_input, temp_input, 5);
785*4882a593Smuzhiyun
786*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RO(temp1_min, temp_min, 0);
787*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RO(temp2_min, temp_min, 1);
788*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RO(temp3_min, temp_min, 2);
789*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RO(temp4_min, temp_min, 3);
790*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RO(temp5_min, temp_min, 4);
791*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RO(temp6_min, temp_min, 5);
792*4882a593Smuzhiyun
793*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RO(temp1_max, temp_max, 0);
794*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RO(temp2_max, temp_max, 1);
795*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RO(temp3_max, temp_max, 2);
796*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RO(temp4_max, temp_max, 3);
797*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RO(temp5_max, temp_max, 4);
798*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RO(temp6_max, temp_max, 5);
799*4882a593Smuzhiyun
800*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RO(temp1_crit, temp_crit, 0);
801*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RO(temp2_crit, temp_crit, 1);
802*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RO(temp3_crit, temp_crit, 2);
803*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RO(temp4_crit, temp_crit, 3);
804*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RO(temp5_crit, temp_crit, 4);
805*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RO(temp6_crit, temp_crit, 5);
806*4882a593Smuzhiyun
807*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RO(temp1_type, temp_type, 0);
808*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RO(temp2_type, temp_type, 1);
809*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RO(temp3_type, temp_type, 2);
810*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RO(temp4_type, temp_type, 3);
811*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RO(temp5_type, temp_type, 4);
812*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RO(temp6_type, temp_type, 5);
813*4882a593Smuzhiyun
814*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RO(temp1_min_alarm, temp_min_alarm, 0);
815*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RO(temp2_min_alarm, temp_min_alarm, 1);
816*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RO(temp3_min_alarm, temp_min_alarm, 2);
817*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RO(temp4_min_alarm, temp_min_alarm, 3);
818*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RO(temp5_min_alarm, temp_min_alarm, 4);
819*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RO(temp6_min_alarm, temp_min_alarm, 5);
820*4882a593Smuzhiyun
821*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RO(temp1_max_alarm, temp_max_alarm, 0);
822*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RO(temp2_max_alarm, temp_max_alarm, 1);
823*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RO(temp3_max_alarm, temp_max_alarm, 2);
824*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RO(temp4_max_alarm, temp_max_alarm, 3);
825*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RO(temp5_max_alarm, temp_max_alarm, 4);
826*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RO(temp6_max_alarm, temp_max_alarm, 5);
827*4882a593Smuzhiyun
828*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RO(temp1_crit_alarm, temp_crit_alarm, 0);
829*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RO(temp2_crit_alarm, temp_crit_alarm, 1);
830*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RO(temp3_crit_alarm, temp_crit_alarm, 2);
831*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RO(temp4_crit_alarm, temp_crit_alarm, 3);
832*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RO(temp5_crit_alarm, temp_crit_alarm, 4);
833*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RO(temp6_crit_alarm, temp_crit_alarm, 5);
834*4882a593Smuzhiyun
835*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RO(temp1_fault, temp_fault, 0);
836*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RO(temp2_fault, temp_fault, 1);
837*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RO(temp3_fault, temp_fault, 2);
838*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RO(temp4_fault, temp_fault, 3);
839*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RO(temp5_fault, temp_fault, 4);
840*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RO(temp6_fault, temp_fault, 5);
841*4882a593Smuzhiyun
842*4882a593Smuzhiyun static struct attribute *pc87427_attributes_temp[6][10] = {
843*4882a593Smuzhiyun {
844*4882a593Smuzhiyun &sensor_dev_attr_temp1_input.dev_attr.attr,
845*4882a593Smuzhiyun &sensor_dev_attr_temp1_min.dev_attr.attr,
846*4882a593Smuzhiyun &sensor_dev_attr_temp1_max.dev_attr.attr,
847*4882a593Smuzhiyun &sensor_dev_attr_temp1_crit.dev_attr.attr,
848*4882a593Smuzhiyun &sensor_dev_attr_temp1_type.dev_attr.attr,
849*4882a593Smuzhiyun &sensor_dev_attr_temp1_min_alarm.dev_attr.attr,
850*4882a593Smuzhiyun &sensor_dev_attr_temp1_max_alarm.dev_attr.attr,
851*4882a593Smuzhiyun &sensor_dev_attr_temp1_crit_alarm.dev_attr.attr,
852*4882a593Smuzhiyun &sensor_dev_attr_temp1_fault.dev_attr.attr,
853*4882a593Smuzhiyun NULL
854*4882a593Smuzhiyun }, {
855*4882a593Smuzhiyun &sensor_dev_attr_temp2_input.dev_attr.attr,
856*4882a593Smuzhiyun &sensor_dev_attr_temp2_min.dev_attr.attr,
857*4882a593Smuzhiyun &sensor_dev_attr_temp2_max.dev_attr.attr,
858*4882a593Smuzhiyun &sensor_dev_attr_temp2_crit.dev_attr.attr,
859*4882a593Smuzhiyun &sensor_dev_attr_temp2_type.dev_attr.attr,
860*4882a593Smuzhiyun &sensor_dev_attr_temp2_min_alarm.dev_attr.attr,
861*4882a593Smuzhiyun &sensor_dev_attr_temp2_max_alarm.dev_attr.attr,
862*4882a593Smuzhiyun &sensor_dev_attr_temp2_crit_alarm.dev_attr.attr,
863*4882a593Smuzhiyun &sensor_dev_attr_temp2_fault.dev_attr.attr,
864*4882a593Smuzhiyun NULL
865*4882a593Smuzhiyun }, {
866*4882a593Smuzhiyun &sensor_dev_attr_temp3_input.dev_attr.attr,
867*4882a593Smuzhiyun &sensor_dev_attr_temp3_min.dev_attr.attr,
868*4882a593Smuzhiyun &sensor_dev_attr_temp3_max.dev_attr.attr,
869*4882a593Smuzhiyun &sensor_dev_attr_temp3_crit.dev_attr.attr,
870*4882a593Smuzhiyun &sensor_dev_attr_temp3_type.dev_attr.attr,
871*4882a593Smuzhiyun &sensor_dev_attr_temp3_min_alarm.dev_attr.attr,
872*4882a593Smuzhiyun &sensor_dev_attr_temp3_max_alarm.dev_attr.attr,
873*4882a593Smuzhiyun &sensor_dev_attr_temp3_crit_alarm.dev_attr.attr,
874*4882a593Smuzhiyun &sensor_dev_attr_temp3_fault.dev_attr.attr,
875*4882a593Smuzhiyun NULL
876*4882a593Smuzhiyun }, {
877*4882a593Smuzhiyun &sensor_dev_attr_temp4_input.dev_attr.attr,
878*4882a593Smuzhiyun &sensor_dev_attr_temp4_min.dev_attr.attr,
879*4882a593Smuzhiyun &sensor_dev_attr_temp4_max.dev_attr.attr,
880*4882a593Smuzhiyun &sensor_dev_attr_temp4_crit.dev_attr.attr,
881*4882a593Smuzhiyun &sensor_dev_attr_temp4_type.dev_attr.attr,
882*4882a593Smuzhiyun &sensor_dev_attr_temp4_min_alarm.dev_attr.attr,
883*4882a593Smuzhiyun &sensor_dev_attr_temp4_max_alarm.dev_attr.attr,
884*4882a593Smuzhiyun &sensor_dev_attr_temp4_crit_alarm.dev_attr.attr,
885*4882a593Smuzhiyun &sensor_dev_attr_temp4_fault.dev_attr.attr,
886*4882a593Smuzhiyun NULL
887*4882a593Smuzhiyun }, {
888*4882a593Smuzhiyun &sensor_dev_attr_temp5_input.dev_attr.attr,
889*4882a593Smuzhiyun &sensor_dev_attr_temp5_min.dev_attr.attr,
890*4882a593Smuzhiyun &sensor_dev_attr_temp5_max.dev_attr.attr,
891*4882a593Smuzhiyun &sensor_dev_attr_temp5_crit.dev_attr.attr,
892*4882a593Smuzhiyun &sensor_dev_attr_temp5_type.dev_attr.attr,
893*4882a593Smuzhiyun &sensor_dev_attr_temp5_min_alarm.dev_attr.attr,
894*4882a593Smuzhiyun &sensor_dev_attr_temp5_max_alarm.dev_attr.attr,
895*4882a593Smuzhiyun &sensor_dev_attr_temp5_crit_alarm.dev_attr.attr,
896*4882a593Smuzhiyun &sensor_dev_attr_temp5_fault.dev_attr.attr,
897*4882a593Smuzhiyun NULL
898*4882a593Smuzhiyun }, {
899*4882a593Smuzhiyun &sensor_dev_attr_temp6_input.dev_attr.attr,
900*4882a593Smuzhiyun &sensor_dev_attr_temp6_min.dev_attr.attr,
901*4882a593Smuzhiyun &sensor_dev_attr_temp6_max.dev_attr.attr,
902*4882a593Smuzhiyun &sensor_dev_attr_temp6_crit.dev_attr.attr,
903*4882a593Smuzhiyun &sensor_dev_attr_temp6_type.dev_attr.attr,
904*4882a593Smuzhiyun &sensor_dev_attr_temp6_min_alarm.dev_attr.attr,
905*4882a593Smuzhiyun &sensor_dev_attr_temp6_max_alarm.dev_attr.attr,
906*4882a593Smuzhiyun &sensor_dev_attr_temp6_crit_alarm.dev_attr.attr,
907*4882a593Smuzhiyun &sensor_dev_attr_temp6_fault.dev_attr.attr,
908*4882a593Smuzhiyun NULL
909*4882a593Smuzhiyun }
910*4882a593Smuzhiyun };
911*4882a593Smuzhiyun
912*4882a593Smuzhiyun static const struct attribute_group pc87427_group_temp[6] = {
913*4882a593Smuzhiyun { .attrs = pc87427_attributes_temp[0] },
914*4882a593Smuzhiyun { .attrs = pc87427_attributes_temp[1] },
915*4882a593Smuzhiyun { .attrs = pc87427_attributes_temp[2] },
916*4882a593Smuzhiyun { .attrs = pc87427_attributes_temp[3] },
917*4882a593Smuzhiyun { .attrs = pc87427_attributes_temp[4] },
918*4882a593Smuzhiyun { .attrs = pc87427_attributes_temp[5] },
919*4882a593Smuzhiyun };
920*4882a593Smuzhiyun
name_show(struct device * dev,struct device_attribute * devattr,char * buf)921*4882a593Smuzhiyun static ssize_t name_show(struct device *dev, struct device_attribute
922*4882a593Smuzhiyun *devattr, char *buf)
923*4882a593Smuzhiyun {
924*4882a593Smuzhiyun struct pc87427_data *data = dev_get_drvdata(dev);
925*4882a593Smuzhiyun
926*4882a593Smuzhiyun return sprintf(buf, "%s\n", data->name);
927*4882a593Smuzhiyun }
928*4882a593Smuzhiyun static DEVICE_ATTR_RO(name);
929*4882a593Smuzhiyun
930*4882a593Smuzhiyun
931*4882a593Smuzhiyun /*
932*4882a593Smuzhiyun * Device detection, attach and detach
933*4882a593Smuzhiyun */
934*4882a593Smuzhiyun
pc87427_request_regions(struct platform_device * pdev,int count)935*4882a593Smuzhiyun static int pc87427_request_regions(struct platform_device *pdev,
936*4882a593Smuzhiyun int count)
937*4882a593Smuzhiyun {
938*4882a593Smuzhiyun struct resource *res;
939*4882a593Smuzhiyun int i;
940*4882a593Smuzhiyun
941*4882a593Smuzhiyun for (i = 0; i < count; i++) {
942*4882a593Smuzhiyun res = platform_get_resource(pdev, IORESOURCE_IO, i);
943*4882a593Smuzhiyun if (!res) {
944*4882a593Smuzhiyun dev_err(&pdev->dev, "Missing resource #%d\n", i);
945*4882a593Smuzhiyun return -ENOENT;
946*4882a593Smuzhiyun }
947*4882a593Smuzhiyun if (!devm_request_region(&pdev->dev, res->start,
948*4882a593Smuzhiyun resource_size(res), DRVNAME)) {
949*4882a593Smuzhiyun dev_err(&pdev->dev,
950*4882a593Smuzhiyun "Failed to request region 0x%lx-0x%lx\n",
951*4882a593Smuzhiyun (unsigned long)res->start,
952*4882a593Smuzhiyun (unsigned long)res->end);
953*4882a593Smuzhiyun return -EBUSY;
954*4882a593Smuzhiyun }
955*4882a593Smuzhiyun }
956*4882a593Smuzhiyun return 0;
957*4882a593Smuzhiyun }
958*4882a593Smuzhiyun
pc87427_init_device(struct device * dev)959*4882a593Smuzhiyun static void pc87427_init_device(struct device *dev)
960*4882a593Smuzhiyun {
961*4882a593Smuzhiyun struct pc87427_sio_data *sio_data = dev_get_platdata(dev);
962*4882a593Smuzhiyun struct pc87427_data *data = dev_get_drvdata(dev);
963*4882a593Smuzhiyun int i;
964*4882a593Smuzhiyun u8 reg;
965*4882a593Smuzhiyun
966*4882a593Smuzhiyun /* The FMC module should be ready */
967*4882a593Smuzhiyun reg = pc87427_read8(data, LD_FAN, PC87427_REG_BANK);
968*4882a593Smuzhiyun if (!(reg & 0x80))
969*4882a593Smuzhiyun dev_warn(dev, "%s module not ready!\n", "FMC");
970*4882a593Smuzhiyun
971*4882a593Smuzhiyun /* Check which fans are enabled */
972*4882a593Smuzhiyun for (i = 0; i < 8; i++) {
973*4882a593Smuzhiyun if (!(sio_data->has_fanin & (1 << i))) /* Not wired */
974*4882a593Smuzhiyun continue;
975*4882a593Smuzhiyun reg = pc87427_read8_bank(data, LD_FAN, BANK_FM(i),
976*4882a593Smuzhiyun PC87427_REG_FAN_STATUS);
977*4882a593Smuzhiyun if (reg & FAN_STATUS_MONEN)
978*4882a593Smuzhiyun data->fan_enabled |= (1 << i);
979*4882a593Smuzhiyun }
980*4882a593Smuzhiyun
981*4882a593Smuzhiyun if (!data->fan_enabled) {
982*4882a593Smuzhiyun dev_dbg(dev, "Enabling monitoring of all fans\n");
983*4882a593Smuzhiyun for (i = 0; i < 8; i++) {
984*4882a593Smuzhiyun if (!(sio_data->has_fanin & (1 << i))) /* Not wired */
985*4882a593Smuzhiyun continue;
986*4882a593Smuzhiyun pc87427_write8_bank(data, LD_FAN, BANK_FM(i),
987*4882a593Smuzhiyun PC87427_REG_FAN_STATUS,
988*4882a593Smuzhiyun FAN_STATUS_MONEN);
989*4882a593Smuzhiyun }
990*4882a593Smuzhiyun data->fan_enabled = sio_data->has_fanin;
991*4882a593Smuzhiyun }
992*4882a593Smuzhiyun
993*4882a593Smuzhiyun /* Check which PWM outputs are enabled */
994*4882a593Smuzhiyun for (i = 0; i < 4; i++) {
995*4882a593Smuzhiyun if (!(sio_data->has_fanout & (1 << i))) /* Not wired */
996*4882a593Smuzhiyun continue;
997*4882a593Smuzhiyun reg = pc87427_read8_bank(data, LD_FAN, BANK_FC(i),
998*4882a593Smuzhiyun PC87427_REG_PWM_ENABLE);
999*4882a593Smuzhiyun if (reg & PWM_ENABLE_CTLEN)
1000*4882a593Smuzhiyun data->pwm_enabled |= (1 << i);
1001*4882a593Smuzhiyun
1002*4882a593Smuzhiyun /*
1003*4882a593Smuzhiyun * We don't expose an interface to reconfigure the automatic
1004*4882a593Smuzhiyun * fan control mode, so only allow to return to this mode if
1005*4882a593Smuzhiyun * it was originally set.
1006*4882a593Smuzhiyun */
1007*4882a593Smuzhiyun if ((reg & PWM_ENABLE_MODE_MASK) == PWM_MODE_AUTO) {
1008*4882a593Smuzhiyun dev_dbg(dev, "PWM%d is in automatic control mode\n",
1009*4882a593Smuzhiyun i + 1);
1010*4882a593Smuzhiyun data->pwm_auto_ok |= (1 << i);
1011*4882a593Smuzhiyun }
1012*4882a593Smuzhiyun }
1013*4882a593Smuzhiyun
1014*4882a593Smuzhiyun /* The HMC module should be ready */
1015*4882a593Smuzhiyun reg = pc87427_read8(data, LD_TEMP, PC87427_REG_BANK);
1016*4882a593Smuzhiyun if (!(reg & 0x80))
1017*4882a593Smuzhiyun dev_warn(dev, "%s module not ready!\n", "HMC");
1018*4882a593Smuzhiyun
1019*4882a593Smuzhiyun /* Check which temperature channels are enabled */
1020*4882a593Smuzhiyun for (i = 0; i < 6; i++) {
1021*4882a593Smuzhiyun reg = pc87427_read8_bank(data, LD_TEMP, BANK_TM(i),
1022*4882a593Smuzhiyun PC87427_REG_TEMP_STATUS);
1023*4882a593Smuzhiyun if (reg & TEMP_STATUS_CHANEN)
1024*4882a593Smuzhiyun data->temp_enabled |= (1 << i);
1025*4882a593Smuzhiyun }
1026*4882a593Smuzhiyun }
1027*4882a593Smuzhiyun
pc87427_remove_files(struct device * dev)1028*4882a593Smuzhiyun static void pc87427_remove_files(struct device *dev)
1029*4882a593Smuzhiyun {
1030*4882a593Smuzhiyun struct pc87427_data *data = dev_get_drvdata(dev);
1031*4882a593Smuzhiyun int i;
1032*4882a593Smuzhiyun
1033*4882a593Smuzhiyun device_remove_file(dev, &dev_attr_name);
1034*4882a593Smuzhiyun for (i = 0; i < 8; i++) {
1035*4882a593Smuzhiyun if (!(data->fan_enabled & (1 << i)))
1036*4882a593Smuzhiyun continue;
1037*4882a593Smuzhiyun sysfs_remove_group(&dev->kobj, &pc87427_group_fan[i]);
1038*4882a593Smuzhiyun }
1039*4882a593Smuzhiyun for (i = 0; i < 4; i++) {
1040*4882a593Smuzhiyun if (!(data->pwm_enabled & (1 << i)))
1041*4882a593Smuzhiyun continue;
1042*4882a593Smuzhiyun sysfs_remove_group(&dev->kobj, &pc87427_group_pwm[i]);
1043*4882a593Smuzhiyun }
1044*4882a593Smuzhiyun for (i = 0; i < 6; i++) {
1045*4882a593Smuzhiyun if (!(data->temp_enabled & (1 << i)))
1046*4882a593Smuzhiyun continue;
1047*4882a593Smuzhiyun sysfs_remove_group(&dev->kobj, &pc87427_group_temp[i]);
1048*4882a593Smuzhiyun }
1049*4882a593Smuzhiyun }
1050*4882a593Smuzhiyun
pc87427_probe(struct platform_device * pdev)1051*4882a593Smuzhiyun static int pc87427_probe(struct platform_device *pdev)
1052*4882a593Smuzhiyun {
1053*4882a593Smuzhiyun struct pc87427_sio_data *sio_data = dev_get_platdata(&pdev->dev);
1054*4882a593Smuzhiyun struct pc87427_data *data;
1055*4882a593Smuzhiyun int i, err, res_count;
1056*4882a593Smuzhiyun
1057*4882a593Smuzhiyun data = devm_kzalloc(&pdev->dev, sizeof(struct pc87427_data),
1058*4882a593Smuzhiyun GFP_KERNEL);
1059*4882a593Smuzhiyun if (!data)
1060*4882a593Smuzhiyun return -ENOMEM;
1061*4882a593Smuzhiyun
1062*4882a593Smuzhiyun data->address[0] = sio_data->address[0];
1063*4882a593Smuzhiyun data->address[1] = sio_data->address[1];
1064*4882a593Smuzhiyun res_count = (data->address[0] != 0) + (data->address[1] != 0);
1065*4882a593Smuzhiyun
1066*4882a593Smuzhiyun err = pc87427_request_regions(pdev, res_count);
1067*4882a593Smuzhiyun if (err)
1068*4882a593Smuzhiyun return err;
1069*4882a593Smuzhiyun
1070*4882a593Smuzhiyun mutex_init(&data->lock);
1071*4882a593Smuzhiyun data->name = "pc87427";
1072*4882a593Smuzhiyun platform_set_drvdata(pdev, data);
1073*4882a593Smuzhiyun pc87427_init_device(&pdev->dev);
1074*4882a593Smuzhiyun
1075*4882a593Smuzhiyun /* Register sysfs hooks */
1076*4882a593Smuzhiyun err = device_create_file(&pdev->dev, &dev_attr_name);
1077*4882a593Smuzhiyun if (err)
1078*4882a593Smuzhiyun return err;
1079*4882a593Smuzhiyun for (i = 0; i < 8; i++) {
1080*4882a593Smuzhiyun if (!(data->fan_enabled & (1 << i)))
1081*4882a593Smuzhiyun continue;
1082*4882a593Smuzhiyun err = sysfs_create_group(&pdev->dev.kobj,
1083*4882a593Smuzhiyun &pc87427_group_fan[i]);
1084*4882a593Smuzhiyun if (err)
1085*4882a593Smuzhiyun goto exit_remove_files;
1086*4882a593Smuzhiyun }
1087*4882a593Smuzhiyun for (i = 0; i < 4; i++) {
1088*4882a593Smuzhiyun if (!(data->pwm_enabled & (1 << i)))
1089*4882a593Smuzhiyun continue;
1090*4882a593Smuzhiyun err = sysfs_create_group(&pdev->dev.kobj,
1091*4882a593Smuzhiyun &pc87427_group_pwm[i]);
1092*4882a593Smuzhiyun if (err)
1093*4882a593Smuzhiyun goto exit_remove_files;
1094*4882a593Smuzhiyun }
1095*4882a593Smuzhiyun for (i = 0; i < 6; i++) {
1096*4882a593Smuzhiyun if (!(data->temp_enabled & (1 << i)))
1097*4882a593Smuzhiyun continue;
1098*4882a593Smuzhiyun err = sysfs_create_group(&pdev->dev.kobj,
1099*4882a593Smuzhiyun &pc87427_group_temp[i]);
1100*4882a593Smuzhiyun if (err)
1101*4882a593Smuzhiyun goto exit_remove_files;
1102*4882a593Smuzhiyun }
1103*4882a593Smuzhiyun
1104*4882a593Smuzhiyun data->hwmon_dev = hwmon_device_register(&pdev->dev);
1105*4882a593Smuzhiyun if (IS_ERR(data->hwmon_dev)) {
1106*4882a593Smuzhiyun err = PTR_ERR(data->hwmon_dev);
1107*4882a593Smuzhiyun dev_err(&pdev->dev, "Class registration failed (%d)\n", err);
1108*4882a593Smuzhiyun goto exit_remove_files;
1109*4882a593Smuzhiyun }
1110*4882a593Smuzhiyun
1111*4882a593Smuzhiyun return 0;
1112*4882a593Smuzhiyun
1113*4882a593Smuzhiyun exit_remove_files:
1114*4882a593Smuzhiyun pc87427_remove_files(&pdev->dev);
1115*4882a593Smuzhiyun return err;
1116*4882a593Smuzhiyun }
1117*4882a593Smuzhiyun
pc87427_remove(struct platform_device * pdev)1118*4882a593Smuzhiyun static int pc87427_remove(struct platform_device *pdev)
1119*4882a593Smuzhiyun {
1120*4882a593Smuzhiyun struct pc87427_data *data = platform_get_drvdata(pdev);
1121*4882a593Smuzhiyun
1122*4882a593Smuzhiyun hwmon_device_unregister(data->hwmon_dev);
1123*4882a593Smuzhiyun pc87427_remove_files(&pdev->dev);
1124*4882a593Smuzhiyun
1125*4882a593Smuzhiyun return 0;
1126*4882a593Smuzhiyun }
1127*4882a593Smuzhiyun
1128*4882a593Smuzhiyun
1129*4882a593Smuzhiyun static struct platform_driver pc87427_driver = {
1130*4882a593Smuzhiyun .driver = {
1131*4882a593Smuzhiyun .name = DRVNAME,
1132*4882a593Smuzhiyun },
1133*4882a593Smuzhiyun .probe = pc87427_probe,
1134*4882a593Smuzhiyun .remove = pc87427_remove,
1135*4882a593Smuzhiyun };
1136*4882a593Smuzhiyun
pc87427_device_add(const struct pc87427_sio_data * sio_data)1137*4882a593Smuzhiyun static int __init pc87427_device_add(const struct pc87427_sio_data *sio_data)
1138*4882a593Smuzhiyun {
1139*4882a593Smuzhiyun struct resource res[2] = {
1140*4882a593Smuzhiyun { .flags = IORESOURCE_IO },
1141*4882a593Smuzhiyun { .flags = IORESOURCE_IO },
1142*4882a593Smuzhiyun };
1143*4882a593Smuzhiyun int err, i, res_count;
1144*4882a593Smuzhiyun
1145*4882a593Smuzhiyun res_count = 0;
1146*4882a593Smuzhiyun for (i = 0; i < 2; i++) {
1147*4882a593Smuzhiyun if (!sio_data->address[i])
1148*4882a593Smuzhiyun continue;
1149*4882a593Smuzhiyun res[res_count].start = sio_data->address[i];
1150*4882a593Smuzhiyun res[res_count].end = sio_data->address[i] + REGION_LENGTH - 1;
1151*4882a593Smuzhiyun res[res_count].name = logdev_str[i];
1152*4882a593Smuzhiyun
1153*4882a593Smuzhiyun err = acpi_check_resource_conflict(&res[res_count]);
1154*4882a593Smuzhiyun if (err)
1155*4882a593Smuzhiyun goto exit;
1156*4882a593Smuzhiyun
1157*4882a593Smuzhiyun res_count++;
1158*4882a593Smuzhiyun }
1159*4882a593Smuzhiyun
1160*4882a593Smuzhiyun pdev = platform_device_alloc(DRVNAME, res[0].start);
1161*4882a593Smuzhiyun if (!pdev) {
1162*4882a593Smuzhiyun err = -ENOMEM;
1163*4882a593Smuzhiyun pr_err("Device allocation failed\n");
1164*4882a593Smuzhiyun goto exit;
1165*4882a593Smuzhiyun }
1166*4882a593Smuzhiyun
1167*4882a593Smuzhiyun err = platform_device_add_resources(pdev, res, res_count);
1168*4882a593Smuzhiyun if (err) {
1169*4882a593Smuzhiyun pr_err("Device resource addition failed (%d)\n", err);
1170*4882a593Smuzhiyun goto exit_device_put;
1171*4882a593Smuzhiyun }
1172*4882a593Smuzhiyun
1173*4882a593Smuzhiyun err = platform_device_add_data(pdev, sio_data,
1174*4882a593Smuzhiyun sizeof(struct pc87427_sio_data));
1175*4882a593Smuzhiyun if (err) {
1176*4882a593Smuzhiyun pr_err("Platform data allocation failed\n");
1177*4882a593Smuzhiyun goto exit_device_put;
1178*4882a593Smuzhiyun }
1179*4882a593Smuzhiyun
1180*4882a593Smuzhiyun err = platform_device_add(pdev);
1181*4882a593Smuzhiyun if (err) {
1182*4882a593Smuzhiyun pr_err("Device addition failed (%d)\n", err);
1183*4882a593Smuzhiyun goto exit_device_put;
1184*4882a593Smuzhiyun }
1185*4882a593Smuzhiyun
1186*4882a593Smuzhiyun return 0;
1187*4882a593Smuzhiyun
1188*4882a593Smuzhiyun exit_device_put:
1189*4882a593Smuzhiyun platform_device_put(pdev);
1190*4882a593Smuzhiyun exit:
1191*4882a593Smuzhiyun return err;
1192*4882a593Smuzhiyun }
1193*4882a593Smuzhiyun
pc87427_find(int sioaddr,struct pc87427_sio_data * sio_data)1194*4882a593Smuzhiyun static int __init pc87427_find(int sioaddr, struct pc87427_sio_data *sio_data)
1195*4882a593Smuzhiyun {
1196*4882a593Smuzhiyun u16 val;
1197*4882a593Smuzhiyun u8 cfg, cfg_b;
1198*4882a593Smuzhiyun int i, err;
1199*4882a593Smuzhiyun
1200*4882a593Smuzhiyun err = superio_enter(sioaddr);
1201*4882a593Smuzhiyun if (err)
1202*4882a593Smuzhiyun return err;
1203*4882a593Smuzhiyun
1204*4882a593Smuzhiyun /* Identify device */
1205*4882a593Smuzhiyun val = force_id ? force_id : superio_inb(sioaddr, SIOREG_DEVID);
1206*4882a593Smuzhiyun if (val != 0xf2) { /* PC87427 */
1207*4882a593Smuzhiyun err = -ENODEV;
1208*4882a593Smuzhiyun goto exit;
1209*4882a593Smuzhiyun }
1210*4882a593Smuzhiyun
1211*4882a593Smuzhiyun for (i = 0; i < 2; i++) {
1212*4882a593Smuzhiyun sio_data->address[i] = 0;
1213*4882a593Smuzhiyun /* Select logical device */
1214*4882a593Smuzhiyun superio_outb(sioaddr, SIOREG_LDSEL, logdev[i]);
1215*4882a593Smuzhiyun
1216*4882a593Smuzhiyun val = superio_inb(sioaddr, SIOREG_ACT);
1217*4882a593Smuzhiyun if (!(val & 0x01)) {
1218*4882a593Smuzhiyun pr_info("Logical device 0x%02x not activated\n",
1219*4882a593Smuzhiyun logdev[i]);
1220*4882a593Smuzhiyun continue;
1221*4882a593Smuzhiyun }
1222*4882a593Smuzhiyun
1223*4882a593Smuzhiyun val = superio_inb(sioaddr, SIOREG_MAP);
1224*4882a593Smuzhiyun if (val & 0x01) {
1225*4882a593Smuzhiyun pr_warn("Logical device 0x%02x is memory-mapped, can't use\n",
1226*4882a593Smuzhiyun logdev[i]);
1227*4882a593Smuzhiyun continue;
1228*4882a593Smuzhiyun }
1229*4882a593Smuzhiyun
1230*4882a593Smuzhiyun val = (superio_inb(sioaddr, SIOREG_IOBASE) << 8)
1231*4882a593Smuzhiyun | superio_inb(sioaddr, SIOREG_IOBASE + 1);
1232*4882a593Smuzhiyun if (!val) {
1233*4882a593Smuzhiyun pr_info("I/O base address not set for logical device 0x%02x\n",
1234*4882a593Smuzhiyun logdev[i]);
1235*4882a593Smuzhiyun continue;
1236*4882a593Smuzhiyun }
1237*4882a593Smuzhiyun sio_data->address[i] = val;
1238*4882a593Smuzhiyun }
1239*4882a593Smuzhiyun
1240*4882a593Smuzhiyun /* No point in loading the driver if everything is disabled */
1241*4882a593Smuzhiyun if (!sio_data->address[0] && !sio_data->address[1]) {
1242*4882a593Smuzhiyun err = -ENODEV;
1243*4882a593Smuzhiyun goto exit;
1244*4882a593Smuzhiyun }
1245*4882a593Smuzhiyun
1246*4882a593Smuzhiyun /* Check which fan inputs are wired */
1247*4882a593Smuzhiyun sio_data->has_fanin = (1 << 2) | (1 << 3); /* FANIN2, FANIN3 */
1248*4882a593Smuzhiyun
1249*4882a593Smuzhiyun cfg = superio_inb(sioaddr, SIOREG_CF2);
1250*4882a593Smuzhiyun if (!(cfg & (1 << 3)))
1251*4882a593Smuzhiyun sio_data->has_fanin |= (1 << 0); /* FANIN0 */
1252*4882a593Smuzhiyun if (!(cfg & (1 << 2)))
1253*4882a593Smuzhiyun sio_data->has_fanin |= (1 << 4); /* FANIN4 */
1254*4882a593Smuzhiyun
1255*4882a593Smuzhiyun cfg = superio_inb(sioaddr, SIOREG_CFD);
1256*4882a593Smuzhiyun if (!(cfg & (1 << 0)))
1257*4882a593Smuzhiyun sio_data->has_fanin |= (1 << 1); /* FANIN1 */
1258*4882a593Smuzhiyun
1259*4882a593Smuzhiyun cfg = superio_inb(sioaddr, SIOREG_CF4);
1260*4882a593Smuzhiyun if (!(cfg & (1 << 0)))
1261*4882a593Smuzhiyun sio_data->has_fanin |= (1 << 7); /* FANIN7 */
1262*4882a593Smuzhiyun cfg_b = superio_inb(sioaddr, SIOREG_CFB);
1263*4882a593Smuzhiyun if (!(cfg & (1 << 1)) && (cfg_b & (1 << 3)))
1264*4882a593Smuzhiyun sio_data->has_fanin |= (1 << 5); /* FANIN5 */
1265*4882a593Smuzhiyun cfg = superio_inb(sioaddr, SIOREG_CF3);
1266*4882a593Smuzhiyun if ((cfg & (1 << 3)) && !(cfg_b & (1 << 5)))
1267*4882a593Smuzhiyun sio_data->has_fanin |= (1 << 6); /* FANIN6 */
1268*4882a593Smuzhiyun
1269*4882a593Smuzhiyun /* Check which fan outputs are wired */
1270*4882a593Smuzhiyun sio_data->has_fanout = (1 << 0); /* FANOUT0 */
1271*4882a593Smuzhiyun if (cfg_b & (1 << 0))
1272*4882a593Smuzhiyun sio_data->has_fanout |= (1 << 3); /* FANOUT3 */
1273*4882a593Smuzhiyun
1274*4882a593Smuzhiyun cfg = superio_inb(sioaddr, SIOREG_CFC);
1275*4882a593Smuzhiyun if (!(cfg & (1 << 4))) {
1276*4882a593Smuzhiyun if (cfg_b & (1 << 1))
1277*4882a593Smuzhiyun sio_data->has_fanout |= (1 << 1); /* FANOUT1 */
1278*4882a593Smuzhiyun if (cfg_b & (1 << 2))
1279*4882a593Smuzhiyun sio_data->has_fanout |= (1 << 2); /* FANOUT2 */
1280*4882a593Smuzhiyun }
1281*4882a593Smuzhiyun
1282*4882a593Smuzhiyun /* FANOUT1 and FANOUT2 can each be routed to 2 different pins */
1283*4882a593Smuzhiyun cfg = superio_inb(sioaddr, SIOREG_CF5);
1284*4882a593Smuzhiyun if (cfg & (1 << 6))
1285*4882a593Smuzhiyun sio_data->has_fanout |= (1 << 1); /* FANOUT1 */
1286*4882a593Smuzhiyun if (cfg & (1 << 5))
1287*4882a593Smuzhiyun sio_data->has_fanout |= (1 << 2); /* FANOUT2 */
1288*4882a593Smuzhiyun
1289*4882a593Smuzhiyun exit:
1290*4882a593Smuzhiyun superio_exit(sioaddr);
1291*4882a593Smuzhiyun return err;
1292*4882a593Smuzhiyun }
1293*4882a593Smuzhiyun
pc87427_init(void)1294*4882a593Smuzhiyun static int __init pc87427_init(void)
1295*4882a593Smuzhiyun {
1296*4882a593Smuzhiyun int err;
1297*4882a593Smuzhiyun struct pc87427_sio_data sio_data;
1298*4882a593Smuzhiyun
1299*4882a593Smuzhiyun if (pc87427_find(0x2e, &sio_data)
1300*4882a593Smuzhiyun && pc87427_find(0x4e, &sio_data))
1301*4882a593Smuzhiyun return -ENODEV;
1302*4882a593Smuzhiyun
1303*4882a593Smuzhiyun err = platform_driver_register(&pc87427_driver);
1304*4882a593Smuzhiyun if (err)
1305*4882a593Smuzhiyun goto exit;
1306*4882a593Smuzhiyun
1307*4882a593Smuzhiyun /* Sets global pdev as a side effect */
1308*4882a593Smuzhiyun err = pc87427_device_add(&sio_data);
1309*4882a593Smuzhiyun if (err)
1310*4882a593Smuzhiyun goto exit_driver;
1311*4882a593Smuzhiyun
1312*4882a593Smuzhiyun return 0;
1313*4882a593Smuzhiyun
1314*4882a593Smuzhiyun exit_driver:
1315*4882a593Smuzhiyun platform_driver_unregister(&pc87427_driver);
1316*4882a593Smuzhiyun exit:
1317*4882a593Smuzhiyun return err;
1318*4882a593Smuzhiyun }
1319*4882a593Smuzhiyun
pc87427_exit(void)1320*4882a593Smuzhiyun static void __exit pc87427_exit(void)
1321*4882a593Smuzhiyun {
1322*4882a593Smuzhiyun platform_device_unregister(pdev);
1323*4882a593Smuzhiyun platform_driver_unregister(&pc87427_driver);
1324*4882a593Smuzhiyun }
1325*4882a593Smuzhiyun
1326*4882a593Smuzhiyun MODULE_AUTHOR("Jean Delvare <jdelvare@suse.de>");
1327*4882a593Smuzhiyun MODULE_DESCRIPTION("PC87427 hardware monitoring driver");
1328*4882a593Smuzhiyun MODULE_LICENSE("GPL");
1329*4882a593Smuzhiyun
1330*4882a593Smuzhiyun module_init(pc87427_init);
1331*4882a593Smuzhiyun module_exit(pc87427_exit);
1332