1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * nct6683 - Driver for the hardware monitoring functionality of
4*4882a593Smuzhiyun * Nuvoton NCT6683D eSIO
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * Copyright (C) 2013 Guenter Roeck <linux@roeck-us.net>
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * Derived from nct6775 driver
9*4882a593Smuzhiyun * Copyright (C) 2012, 2013 Guenter Roeck <linux@roeck-us.net>
10*4882a593Smuzhiyun *
11*4882a593Smuzhiyun * Supports the following chips:
12*4882a593Smuzhiyun *
13*4882a593Smuzhiyun * Chip #vin #fan #pwm #temp chip ID
14*4882a593Smuzhiyun * nct6683d 21(1) 16 8 32(1) 0xc730
15*4882a593Smuzhiyun *
16*4882a593Smuzhiyun * Notes:
17*4882a593Smuzhiyun * (1) Total number of vin and temp inputs is 32.
18*4882a593Smuzhiyun */
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun #include <linux/acpi.h>
23*4882a593Smuzhiyun #include <linux/delay.h>
24*4882a593Smuzhiyun #include <linux/err.h>
25*4882a593Smuzhiyun #include <linux/init.h>
26*4882a593Smuzhiyun #include <linux/io.h>
27*4882a593Smuzhiyun #include <linux/jiffies.h>
28*4882a593Smuzhiyun #include <linux/hwmon.h>
29*4882a593Smuzhiyun #include <linux/hwmon-sysfs.h>
30*4882a593Smuzhiyun #include <linux/module.h>
31*4882a593Smuzhiyun #include <linux/mutex.h>
32*4882a593Smuzhiyun #include <linux/platform_device.h>
33*4882a593Smuzhiyun #include <linux/slab.h>
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun enum kinds { nct6683 };
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun static bool force;
38*4882a593Smuzhiyun module_param(force, bool, 0);
39*4882a593Smuzhiyun MODULE_PARM_DESC(force, "Set to one to enable support for unknown vendors");
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun static const char * const nct6683_device_names[] = {
42*4882a593Smuzhiyun "nct6683",
43*4882a593Smuzhiyun };
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun static const char * const nct6683_chip_names[] = {
46*4882a593Smuzhiyun "NCT6683D",
47*4882a593Smuzhiyun };
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun #define DRVNAME "nct6683"
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun /*
52*4882a593Smuzhiyun * Super-I/O constants and functions
53*4882a593Smuzhiyun */
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun #define NCT6683_LD_ACPI 0x0a
56*4882a593Smuzhiyun #define NCT6683_LD_HWM 0x0b
57*4882a593Smuzhiyun #define NCT6683_LD_VID 0x0d
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun #define SIO_REG_LDSEL 0x07 /* Logical device select */
60*4882a593Smuzhiyun #define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
61*4882a593Smuzhiyun #define SIO_REG_ENABLE 0x30 /* Logical device enable */
62*4882a593Smuzhiyun #define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun #define SIO_NCT6681_ID 0xb270 /* for later */
65*4882a593Smuzhiyun #define SIO_NCT6683_ID 0xc730
66*4882a593Smuzhiyun #define SIO_ID_MASK 0xFFF0
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun static inline void
superio_outb(int ioreg,int reg,int val)69*4882a593Smuzhiyun superio_outb(int ioreg, int reg, int val)
70*4882a593Smuzhiyun {
71*4882a593Smuzhiyun outb(reg, ioreg);
72*4882a593Smuzhiyun outb(val, ioreg + 1);
73*4882a593Smuzhiyun }
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun static inline int
superio_inb(int ioreg,int reg)76*4882a593Smuzhiyun superio_inb(int ioreg, int reg)
77*4882a593Smuzhiyun {
78*4882a593Smuzhiyun outb(reg, ioreg);
79*4882a593Smuzhiyun return inb(ioreg + 1);
80*4882a593Smuzhiyun }
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun static inline void
superio_select(int ioreg,int ld)83*4882a593Smuzhiyun superio_select(int ioreg, int ld)
84*4882a593Smuzhiyun {
85*4882a593Smuzhiyun outb(SIO_REG_LDSEL, ioreg);
86*4882a593Smuzhiyun outb(ld, ioreg + 1);
87*4882a593Smuzhiyun }
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun static inline int
superio_enter(int ioreg)90*4882a593Smuzhiyun superio_enter(int ioreg)
91*4882a593Smuzhiyun {
92*4882a593Smuzhiyun /*
93*4882a593Smuzhiyun * Try to reserve <ioreg> and <ioreg + 1> for exclusive access.
94*4882a593Smuzhiyun */
95*4882a593Smuzhiyun if (!request_muxed_region(ioreg, 2, DRVNAME))
96*4882a593Smuzhiyun return -EBUSY;
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun outb(0x87, ioreg);
99*4882a593Smuzhiyun outb(0x87, ioreg);
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun return 0;
102*4882a593Smuzhiyun }
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun static inline void
superio_exit(int ioreg)105*4882a593Smuzhiyun superio_exit(int ioreg)
106*4882a593Smuzhiyun {
107*4882a593Smuzhiyun outb(0xaa, ioreg);
108*4882a593Smuzhiyun outb(0x02, ioreg);
109*4882a593Smuzhiyun outb(0x02, ioreg + 1);
110*4882a593Smuzhiyun release_region(ioreg, 2);
111*4882a593Smuzhiyun }
112*4882a593Smuzhiyun
113*4882a593Smuzhiyun /*
114*4882a593Smuzhiyun * ISA constants
115*4882a593Smuzhiyun */
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun #define IOREGION_ALIGNMENT (~7)
118*4882a593Smuzhiyun #define IOREGION_OFFSET 4 /* Use EC port 1 */
119*4882a593Smuzhiyun #define IOREGION_LENGTH 4
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun #define EC_PAGE_REG 0
122*4882a593Smuzhiyun #define EC_INDEX_REG 1
123*4882a593Smuzhiyun #define EC_DATA_REG 2
124*4882a593Smuzhiyun #define EC_EVENT_REG 3
125*4882a593Smuzhiyun
126*4882a593Smuzhiyun /* Common and NCT6683 specific data */
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun #define NCT6683_NUM_REG_MON 32
129*4882a593Smuzhiyun #define NCT6683_NUM_REG_FAN 16
130*4882a593Smuzhiyun #define NCT6683_NUM_REG_PWM 8
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun #define NCT6683_REG_MON(x) (0x100 + (x) * 2)
133*4882a593Smuzhiyun #define NCT6683_REG_FAN_RPM(x) (0x140 + (x) * 2)
134*4882a593Smuzhiyun #define NCT6683_REG_PWM(x) (0x160 + (x))
135*4882a593Smuzhiyun #define NCT6683_REG_PWM_WRITE(x) (0xa28 + (x))
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun #define NCT6683_REG_MON_STS(x) (0x174 + (x))
138*4882a593Smuzhiyun #define NCT6683_REG_IDLE(x) (0x178 + (x))
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun #define NCT6683_REG_FAN_STS(x) (0x17c + (x))
141*4882a593Smuzhiyun #define NCT6683_REG_FAN_ERRSTS 0x17e
142*4882a593Smuzhiyun #define NCT6683_REG_FAN_INITSTS 0x17f
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun #define NCT6683_HWM_CFG 0x180
145*4882a593Smuzhiyun
146*4882a593Smuzhiyun #define NCT6683_REG_MON_CFG(x) (0x1a0 + (x))
147*4882a593Smuzhiyun #define NCT6683_REG_FANIN_CFG(x) (0x1c0 + (x))
148*4882a593Smuzhiyun #define NCT6683_REG_FANOUT_CFG(x) (0x1d0 + (x))
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun #define NCT6683_REG_INTEL_TEMP_MAX(x) (0x901 + (x) * 16)
151*4882a593Smuzhiyun #define NCT6683_REG_INTEL_TEMP_CRIT(x) (0x90d + (x) * 16)
152*4882a593Smuzhiyun
153*4882a593Smuzhiyun #define NCT6683_REG_TEMP_HYST(x) (0x330 + (x)) /* 8 bit */
154*4882a593Smuzhiyun #define NCT6683_REG_TEMP_MAX(x) (0x350 + (x)) /* 8 bit */
155*4882a593Smuzhiyun #define NCT6683_REG_MON_HIGH(x) (0x370 + (x) * 2) /* 8 bit */
156*4882a593Smuzhiyun #define NCT6683_REG_MON_LOW(x) (0x371 + (x) * 2) /* 8 bit */
157*4882a593Smuzhiyun
158*4882a593Smuzhiyun #define NCT6683_REG_FAN_MIN(x) (0x3b8 + (x) * 2) /* 16 bit */
159*4882a593Smuzhiyun
160*4882a593Smuzhiyun #define NCT6683_REG_FAN_CFG_CTRL 0xa01
161*4882a593Smuzhiyun #define NCT6683_FAN_CFG_REQ 0x80
162*4882a593Smuzhiyun #define NCT6683_FAN_CFG_DONE 0x40
163*4882a593Smuzhiyun
164*4882a593Smuzhiyun #define NCT6683_REG_CUSTOMER_ID 0x602
165*4882a593Smuzhiyun #define NCT6683_CUSTOMER_ID_INTEL 0x805
166*4882a593Smuzhiyun #define NCT6683_CUSTOMER_ID_MITAC 0xa0e
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun #define NCT6683_REG_BUILD_YEAR 0x604
169*4882a593Smuzhiyun #define NCT6683_REG_BUILD_MONTH 0x605
170*4882a593Smuzhiyun #define NCT6683_REG_BUILD_DAY 0x606
171*4882a593Smuzhiyun #define NCT6683_REG_SERIAL 0x607
172*4882a593Smuzhiyun #define NCT6683_REG_VERSION_HI 0x608
173*4882a593Smuzhiyun #define NCT6683_REG_VERSION_LO 0x609
174*4882a593Smuzhiyun
175*4882a593Smuzhiyun #define NCT6683_REG_CR_CASEOPEN 0xe8
176*4882a593Smuzhiyun #define NCT6683_CR_CASEOPEN_MASK (1 << 7)
177*4882a593Smuzhiyun
178*4882a593Smuzhiyun #define NCT6683_REG_CR_BEEP 0xe0
179*4882a593Smuzhiyun #define NCT6683_CR_BEEP_MASK (1 << 6)
180*4882a593Smuzhiyun
181*4882a593Smuzhiyun static const char *const nct6683_mon_label[] = {
182*4882a593Smuzhiyun NULL, /* disabled */
183*4882a593Smuzhiyun "Local",
184*4882a593Smuzhiyun "Diode 0 (curr)",
185*4882a593Smuzhiyun "Diode 1 (curr)",
186*4882a593Smuzhiyun "Diode 2 (curr)",
187*4882a593Smuzhiyun "Diode 0 (volt)",
188*4882a593Smuzhiyun "Diode 1 (volt)",
189*4882a593Smuzhiyun "Diode 2 (volt)",
190*4882a593Smuzhiyun "Thermistor 14",
191*4882a593Smuzhiyun "Thermistor 15",
192*4882a593Smuzhiyun "Thermistor 16",
193*4882a593Smuzhiyun "Thermistor 0",
194*4882a593Smuzhiyun "Thermistor 1",
195*4882a593Smuzhiyun "Thermistor 2",
196*4882a593Smuzhiyun "Thermistor 3",
197*4882a593Smuzhiyun "Thermistor 4",
198*4882a593Smuzhiyun "Thermistor 5", /* 0x10 */
199*4882a593Smuzhiyun "Thermistor 6",
200*4882a593Smuzhiyun "Thermistor 7",
201*4882a593Smuzhiyun "Thermistor 8",
202*4882a593Smuzhiyun "Thermistor 9",
203*4882a593Smuzhiyun "Thermistor 10",
204*4882a593Smuzhiyun "Thermistor 11",
205*4882a593Smuzhiyun "Thermistor 12",
206*4882a593Smuzhiyun "Thermistor 13",
207*4882a593Smuzhiyun NULL, NULL, NULL, NULL, NULL, NULL, NULL,
208*4882a593Smuzhiyun "PECI 0.0", /* 0x20 */
209*4882a593Smuzhiyun "PECI 1.0",
210*4882a593Smuzhiyun "PECI 2.0",
211*4882a593Smuzhiyun "PECI 3.0",
212*4882a593Smuzhiyun "PECI 0.1",
213*4882a593Smuzhiyun "PECI 1.1",
214*4882a593Smuzhiyun "PECI 2.1",
215*4882a593Smuzhiyun "PECI 3.1",
216*4882a593Smuzhiyun "PECI DIMM 0",
217*4882a593Smuzhiyun "PECI DIMM 1",
218*4882a593Smuzhiyun "PECI DIMM 2",
219*4882a593Smuzhiyun "PECI DIMM 3",
220*4882a593Smuzhiyun NULL, NULL, NULL, NULL,
221*4882a593Smuzhiyun "PCH CPU", /* 0x30 */
222*4882a593Smuzhiyun "PCH CHIP",
223*4882a593Smuzhiyun "PCH CHIP CPU MAX",
224*4882a593Smuzhiyun "PCH MCH",
225*4882a593Smuzhiyun "PCH DIMM 0",
226*4882a593Smuzhiyun "PCH DIMM 1",
227*4882a593Smuzhiyun "PCH DIMM 2",
228*4882a593Smuzhiyun "PCH DIMM 3",
229*4882a593Smuzhiyun "SMBus 0",
230*4882a593Smuzhiyun "SMBus 1",
231*4882a593Smuzhiyun "SMBus 2",
232*4882a593Smuzhiyun "SMBus 3",
233*4882a593Smuzhiyun "SMBus 4",
234*4882a593Smuzhiyun "SMBus 5",
235*4882a593Smuzhiyun "DIMM 0",
236*4882a593Smuzhiyun "DIMM 1",
237*4882a593Smuzhiyun "DIMM 2", /* 0x40 */
238*4882a593Smuzhiyun "DIMM 3",
239*4882a593Smuzhiyun "AMD TSI Addr 90h",
240*4882a593Smuzhiyun "AMD TSI Addr 92h",
241*4882a593Smuzhiyun "AMD TSI Addr 94h",
242*4882a593Smuzhiyun "AMD TSI Addr 96h",
243*4882a593Smuzhiyun "AMD TSI Addr 98h",
244*4882a593Smuzhiyun "AMD TSI Addr 9ah",
245*4882a593Smuzhiyun "AMD TSI Addr 9ch",
246*4882a593Smuzhiyun "AMD TSI Addr 9dh",
247*4882a593Smuzhiyun NULL, NULL, NULL, NULL, NULL, NULL,
248*4882a593Smuzhiyun "Virtual 0", /* 0x50 */
249*4882a593Smuzhiyun "Virtual 1",
250*4882a593Smuzhiyun "Virtual 2",
251*4882a593Smuzhiyun "Virtual 3",
252*4882a593Smuzhiyun "Virtual 4",
253*4882a593Smuzhiyun "Virtual 5",
254*4882a593Smuzhiyun "Virtual 6",
255*4882a593Smuzhiyun "Virtual 7",
256*4882a593Smuzhiyun NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
257*4882a593Smuzhiyun "VCC", /* 0x60 voltage sensors */
258*4882a593Smuzhiyun "VSB",
259*4882a593Smuzhiyun "AVSB",
260*4882a593Smuzhiyun "VTT",
261*4882a593Smuzhiyun "VBAT",
262*4882a593Smuzhiyun "VREF",
263*4882a593Smuzhiyun "VIN0",
264*4882a593Smuzhiyun "VIN1",
265*4882a593Smuzhiyun "VIN2",
266*4882a593Smuzhiyun "VIN3",
267*4882a593Smuzhiyun "VIN4",
268*4882a593Smuzhiyun "VIN5",
269*4882a593Smuzhiyun "VIN6",
270*4882a593Smuzhiyun "VIN7",
271*4882a593Smuzhiyun "VIN8",
272*4882a593Smuzhiyun "VIN9",
273*4882a593Smuzhiyun "VIN10",
274*4882a593Smuzhiyun "VIN11",
275*4882a593Smuzhiyun "VIN12",
276*4882a593Smuzhiyun "VIN13",
277*4882a593Smuzhiyun "VIN14",
278*4882a593Smuzhiyun "VIN15",
279*4882a593Smuzhiyun "VIN16",
280*4882a593Smuzhiyun };
281*4882a593Smuzhiyun
282*4882a593Smuzhiyun #define NUM_MON_LABELS ARRAY_SIZE(nct6683_mon_label)
283*4882a593Smuzhiyun #define MON_VOLTAGE_START 0x60
284*4882a593Smuzhiyun
285*4882a593Smuzhiyun /* ------------------------------------------------------- */
286*4882a593Smuzhiyun
287*4882a593Smuzhiyun struct nct6683_data {
288*4882a593Smuzhiyun int addr; /* IO base of EC space */
289*4882a593Smuzhiyun int sioreg; /* SIO register */
290*4882a593Smuzhiyun enum kinds kind;
291*4882a593Smuzhiyun u16 customer_id;
292*4882a593Smuzhiyun
293*4882a593Smuzhiyun struct device *hwmon_dev;
294*4882a593Smuzhiyun const struct attribute_group *groups[6];
295*4882a593Smuzhiyun
296*4882a593Smuzhiyun int temp_num; /* number of temperature attributes */
297*4882a593Smuzhiyun u8 temp_index[NCT6683_NUM_REG_MON];
298*4882a593Smuzhiyun u8 temp_src[NCT6683_NUM_REG_MON];
299*4882a593Smuzhiyun
300*4882a593Smuzhiyun u8 in_num; /* number of voltage attributes */
301*4882a593Smuzhiyun u8 in_index[NCT6683_NUM_REG_MON];
302*4882a593Smuzhiyun u8 in_src[NCT6683_NUM_REG_MON];
303*4882a593Smuzhiyun
304*4882a593Smuzhiyun struct mutex update_lock; /* used to protect sensor updates */
305*4882a593Smuzhiyun bool valid; /* true if following fields are valid */
306*4882a593Smuzhiyun unsigned long last_updated; /* In jiffies */
307*4882a593Smuzhiyun
308*4882a593Smuzhiyun /* Voltage attribute values */
309*4882a593Smuzhiyun u8 in[3][NCT6683_NUM_REG_MON]; /* [0]=in, [1]=in_max, [2]=in_min */
310*4882a593Smuzhiyun
311*4882a593Smuzhiyun /* Temperature attribute values */
312*4882a593Smuzhiyun s16 temp_in[NCT6683_NUM_REG_MON];
313*4882a593Smuzhiyun s8 temp[4][NCT6683_NUM_REG_MON];/* [0]=min, [1]=max, [2]=hyst,
314*4882a593Smuzhiyun * [3]=crit
315*4882a593Smuzhiyun */
316*4882a593Smuzhiyun
317*4882a593Smuzhiyun /* Fan attribute values */
318*4882a593Smuzhiyun unsigned int rpm[NCT6683_NUM_REG_FAN];
319*4882a593Smuzhiyun u16 fan_min[NCT6683_NUM_REG_FAN];
320*4882a593Smuzhiyun u8 fanin_cfg[NCT6683_NUM_REG_FAN];
321*4882a593Smuzhiyun u8 fanout_cfg[NCT6683_NUM_REG_FAN];
322*4882a593Smuzhiyun u16 have_fan; /* some fan inputs can be disabled */
323*4882a593Smuzhiyun
324*4882a593Smuzhiyun u8 have_pwm;
325*4882a593Smuzhiyun u8 pwm[NCT6683_NUM_REG_PWM];
326*4882a593Smuzhiyun
327*4882a593Smuzhiyun #ifdef CONFIG_PM
328*4882a593Smuzhiyun /* Remember extra register values over suspend/resume */
329*4882a593Smuzhiyun u8 hwm_cfg;
330*4882a593Smuzhiyun #endif
331*4882a593Smuzhiyun };
332*4882a593Smuzhiyun
333*4882a593Smuzhiyun struct nct6683_sio_data {
334*4882a593Smuzhiyun int sioreg;
335*4882a593Smuzhiyun enum kinds kind;
336*4882a593Smuzhiyun };
337*4882a593Smuzhiyun
338*4882a593Smuzhiyun struct sensor_device_template {
339*4882a593Smuzhiyun struct device_attribute dev_attr;
340*4882a593Smuzhiyun union {
341*4882a593Smuzhiyun struct {
342*4882a593Smuzhiyun u8 nr;
343*4882a593Smuzhiyun u8 index;
344*4882a593Smuzhiyun } s;
345*4882a593Smuzhiyun int index;
346*4882a593Smuzhiyun } u;
347*4882a593Smuzhiyun bool s2; /* true if both index and nr are used */
348*4882a593Smuzhiyun };
349*4882a593Smuzhiyun
350*4882a593Smuzhiyun struct sensor_device_attr_u {
351*4882a593Smuzhiyun union {
352*4882a593Smuzhiyun struct sensor_device_attribute a1;
353*4882a593Smuzhiyun struct sensor_device_attribute_2 a2;
354*4882a593Smuzhiyun } u;
355*4882a593Smuzhiyun char name[32];
356*4882a593Smuzhiyun };
357*4882a593Smuzhiyun
358*4882a593Smuzhiyun #define __TEMPLATE_ATTR(_template, _mode, _show, _store) { \
359*4882a593Smuzhiyun .attr = {.name = _template, .mode = _mode }, \
360*4882a593Smuzhiyun .show = _show, \
361*4882a593Smuzhiyun .store = _store, \
362*4882a593Smuzhiyun }
363*4882a593Smuzhiyun
364*4882a593Smuzhiyun #define SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store, _index) \
365*4882a593Smuzhiyun { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \
366*4882a593Smuzhiyun .u.index = _index, \
367*4882a593Smuzhiyun .s2 = false }
368*4882a593Smuzhiyun
369*4882a593Smuzhiyun #define SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store, \
370*4882a593Smuzhiyun _nr, _index) \
371*4882a593Smuzhiyun { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \
372*4882a593Smuzhiyun .u.s.index = _index, \
373*4882a593Smuzhiyun .u.s.nr = _nr, \
374*4882a593Smuzhiyun .s2 = true }
375*4882a593Smuzhiyun
376*4882a593Smuzhiyun #define SENSOR_TEMPLATE(_name, _template, _mode, _show, _store, _index) \
377*4882a593Smuzhiyun static struct sensor_device_template sensor_dev_template_##_name \
378*4882a593Smuzhiyun = SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store, \
379*4882a593Smuzhiyun _index)
380*4882a593Smuzhiyun
381*4882a593Smuzhiyun #define SENSOR_TEMPLATE_2(_name, _template, _mode, _show, _store, \
382*4882a593Smuzhiyun _nr, _index) \
383*4882a593Smuzhiyun static struct sensor_device_template sensor_dev_template_##_name \
384*4882a593Smuzhiyun = SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store, \
385*4882a593Smuzhiyun _nr, _index)
386*4882a593Smuzhiyun
387*4882a593Smuzhiyun struct sensor_template_group {
388*4882a593Smuzhiyun struct sensor_device_template **templates;
389*4882a593Smuzhiyun umode_t (*is_visible)(struct kobject *, struct attribute *, int);
390*4882a593Smuzhiyun int base;
391*4882a593Smuzhiyun };
392*4882a593Smuzhiyun
393*4882a593Smuzhiyun static struct attribute_group *
nct6683_create_attr_group(struct device * dev,const struct sensor_template_group * tg,int repeat)394*4882a593Smuzhiyun nct6683_create_attr_group(struct device *dev,
395*4882a593Smuzhiyun const struct sensor_template_group *tg,
396*4882a593Smuzhiyun int repeat)
397*4882a593Smuzhiyun {
398*4882a593Smuzhiyun struct sensor_device_attribute_2 *a2;
399*4882a593Smuzhiyun struct sensor_device_attribute *a;
400*4882a593Smuzhiyun struct sensor_device_template **t;
401*4882a593Smuzhiyun struct sensor_device_attr_u *su;
402*4882a593Smuzhiyun struct attribute_group *group;
403*4882a593Smuzhiyun struct attribute **attrs;
404*4882a593Smuzhiyun int i, j, count;
405*4882a593Smuzhiyun
406*4882a593Smuzhiyun if (repeat <= 0)
407*4882a593Smuzhiyun return ERR_PTR(-EINVAL);
408*4882a593Smuzhiyun
409*4882a593Smuzhiyun t = tg->templates;
410*4882a593Smuzhiyun for (count = 0; *t; t++, count++)
411*4882a593Smuzhiyun ;
412*4882a593Smuzhiyun
413*4882a593Smuzhiyun if (count == 0)
414*4882a593Smuzhiyun return ERR_PTR(-EINVAL);
415*4882a593Smuzhiyun
416*4882a593Smuzhiyun group = devm_kzalloc(dev, sizeof(*group), GFP_KERNEL);
417*4882a593Smuzhiyun if (group == NULL)
418*4882a593Smuzhiyun return ERR_PTR(-ENOMEM);
419*4882a593Smuzhiyun
420*4882a593Smuzhiyun attrs = devm_kcalloc(dev, repeat * count + 1, sizeof(*attrs),
421*4882a593Smuzhiyun GFP_KERNEL);
422*4882a593Smuzhiyun if (attrs == NULL)
423*4882a593Smuzhiyun return ERR_PTR(-ENOMEM);
424*4882a593Smuzhiyun
425*4882a593Smuzhiyun su = devm_kzalloc(dev, array3_size(repeat, count, sizeof(*su)),
426*4882a593Smuzhiyun GFP_KERNEL);
427*4882a593Smuzhiyun if (su == NULL)
428*4882a593Smuzhiyun return ERR_PTR(-ENOMEM);
429*4882a593Smuzhiyun
430*4882a593Smuzhiyun group->attrs = attrs;
431*4882a593Smuzhiyun group->is_visible = tg->is_visible;
432*4882a593Smuzhiyun
433*4882a593Smuzhiyun for (i = 0; i < repeat; i++) {
434*4882a593Smuzhiyun t = tg->templates;
435*4882a593Smuzhiyun for (j = 0; *t != NULL; j++) {
436*4882a593Smuzhiyun snprintf(su->name, sizeof(su->name),
437*4882a593Smuzhiyun (*t)->dev_attr.attr.name, tg->base + i);
438*4882a593Smuzhiyun if ((*t)->s2) {
439*4882a593Smuzhiyun a2 = &su->u.a2;
440*4882a593Smuzhiyun sysfs_attr_init(&a2->dev_attr.attr);
441*4882a593Smuzhiyun a2->dev_attr.attr.name = su->name;
442*4882a593Smuzhiyun a2->nr = (*t)->u.s.nr + i;
443*4882a593Smuzhiyun a2->index = (*t)->u.s.index;
444*4882a593Smuzhiyun a2->dev_attr.attr.mode =
445*4882a593Smuzhiyun (*t)->dev_attr.attr.mode;
446*4882a593Smuzhiyun a2->dev_attr.show = (*t)->dev_attr.show;
447*4882a593Smuzhiyun a2->dev_attr.store = (*t)->dev_attr.store;
448*4882a593Smuzhiyun *attrs = &a2->dev_attr.attr;
449*4882a593Smuzhiyun } else {
450*4882a593Smuzhiyun a = &su->u.a1;
451*4882a593Smuzhiyun sysfs_attr_init(&a->dev_attr.attr);
452*4882a593Smuzhiyun a->dev_attr.attr.name = su->name;
453*4882a593Smuzhiyun a->index = (*t)->u.index + i;
454*4882a593Smuzhiyun a->dev_attr.attr.mode =
455*4882a593Smuzhiyun (*t)->dev_attr.attr.mode;
456*4882a593Smuzhiyun a->dev_attr.show = (*t)->dev_attr.show;
457*4882a593Smuzhiyun a->dev_attr.store = (*t)->dev_attr.store;
458*4882a593Smuzhiyun *attrs = &a->dev_attr.attr;
459*4882a593Smuzhiyun }
460*4882a593Smuzhiyun attrs++;
461*4882a593Smuzhiyun su++;
462*4882a593Smuzhiyun t++;
463*4882a593Smuzhiyun }
464*4882a593Smuzhiyun }
465*4882a593Smuzhiyun
466*4882a593Smuzhiyun return group;
467*4882a593Smuzhiyun }
468*4882a593Smuzhiyun
469*4882a593Smuzhiyun /* LSB is 16 mV, except for the following sources, where it is 32 mV */
470*4882a593Smuzhiyun #define MON_SRC_VCC 0x60
471*4882a593Smuzhiyun #define MON_SRC_VSB 0x61
472*4882a593Smuzhiyun #define MON_SRC_AVSB 0x62
473*4882a593Smuzhiyun #define MON_SRC_VBAT 0x64
474*4882a593Smuzhiyun
in_from_reg(u16 reg,u8 src)475*4882a593Smuzhiyun static inline long in_from_reg(u16 reg, u8 src)
476*4882a593Smuzhiyun {
477*4882a593Smuzhiyun int scale = 16;
478*4882a593Smuzhiyun
479*4882a593Smuzhiyun if (src == MON_SRC_VCC || src == MON_SRC_VSB || src == MON_SRC_AVSB ||
480*4882a593Smuzhiyun src == MON_SRC_VBAT)
481*4882a593Smuzhiyun scale <<= 1;
482*4882a593Smuzhiyun return reg * scale;
483*4882a593Smuzhiyun }
484*4882a593Smuzhiyun
in_to_reg(u32 val,u8 src)485*4882a593Smuzhiyun static inline u16 in_to_reg(u32 val, u8 src)
486*4882a593Smuzhiyun {
487*4882a593Smuzhiyun int scale = 16;
488*4882a593Smuzhiyun
489*4882a593Smuzhiyun if (src == MON_SRC_VCC || src == MON_SRC_VSB || src == MON_SRC_AVSB ||
490*4882a593Smuzhiyun src == MON_SRC_VBAT)
491*4882a593Smuzhiyun scale <<= 1;
492*4882a593Smuzhiyun
493*4882a593Smuzhiyun return clamp_val(DIV_ROUND_CLOSEST(val, scale), 0, 127);
494*4882a593Smuzhiyun }
495*4882a593Smuzhiyun
nct6683_read(struct nct6683_data * data,u16 reg)496*4882a593Smuzhiyun static u16 nct6683_read(struct nct6683_data *data, u16 reg)
497*4882a593Smuzhiyun {
498*4882a593Smuzhiyun int res;
499*4882a593Smuzhiyun
500*4882a593Smuzhiyun outb_p(0xff, data->addr + EC_PAGE_REG); /* unlock */
501*4882a593Smuzhiyun outb_p(reg >> 8, data->addr + EC_PAGE_REG);
502*4882a593Smuzhiyun outb_p(reg & 0xff, data->addr + EC_INDEX_REG);
503*4882a593Smuzhiyun res = inb_p(data->addr + EC_DATA_REG);
504*4882a593Smuzhiyun return res;
505*4882a593Smuzhiyun }
506*4882a593Smuzhiyun
nct6683_read16(struct nct6683_data * data,u16 reg)507*4882a593Smuzhiyun static u16 nct6683_read16(struct nct6683_data *data, u16 reg)
508*4882a593Smuzhiyun {
509*4882a593Smuzhiyun return (nct6683_read(data, reg) << 8) | nct6683_read(data, reg + 1);
510*4882a593Smuzhiyun }
511*4882a593Smuzhiyun
nct6683_write(struct nct6683_data * data,u16 reg,u16 value)512*4882a593Smuzhiyun static void nct6683_write(struct nct6683_data *data, u16 reg, u16 value)
513*4882a593Smuzhiyun {
514*4882a593Smuzhiyun outb_p(0xff, data->addr + EC_PAGE_REG); /* unlock */
515*4882a593Smuzhiyun outb_p(reg >> 8, data->addr + EC_PAGE_REG);
516*4882a593Smuzhiyun outb_p(reg & 0xff, data->addr + EC_INDEX_REG);
517*4882a593Smuzhiyun outb_p(value & 0xff, data->addr + EC_DATA_REG);
518*4882a593Smuzhiyun }
519*4882a593Smuzhiyun
get_in_reg(struct nct6683_data * data,int nr,int index)520*4882a593Smuzhiyun static int get_in_reg(struct nct6683_data *data, int nr, int index)
521*4882a593Smuzhiyun {
522*4882a593Smuzhiyun int ch = data->in_index[index];
523*4882a593Smuzhiyun int reg = -EINVAL;
524*4882a593Smuzhiyun
525*4882a593Smuzhiyun switch (nr) {
526*4882a593Smuzhiyun case 0:
527*4882a593Smuzhiyun reg = NCT6683_REG_MON(ch);
528*4882a593Smuzhiyun break;
529*4882a593Smuzhiyun case 1:
530*4882a593Smuzhiyun if (data->customer_id != NCT6683_CUSTOMER_ID_INTEL)
531*4882a593Smuzhiyun reg = NCT6683_REG_MON_LOW(ch);
532*4882a593Smuzhiyun break;
533*4882a593Smuzhiyun case 2:
534*4882a593Smuzhiyun if (data->customer_id != NCT6683_CUSTOMER_ID_INTEL)
535*4882a593Smuzhiyun reg = NCT6683_REG_MON_HIGH(ch);
536*4882a593Smuzhiyun break;
537*4882a593Smuzhiyun default:
538*4882a593Smuzhiyun break;
539*4882a593Smuzhiyun }
540*4882a593Smuzhiyun return reg;
541*4882a593Smuzhiyun }
542*4882a593Smuzhiyun
get_temp_reg(struct nct6683_data * data,int nr,int index)543*4882a593Smuzhiyun static int get_temp_reg(struct nct6683_data *data, int nr, int index)
544*4882a593Smuzhiyun {
545*4882a593Smuzhiyun int ch = data->temp_index[index];
546*4882a593Smuzhiyun int reg = -EINVAL;
547*4882a593Smuzhiyun
548*4882a593Smuzhiyun switch (data->customer_id) {
549*4882a593Smuzhiyun case NCT6683_CUSTOMER_ID_INTEL:
550*4882a593Smuzhiyun switch (nr) {
551*4882a593Smuzhiyun default:
552*4882a593Smuzhiyun case 1: /* max */
553*4882a593Smuzhiyun reg = NCT6683_REG_INTEL_TEMP_MAX(ch);
554*4882a593Smuzhiyun break;
555*4882a593Smuzhiyun case 3: /* crit */
556*4882a593Smuzhiyun reg = NCT6683_REG_INTEL_TEMP_CRIT(ch);
557*4882a593Smuzhiyun break;
558*4882a593Smuzhiyun }
559*4882a593Smuzhiyun break;
560*4882a593Smuzhiyun case NCT6683_CUSTOMER_ID_MITAC:
561*4882a593Smuzhiyun default:
562*4882a593Smuzhiyun switch (nr) {
563*4882a593Smuzhiyun default:
564*4882a593Smuzhiyun case 0: /* min */
565*4882a593Smuzhiyun reg = NCT6683_REG_MON_LOW(ch);
566*4882a593Smuzhiyun break;
567*4882a593Smuzhiyun case 1: /* max */
568*4882a593Smuzhiyun reg = NCT6683_REG_TEMP_MAX(ch);
569*4882a593Smuzhiyun break;
570*4882a593Smuzhiyun case 2: /* hyst */
571*4882a593Smuzhiyun reg = NCT6683_REG_TEMP_HYST(ch);
572*4882a593Smuzhiyun break;
573*4882a593Smuzhiyun case 3: /* crit */
574*4882a593Smuzhiyun reg = NCT6683_REG_MON_HIGH(ch);
575*4882a593Smuzhiyun break;
576*4882a593Smuzhiyun }
577*4882a593Smuzhiyun break;
578*4882a593Smuzhiyun }
579*4882a593Smuzhiyun return reg;
580*4882a593Smuzhiyun }
581*4882a593Smuzhiyun
nct6683_update_pwm(struct device * dev)582*4882a593Smuzhiyun static void nct6683_update_pwm(struct device *dev)
583*4882a593Smuzhiyun {
584*4882a593Smuzhiyun struct nct6683_data *data = dev_get_drvdata(dev);
585*4882a593Smuzhiyun int i;
586*4882a593Smuzhiyun
587*4882a593Smuzhiyun for (i = 0; i < NCT6683_NUM_REG_PWM; i++) {
588*4882a593Smuzhiyun if (!(data->have_pwm & (1 << i)))
589*4882a593Smuzhiyun continue;
590*4882a593Smuzhiyun data->pwm[i] = nct6683_read(data, NCT6683_REG_PWM(i));
591*4882a593Smuzhiyun }
592*4882a593Smuzhiyun }
593*4882a593Smuzhiyun
nct6683_update_device(struct device * dev)594*4882a593Smuzhiyun static struct nct6683_data *nct6683_update_device(struct device *dev)
595*4882a593Smuzhiyun {
596*4882a593Smuzhiyun struct nct6683_data *data = dev_get_drvdata(dev);
597*4882a593Smuzhiyun int i, j;
598*4882a593Smuzhiyun
599*4882a593Smuzhiyun mutex_lock(&data->update_lock);
600*4882a593Smuzhiyun
601*4882a593Smuzhiyun if (time_after(jiffies, data->last_updated + HZ) || !data->valid) {
602*4882a593Smuzhiyun /* Measured voltages and limits */
603*4882a593Smuzhiyun for (i = 0; i < data->in_num; i++) {
604*4882a593Smuzhiyun for (j = 0; j < 3; j++) {
605*4882a593Smuzhiyun int reg = get_in_reg(data, j, i);
606*4882a593Smuzhiyun
607*4882a593Smuzhiyun if (reg >= 0)
608*4882a593Smuzhiyun data->in[j][i] =
609*4882a593Smuzhiyun nct6683_read(data, reg);
610*4882a593Smuzhiyun }
611*4882a593Smuzhiyun }
612*4882a593Smuzhiyun
613*4882a593Smuzhiyun /* Measured temperatures and limits */
614*4882a593Smuzhiyun for (i = 0; i < data->temp_num; i++) {
615*4882a593Smuzhiyun u8 ch = data->temp_index[i];
616*4882a593Smuzhiyun
617*4882a593Smuzhiyun data->temp_in[i] = nct6683_read16(data,
618*4882a593Smuzhiyun NCT6683_REG_MON(ch));
619*4882a593Smuzhiyun for (j = 0; j < 4; j++) {
620*4882a593Smuzhiyun int reg = get_temp_reg(data, j, i);
621*4882a593Smuzhiyun
622*4882a593Smuzhiyun if (reg >= 0)
623*4882a593Smuzhiyun data->temp[j][i] =
624*4882a593Smuzhiyun nct6683_read(data, reg);
625*4882a593Smuzhiyun }
626*4882a593Smuzhiyun }
627*4882a593Smuzhiyun
628*4882a593Smuzhiyun /* Measured fan speeds and limits */
629*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(data->rpm); i++) {
630*4882a593Smuzhiyun if (!(data->have_fan & (1 << i)))
631*4882a593Smuzhiyun continue;
632*4882a593Smuzhiyun
633*4882a593Smuzhiyun data->rpm[i] = nct6683_read16(data,
634*4882a593Smuzhiyun NCT6683_REG_FAN_RPM(i));
635*4882a593Smuzhiyun data->fan_min[i] = nct6683_read16(data,
636*4882a593Smuzhiyun NCT6683_REG_FAN_MIN(i));
637*4882a593Smuzhiyun }
638*4882a593Smuzhiyun
639*4882a593Smuzhiyun nct6683_update_pwm(dev);
640*4882a593Smuzhiyun
641*4882a593Smuzhiyun data->last_updated = jiffies;
642*4882a593Smuzhiyun data->valid = true;
643*4882a593Smuzhiyun }
644*4882a593Smuzhiyun
645*4882a593Smuzhiyun mutex_unlock(&data->update_lock);
646*4882a593Smuzhiyun return data;
647*4882a593Smuzhiyun }
648*4882a593Smuzhiyun
649*4882a593Smuzhiyun /*
650*4882a593Smuzhiyun * Sysfs callback functions
651*4882a593Smuzhiyun */
652*4882a593Smuzhiyun static ssize_t
show_in_label(struct device * dev,struct device_attribute * attr,char * buf)653*4882a593Smuzhiyun show_in_label(struct device *dev, struct device_attribute *attr, char *buf)
654*4882a593Smuzhiyun {
655*4882a593Smuzhiyun struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
656*4882a593Smuzhiyun struct nct6683_data *data = nct6683_update_device(dev);
657*4882a593Smuzhiyun int nr = sattr->index;
658*4882a593Smuzhiyun
659*4882a593Smuzhiyun return sprintf(buf, "%s\n", nct6683_mon_label[data->in_src[nr]]);
660*4882a593Smuzhiyun }
661*4882a593Smuzhiyun
662*4882a593Smuzhiyun static ssize_t
show_in_reg(struct device * dev,struct device_attribute * attr,char * buf)663*4882a593Smuzhiyun show_in_reg(struct device *dev, struct device_attribute *attr, char *buf)
664*4882a593Smuzhiyun {
665*4882a593Smuzhiyun struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
666*4882a593Smuzhiyun struct nct6683_data *data = nct6683_update_device(dev);
667*4882a593Smuzhiyun int index = sattr->index;
668*4882a593Smuzhiyun int nr = sattr->nr;
669*4882a593Smuzhiyun
670*4882a593Smuzhiyun return sprintf(buf, "%ld\n",
671*4882a593Smuzhiyun in_from_reg(data->in[index][nr], data->in_index[index]));
672*4882a593Smuzhiyun }
673*4882a593Smuzhiyun
nct6683_in_is_visible(struct kobject * kobj,struct attribute * attr,int index)674*4882a593Smuzhiyun static umode_t nct6683_in_is_visible(struct kobject *kobj,
675*4882a593Smuzhiyun struct attribute *attr, int index)
676*4882a593Smuzhiyun {
677*4882a593Smuzhiyun struct device *dev = kobj_to_dev(kobj);
678*4882a593Smuzhiyun struct nct6683_data *data = dev_get_drvdata(dev);
679*4882a593Smuzhiyun int nr = index % 4; /* attribute */
680*4882a593Smuzhiyun
681*4882a593Smuzhiyun /*
682*4882a593Smuzhiyun * Voltage limits exist for Intel boards,
683*4882a593Smuzhiyun * but register location and encoding is unknown
684*4882a593Smuzhiyun */
685*4882a593Smuzhiyun if ((nr == 2 || nr == 3) &&
686*4882a593Smuzhiyun data->customer_id == NCT6683_CUSTOMER_ID_INTEL)
687*4882a593Smuzhiyun return 0;
688*4882a593Smuzhiyun
689*4882a593Smuzhiyun return attr->mode;
690*4882a593Smuzhiyun }
691*4882a593Smuzhiyun
692*4882a593Smuzhiyun SENSOR_TEMPLATE(in_label, "in%d_label", S_IRUGO, show_in_label, NULL, 0);
693*4882a593Smuzhiyun SENSOR_TEMPLATE_2(in_input, "in%d_input", S_IRUGO, show_in_reg, NULL, 0, 0);
694*4882a593Smuzhiyun SENSOR_TEMPLATE_2(in_min, "in%d_min", S_IRUGO, show_in_reg, NULL, 0, 1);
695*4882a593Smuzhiyun SENSOR_TEMPLATE_2(in_max, "in%d_max", S_IRUGO, show_in_reg, NULL, 0, 2);
696*4882a593Smuzhiyun
697*4882a593Smuzhiyun static struct sensor_device_template *nct6683_attributes_in_template[] = {
698*4882a593Smuzhiyun &sensor_dev_template_in_label,
699*4882a593Smuzhiyun &sensor_dev_template_in_input,
700*4882a593Smuzhiyun &sensor_dev_template_in_min,
701*4882a593Smuzhiyun &sensor_dev_template_in_max,
702*4882a593Smuzhiyun NULL
703*4882a593Smuzhiyun };
704*4882a593Smuzhiyun
705*4882a593Smuzhiyun static const struct sensor_template_group nct6683_in_template_group = {
706*4882a593Smuzhiyun .templates = nct6683_attributes_in_template,
707*4882a593Smuzhiyun .is_visible = nct6683_in_is_visible,
708*4882a593Smuzhiyun };
709*4882a593Smuzhiyun
710*4882a593Smuzhiyun static ssize_t
show_fan(struct device * dev,struct device_attribute * attr,char * buf)711*4882a593Smuzhiyun show_fan(struct device *dev, struct device_attribute *attr, char *buf)
712*4882a593Smuzhiyun {
713*4882a593Smuzhiyun struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
714*4882a593Smuzhiyun struct nct6683_data *data = nct6683_update_device(dev);
715*4882a593Smuzhiyun
716*4882a593Smuzhiyun return sprintf(buf, "%d\n", data->rpm[sattr->index]);
717*4882a593Smuzhiyun }
718*4882a593Smuzhiyun
719*4882a593Smuzhiyun static ssize_t
show_fan_min(struct device * dev,struct device_attribute * attr,char * buf)720*4882a593Smuzhiyun show_fan_min(struct device *dev, struct device_attribute *attr, char *buf)
721*4882a593Smuzhiyun {
722*4882a593Smuzhiyun struct nct6683_data *data = nct6683_update_device(dev);
723*4882a593Smuzhiyun struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
724*4882a593Smuzhiyun int nr = sattr->index;
725*4882a593Smuzhiyun
726*4882a593Smuzhiyun return sprintf(buf, "%d\n", data->fan_min[nr]);
727*4882a593Smuzhiyun }
728*4882a593Smuzhiyun
729*4882a593Smuzhiyun static ssize_t
show_fan_pulses(struct device * dev,struct device_attribute * attr,char * buf)730*4882a593Smuzhiyun show_fan_pulses(struct device *dev, struct device_attribute *attr, char *buf)
731*4882a593Smuzhiyun {
732*4882a593Smuzhiyun struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
733*4882a593Smuzhiyun struct nct6683_data *data = nct6683_update_device(dev);
734*4882a593Smuzhiyun
735*4882a593Smuzhiyun return sprintf(buf, "%d\n",
736*4882a593Smuzhiyun ((data->fanin_cfg[sattr->index] >> 5) & 0x03) + 1);
737*4882a593Smuzhiyun }
738*4882a593Smuzhiyun
nct6683_fan_is_visible(struct kobject * kobj,struct attribute * attr,int index)739*4882a593Smuzhiyun static umode_t nct6683_fan_is_visible(struct kobject *kobj,
740*4882a593Smuzhiyun struct attribute *attr, int index)
741*4882a593Smuzhiyun {
742*4882a593Smuzhiyun struct device *dev = kobj_to_dev(kobj);
743*4882a593Smuzhiyun struct nct6683_data *data = dev_get_drvdata(dev);
744*4882a593Smuzhiyun int fan = index / 3; /* fan index */
745*4882a593Smuzhiyun int nr = index % 3; /* attribute index */
746*4882a593Smuzhiyun
747*4882a593Smuzhiyun if (!(data->have_fan & (1 << fan)))
748*4882a593Smuzhiyun return 0;
749*4882a593Smuzhiyun
750*4882a593Smuzhiyun /*
751*4882a593Smuzhiyun * Intel may have minimum fan speed limits,
752*4882a593Smuzhiyun * but register location and encoding are unknown.
753*4882a593Smuzhiyun */
754*4882a593Smuzhiyun if (nr == 2 && data->customer_id == NCT6683_CUSTOMER_ID_INTEL)
755*4882a593Smuzhiyun return 0;
756*4882a593Smuzhiyun
757*4882a593Smuzhiyun return attr->mode;
758*4882a593Smuzhiyun }
759*4882a593Smuzhiyun
760*4882a593Smuzhiyun SENSOR_TEMPLATE(fan_input, "fan%d_input", S_IRUGO, show_fan, NULL, 0);
761*4882a593Smuzhiyun SENSOR_TEMPLATE(fan_pulses, "fan%d_pulses", S_IRUGO, show_fan_pulses, NULL, 0);
762*4882a593Smuzhiyun SENSOR_TEMPLATE(fan_min, "fan%d_min", S_IRUGO, show_fan_min, NULL, 0);
763*4882a593Smuzhiyun
764*4882a593Smuzhiyun /*
765*4882a593Smuzhiyun * nct6683_fan_is_visible uses the index into the following array
766*4882a593Smuzhiyun * to determine if attributes should be created or not.
767*4882a593Smuzhiyun * Any change in order or content must be matched.
768*4882a593Smuzhiyun */
769*4882a593Smuzhiyun static struct sensor_device_template *nct6683_attributes_fan_template[] = {
770*4882a593Smuzhiyun &sensor_dev_template_fan_input,
771*4882a593Smuzhiyun &sensor_dev_template_fan_pulses,
772*4882a593Smuzhiyun &sensor_dev_template_fan_min,
773*4882a593Smuzhiyun NULL
774*4882a593Smuzhiyun };
775*4882a593Smuzhiyun
776*4882a593Smuzhiyun static const struct sensor_template_group nct6683_fan_template_group = {
777*4882a593Smuzhiyun .templates = nct6683_attributes_fan_template,
778*4882a593Smuzhiyun .is_visible = nct6683_fan_is_visible,
779*4882a593Smuzhiyun .base = 1,
780*4882a593Smuzhiyun };
781*4882a593Smuzhiyun
782*4882a593Smuzhiyun static ssize_t
show_temp_label(struct device * dev,struct device_attribute * attr,char * buf)783*4882a593Smuzhiyun show_temp_label(struct device *dev, struct device_attribute *attr, char *buf)
784*4882a593Smuzhiyun {
785*4882a593Smuzhiyun struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
786*4882a593Smuzhiyun struct nct6683_data *data = nct6683_update_device(dev);
787*4882a593Smuzhiyun int nr = sattr->index;
788*4882a593Smuzhiyun
789*4882a593Smuzhiyun return sprintf(buf, "%s\n", nct6683_mon_label[data->temp_src[nr]]);
790*4882a593Smuzhiyun }
791*4882a593Smuzhiyun
792*4882a593Smuzhiyun static ssize_t
show_temp8(struct device * dev,struct device_attribute * attr,char * buf)793*4882a593Smuzhiyun show_temp8(struct device *dev, struct device_attribute *attr, char *buf)
794*4882a593Smuzhiyun {
795*4882a593Smuzhiyun struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
796*4882a593Smuzhiyun struct nct6683_data *data = nct6683_update_device(dev);
797*4882a593Smuzhiyun int index = sattr->index;
798*4882a593Smuzhiyun int nr = sattr->nr;
799*4882a593Smuzhiyun
800*4882a593Smuzhiyun return sprintf(buf, "%d\n", data->temp[index][nr] * 1000);
801*4882a593Smuzhiyun }
802*4882a593Smuzhiyun
803*4882a593Smuzhiyun static ssize_t
show_temp_hyst(struct device * dev,struct device_attribute * attr,char * buf)804*4882a593Smuzhiyun show_temp_hyst(struct device *dev, struct device_attribute *attr, char *buf)
805*4882a593Smuzhiyun {
806*4882a593Smuzhiyun struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
807*4882a593Smuzhiyun struct nct6683_data *data = nct6683_update_device(dev);
808*4882a593Smuzhiyun int nr = sattr->index;
809*4882a593Smuzhiyun int temp = data->temp[1][nr] - data->temp[2][nr];
810*4882a593Smuzhiyun
811*4882a593Smuzhiyun return sprintf(buf, "%d\n", temp * 1000);
812*4882a593Smuzhiyun }
813*4882a593Smuzhiyun
814*4882a593Smuzhiyun static ssize_t
show_temp16(struct device * dev,struct device_attribute * attr,char * buf)815*4882a593Smuzhiyun show_temp16(struct device *dev, struct device_attribute *attr, char *buf)
816*4882a593Smuzhiyun {
817*4882a593Smuzhiyun struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
818*4882a593Smuzhiyun struct nct6683_data *data = nct6683_update_device(dev);
819*4882a593Smuzhiyun int index = sattr->index;
820*4882a593Smuzhiyun
821*4882a593Smuzhiyun return sprintf(buf, "%d\n", (data->temp_in[index] / 128) * 500);
822*4882a593Smuzhiyun }
823*4882a593Smuzhiyun
824*4882a593Smuzhiyun /*
825*4882a593Smuzhiyun * Temperature sensor type is determined by temperature source
826*4882a593Smuzhiyun * and can not be modified.
827*4882a593Smuzhiyun * 0x02..0x07: Thermal diode
828*4882a593Smuzhiyun * 0x08..0x18: Thermistor
829*4882a593Smuzhiyun * 0x20..0x2b: Intel PECI
830*4882a593Smuzhiyun * 0x42..0x49: AMD TSI
831*4882a593Smuzhiyun * Others are unspecified (not visible)
832*4882a593Smuzhiyun */
833*4882a593Smuzhiyun
get_temp_type(u8 src)834*4882a593Smuzhiyun static int get_temp_type(u8 src)
835*4882a593Smuzhiyun {
836*4882a593Smuzhiyun if (src >= 0x02 && src <= 0x07)
837*4882a593Smuzhiyun return 3; /* thermal diode */
838*4882a593Smuzhiyun else if (src >= 0x08 && src <= 0x18)
839*4882a593Smuzhiyun return 4; /* thermistor */
840*4882a593Smuzhiyun else if (src >= 0x20 && src <= 0x2b)
841*4882a593Smuzhiyun return 6; /* PECI */
842*4882a593Smuzhiyun else if (src >= 0x42 && src <= 0x49)
843*4882a593Smuzhiyun return 5;
844*4882a593Smuzhiyun
845*4882a593Smuzhiyun return 0;
846*4882a593Smuzhiyun }
847*4882a593Smuzhiyun
848*4882a593Smuzhiyun static ssize_t
show_temp_type(struct device * dev,struct device_attribute * attr,char * buf)849*4882a593Smuzhiyun show_temp_type(struct device *dev, struct device_attribute *attr, char *buf)
850*4882a593Smuzhiyun {
851*4882a593Smuzhiyun struct nct6683_data *data = nct6683_update_device(dev);
852*4882a593Smuzhiyun struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
853*4882a593Smuzhiyun int nr = sattr->index;
854*4882a593Smuzhiyun return sprintf(buf, "%d\n", get_temp_type(data->temp_src[nr]));
855*4882a593Smuzhiyun }
856*4882a593Smuzhiyun
nct6683_temp_is_visible(struct kobject * kobj,struct attribute * attr,int index)857*4882a593Smuzhiyun static umode_t nct6683_temp_is_visible(struct kobject *kobj,
858*4882a593Smuzhiyun struct attribute *attr, int index)
859*4882a593Smuzhiyun {
860*4882a593Smuzhiyun struct device *dev = kobj_to_dev(kobj);
861*4882a593Smuzhiyun struct nct6683_data *data = dev_get_drvdata(dev);
862*4882a593Smuzhiyun int temp = index / 7; /* temp index */
863*4882a593Smuzhiyun int nr = index % 7; /* attribute index */
864*4882a593Smuzhiyun
865*4882a593Smuzhiyun /*
866*4882a593Smuzhiyun * Intel does not have low temperature limits or temperature hysteresis
867*4882a593Smuzhiyun * registers, or at least register location and encoding is unknown.
868*4882a593Smuzhiyun */
869*4882a593Smuzhiyun if ((nr == 2 || nr == 4) &&
870*4882a593Smuzhiyun data->customer_id == NCT6683_CUSTOMER_ID_INTEL)
871*4882a593Smuzhiyun return 0;
872*4882a593Smuzhiyun
873*4882a593Smuzhiyun if (nr == 6 && get_temp_type(data->temp_src[temp]) == 0)
874*4882a593Smuzhiyun return 0; /* type */
875*4882a593Smuzhiyun
876*4882a593Smuzhiyun return attr->mode;
877*4882a593Smuzhiyun }
878*4882a593Smuzhiyun
879*4882a593Smuzhiyun SENSOR_TEMPLATE(temp_input, "temp%d_input", S_IRUGO, show_temp16, NULL, 0);
880*4882a593Smuzhiyun SENSOR_TEMPLATE(temp_label, "temp%d_label", S_IRUGO, show_temp_label, NULL, 0);
881*4882a593Smuzhiyun SENSOR_TEMPLATE_2(temp_min, "temp%d_min", S_IRUGO, show_temp8, NULL, 0, 0);
882*4882a593Smuzhiyun SENSOR_TEMPLATE_2(temp_max, "temp%d_max", S_IRUGO, show_temp8, NULL, 0, 1);
883*4882a593Smuzhiyun SENSOR_TEMPLATE(temp_max_hyst, "temp%d_max_hyst", S_IRUGO, show_temp_hyst, NULL,
884*4882a593Smuzhiyun 0);
885*4882a593Smuzhiyun SENSOR_TEMPLATE_2(temp_crit, "temp%d_crit", S_IRUGO, show_temp8, NULL, 0, 3);
886*4882a593Smuzhiyun SENSOR_TEMPLATE(temp_type, "temp%d_type", S_IRUGO, show_temp_type, NULL, 0);
887*4882a593Smuzhiyun
888*4882a593Smuzhiyun /*
889*4882a593Smuzhiyun * nct6683_temp_is_visible uses the index into the following array
890*4882a593Smuzhiyun * to determine if attributes should be created or not.
891*4882a593Smuzhiyun * Any change in order or content must be matched.
892*4882a593Smuzhiyun */
893*4882a593Smuzhiyun static struct sensor_device_template *nct6683_attributes_temp_template[] = {
894*4882a593Smuzhiyun &sensor_dev_template_temp_input,
895*4882a593Smuzhiyun &sensor_dev_template_temp_label,
896*4882a593Smuzhiyun &sensor_dev_template_temp_min, /* 2 */
897*4882a593Smuzhiyun &sensor_dev_template_temp_max, /* 3 */
898*4882a593Smuzhiyun &sensor_dev_template_temp_max_hyst, /* 4 */
899*4882a593Smuzhiyun &sensor_dev_template_temp_crit, /* 5 */
900*4882a593Smuzhiyun &sensor_dev_template_temp_type, /* 6 */
901*4882a593Smuzhiyun NULL
902*4882a593Smuzhiyun };
903*4882a593Smuzhiyun
904*4882a593Smuzhiyun static const struct sensor_template_group nct6683_temp_template_group = {
905*4882a593Smuzhiyun .templates = nct6683_attributes_temp_template,
906*4882a593Smuzhiyun .is_visible = nct6683_temp_is_visible,
907*4882a593Smuzhiyun .base = 1,
908*4882a593Smuzhiyun };
909*4882a593Smuzhiyun
910*4882a593Smuzhiyun static ssize_t
show_pwm(struct device * dev,struct device_attribute * attr,char * buf)911*4882a593Smuzhiyun show_pwm(struct device *dev, struct device_attribute *attr, char *buf)
912*4882a593Smuzhiyun {
913*4882a593Smuzhiyun struct nct6683_data *data = nct6683_update_device(dev);
914*4882a593Smuzhiyun struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
915*4882a593Smuzhiyun int index = sattr->index;
916*4882a593Smuzhiyun
917*4882a593Smuzhiyun return sprintf(buf, "%d\n", data->pwm[index]);
918*4882a593Smuzhiyun }
919*4882a593Smuzhiyun
920*4882a593Smuzhiyun static ssize_t
store_pwm(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)921*4882a593Smuzhiyun store_pwm(struct device *dev, struct device_attribute *attr, const char *buf,
922*4882a593Smuzhiyun size_t count)
923*4882a593Smuzhiyun {
924*4882a593Smuzhiyun struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
925*4882a593Smuzhiyun struct nct6683_data *data = dev_get_drvdata(dev);
926*4882a593Smuzhiyun int index = sattr->index;
927*4882a593Smuzhiyun unsigned long val;
928*4882a593Smuzhiyun
929*4882a593Smuzhiyun if (kstrtoul(buf, 10, &val) || val > 255)
930*4882a593Smuzhiyun return -EINVAL;
931*4882a593Smuzhiyun
932*4882a593Smuzhiyun mutex_lock(&data->update_lock);
933*4882a593Smuzhiyun nct6683_write(data, NCT6683_REG_FAN_CFG_CTRL, NCT6683_FAN_CFG_REQ);
934*4882a593Smuzhiyun usleep_range(1000, 2000);
935*4882a593Smuzhiyun nct6683_write(data, NCT6683_REG_PWM_WRITE(index), val);
936*4882a593Smuzhiyun nct6683_write(data, NCT6683_REG_FAN_CFG_CTRL, NCT6683_FAN_CFG_DONE);
937*4882a593Smuzhiyun mutex_unlock(&data->update_lock);
938*4882a593Smuzhiyun
939*4882a593Smuzhiyun return count;
940*4882a593Smuzhiyun }
941*4882a593Smuzhiyun
942*4882a593Smuzhiyun SENSOR_TEMPLATE(pwm, "pwm%d", S_IRUGO, show_pwm, store_pwm, 0);
943*4882a593Smuzhiyun
nct6683_pwm_is_visible(struct kobject * kobj,struct attribute * attr,int index)944*4882a593Smuzhiyun static umode_t nct6683_pwm_is_visible(struct kobject *kobj,
945*4882a593Smuzhiyun struct attribute *attr, int index)
946*4882a593Smuzhiyun {
947*4882a593Smuzhiyun struct device *dev = kobj_to_dev(kobj);
948*4882a593Smuzhiyun struct nct6683_data *data = dev_get_drvdata(dev);
949*4882a593Smuzhiyun int pwm = index; /* pwm index */
950*4882a593Smuzhiyun
951*4882a593Smuzhiyun if (!(data->have_pwm & (1 << pwm)))
952*4882a593Smuzhiyun return 0;
953*4882a593Smuzhiyun
954*4882a593Smuzhiyun /* Only update pwm values for Mitac boards */
955*4882a593Smuzhiyun if (data->customer_id == NCT6683_CUSTOMER_ID_MITAC)
956*4882a593Smuzhiyun return attr->mode | S_IWUSR;
957*4882a593Smuzhiyun
958*4882a593Smuzhiyun return attr->mode;
959*4882a593Smuzhiyun }
960*4882a593Smuzhiyun
961*4882a593Smuzhiyun static struct sensor_device_template *nct6683_attributes_pwm_template[] = {
962*4882a593Smuzhiyun &sensor_dev_template_pwm,
963*4882a593Smuzhiyun NULL
964*4882a593Smuzhiyun };
965*4882a593Smuzhiyun
966*4882a593Smuzhiyun static const struct sensor_template_group nct6683_pwm_template_group = {
967*4882a593Smuzhiyun .templates = nct6683_attributes_pwm_template,
968*4882a593Smuzhiyun .is_visible = nct6683_pwm_is_visible,
969*4882a593Smuzhiyun .base = 1,
970*4882a593Smuzhiyun };
971*4882a593Smuzhiyun
972*4882a593Smuzhiyun static ssize_t
beep_enable_show(struct device * dev,struct device_attribute * attr,char * buf)973*4882a593Smuzhiyun beep_enable_show(struct device *dev, struct device_attribute *attr, char *buf)
974*4882a593Smuzhiyun {
975*4882a593Smuzhiyun struct nct6683_data *data = dev_get_drvdata(dev);
976*4882a593Smuzhiyun int ret;
977*4882a593Smuzhiyun u8 reg;
978*4882a593Smuzhiyun
979*4882a593Smuzhiyun mutex_lock(&data->update_lock);
980*4882a593Smuzhiyun
981*4882a593Smuzhiyun ret = superio_enter(data->sioreg);
982*4882a593Smuzhiyun if (ret)
983*4882a593Smuzhiyun goto error;
984*4882a593Smuzhiyun superio_select(data->sioreg, NCT6683_LD_HWM);
985*4882a593Smuzhiyun reg = superio_inb(data->sioreg, NCT6683_REG_CR_BEEP);
986*4882a593Smuzhiyun superio_exit(data->sioreg);
987*4882a593Smuzhiyun
988*4882a593Smuzhiyun mutex_unlock(&data->update_lock);
989*4882a593Smuzhiyun
990*4882a593Smuzhiyun return sprintf(buf, "%u\n", !!(reg & NCT6683_CR_BEEP_MASK));
991*4882a593Smuzhiyun
992*4882a593Smuzhiyun error:
993*4882a593Smuzhiyun mutex_unlock(&data->update_lock);
994*4882a593Smuzhiyun return ret;
995*4882a593Smuzhiyun }
996*4882a593Smuzhiyun
997*4882a593Smuzhiyun static ssize_t
beep_enable_store(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)998*4882a593Smuzhiyun beep_enable_store(struct device *dev, struct device_attribute *attr,
999*4882a593Smuzhiyun const char *buf, size_t count)
1000*4882a593Smuzhiyun {
1001*4882a593Smuzhiyun struct nct6683_data *data = dev_get_drvdata(dev);
1002*4882a593Smuzhiyun unsigned long val;
1003*4882a593Smuzhiyun u8 reg;
1004*4882a593Smuzhiyun int ret;
1005*4882a593Smuzhiyun
1006*4882a593Smuzhiyun if (kstrtoul(buf, 10, &val) || (val != 0 && val != 1))
1007*4882a593Smuzhiyun return -EINVAL;
1008*4882a593Smuzhiyun
1009*4882a593Smuzhiyun mutex_lock(&data->update_lock);
1010*4882a593Smuzhiyun
1011*4882a593Smuzhiyun ret = superio_enter(data->sioreg);
1012*4882a593Smuzhiyun if (ret) {
1013*4882a593Smuzhiyun count = ret;
1014*4882a593Smuzhiyun goto error;
1015*4882a593Smuzhiyun }
1016*4882a593Smuzhiyun
1017*4882a593Smuzhiyun superio_select(data->sioreg, NCT6683_LD_HWM);
1018*4882a593Smuzhiyun reg = superio_inb(data->sioreg, NCT6683_REG_CR_BEEP);
1019*4882a593Smuzhiyun if (val)
1020*4882a593Smuzhiyun reg |= NCT6683_CR_BEEP_MASK;
1021*4882a593Smuzhiyun else
1022*4882a593Smuzhiyun reg &= ~NCT6683_CR_BEEP_MASK;
1023*4882a593Smuzhiyun superio_outb(data->sioreg, NCT6683_REG_CR_BEEP, reg);
1024*4882a593Smuzhiyun superio_exit(data->sioreg);
1025*4882a593Smuzhiyun error:
1026*4882a593Smuzhiyun mutex_unlock(&data->update_lock);
1027*4882a593Smuzhiyun return count;
1028*4882a593Smuzhiyun }
1029*4882a593Smuzhiyun
1030*4882a593Smuzhiyun /* Case open detection */
1031*4882a593Smuzhiyun
1032*4882a593Smuzhiyun static ssize_t
intrusion0_alarm_show(struct device * dev,struct device_attribute * attr,char * buf)1033*4882a593Smuzhiyun intrusion0_alarm_show(struct device *dev, struct device_attribute *attr,
1034*4882a593Smuzhiyun char *buf)
1035*4882a593Smuzhiyun {
1036*4882a593Smuzhiyun struct nct6683_data *data = dev_get_drvdata(dev);
1037*4882a593Smuzhiyun int ret;
1038*4882a593Smuzhiyun u8 reg;
1039*4882a593Smuzhiyun
1040*4882a593Smuzhiyun mutex_lock(&data->update_lock);
1041*4882a593Smuzhiyun
1042*4882a593Smuzhiyun ret = superio_enter(data->sioreg);
1043*4882a593Smuzhiyun if (ret)
1044*4882a593Smuzhiyun goto error;
1045*4882a593Smuzhiyun superio_select(data->sioreg, NCT6683_LD_ACPI);
1046*4882a593Smuzhiyun reg = superio_inb(data->sioreg, NCT6683_REG_CR_CASEOPEN);
1047*4882a593Smuzhiyun superio_exit(data->sioreg);
1048*4882a593Smuzhiyun
1049*4882a593Smuzhiyun mutex_unlock(&data->update_lock);
1050*4882a593Smuzhiyun
1051*4882a593Smuzhiyun return sprintf(buf, "%u\n", !(reg & NCT6683_CR_CASEOPEN_MASK));
1052*4882a593Smuzhiyun
1053*4882a593Smuzhiyun error:
1054*4882a593Smuzhiyun mutex_unlock(&data->update_lock);
1055*4882a593Smuzhiyun return ret;
1056*4882a593Smuzhiyun }
1057*4882a593Smuzhiyun
1058*4882a593Smuzhiyun static ssize_t
intrusion0_alarm_store(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)1059*4882a593Smuzhiyun intrusion0_alarm_store(struct device *dev, struct device_attribute *attr,
1060*4882a593Smuzhiyun const char *buf, size_t count)
1061*4882a593Smuzhiyun {
1062*4882a593Smuzhiyun struct nct6683_data *data = dev_get_drvdata(dev);
1063*4882a593Smuzhiyun unsigned long val;
1064*4882a593Smuzhiyun u8 reg;
1065*4882a593Smuzhiyun int ret;
1066*4882a593Smuzhiyun
1067*4882a593Smuzhiyun if (kstrtoul(buf, 10, &val) || val != 0)
1068*4882a593Smuzhiyun return -EINVAL;
1069*4882a593Smuzhiyun
1070*4882a593Smuzhiyun mutex_lock(&data->update_lock);
1071*4882a593Smuzhiyun
1072*4882a593Smuzhiyun /*
1073*4882a593Smuzhiyun * Use CR registers to clear caseopen status.
1074*4882a593Smuzhiyun * Caseopen is activ low, clear by writing 1 into the register.
1075*4882a593Smuzhiyun */
1076*4882a593Smuzhiyun
1077*4882a593Smuzhiyun ret = superio_enter(data->sioreg);
1078*4882a593Smuzhiyun if (ret) {
1079*4882a593Smuzhiyun count = ret;
1080*4882a593Smuzhiyun goto error;
1081*4882a593Smuzhiyun }
1082*4882a593Smuzhiyun
1083*4882a593Smuzhiyun superio_select(data->sioreg, NCT6683_LD_ACPI);
1084*4882a593Smuzhiyun reg = superio_inb(data->sioreg, NCT6683_REG_CR_CASEOPEN);
1085*4882a593Smuzhiyun reg |= NCT6683_CR_CASEOPEN_MASK;
1086*4882a593Smuzhiyun superio_outb(data->sioreg, NCT6683_REG_CR_CASEOPEN, reg);
1087*4882a593Smuzhiyun reg &= ~NCT6683_CR_CASEOPEN_MASK;
1088*4882a593Smuzhiyun superio_outb(data->sioreg, NCT6683_REG_CR_CASEOPEN, reg);
1089*4882a593Smuzhiyun superio_exit(data->sioreg);
1090*4882a593Smuzhiyun
1091*4882a593Smuzhiyun data->valid = false; /* Force cache refresh */
1092*4882a593Smuzhiyun error:
1093*4882a593Smuzhiyun mutex_unlock(&data->update_lock);
1094*4882a593Smuzhiyun return count;
1095*4882a593Smuzhiyun }
1096*4882a593Smuzhiyun
1097*4882a593Smuzhiyun static DEVICE_ATTR_RW(intrusion0_alarm);
1098*4882a593Smuzhiyun static DEVICE_ATTR_RW(beep_enable);
1099*4882a593Smuzhiyun
1100*4882a593Smuzhiyun static struct attribute *nct6683_attributes_other[] = {
1101*4882a593Smuzhiyun &dev_attr_intrusion0_alarm.attr,
1102*4882a593Smuzhiyun &dev_attr_beep_enable.attr,
1103*4882a593Smuzhiyun NULL
1104*4882a593Smuzhiyun };
1105*4882a593Smuzhiyun
1106*4882a593Smuzhiyun static const struct attribute_group nct6683_group_other = {
1107*4882a593Smuzhiyun .attrs = nct6683_attributes_other,
1108*4882a593Smuzhiyun };
1109*4882a593Smuzhiyun
1110*4882a593Smuzhiyun /* Get the monitoring functions started */
nct6683_init_device(struct nct6683_data * data)1111*4882a593Smuzhiyun static inline void nct6683_init_device(struct nct6683_data *data)
1112*4882a593Smuzhiyun {
1113*4882a593Smuzhiyun u8 tmp;
1114*4882a593Smuzhiyun
1115*4882a593Smuzhiyun /* Start hardware monitoring if needed */
1116*4882a593Smuzhiyun tmp = nct6683_read(data, NCT6683_HWM_CFG);
1117*4882a593Smuzhiyun if (!(tmp & 0x80))
1118*4882a593Smuzhiyun nct6683_write(data, NCT6683_HWM_CFG, tmp | 0x80);
1119*4882a593Smuzhiyun }
1120*4882a593Smuzhiyun
1121*4882a593Smuzhiyun /*
1122*4882a593Smuzhiyun * There are a total of 24 fan inputs. Each can be configured as input
1123*4882a593Smuzhiyun * or as output. A maximum of 16 inputs and 8 outputs is configurable.
1124*4882a593Smuzhiyun */
1125*4882a593Smuzhiyun static void
nct6683_setup_fans(struct nct6683_data * data)1126*4882a593Smuzhiyun nct6683_setup_fans(struct nct6683_data *data)
1127*4882a593Smuzhiyun {
1128*4882a593Smuzhiyun int i;
1129*4882a593Smuzhiyun u8 reg;
1130*4882a593Smuzhiyun
1131*4882a593Smuzhiyun for (i = 0; i < NCT6683_NUM_REG_FAN; i++) {
1132*4882a593Smuzhiyun reg = nct6683_read(data, NCT6683_REG_FANIN_CFG(i));
1133*4882a593Smuzhiyun if (reg & 0x80)
1134*4882a593Smuzhiyun data->have_fan |= 1 << i;
1135*4882a593Smuzhiyun data->fanin_cfg[i] = reg;
1136*4882a593Smuzhiyun }
1137*4882a593Smuzhiyun for (i = 0; i < NCT6683_NUM_REG_PWM; i++) {
1138*4882a593Smuzhiyun reg = nct6683_read(data, NCT6683_REG_FANOUT_CFG(i));
1139*4882a593Smuzhiyun if (reg & 0x80)
1140*4882a593Smuzhiyun data->have_pwm |= 1 << i;
1141*4882a593Smuzhiyun data->fanout_cfg[i] = reg;
1142*4882a593Smuzhiyun }
1143*4882a593Smuzhiyun }
1144*4882a593Smuzhiyun
1145*4882a593Smuzhiyun /*
1146*4882a593Smuzhiyun * Translation from monitoring register to temperature and voltage attributes
1147*4882a593Smuzhiyun * ==========================================================================
1148*4882a593Smuzhiyun *
1149*4882a593Smuzhiyun * There are a total of 32 monitoring registers. Each can be assigned to either
1150*4882a593Smuzhiyun * a temperature or voltage monitoring source.
1151*4882a593Smuzhiyun * NCT6683_REG_MON_CFG(x) defines assignment for each monitoring source.
1152*4882a593Smuzhiyun *
1153*4882a593Smuzhiyun * Temperature and voltage attribute mapping is determined by walking through
1154*4882a593Smuzhiyun * the NCT6683_REG_MON_CFG registers. If the assigned source is
1155*4882a593Smuzhiyun * a temperature, temp_index[n] is set to the monitor register index, and
1156*4882a593Smuzhiyun * temp_src[n] is set to the temperature source. If the assigned source is
1157*4882a593Smuzhiyun * a voltage, the respective values are stored in in_index[] and in_src[],
1158*4882a593Smuzhiyun * respectively.
1159*4882a593Smuzhiyun */
1160*4882a593Smuzhiyun
nct6683_setup_sensors(struct nct6683_data * data)1161*4882a593Smuzhiyun static void nct6683_setup_sensors(struct nct6683_data *data)
1162*4882a593Smuzhiyun {
1163*4882a593Smuzhiyun u8 reg;
1164*4882a593Smuzhiyun int i;
1165*4882a593Smuzhiyun
1166*4882a593Smuzhiyun data->temp_num = 0;
1167*4882a593Smuzhiyun data->in_num = 0;
1168*4882a593Smuzhiyun for (i = 0; i < NCT6683_NUM_REG_MON; i++) {
1169*4882a593Smuzhiyun reg = nct6683_read(data, NCT6683_REG_MON_CFG(i)) & 0x7f;
1170*4882a593Smuzhiyun /* Ignore invalid assignments */
1171*4882a593Smuzhiyun if (reg >= NUM_MON_LABELS)
1172*4882a593Smuzhiyun continue;
1173*4882a593Smuzhiyun /* Skip if disabled or reserved */
1174*4882a593Smuzhiyun if (nct6683_mon_label[reg] == NULL)
1175*4882a593Smuzhiyun continue;
1176*4882a593Smuzhiyun if (reg < MON_VOLTAGE_START) {
1177*4882a593Smuzhiyun data->temp_index[data->temp_num] = i;
1178*4882a593Smuzhiyun data->temp_src[data->temp_num] = reg;
1179*4882a593Smuzhiyun data->temp_num++;
1180*4882a593Smuzhiyun } else {
1181*4882a593Smuzhiyun data->in_index[data->in_num] = i;
1182*4882a593Smuzhiyun data->in_src[data->in_num] = reg;
1183*4882a593Smuzhiyun data->in_num++;
1184*4882a593Smuzhiyun }
1185*4882a593Smuzhiyun }
1186*4882a593Smuzhiyun }
1187*4882a593Smuzhiyun
nct6683_probe(struct platform_device * pdev)1188*4882a593Smuzhiyun static int nct6683_probe(struct platform_device *pdev)
1189*4882a593Smuzhiyun {
1190*4882a593Smuzhiyun struct device *dev = &pdev->dev;
1191*4882a593Smuzhiyun struct nct6683_sio_data *sio_data = dev->platform_data;
1192*4882a593Smuzhiyun struct attribute_group *group;
1193*4882a593Smuzhiyun struct nct6683_data *data;
1194*4882a593Smuzhiyun struct device *hwmon_dev;
1195*4882a593Smuzhiyun struct resource *res;
1196*4882a593Smuzhiyun int groups = 0;
1197*4882a593Smuzhiyun char build[16];
1198*4882a593Smuzhiyun
1199*4882a593Smuzhiyun res = platform_get_resource(pdev, IORESOURCE_IO, 0);
1200*4882a593Smuzhiyun if (!devm_request_region(dev, res->start, IOREGION_LENGTH, DRVNAME))
1201*4882a593Smuzhiyun return -EBUSY;
1202*4882a593Smuzhiyun
1203*4882a593Smuzhiyun data = devm_kzalloc(dev, sizeof(struct nct6683_data), GFP_KERNEL);
1204*4882a593Smuzhiyun if (!data)
1205*4882a593Smuzhiyun return -ENOMEM;
1206*4882a593Smuzhiyun
1207*4882a593Smuzhiyun data->kind = sio_data->kind;
1208*4882a593Smuzhiyun data->sioreg = sio_data->sioreg;
1209*4882a593Smuzhiyun data->addr = res->start;
1210*4882a593Smuzhiyun mutex_init(&data->update_lock);
1211*4882a593Smuzhiyun platform_set_drvdata(pdev, data);
1212*4882a593Smuzhiyun
1213*4882a593Smuzhiyun data->customer_id = nct6683_read16(data, NCT6683_REG_CUSTOMER_ID);
1214*4882a593Smuzhiyun
1215*4882a593Smuzhiyun /* By default only instantiate driver if the customer ID is known */
1216*4882a593Smuzhiyun switch (data->customer_id) {
1217*4882a593Smuzhiyun case NCT6683_CUSTOMER_ID_INTEL:
1218*4882a593Smuzhiyun break;
1219*4882a593Smuzhiyun case NCT6683_CUSTOMER_ID_MITAC:
1220*4882a593Smuzhiyun break;
1221*4882a593Smuzhiyun default:
1222*4882a593Smuzhiyun if (!force)
1223*4882a593Smuzhiyun return -ENODEV;
1224*4882a593Smuzhiyun }
1225*4882a593Smuzhiyun
1226*4882a593Smuzhiyun nct6683_init_device(data);
1227*4882a593Smuzhiyun nct6683_setup_fans(data);
1228*4882a593Smuzhiyun nct6683_setup_sensors(data);
1229*4882a593Smuzhiyun
1230*4882a593Smuzhiyun /* Register sysfs hooks */
1231*4882a593Smuzhiyun
1232*4882a593Smuzhiyun if (data->have_pwm) {
1233*4882a593Smuzhiyun group = nct6683_create_attr_group(dev,
1234*4882a593Smuzhiyun &nct6683_pwm_template_group,
1235*4882a593Smuzhiyun fls(data->have_pwm));
1236*4882a593Smuzhiyun if (IS_ERR(group))
1237*4882a593Smuzhiyun return PTR_ERR(group);
1238*4882a593Smuzhiyun data->groups[groups++] = group;
1239*4882a593Smuzhiyun }
1240*4882a593Smuzhiyun
1241*4882a593Smuzhiyun if (data->in_num) {
1242*4882a593Smuzhiyun group = nct6683_create_attr_group(dev,
1243*4882a593Smuzhiyun &nct6683_in_template_group,
1244*4882a593Smuzhiyun data->in_num);
1245*4882a593Smuzhiyun if (IS_ERR(group))
1246*4882a593Smuzhiyun return PTR_ERR(group);
1247*4882a593Smuzhiyun data->groups[groups++] = group;
1248*4882a593Smuzhiyun }
1249*4882a593Smuzhiyun
1250*4882a593Smuzhiyun if (data->have_fan) {
1251*4882a593Smuzhiyun group = nct6683_create_attr_group(dev,
1252*4882a593Smuzhiyun &nct6683_fan_template_group,
1253*4882a593Smuzhiyun fls(data->have_fan));
1254*4882a593Smuzhiyun if (IS_ERR(group))
1255*4882a593Smuzhiyun return PTR_ERR(group);
1256*4882a593Smuzhiyun data->groups[groups++] = group;
1257*4882a593Smuzhiyun }
1258*4882a593Smuzhiyun
1259*4882a593Smuzhiyun if (data->temp_num) {
1260*4882a593Smuzhiyun group = nct6683_create_attr_group(dev,
1261*4882a593Smuzhiyun &nct6683_temp_template_group,
1262*4882a593Smuzhiyun data->temp_num);
1263*4882a593Smuzhiyun if (IS_ERR(group))
1264*4882a593Smuzhiyun return PTR_ERR(group);
1265*4882a593Smuzhiyun data->groups[groups++] = group;
1266*4882a593Smuzhiyun }
1267*4882a593Smuzhiyun data->groups[groups++] = &nct6683_group_other;
1268*4882a593Smuzhiyun
1269*4882a593Smuzhiyun if (data->customer_id == NCT6683_CUSTOMER_ID_INTEL)
1270*4882a593Smuzhiyun scnprintf(build, sizeof(build), "%02x/%02x/%02x",
1271*4882a593Smuzhiyun nct6683_read(data, NCT6683_REG_BUILD_MONTH),
1272*4882a593Smuzhiyun nct6683_read(data, NCT6683_REG_BUILD_DAY),
1273*4882a593Smuzhiyun nct6683_read(data, NCT6683_REG_BUILD_YEAR));
1274*4882a593Smuzhiyun else
1275*4882a593Smuzhiyun scnprintf(build, sizeof(build), "%02d/%02d/%02d",
1276*4882a593Smuzhiyun nct6683_read(data, NCT6683_REG_BUILD_MONTH),
1277*4882a593Smuzhiyun nct6683_read(data, NCT6683_REG_BUILD_DAY),
1278*4882a593Smuzhiyun nct6683_read(data, NCT6683_REG_BUILD_YEAR));
1279*4882a593Smuzhiyun
1280*4882a593Smuzhiyun dev_info(dev, "%s EC firmware version %d.%d build %s\n",
1281*4882a593Smuzhiyun nct6683_chip_names[data->kind],
1282*4882a593Smuzhiyun nct6683_read(data, NCT6683_REG_VERSION_HI),
1283*4882a593Smuzhiyun nct6683_read(data, NCT6683_REG_VERSION_LO),
1284*4882a593Smuzhiyun build);
1285*4882a593Smuzhiyun
1286*4882a593Smuzhiyun hwmon_dev = devm_hwmon_device_register_with_groups(dev,
1287*4882a593Smuzhiyun nct6683_device_names[data->kind], data, data->groups);
1288*4882a593Smuzhiyun return PTR_ERR_OR_ZERO(hwmon_dev);
1289*4882a593Smuzhiyun }
1290*4882a593Smuzhiyun
1291*4882a593Smuzhiyun #ifdef CONFIG_PM
nct6683_suspend(struct device * dev)1292*4882a593Smuzhiyun static int nct6683_suspend(struct device *dev)
1293*4882a593Smuzhiyun {
1294*4882a593Smuzhiyun struct nct6683_data *data = nct6683_update_device(dev);
1295*4882a593Smuzhiyun
1296*4882a593Smuzhiyun mutex_lock(&data->update_lock);
1297*4882a593Smuzhiyun data->hwm_cfg = nct6683_read(data, NCT6683_HWM_CFG);
1298*4882a593Smuzhiyun mutex_unlock(&data->update_lock);
1299*4882a593Smuzhiyun
1300*4882a593Smuzhiyun return 0;
1301*4882a593Smuzhiyun }
1302*4882a593Smuzhiyun
nct6683_resume(struct device * dev)1303*4882a593Smuzhiyun static int nct6683_resume(struct device *dev)
1304*4882a593Smuzhiyun {
1305*4882a593Smuzhiyun struct nct6683_data *data = dev_get_drvdata(dev);
1306*4882a593Smuzhiyun
1307*4882a593Smuzhiyun mutex_lock(&data->update_lock);
1308*4882a593Smuzhiyun
1309*4882a593Smuzhiyun nct6683_write(data, NCT6683_HWM_CFG, data->hwm_cfg);
1310*4882a593Smuzhiyun
1311*4882a593Smuzhiyun /* Force re-reading all values */
1312*4882a593Smuzhiyun data->valid = false;
1313*4882a593Smuzhiyun mutex_unlock(&data->update_lock);
1314*4882a593Smuzhiyun
1315*4882a593Smuzhiyun return 0;
1316*4882a593Smuzhiyun }
1317*4882a593Smuzhiyun
1318*4882a593Smuzhiyun static const struct dev_pm_ops nct6683_dev_pm_ops = {
1319*4882a593Smuzhiyun .suspend = nct6683_suspend,
1320*4882a593Smuzhiyun .resume = nct6683_resume,
1321*4882a593Smuzhiyun .freeze = nct6683_suspend,
1322*4882a593Smuzhiyun .restore = nct6683_resume,
1323*4882a593Smuzhiyun };
1324*4882a593Smuzhiyun
1325*4882a593Smuzhiyun #define NCT6683_DEV_PM_OPS (&nct6683_dev_pm_ops)
1326*4882a593Smuzhiyun #else
1327*4882a593Smuzhiyun #define NCT6683_DEV_PM_OPS NULL
1328*4882a593Smuzhiyun #endif /* CONFIG_PM */
1329*4882a593Smuzhiyun
1330*4882a593Smuzhiyun static struct platform_driver nct6683_driver = {
1331*4882a593Smuzhiyun .driver = {
1332*4882a593Smuzhiyun .name = DRVNAME,
1333*4882a593Smuzhiyun .pm = NCT6683_DEV_PM_OPS,
1334*4882a593Smuzhiyun },
1335*4882a593Smuzhiyun .probe = nct6683_probe,
1336*4882a593Smuzhiyun };
1337*4882a593Smuzhiyun
nct6683_find(int sioaddr,struct nct6683_sio_data * sio_data)1338*4882a593Smuzhiyun static int __init nct6683_find(int sioaddr, struct nct6683_sio_data *sio_data)
1339*4882a593Smuzhiyun {
1340*4882a593Smuzhiyun int addr;
1341*4882a593Smuzhiyun u16 val;
1342*4882a593Smuzhiyun int err;
1343*4882a593Smuzhiyun
1344*4882a593Smuzhiyun err = superio_enter(sioaddr);
1345*4882a593Smuzhiyun if (err)
1346*4882a593Smuzhiyun return err;
1347*4882a593Smuzhiyun
1348*4882a593Smuzhiyun val = (superio_inb(sioaddr, SIO_REG_DEVID) << 8)
1349*4882a593Smuzhiyun | superio_inb(sioaddr, SIO_REG_DEVID + 1);
1350*4882a593Smuzhiyun
1351*4882a593Smuzhiyun switch (val & SIO_ID_MASK) {
1352*4882a593Smuzhiyun case SIO_NCT6683_ID:
1353*4882a593Smuzhiyun sio_data->kind = nct6683;
1354*4882a593Smuzhiyun break;
1355*4882a593Smuzhiyun default:
1356*4882a593Smuzhiyun if (val != 0xffff)
1357*4882a593Smuzhiyun pr_debug("unsupported chip ID: 0x%04x\n", val);
1358*4882a593Smuzhiyun goto fail;
1359*4882a593Smuzhiyun }
1360*4882a593Smuzhiyun
1361*4882a593Smuzhiyun /* We have a known chip, find the HWM I/O address */
1362*4882a593Smuzhiyun superio_select(sioaddr, NCT6683_LD_HWM);
1363*4882a593Smuzhiyun val = (superio_inb(sioaddr, SIO_REG_ADDR) << 8)
1364*4882a593Smuzhiyun | superio_inb(sioaddr, SIO_REG_ADDR + 1);
1365*4882a593Smuzhiyun addr = val & IOREGION_ALIGNMENT;
1366*4882a593Smuzhiyun if (addr == 0) {
1367*4882a593Smuzhiyun pr_err("EC base I/O port unconfigured\n");
1368*4882a593Smuzhiyun goto fail;
1369*4882a593Smuzhiyun }
1370*4882a593Smuzhiyun
1371*4882a593Smuzhiyun /* Activate logical device if needed */
1372*4882a593Smuzhiyun val = superio_inb(sioaddr, SIO_REG_ENABLE);
1373*4882a593Smuzhiyun if (!(val & 0x01)) {
1374*4882a593Smuzhiyun pr_warn("Forcibly enabling EC access. Data may be unusable.\n");
1375*4882a593Smuzhiyun superio_outb(sioaddr, SIO_REG_ENABLE, val | 0x01);
1376*4882a593Smuzhiyun }
1377*4882a593Smuzhiyun
1378*4882a593Smuzhiyun superio_exit(sioaddr);
1379*4882a593Smuzhiyun pr_info("Found %s or compatible chip at %#x:%#x\n",
1380*4882a593Smuzhiyun nct6683_chip_names[sio_data->kind], sioaddr, addr);
1381*4882a593Smuzhiyun sio_data->sioreg = sioaddr;
1382*4882a593Smuzhiyun
1383*4882a593Smuzhiyun return addr;
1384*4882a593Smuzhiyun
1385*4882a593Smuzhiyun fail:
1386*4882a593Smuzhiyun superio_exit(sioaddr);
1387*4882a593Smuzhiyun return -ENODEV;
1388*4882a593Smuzhiyun }
1389*4882a593Smuzhiyun
1390*4882a593Smuzhiyun /*
1391*4882a593Smuzhiyun * when Super-I/O functions move to a separate file, the Super-I/O
1392*4882a593Smuzhiyun * bus will manage the lifetime of the device and this module will only keep
1393*4882a593Smuzhiyun * track of the nct6683 driver. But since we use platform_device_alloc(), we
1394*4882a593Smuzhiyun * must keep track of the device
1395*4882a593Smuzhiyun */
1396*4882a593Smuzhiyun static struct platform_device *pdev[2];
1397*4882a593Smuzhiyun
sensors_nct6683_init(void)1398*4882a593Smuzhiyun static int __init sensors_nct6683_init(void)
1399*4882a593Smuzhiyun {
1400*4882a593Smuzhiyun struct nct6683_sio_data sio_data;
1401*4882a593Smuzhiyun int sioaddr[2] = { 0x2e, 0x4e };
1402*4882a593Smuzhiyun struct resource res;
1403*4882a593Smuzhiyun bool found = false;
1404*4882a593Smuzhiyun int address;
1405*4882a593Smuzhiyun int i, err;
1406*4882a593Smuzhiyun
1407*4882a593Smuzhiyun err = platform_driver_register(&nct6683_driver);
1408*4882a593Smuzhiyun if (err)
1409*4882a593Smuzhiyun return err;
1410*4882a593Smuzhiyun
1411*4882a593Smuzhiyun /*
1412*4882a593Smuzhiyun * initialize sio_data->kind and sio_data->sioreg.
1413*4882a593Smuzhiyun *
1414*4882a593Smuzhiyun * when Super-I/O functions move to a separate file, the Super-I/O
1415*4882a593Smuzhiyun * driver will probe 0x2e and 0x4e and auto-detect the presence of a
1416*4882a593Smuzhiyun * nct6683 hardware monitor, and call probe()
1417*4882a593Smuzhiyun */
1418*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(pdev); i++) {
1419*4882a593Smuzhiyun address = nct6683_find(sioaddr[i], &sio_data);
1420*4882a593Smuzhiyun if (address <= 0)
1421*4882a593Smuzhiyun continue;
1422*4882a593Smuzhiyun
1423*4882a593Smuzhiyun found = true;
1424*4882a593Smuzhiyun
1425*4882a593Smuzhiyun pdev[i] = platform_device_alloc(DRVNAME, address);
1426*4882a593Smuzhiyun if (!pdev[i]) {
1427*4882a593Smuzhiyun err = -ENOMEM;
1428*4882a593Smuzhiyun goto exit_device_unregister;
1429*4882a593Smuzhiyun }
1430*4882a593Smuzhiyun
1431*4882a593Smuzhiyun err = platform_device_add_data(pdev[i], &sio_data,
1432*4882a593Smuzhiyun sizeof(struct nct6683_sio_data));
1433*4882a593Smuzhiyun if (err)
1434*4882a593Smuzhiyun goto exit_device_put;
1435*4882a593Smuzhiyun
1436*4882a593Smuzhiyun memset(&res, 0, sizeof(res));
1437*4882a593Smuzhiyun res.name = DRVNAME;
1438*4882a593Smuzhiyun res.start = address + IOREGION_OFFSET;
1439*4882a593Smuzhiyun res.end = address + IOREGION_OFFSET + IOREGION_LENGTH - 1;
1440*4882a593Smuzhiyun res.flags = IORESOURCE_IO;
1441*4882a593Smuzhiyun
1442*4882a593Smuzhiyun err = acpi_check_resource_conflict(&res);
1443*4882a593Smuzhiyun if (err) {
1444*4882a593Smuzhiyun platform_device_put(pdev[i]);
1445*4882a593Smuzhiyun pdev[i] = NULL;
1446*4882a593Smuzhiyun continue;
1447*4882a593Smuzhiyun }
1448*4882a593Smuzhiyun
1449*4882a593Smuzhiyun err = platform_device_add_resources(pdev[i], &res, 1);
1450*4882a593Smuzhiyun if (err)
1451*4882a593Smuzhiyun goto exit_device_put;
1452*4882a593Smuzhiyun
1453*4882a593Smuzhiyun /* platform_device_add calls probe() */
1454*4882a593Smuzhiyun err = platform_device_add(pdev[i]);
1455*4882a593Smuzhiyun if (err)
1456*4882a593Smuzhiyun goto exit_device_put;
1457*4882a593Smuzhiyun }
1458*4882a593Smuzhiyun if (!found) {
1459*4882a593Smuzhiyun err = -ENODEV;
1460*4882a593Smuzhiyun goto exit_unregister;
1461*4882a593Smuzhiyun }
1462*4882a593Smuzhiyun
1463*4882a593Smuzhiyun return 0;
1464*4882a593Smuzhiyun
1465*4882a593Smuzhiyun exit_device_put:
1466*4882a593Smuzhiyun platform_device_put(pdev[i]);
1467*4882a593Smuzhiyun exit_device_unregister:
1468*4882a593Smuzhiyun while (--i >= 0) {
1469*4882a593Smuzhiyun if (pdev[i])
1470*4882a593Smuzhiyun platform_device_unregister(pdev[i]);
1471*4882a593Smuzhiyun }
1472*4882a593Smuzhiyun exit_unregister:
1473*4882a593Smuzhiyun platform_driver_unregister(&nct6683_driver);
1474*4882a593Smuzhiyun return err;
1475*4882a593Smuzhiyun }
1476*4882a593Smuzhiyun
sensors_nct6683_exit(void)1477*4882a593Smuzhiyun static void __exit sensors_nct6683_exit(void)
1478*4882a593Smuzhiyun {
1479*4882a593Smuzhiyun int i;
1480*4882a593Smuzhiyun
1481*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(pdev); i++) {
1482*4882a593Smuzhiyun if (pdev[i])
1483*4882a593Smuzhiyun platform_device_unregister(pdev[i]);
1484*4882a593Smuzhiyun }
1485*4882a593Smuzhiyun platform_driver_unregister(&nct6683_driver);
1486*4882a593Smuzhiyun }
1487*4882a593Smuzhiyun
1488*4882a593Smuzhiyun MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>");
1489*4882a593Smuzhiyun MODULE_DESCRIPTION("NCT6683D driver");
1490*4882a593Smuzhiyun MODULE_LICENSE("GPL");
1491*4882a593Smuzhiyun
1492*4882a593Smuzhiyun module_init(sensors_nct6683_init);
1493*4882a593Smuzhiyun module_exit(sensors_nct6683_exit);
1494