xref: /OK3568_Linux_fs/kernel/drivers/hwmon/ltc4222.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Driver for Linear Technology LTC4222 Dual Hot Swap controller
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (c) 2014 Guenter Roeck
6*4882a593Smuzhiyun  */
7*4882a593Smuzhiyun 
8*4882a593Smuzhiyun #include <linux/kernel.h>
9*4882a593Smuzhiyun #include <linux/module.h>
10*4882a593Smuzhiyun #include <linux/err.h>
11*4882a593Smuzhiyun #include <linux/slab.h>
12*4882a593Smuzhiyun #include <linux/bitops.h>
13*4882a593Smuzhiyun #include <linux/i2c.h>
14*4882a593Smuzhiyun #include <linux/hwmon.h>
15*4882a593Smuzhiyun #include <linux/hwmon-sysfs.h>
16*4882a593Smuzhiyun #include <linux/jiffies.h>
17*4882a593Smuzhiyun #include <linux/regmap.h>
18*4882a593Smuzhiyun 
19*4882a593Smuzhiyun /* chip registers */
20*4882a593Smuzhiyun 
21*4882a593Smuzhiyun #define LTC4222_CONTROL1	0xd0
22*4882a593Smuzhiyun #define LTC4222_ALERT1		0xd1
23*4882a593Smuzhiyun #define LTC4222_STATUS1		0xd2
24*4882a593Smuzhiyun #define LTC4222_FAULT1		0xd3
25*4882a593Smuzhiyun #define LTC4222_CONTROL2	0xd4
26*4882a593Smuzhiyun #define LTC4222_ALERT2		0xd5
27*4882a593Smuzhiyun #define LTC4222_STATUS2		0xd6
28*4882a593Smuzhiyun #define LTC4222_FAULT2		0xd7
29*4882a593Smuzhiyun #define LTC4222_SOURCE1		0xd8
30*4882a593Smuzhiyun #define LTC4222_SOURCE2		0xda
31*4882a593Smuzhiyun #define LTC4222_ADIN1		0xdc
32*4882a593Smuzhiyun #define LTC4222_ADIN2		0xde
33*4882a593Smuzhiyun #define LTC4222_SENSE1		0xe0
34*4882a593Smuzhiyun #define LTC4222_SENSE2		0xe2
35*4882a593Smuzhiyun #define LTC4222_ADC_CONTROL	0xe4
36*4882a593Smuzhiyun 
37*4882a593Smuzhiyun /*
38*4882a593Smuzhiyun  * Fault register bits
39*4882a593Smuzhiyun  */
40*4882a593Smuzhiyun #define FAULT_OV	BIT(0)
41*4882a593Smuzhiyun #define FAULT_UV	BIT(1)
42*4882a593Smuzhiyun #define FAULT_OC	BIT(2)
43*4882a593Smuzhiyun #define FAULT_POWER_BAD	BIT(3)
44*4882a593Smuzhiyun #define FAULT_FET_BAD	BIT(5)
45*4882a593Smuzhiyun 
46*4882a593Smuzhiyun /* Return the voltage from the given register in mV or mA */
ltc4222_get_value(struct device * dev,u8 reg)47*4882a593Smuzhiyun static int ltc4222_get_value(struct device *dev, u8 reg)
48*4882a593Smuzhiyun {
49*4882a593Smuzhiyun 	struct regmap *regmap = dev_get_drvdata(dev);
50*4882a593Smuzhiyun 	unsigned int val;
51*4882a593Smuzhiyun 	u8 buf[2];
52*4882a593Smuzhiyun 	int ret;
53*4882a593Smuzhiyun 
54*4882a593Smuzhiyun 	ret = regmap_bulk_read(regmap, reg, buf, 2);
55*4882a593Smuzhiyun 	if (ret < 0)
56*4882a593Smuzhiyun 		return ret;
57*4882a593Smuzhiyun 
58*4882a593Smuzhiyun 	val = ((buf[0] << 8) + buf[1]) >> 6;
59*4882a593Smuzhiyun 
60*4882a593Smuzhiyun 	switch (reg) {
61*4882a593Smuzhiyun 	case LTC4222_ADIN1:
62*4882a593Smuzhiyun 	case LTC4222_ADIN2:
63*4882a593Smuzhiyun 		/* 1.25 mV resolution. Convert to mV. */
64*4882a593Smuzhiyun 		val = DIV_ROUND_CLOSEST(val * 5, 4);
65*4882a593Smuzhiyun 		break;
66*4882a593Smuzhiyun 	case LTC4222_SOURCE1:
67*4882a593Smuzhiyun 	case LTC4222_SOURCE2:
68*4882a593Smuzhiyun 		/* 31.25 mV resolution. Convert to mV. */
69*4882a593Smuzhiyun 		val = DIV_ROUND_CLOSEST(val * 125, 4);
70*4882a593Smuzhiyun 		break;
71*4882a593Smuzhiyun 	case LTC4222_SENSE1:
72*4882a593Smuzhiyun 	case LTC4222_SENSE2:
73*4882a593Smuzhiyun 		/*
74*4882a593Smuzhiyun 		 * 62.5 uV resolution. Convert to current as measured with
75*4882a593Smuzhiyun 		 * an 1 mOhm sense resistor, in mA. If a different sense
76*4882a593Smuzhiyun 		 * resistor is installed, calculate the actual current by
77*4882a593Smuzhiyun 		 * dividing the reported current by the sense resistor value
78*4882a593Smuzhiyun 		 * in mOhm.
79*4882a593Smuzhiyun 		 */
80*4882a593Smuzhiyun 		val = DIV_ROUND_CLOSEST(val * 125, 2);
81*4882a593Smuzhiyun 		break;
82*4882a593Smuzhiyun 	default:
83*4882a593Smuzhiyun 		return -EINVAL;
84*4882a593Smuzhiyun 	}
85*4882a593Smuzhiyun 	return val;
86*4882a593Smuzhiyun }
87*4882a593Smuzhiyun 
ltc4222_value_show(struct device * dev,struct device_attribute * da,char * buf)88*4882a593Smuzhiyun static ssize_t ltc4222_value_show(struct device *dev,
89*4882a593Smuzhiyun 				  struct device_attribute *da, char *buf)
90*4882a593Smuzhiyun {
91*4882a593Smuzhiyun 	struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
92*4882a593Smuzhiyun 	int value;
93*4882a593Smuzhiyun 
94*4882a593Smuzhiyun 	value = ltc4222_get_value(dev, attr->index);
95*4882a593Smuzhiyun 	if (value < 0)
96*4882a593Smuzhiyun 		return value;
97*4882a593Smuzhiyun 	return snprintf(buf, PAGE_SIZE, "%d\n", value);
98*4882a593Smuzhiyun }
99*4882a593Smuzhiyun 
ltc4222_bool_show(struct device * dev,struct device_attribute * da,char * buf)100*4882a593Smuzhiyun static ssize_t ltc4222_bool_show(struct device *dev,
101*4882a593Smuzhiyun 				 struct device_attribute *da, char *buf)
102*4882a593Smuzhiyun {
103*4882a593Smuzhiyun 	struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(da);
104*4882a593Smuzhiyun 	struct regmap *regmap = dev_get_drvdata(dev);
105*4882a593Smuzhiyun 	unsigned int fault;
106*4882a593Smuzhiyun 	int ret;
107*4882a593Smuzhiyun 
108*4882a593Smuzhiyun 	ret = regmap_read(regmap, attr->nr, &fault);
109*4882a593Smuzhiyun 	if (ret < 0)
110*4882a593Smuzhiyun 		return ret;
111*4882a593Smuzhiyun 	fault &= attr->index;
112*4882a593Smuzhiyun 	if (fault)		/* Clear reported faults in chip register */
113*4882a593Smuzhiyun 		regmap_update_bits(regmap, attr->nr, attr->index, 0);
114*4882a593Smuzhiyun 
115*4882a593Smuzhiyun 	return snprintf(buf, PAGE_SIZE, "%d\n", !!fault);
116*4882a593Smuzhiyun }
117*4882a593Smuzhiyun 
118*4882a593Smuzhiyun /* Voltages */
119*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RO(in1_input, ltc4222_value, LTC4222_SOURCE1);
120*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RO(in2_input, ltc4222_value, LTC4222_ADIN1);
121*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RO(in3_input, ltc4222_value, LTC4222_SOURCE2);
122*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RO(in4_input, ltc4222_value, LTC4222_ADIN2);
123*4882a593Smuzhiyun 
124*4882a593Smuzhiyun /*
125*4882a593Smuzhiyun  * Voltage alarms
126*4882a593Smuzhiyun  * UV/OV faults are associated with the input voltage, and power bad and fet
127*4882a593Smuzhiyun  * faults are associated with the output voltage.
128*4882a593Smuzhiyun  */
129*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_2_RO(in1_min_alarm, ltc4222_bool, LTC4222_FAULT1,
130*4882a593Smuzhiyun 			       FAULT_UV);
131*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_2_RO(in1_max_alarm, ltc4222_bool, LTC4222_FAULT1,
132*4882a593Smuzhiyun 			       FAULT_OV);
133*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_2_RO(in2_alarm, ltc4222_bool, LTC4222_FAULT1,
134*4882a593Smuzhiyun 			       FAULT_POWER_BAD | FAULT_FET_BAD);
135*4882a593Smuzhiyun 
136*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_2_RO(in3_min_alarm, ltc4222_bool, LTC4222_FAULT2,
137*4882a593Smuzhiyun 			       FAULT_UV);
138*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_2_RO(in3_max_alarm, ltc4222_bool, LTC4222_FAULT2,
139*4882a593Smuzhiyun 			       FAULT_OV);
140*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_2_RO(in4_alarm, ltc4222_bool, LTC4222_FAULT2,
141*4882a593Smuzhiyun 			       FAULT_POWER_BAD | FAULT_FET_BAD);
142*4882a593Smuzhiyun 
143*4882a593Smuzhiyun /* Current (via sense resistor) */
144*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RO(curr1_input, ltc4222_value, LTC4222_SENSE1);
145*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_RO(curr2_input, ltc4222_value, LTC4222_SENSE2);
146*4882a593Smuzhiyun 
147*4882a593Smuzhiyun /* Overcurrent alarm */
148*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_2_RO(curr1_max_alarm, ltc4222_bool, LTC4222_FAULT1,
149*4882a593Smuzhiyun 			       FAULT_OC);
150*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_2_RO(curr2_max_alarm, ltc4222_bool, LTC4222_FAULT2,
151*4882a593Smuzhiyun 			       FAULT_OC);
152*4882a593Smuzhiyun 
153*4882a593Smuzhiyun static struct attribute *ltc4222_attrs[] = {
154*4882a593Smuzhiyun 	&sensor_dev_attr_in1_input.dev_attr.attr,
155*4882a593Smuzhiyun 	&sensor_dev_attr_in1_min_alarm.dev_attr.attr,
156*4882a593Smuzhiyun 	&sensor_dev_attr_in1_max_alarm.dev_attr.attr,
157*4882a593Smuzhiyun 	&sensor_dev_attr_in2_input.dev_attr.attr,
158*4882a593Smuzhiyun 	&sensor_dev_attr_in2_alarm.dev_attr.attr,
159*4882a593Smuzhiyun 	&sensor_dev_attr_in3_input.dev_attr.attr,
160*4882a593Smuzhiyun 	&sensor_dev_attr_in3_min_alarm.dev_attr.attr,
161*4882a593Smuzhiyun 	&sensor_dev_attr_in3_max_alarm.dev_attr.attr,
162*4882a593Smuzhiyun 	&sensor_dev_attr_in4_input.dev_attr.attr,
163*4882a593Smuzhiyun 	&sensor_dev_attr_in4_alarm.dev_attr.attr,
164*4882a593Smuzhiyun 
165*4882a593Smuzhiyun 	&sensor_dev_attr_curr1_input.dev_attr.attr,
166*4882a593Smuzhiyun 	&sensor_dev_attr_curr1_max_alarm.dev_attr.attr,
167*4882a593Smuzhiyun 	&sensor_dev_attr_curr2_input.dev_attr.attr,
168*4882a593Smuzhiyun 	&sensor_dev_attr_curr2_max_alarm.dev_attr.attr,
169*4882a593Smuzhiyun 
170*4882a593Smuzhiyun 	NULL,
171*4882a593Smuzhiyun };
172*4882a593Smuzhiyun ATTRIBUTE_GROUPS(ltc4222);
173*4882a593Smuzhiyun 
174*4882a593Smuzhiyun static const struct regmap_config ltc4222_regmap_config = {
175*4882a593Smuzhiyun 	.reg_bits = 8,
176*4882a593Smuzhiyun 	.val_bits = 8,
177*4882a593Smuzhiyun 	.max_register = LTC4222_ADC_CONTROL,
178*4882a593Smuzhiyun };
179*4882a593Smuzhiyun 
ltc4222_probe(struct i2c_client * client)180*4882a593Smuzhiyun static int ltc4222_probe(struct i2c_client *client)
181*4882a593Smuzhiyun {
182*4882a593Smuzhiyun 	struct device *dev = &client->dev;
183*4882a593Smuzhiyun 	struct device *hwmon_dev;
184*4882a593Smuzhiyun 	struct regmap *regmap;
185*4882a593Smuzhiyun 
186*4882a593Smuzhiyun 	regmap = devm_regmap_init_i2c(client, &ltc4222_regmap_config);
187*4882a593Smuzhiyun 	if (IS_ERR(regmap)) {
188*4882a593Smuzhiyun 		dev_err(dev, "failed to allocate register map\n");
189*4882a593Smuzhiyun 		return PTR_ERR(regmap);
190*4882a593Smuzhiyun 	}
191*4882a593Smuzhiyun 
192*4882a593Smuzhiyun 	/* Clear faults */
193*4882a593Smuzhiyun 	regmap_write(regmap, LTC4222_FAULT1, 0x00);
194*4882a593Smuzhiyun 	regmap_write(regmap, LTC4222_FAULT2, 0x00);
195*4882a593Smuzhiyun 
196*4882a593Smuzhiyun 	hwmon_dev = devm_hwmon_device_register_with_groups(dev, client->name,
197*4882a593Smuzhiyun 							   regmap,
198*4882a593Smuzhiyun 							   ltc4222_groups);
199*4882a593Smuzhiyun 	return PTR_ERR_OR_ZERO(hwmon_dev);
200*4882a593Smuzhiyun }
201*4882a593Smuzhiyun 
202*4882a593Smuzhiyun static const struct i2c_device_id ltc4222_id[] = {
203*4882a593Smuzhiyun 	{"ltc4222", 0},
204*4882a593Smuzhiyun 	{ }
205*4882a593Smuzhiyun };
206*4882a593Smuzhiyun 
207*4882a593Smuzhiyun MODULE_DEVICE_TABLE(i2c, ltc4222_id);
208*4882a593Smuzhiyun 
209*4882a593Smuzhiyun static struct i2c_driver ltc4222_driver = {
210*4882a593Smuzhiyun 	.driver = {
211*4882a593Smuzhiyun 		   .name = "ltc4222",
212*4882a593Smuzhiyun 		   },
213*4882a593Smuzhiyun 	.probe_new = ltc4222_probe,
214*4882a593Smuzhiyun 	.id_table = ltc4222_id,
215*4882a593Smuzhiyun };
216*4882a593Smuzhiyun 
217*4882a593Smuzhiyun module_i2c_driver(ltc4222_driver);
218*4882a593Smuzhiyun 
219*4882a593Smuzhiyun MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>");
220*4882a593Smuzhiyun MODULE_DESCRIPTION("LTC4222 driver");
221*4882a593Smuzhiyun MODULE_LICENSE("GPL");
222