1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /***************************************************************************
3*4882a593Smuzhiyun * Copyright (C) 2006 by Hans Edgington <hans@edgington.nl> *
4*4882a593Smuzhiyun * Copyright (C) 2007-2011 Hans de Goede <hdegoede@redhat.com> *
5*4882a593Smuzhiyun * *
6*4882a593Smuzhiyun ***************************************************************************/
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun #include <linux/module.h>
11*4882a593Smuzhiyun #include <linux/init.h>
12*4882a593Smuzhiyun #include <linux/slab.h>
13*4882a593Smuzhiyun #include <linux/jiffies.h>
14*4882a593Smuzhiyun #include <linux/platform_device.h>
15*4882a593Smuzhiyun #include <linux/hwmon.h>
16*4882a593Smuzhiyun #include <linux/hwmon-sysfs.h>
17*4882a593Smuzhiyun #include <linux/err.h>
18*4882a593Smuzhiyun #include <linux/mutex.h>
19*4882a593Smuzhiyun #include <linux/io.h>
20*4882a593Smuzhiyun #include <linux/acpi.h>
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun #define DRVNAME "f71882fg"
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun #define SIO_F71858FG_LD_HWM 0x02 /* Hardware monitor logical device */
25*4882a593Smuzhiyun #define SIO_F71882FG_LD_HWM 0x04 /* Hardware monitor logical device */
26*4882a593Smuzhiyun #define SIO_UNLOCK_KEY 0x87 /* Key to enable Super-I/O */
27*4882a593Smuzhiyun #define SIO_LOCK_KEY 0xAA /* Key to disable Super-I/O */
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun #define SIO_REG_LDSEL 0x07 /* Logical device select */
30*4882a593Smuzhiyun #define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
31*4882a593Smuzhiyun #define SIO_REG_DEVREV 0x22 /* Device revision */
32*4882a593Smuzhiyun #define SIO_REG_MANID 0x23 /* Fintek ID (2 bytes) */
33*4882a593Smuzhiyun #define SIO_REG_ENABLE 0x30 /* Logical device enable */
34*4882a593Smuzhiyun #define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun #define SIO_FINTEK_ID 0x1934 /* Manufacturers ID */
37*4882a593Smuzhiyun #define SIO_F71808E_ID 0x0901 /* Chipset ID */
38*4882a593Smuzhiyun #define SIO_F71808A_ID 0x1001 /* Chipset ID */
39*4882a593Smuzhiyun #define SIO_F71858_ID 0x0507 /* Chipset ID */
40*4882a593Smuzhiyun #define SIO_F71862_ID 0x0601 /* Chipset ID */
41*4882a593Smuzhiyun #define SIO_F71868_ID 0x1106 /* Chipset ID */
42*4882a593Smuzhiyun #define SIO_F71869_ID 0x0814 /* Chipset ID */
43*4882a593Smuzhiyun #define SIO_F71869A_ID 0x1007 /* Chipset ID */
44*4882a593Smuzhiyun #define SIO_F71882_ID 0x0541 /* Chipset ID */
45*4882a593Smuzhiyun #define SIO_F71889_ID 0x0723 /* Chipset ID */
46*4882a593Smuzhiyun #define SIO_F71889E_ID 0x0909 /* Chipset ID */
47*4882a593Smuzhiyun #define SIO_F71889A_ID 0x1005 /* Chipset ID */
48*4882a593Smuzhiyun #define SIO_F8000_ID 0x0581 /* Chipset ID */
49*4882a593Smuzhiyun #define SIO_F81768D_ID 0x1210 /* Chipset ID */
50*4882a593Smuzhiyun #define SIO_F81865_ID 0x0704 /* Chipset ID */
51*4882a593Smuzhiyun #define SIO_F81866_ID 0x1010 /* Chipset ID */
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun #define REGION_LENGTH 8
54*4882a593Smuzhiyun #define ADDR_REG_OFFSET 5
55*4882a593Smuzhiyun #define DATA_REG_OFFSET 6
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun #define F71882FG_REG_IN_STATUS 0x12 /* f7188x only */
58*4882a593Smuzhiyun #define F71882FG_REG_IN_BEEP 0x13 /* f7188x only */
59*4882a593Smuzhiyun #define F71882FG_REG_IN(nr) (0x20 + (nr))
60*4882a593Smuzhiyun #define F71882FG_REG_IN1_HIGH 0x32 /* f7188x only */
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun #define F81866_REG_IN_STATUS 0x16 /* F81866 only */
63*4882a593Smuzhiyun #define F81866_REG_IN_BEEP 0x17 /* F81866 only */
64*4882a593Smuzhiyun #define F81866_REG_IN1_HIGH 0x3a /* F81866 only */
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun #define F71882FG_REG_FAN(nr) (0xA0 + (16 * (nr)))
67*4882a593Smuzhiyun #define F71882FG_REG_FAN_TARGET(nr) (0xA2 + (16 * (nr)))
68*4882a593Smuzhiyun #define F71882FG_REG_FAN_FULL_SPEED(nr) (0xA4 + (16 * (nr)))
69*4882a593Smuzhiyun #define F71882FG_REG_FAN_STATUS 0x92
70*4882a593Smuzhiyun #define F71882FG_REG_FAN_BEEP 0x93
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun #define F71882FG_REG_TEMP(nr) (0x70 + 2 * (nr))
73*4882a593Smuzhiyun #define F71882FG_REG_TEMP_OVT(nr) (0x80 + 2 * (nr))
74*4882a593Smuzhiyun #define F71882FG_REG_TEMP_HIGH(nr) (0x81 + 2 * (nr))
75*4882a593Smuzhiyun #define F71882FG_REG_TEMP_STATUS 0x62
76*4882a593Smuzhiyun #define F71882FG_REG_TEMP_BEEP 0x63
77*4882a593Smuzhiyun #define F71882FG_REG_TEMP_CONFIG 0x69
78*4882a593Smuzhiyun #define F71882FG_REG_TEMP_HYST(nr) (0x6C + (nr))
79*4882a593Smuzhiyun #define F71882FG_REG_TEMP_TYPE 0x6B
80*4882a593Smuzhiyun #define F71882FG_REG_TEMP_DIODE_OPEN 0x6F
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun #define F71882FG_REG_PWM(nr) (0xA3 + (16 * (nr)))
83*4882a593Smuzhiyun #define F71882FG_REG_PWM_TYPE 0x94
84*4882a593Smuzhiyun #define F71882FG_REG_PWM_ENABLE 0x96
85*4882a593Smuzhiyun
86*4882a593Smuzhiyun #define F71882FG_REG_FAN_HYST(nr) (0x98 + (nr))
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun #define F71882FG_REG_FAN_FAULT_T 0x9F
89*4882a593Smuzhiyun #define F71882FG_FAN_NEG_TEMP_EN 0x20
90*4882a593Smuzhiyun #define F71882FG_FAN_PROG_SEL 0x80
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun #define F71882FG_REG_POINT_PWM(pwm, point) (0xAA + (point) + (16 * (pwm)))
93*4882a593Smuzhiyun #define F71882FG_REG_POINT_TEMP(pwm, point) (0xA6 + (point) + (16 * (pwm)))
94*4882a593Smuzhiyun #define F71882FG_REG_POINT_MAPPING(nr) (0xAF + 16 * (nr))
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun #define F71882FG_REG_START 0x01
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun #define F71882FG_MAX_INS 11
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun #define FAN_MIN_DETECT 366 /* Lowest detectable fanspeed */
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun static unsigned short force_id;
103*4882a593Smuzhiyun module_param(force_id, ushort, 0);
104*4882a593Smuzhiyun MODULE_PARM_DESC(force_id, "Override the detected device ID");
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun enum chips { f71808e, f71808a, f71858fg, f71862fg, f71868a, f71869, f71869a,
107*4882a593Smuzhiyun f71882fg, f71889fg, f71889ed, f71889a, f8000, f81768d, f81865f,
108*4882a593Smuzhiyun f81866a};
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun static const char *const f71882fg_names[] = {
111*4882a593Smuzhiyun "f71808e",
112*4882a593Smuzhiyun "f71808a",
113*4882a593Smuzhiyun "f71858fg",
114*4882a593Smuzhiyun "f71862fg",
115*4882a593Smuzhiyun "f71868a",
116*4882a593Smuzhiyun "f71869", /* Both f71869f and f71869e, reg. compatible and same id */
117*4882a593Smuzhiyun "f71869a",
118*4882a593Smuzhiyun "f71882fg",
119*4882a593Smuzhiyun "f71889fg", /* f81801u too, same id */
120*4882a593Smuzhiyun "f71889ed",
121*4882a593Smuzhiyun "f71889a",
122*4882a593Smuzhiyun "f8000",
123*4882a593Smuzhiyun "f81768d",
124*4882a593Smuzhiyun "f81865f",
125*4882a593Smuzhiyun "f81866a",
126*4882a593Smuzhiyun };
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun static const char f71882fg_has_in[][F71882FG_MAX_INS] = {
129*4882a593Smuzhiyun [f71808e] = { 1, 1, 1, 1, 1, 1, 0, 1, 1, 0, 0 },
130*4882a593Smuzhiyun [f71808a] = { 1, 1, 1, 1, 0, 0, 0, 1, 1, 0, 0 },
131*4882a593Smuzhiyun [f71858fg] = { 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 },
132*4882a593Smuzhiyun [f71862fg] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0 },
133*4882a593Smuzhiyun [f71868a] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0 },
134*4882a593Smuzhiyun [f71869] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0 },
135*4882a593Smuzhiyun [f71869a] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0 },
136*4882a593Smuzhiyun [f71882fg] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0 },
137*4882a593Smuzhiyun [f71889fg] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0 },
138*4882a593Smuzhiyun [f71889ed] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0 },
139*4882a593Smuzhiyun [f71889a] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0 },
140*4882a593Smuzhiyun [f8000] = { 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 },
141*4882a593Smuzhiyun [f81768d] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 },
142*4882a593Smuzhiyun [f81865f] = { 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0 },
143*4882a593Smuzhiyun [f81866a] = { 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0 },
144*4882a593Smuzhiyun };
145*4882a593Smuzhiyun
146*4882a593Smuzhiyun static const char f71882fg_has_in1_alarm[] = {
147*4882a593Smuzhiyun [f71808e] = 0,
148*4882a593Smuzhiyun [f71808a] = 0,
149*4882a593Smuzhiyun [f71858fg] = 0,
150*4882a593Smuzhiyun [f71862fg] = 0,
151*4882a593Smuzhiyun [f71868a] = 0,
152*4882a593Smuzhiyun [f71869] = 0,
153*4882a593Smuzhiyun [f71869a] = 0,
154*4882a593Smuzhiyun [f71882fg] = 1,
155*4882a593Smuzhiyun [f71889fg] = 1,
156*4882a593Smuzhiyun [f71889ed] = 1,
157*4882a593Smuzhiyun [f71889a] = 1,
158*4882a593Smuzhiyun [f8000] = 0,
159*4882a593Smuzhiyun [f81768d] = 1,
160*4882a593Smuzhiyun [f81865f] = 1,
161*4882a593Smuzhiyun [f81866a] = 1,
162*4882a593Smuzhiyun };
163*4882a593Smuzhiyun
164*4882a593Smuzhiyun static const char f71882fg_fan_has_beep[] = {
165*4882a593Smuzhiyun [f71808e] = 0,
166*4882a593Smuzhiyun [f71808a] = 0,
167*4882a593Smuzhiyun [f71858fg] = 0,
168*4882a593Smuzhiyun [f71862fg] = 1,
169*4882a593Smuzhiyun [f71868a] = 1,
170*4882a593Smuzhiyun [f71869] = 1,
171*4882a593Smuzhiyun [f71869a] = 1,
172*4882a593Smuzhiyun [f71882fg] = 1,
173*4882a593Smuzhiyun [f71889fg] = 1,
174*4882a593Smuzhiyun [f71889ed] = 1,
175*4882a593Smuzhiyun [f71889a] = 1,
176*4882a593Smuzhiyun [f8000] = 0,
177*4882a593Smuzhiyun [f81768d] = 1,
178*4882a593Smuzhiyun [f81865f] = 1,
179*4882a593Smuzhiyun [f81866a] = 1,
180*4882a593Smuzhiyun };
181*4882a593Smuzhiyun
182*4882a593Smuzhiyun static const char f71882fg_nr_fans[] = {
183*4882a593Smuzhiyun [f71808e] = 3,
184*4882a593Smuzhiyun [f71808a] = 2, /* +1 fan which is monitor + simple pwm only */
185*4882a593Smuzhiyun [f71858fg] = 3,
186*4882a593Smuzhiyun [f71862fg] = 3,
187*4882a593Smuzhiyun [f71868a] = 3,
188*4882a593Smuzhiyun [f71869] = 3,
189*4882a593Smuzhiyun [f71869a] = 3,
190*4882a593Smuzhiyun [f71882fg] = 4,
191*4882a593Smuzhiyun [f71889fg] = 3,
192*4882a593Smuzhiyun [f71889ed] = 3,
193*4882a593Smuzhiyun [f71889a] = 3,
194*4882a593Smuzhiyun [f8000] = 3, /* +1 fan which is monitor only */
195*4882a593Smuzhiyun [f81768d] = 3,
196*4882a593Smuzhiyun [f81865f] = 2,
197*4882a593Smuzhiyun [f81866a] = 3,
198*4882a593Smuzhiyun };
199*4882a593Smuzhiyun
200*4882a593Smuzhiyun static const char f71882fg_temp_has_beep[] = {
201*4882a593Smuzhiyun [f71808e] = 0,
202*4882a593Smuzhiyun [f71808a] = 1,
203*4882a593Smuzhiyun [f71858fg] = 0,
204*4882a593Smuzhiyun [f71862fg] = 1,
205*4882a593Smuzhiyun [f71868a] = 1,
206*4882a593Smuzhiyun [f71869] = 1,
207*4882a593Smuzhiyun [f71869a] = 1,
208*4882a593Smuzhiyun [f71882fg] = 1,
209*4882a593Smuzhiyun [f71889fg] = 1,
210*4882a593Smuzhiyun [f71889ed] = 1,
211*4882a593Smuzhiyun [f71889a] = 1,
212*4882a593Smuzhiyun [f8000] = 0,
213*4882a593Smuzhiyun [f81768d] = 1,
214*4882a593Smuzhiyun [f81865f] = 1,
215*4882a593Smuzhiyun [f81866a] = 1,
216*4882a593Smuzhiyun };
217*4882a593Smuzhiyun
218*4882a593Smuzhiyun static const char f71882fg_nr_temps[] = {
219*4882a593Smuzhiyun [f71808e] = 2,
220*4882a593Smuzhiyun [f71808a] = 2,
221*4882a593Smuzhiyun [f71858fg] = 3,
222*4882a593Smuzhiyun [f71862fg] = 3,
223*4882a593Smuzhiyun [f71868a] = 3,
224*4882a593Smuzhiyun [f71869] = 3,
225*4882a593Smuzhiyun [f71869a] = 3,
226*4882a593Smuzhiyun [f71882fg] = 3,
227*4882a593Smuzhiyun [f71889fg] = 3,
228*4882a593Smuzhiyun [f71889ed] = 3,
229*4882a593Smuzhiyun [f71889a] = 3,
230*4882a593Smuzhiyun [f8000] = 3,
231*4882a593Smuzhiyun [f81768d] = 3,
232*4882a593Smuzhiyun [f81865f] = 2,
233*4882a593Smuzhiyun [f81866a] = 3,
234*4882a593Smuzhiyun };
235*4882a593Smuzhiyun
236*4882a593Smuzhiyun static struct platform_device *f71882fg_pdev;
237*4882a593Smuzhiyun
238*4882a593Smuzhiyun /* Super-I/O Function prototypes */
239*4882a593Smuzhiyun static inline int superio_inb(int base, int reg);
240*4882a593Smuzhiyun static inline int superio_inw(int base, int reg);
241*4882a593Smuzhiyun static inline int superio_enter(int base);
242*4882a593Smuzhiyun static inline void superio_select(int base, int ld);
243*4882a593Smuzhiyun static inline void superio_exit(int base);
244*4882a593Smuzhiyun
245*4882a593Smuzhiyun struct f71882fg_sio_data {
246*4882a593Smuzhiyun enum chips type;
247*4882a593Smuzhiyun };
248*4882a593Smuzhiyun
249*4882a593Smuzhiyun struct f71882fg_data {
250*4882a593Smuzhiyun unsigned short addr;
251*4882a593Smuzhiyun enum chips type;
252*4882a593Smuzhiyun struct device *hwmon_dev;
253*4882a593Smuzhiyun
254*4882a593Smuzhiyun struct mutex update_lock;
255*4882a593Smuzhiyun int temp_start; /* temp numbering start (0 or 1) */
256*4882a593Smuzhiyun char valid; /* !=0 if following fields are valid */
257*4882a593Smuzhiyun char auto_point_temp_signed;
258*4882a593Smuzhiyun unsigned long last_updated; /* In jiffies */
259*4882a593Smuzhiyun unsigned long last_limits; /* In jiffies */
260*4882a593Smuzhiyun
261*4882a593Smuzhiyun /* Register Values */
262*4882a593Smuzhiyun u8 in[F71882FG_MAX_INS];
263*4882a593Smuzhiyun u8 in1_max;
264*4882a593Smuzhiyun u8 in_status;
265*4882a593Smuzhiyun u8 in_beep;
266*4882a593Smuzhiyun u16 fan[4];
267*4882a593Smuzhiyun u16 fan_target[4];
268*4882a593Smuzhiyun u16 fan_full_speed[4];
269*4882a593Smuzhiyun u8 fan_status;
270*4882a593Smuzhiyun u8 fan_beep;
271*4882a593Smuzhiyun /*
272*4882a593Smuzhiyun * Note: all models have max 3 temperature channels, but on some
273*4882a593Smuzhiyun * they are addressed as 0-2 and on others as 1-3, so for coding
274*4882a593Smuzhiyun * convenience we reserve space for 4 channels
275*4882a593Smuzhiyun */
276*4882a593Smuzhiyun u16 temp[4];
277*4882a593Smuzhiyun u8 temp_ovt[4];
278*4882a593Smuzhiyun u8 temp_high[4];
279*4882a593Smuzhiyun u8 temp_hyst[2]; /* 2 hysts stored per reg */
280*4882a593Smuzhiyun u8 temp_type[4];
281*4882a593Smuzhiyun u8 temp_status;
282*4882a593Smuzhiyun u8 temp_beep;
283*4882a593Smuzhiyun u8 temp_diode_open;
284*4882a593Smuzhiyun u8 temp_config;
285*4882a593Smuzhiyun u8 pwm[4];
286*4882a593Smuzhiyun u8 pwm_enable;
287*4882a593Smuzhiyun u8 pwm_auto_point_hyst[2];
288*4882a593Smuzhiyun u8 pwm_auto_point_mapping[4];
289*4882a593Smuzhiyun u8 pwm_auto_point_pwm[4][5];
290*4882a593Smuzhiyun s8 pwm_auto_point_temp[4][4];
291*4882a593Smuzhiyun };
292*4882a593Smuzhiyun
293*4882a593Smuzhiyun /* Sysfs in */
294*4882a593Smuzhiyun static ssize_t show_in(struct device *dev, struct device_attribute *devattr,
295*4882a593Smuzhiyun char *buf);
296*4882a593Smuzhiyun static ssize_t show_in_max(struct device *dev, struct device_attribute
297*4882a593Smuzhiyun *devattr, char *buf);
298*4882a593Smuzhiyun static ssize_t store_in_max(struct device *dev, struct device_attribute
299*4882a593Smuzhiyun *devattr, const char *buf, size_t count);
300*4882a593Smuzhiyun static ssize_t show_in_beep(struct device *dev, struct device_attribute
301*4882a593Smuzhiyun *devattr, char *buf);
302*4882a593Smuzhiyun static ssize_t store_in_beep(struct device *dev, struct device_attribute
303*4882a593Smuzhiyun *devattr, const char *buf, size_t count);
304*4882a593Smuzhiyun static ssize_t show_in_alarm(struct device *dev, struct device_attribute
305*4882a593Smuzhiyun *devattr, char *buf);
306*4882a593Smuzhiyun /* Sysfs Fan */
307*4882a593Smuzhiyun static ssize_t show_fan(struct device *dev, struct device_attribute *devattr,
308*4882a593Smuzhiyun char *buf);
309*4882a593Smuzhiyun static ssize_t show_fan_full_speed(struct device *dev,
310*4882a593Smuzhiyun struct device_attribute *devattr, char *buf);
311*4882a593Smuzhiyun static ssize_t store_fan_full_speed(struct device *dev,
312*4882a593Smuzhiyun struct device_attribute *devattr, const char *buf, size_t count);
313*4882a593Smuzhiyun static ssize_t show_fan_beep(struct device *dev, struct device_attribute
314*4882a593Smuzhiyun *devattr, char *buf);
315*4882a593Smuzhiyun static ssize_t store_fan_beep(struct device *dev, struct device_attribute
316*4882a593Smuzhiyun *devattr, const char *buf, size_t count);
317*4882a593Smuzhiyun static ssize_t show_fan_alarm(struct device *dev, struct device_attribute
318*4882a593Smuzhiyun *devattr, char *buf);
319*4882a593Smuzhiyun /* Sysfs Temp */
320*4882a593Smuzhiyun static ssize_t show_temp(struct device *dev, struct device_attribute
321*4882a593Smuzhiyun *devattr, char *buf);
322*4882a593Smuzhiyun static ssize_t show_temp_max(struct device *dev, struct device_attribute
323*4882a593Smuzhiyun *devattr, char *buf);
324*4882a593Smuzhiyun static ssize_t store_temp_max(struct device *dev, struct device_attribute
325*4882a593Smuzhiyun *devattr, const char *buf, size_t count);
326*4882a593Smuzhiyun static ssize_t show_temp_max_hyst(struct device *dev, struct device_attribute
327*4882a593Smuzhiyun *devattr, char *buf);
328*4882a593Smuzhiyun static ssize_t store_temp_max_hyst(struct device *dev, struct device_attribute
329*4882a593Smuzhiyun *devattr, const char *buf, size_t count);
330*4882a593Smuzhiyun static ssize_t show_temp_crit(struct device *dev, struct device_attribute
331*4882a593Smuzhiyun *devattr, char *buf);
332*4882a593Smuzhiyun static ssize_t store_temp_crit(struct device *dev, struct device_attribute
333*4882a593Smuzhiyun *devattr, const char *buf, size_t count);
334*4882a593Smuzhiyun static ssize_t show_temp_crit_hyst(struct device *dev, struct device_attribute
335*4882a593Smuzhiyun *devattr, char *buf);
336*4882a593Smuzhiyun static ssize_t show_temp_type(struct device *dev, struct device_attribute
337*4882a593Smuzhiyun *devattr, char *buf);
338*4882a593Smuzhiyun static ssize_t show_temp_beep(struct device *dev, struct device_attribute
339*4882a593Smuzhiyun *devattr, char *buf);
340*4882a593Smuzhiyun static ssize_t store_temp_beep(struct device *dev, struct device_attribute
341*4882a593Smuzhiyun *devattr, const char *buf, size_t count);
342*4882a593Smuzhiyun static ssize_t show_temp_alarm(struct device *dev, struct device_attribute
343*4882a593Smuzhiyun *devattr, char *buf);
344*4882a593Smuzhiyun static ssize_t show_temp_fault(struct device *dev, struct device_attribute
345*4882a593Smuzhiyun *devattr, char *buf);
346*4882a593Smuzhiyun /* PWM and Auto point control */
347*4882a593Smuzhiyun static ssize_t show_pwm(struct device *dev, struct device_attribute *devattr,
348*4882a593Smuzhiyun char *buf);
349*4882a593Smuzhiyun static ssize_t store_pwm(struct device *dev, struct device_attribute *devattr,
350*4882a593Smuzhiyun const char *buf, size_t count);
351*4882a593Smuzhiyun static ssize_t show_simple_pwm(struct device *dev,
352*4882a593Smuzhiyun struct device_attribute *devattr, char *buf);
353*4882a593Smuzhiyun static ssize_t store_simple_pwm(struct device *dev,
354*4882a593Smuzhiyun struct device_attribute *devattr, const char *buf, size_t count);
355*4882a593Smuzhiyun static ssize_t show_pwm_enable(struct device *dev,
356*4882a593Smuzhiyun struct device_attribute *devattr, char *buf);
357*4882a593Smuzhiyun static ssize_t store_pwm_enable(struct device *dev,
358*4882a593Smuzhiyun struct device_attribute *devattr, const char *buf, size_t count);
359*4882a593Smuzhiyun static ssize_t show_pwm_interpolate(struct device *dev,
360*4882a593Smuzhiyun struct device_attribute *devattr, char *buf);
361*4882a593Smuzhiyun static ssize_t store_pwm_interpolate(struct device *dev,
362*4882a593Smuzhiyun struct device_attribute *devattr, const char *buf, size_t count);
363*4882a593Smuzhiyun static ssize_t show_pwm_auto_point_channel(struct device *dev,
364*4882a593Smuzhiyun struct device_attribute *devattr, char *buf);
365*4882a593Smuzhiyun static ssize_t store_pwm_auto_point_channel(struct device *dev,
366*4882a593Smuzhiyun struct device_attribute *devattr, const char *buf, size_t count);
367*4882a593Smuzhiyun static ssize_t show_pwm_auto_point_temp_hyst(struct device *dev,
368*4882a593Smuzhiyun struct device_attribute *devattr, char *buf);
369*4882a593Smuzhiyun static ssize_t store_pwm_auto_point_temp_hyst(struct device *dev,
370*4882a593Smuzhiyun struct device_attribute *devattr, const char *buf, size_t count);
371*4882a593Smuzhiyun static ssize_t show_pwm_auto_point_pwm(struct device *dev,
372*4882a593Smuzhiyun struct device_attribute *devattr, char *buf);
373*4882a593Smuzhiyun static ssize_t store_pwm_auto_point_pwm(struct device *dev,
374*4882a593Smuzhiyun struct device_attribute *devattr, const char *buf, size_t count);
375*4882a593Smuzhiyun static ssize_t show_pwm_auto_point_temp(struct device *dev,
376*4882a593Smuzhiyun struct device_attribute *devattr, char *buf);
377*4882a593Smuzhiyun static ssize_t store_pwm_auto_point_temp(struct device *dev,
378*4882a593Smuzhiyun struct device_attribute *devattr, const char *buf, size_t count);
379*4882a593Smuzhiyun /* Sysfs misc */
380*4882a593Smuzhiyun static ssize_t name_show(struct device *dev, struct device_attribute *devattr,
381*4882a593Smuzhiyun char *buf);
382*4882a593Smuzhiyun
383*4882a593Smuzhiyun static int f71882fg_probe(struct platform_device *pdev);
384*4882a593Smuzhiyun static int f71882fg_remove(struct platform_device *pdev);
385*4882a593Smuzhiyun
386*4882a593Smuzhiyun static struct platform_driver f71882fg_driver = {
387*4882a593Smuzhiyun .driver = {
388*4882a593Smuzhiyun .name = DRVNAME,
389*4882a593Smuzhiyun },
390*4882a593Smuzhiyun .probe = f71882fg_probe,
391*4882a593Smuzhiyun .remove = f71882fg_remove,
392*4882a593Smuzhiyun };
393*4882a593Smuzhiyun
394*4882a593Smuzhiyun static DEVICE_ATTR_RO(name);
395*4882a593Smuzhiyun
396*4882a593Smuzhiyun /*
397*4882a593Smuzhiyun * Temp attr for the f71858fg, the f71858fg is special as it has its
398*4882a593Smuzhiyun * temperature indexes start at 0 (the others start at 1)
399*4882a593Smuzhiyun */
400*4882a593Smuzhiyun static struct sensor_device_attribute_2 f71858fg_temp_attr[] = {
401*4882a593Smuzhiyun SENSOR_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0),
402*4882a593Smuzhiyun SENSOR_ATTR_2(temp1_max, S_IRUGO|S_IWUSR, show_temp_max,
403*4882a593Smuzhiyun store_temp_max, 0, 0),
404*4882a593Smuzhiyun SENSOR_ATTR_2(temp1_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst,
405*4882a593Smuzhiyun store_temp_max_hyst, 0, 0),
406*4882a593Smuzhiyun SENSOR_ATTR_2(temp1_max_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 0),
407*4882a593Smuzhiyun SENSOR_ATTR_2(temp1_crit, S_IRUGO|S_IWUSR, show_temp_crit,
408*4882a593Smuzhiyun store_temp_crit, 0, 0),
409*4882a593Smuzhiyun SENSOR_ATTR_2(temp1_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL,
410*4882a593Smuzhiyun 0, 0),
411*4882a593Smuzhiyun SENSOR_ATTR_2(temp1_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 4),
412*4882a593Smuzhiyun SENSOR_ATTR_2(temp1_fault, S_IRUGO, show_temp_fault, NULL, 0, 0),
413*4882a593Smuzhiyun SENSOR_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 0, 1),
414*4882a593Smuzhiyun SENSOR_ATTR_2(temp2_max, S_IRUGO|S_IWUSR, show_temp_max,
415*4882a593Smuzhiyun store_temp_max, 0, 1),
416*4882a593Smuzhiyun SENSOR_ATTR_2(temp2_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst,
417*4882a593Smuzhiyun store_temp_max_hyst, 0, 1),
418*4882a593Smuzhiyun SENSOR_ATTR_2(temp2_max_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 1),
419*4882a593Smuzhiyun SENSOR_ATTR_2(temp2_crit, S_IRUGO|S_IWUSR, show_temp_crit,
420*4882a593Smuzhiyun store_temp_crit, 0, 1),
421*4882a593Smuzhiyun SENSOR_ATTR_2(temp2_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL,
422*4882a593Smuzhiyun 0, 1),
423*4882a593Smuzhiyun SENSOR_ATTR_2(temp2_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 5),
424*4882a593Smuzhiyun SENSOR_ATTR_2(temp2_fault, S_IRUGO, show_temp_fault, NULL, 0, 1),
425*4882a593Smuzhiyun SENSOR_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 0, 2),
426*4882a593Smuzhiyun SENSOR_ATTR_2(temp3_max, S_IRUGO|S_IWUSR, show_temp_max,
427*4882a593Smuzhiyun store_temp_max, 0, 2),
428*4882a593Smuzhiyun SENSOR_ATTR_2(temp3_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst,
429*4882a593Smuzhiyun store_temp_max_hyst, 0, 2),
430*4882a593Smuzhiyun SENSOR_ATTR_2(temp3_max_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 2),
431*4882a593Smuzhiyun SENSOR_ATTR_2(temp3_crit, S_IRUGO|S_IWUSR, show_temp_crit,
432*4882a593Smuzhiyun store_temp_crit, 0, 2),
433*4882a593Smuzhiyun SENSOR_ATTR_2(temp3_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL,
434*4882a593Smuzhiyun 0, 2),
435*4882a593Smuzhiyun SENSOR_ATTR_2(temp3_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 6),
436*4882a593Smuzhiyun SENSOR_ATTR_2(temp3_fault, S_IRUGO, show_temp_fault, NULL, 0, 2),
437*4882a593Smuzhiyun };
438*4882a593Smuzhiyun
439*4882a593Smuzhiyun /* Temp attr for the standard models */
440*4882a593Smuzhiyun static struct sensor_device_attribute_2 fxxxx_temp_attr[3][9] = { {
441*4882a593Smuzhiyun SENSOR_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 1),
442*4882a593Smuzhiyun SENSOR_ATTR_2(temp1_max, S_IRUGO|S_IWUSR, show_temp_max,
443*4882a593Smuzhiyun store_temp_max, 0, 1),
444*4882a593Smuzhiyun SENSOR_ATTR_2(temp1_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst,
445*4882a593Smuzhiyun store_temp_max_hyst, 0, 1),
446*4882a593Smuzhiyun /*
447*4882a593Smuzhiyun * Should really be temp1_max_alarm, but older versions did not handle
448*4882a593Smuzhiyun * the max and crit alarms separately and lm_sensors v2 depends on the
449*4882a593Smuzhiyun * presence of temp#_alarm files. The same goes for temp2/3 _alarm.
450*4882a593Smuzhiyun */
451*4882a593Smuzhiyun SENSOR_ATTR_2(temp1_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 1),
452*4882a593Smuzhiyun SENSOR_ATTR_2(temp1_crit, S_IRUGO|S_IWUSR, show_temp_crit,
453*4882a593Smuzhiyun store_temp_crit, 0, 1),
454*4882a593Smuzhiyun SENSOR_ATTR_2(temp1_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL,
455*4882a593Smuzhiyun 0, 1),
456*4882a593Smuzhiyun SENSOR_ATTR_2(temp1_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 5),
457*4882a593Smuzhiyun SENSOR_ATTR_2(temp1_type, S_IRUGO, show_temp_type, NULL, 0, 1),
458*4882a593Smuzhiyun SENSOR_ATTR_2(temp1_fault, S_IRUGO, show_temp_fault, NULL, 0, 1),
459*4882a593Smuzhiyun }, {
460*4882a593Smuzhiyun SENSOR_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 0, 2),
461*4882a593Smuzhiyun SENSOR_ATTR_2(temp2_max, S_IRUGO|S_IWUSR, show_temp_max,
462*4882a593Smuzhiyun store_temp_max, 0, 2),
463*4882a593Smuzhiyun SENSOR_ATTR_2(temp2_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst,
464*4882a593Smuzhiyun store_temp_max_hyst, 0, 2),
465*4882a593Smuzhiyun /* Should be temp2_max_alarm, see temp1_alarm note */
466*4882a593Smuzhiyun SENSOR_ATTR_2(temp2_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 2),
467*4882a593Smuzhiyun SENSOR_ATTR_2(temp2_crit, S_IRUGO|S_IWUSR, show_temp_crit,
468*4882a593Smuzhiyun store_temp_crit, 0, 2),
469*4882a593Smuzhiyun SENSOR_ATTR_2(temp2_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL,
470*4882a593Smuzhiyun 0, 2),
471*4882a593Smuzhiyun SENSOR_ATTR_2(temp2_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 6),
472*4882a593Smuzhiyun SENSOR_ATTR_2(temp2_type, S_IRUGO, show_temp_type, NULL, 0, 2),
473*4882a593Smuzhiyun SENSOR_ATTR_2(temp2_fault, S_IRUGO, show_temp_fault, NULL, 0, 2),
474*4882a593Smuzhiyun }, {
475*4882a593Smuzhiyun SENSOR_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 0, 3),
476*4882a593Smuzhiyun SENSOR_ATTR_2(temp3_max, S_IRUGO|S_IWUSR, show_temp_max,
477*4882a593Smuzhiyun store_temp_max, 0, 3),
478*4882a593Smuzhiyun SENSOR_ATTR_2(temp3_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst,
479*4882a593Smuzhiyun store_temp_max_hyst, 0, 3),
480*4882a593Smuzhiyun /* Should be temp3_max_alarm, see temp1_alarm note */
481*4882a593Smuzhiyun SENSOR_ATTR_2(temp3_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 3),
482*4882a593Smuzhiyun SENSOR_ATTR_2(temp3_crit, S_IRUGO|S_IWUSR, show_temp_crit,
483*4882a593Smuzhiyun store_temp_crit, 0, 3),
484*4882a593Smuzhiyun SENSOR_ATTR_2(temp3_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL,
485*4882a593Smuzhiyun 0, 3),
486*4882a593Smuzhiyun SENSOR_ATTR_2(temp3_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 7),
487*4882a593Smuzhiyun SENSOR_ATTR_2(temp3_type, S_IRUGO, show_temp_type, NULL, 0, 3),
488*4882a593Smuzhiyun SENSOR_ATTR_2(temp3_fault, S_IRUGO, show_temp_fault, NULL, 0, 3),
489*4882a593Smuzhiyun } };
490*4882a593Smuzhiyun
491*4882a593Smuzhiyun /* Temp attr for models which can beep on temp alarm */
492*4882a593Smuzhiyun static struct sensor_device_attribute_2 fxxxx_temp_beep_attr[3][2] = { {
493*4882a593Smuzhiyun SENSOR_ATTR_2(temp1_max_beep, S_IRUGO|S_IWUSR, show_temp_beep,
494*4882a593Smuzhiyun store_temp_beep, 0, 1),
495*4882a593Smuzhiyun SENSOR_ATTR_2(temp1_crit_beep, S_IRUGO|S_IWUSR, show_temp_beep,
496*4882a593Smuzhiyun store_temp_beep, 0, 5),
497*4882a593Smuzhiyun }, {
498*4882a593Smuzhiyun SENSOR_ATTR_2(temp2_max_beep, S_IRUGO|S_IWUSR, show_temp_beep,
499*4882a593Smuzhiyun store_temp_beep, 0, 2),
500*4882a593Smuzhiyun SENSOR_ATTR_2(temp2_crit_beep, S_IRUGO|S_IWUSR, show_temp_beep,
501*4882a593Smuzhiyun store_temp_beep, 0, 6),
502*4882a593Smuzhiyun }, {
503*4882a593Smuzhiyun SENSOR_ATTR_2(temp3_max_beep, S_IRUGO|S_IWUSR, show_temp_beep,
504*4882a593Smuzhiyun store_temp_beep, 0, 3),
505*4882a593Smuzhiyun SENSOR_ATTR_2(temp3_crit_beep, S_IRUGO|S_IWUSR, show_temp_beep,
506*4882a593Smuzhiyun store_temp_beep, 0, 7),
507*4882a593Smuzhiyun } };
508*4882a593Smuzhiyun
509*4882a593Smuzhiyun static struct sensor_device_attribute_2 f81866_temp_beep_attr[3][2] = { {
510*4882a593Smuzhiyun SENSOR_ATTR_2(temp1_max_beep, S_IRUGO|S_IWUSR, show_temp_beep,
511*4882a593Smuzhiyun store_temp_beep, 0, 0),
512*4882a593Smuzhiyun SENSOR_ATTR_2(temp1_crit_beep, S_IRUGO|S_IWUSR, show_temp_beep,
513*4882a593Smuzhiyun store_temp_beep, 0, 4),
514*4882a593Smuzhiyun }, {
515*4882a593Smuzhiyun SENSOR_ATTR_2(temp2_max_beep, S_IRUGO|S_IWUSR, show_temp_beep,
516*4882a593Smuzhiyun store_temp_beep, 0, 1),
517*4882a593Smuzhiyun SENSOR_ATTR_2(temp2_crit_beep, S_IRUGO|S_IWUSR, show_temp_beep,
518*4882a593Smuzhiyun store_temp_beep, 0, 5),
519*4882a593Smuzhiyun }, {
520*4882a593Smuzhiyun SENSOR_ATTR_2(temp3_max_beep, S_IRUGO|S_IWUSR, show_temp_beep,
521*4882a593Smuzhiyun store_temp_beep, 0, 2),
522*4882a593Smuzhiyun SENSOR_ATTR_2(temp3_crit_beep, S_IRUGO|S_IWUSR, show_temp_beep,
523*4882a593Smuzhiyun store_temp_beep, 0, 6),
524*4882a593Smuzhiyun } };
525*4882a593Smuzhiyun
526*4882a593Smuzhiyun /*
527*4882a593Smuzhiyun * Temp attr for the f8000
528*4882a593Smuzhiyun * Note on the f8000 temp_ovt (crit) is used as max, and temp_high (max)
529*4882a593Smuzhiyun * is used as hysteresis value to clear alarms
530*4882a593Smuzhiyun * Also like the f71858fg its temperature indexes start at 0
531*4882a593Smuzhiyun */
532*4882a593Smuzhiyun static struct sensor_device_attribute_2 f8000_temp_attr[] = {
533*4882a593Smuzhiyun SENSOR_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0),
534*4882a593Smuzhiyun SENSOR_ATTR_2(temp1_max, S_IRUGO|S_IWUSR, show_temp_crit,
535*4882a593Smuzhiyun store_temp_crit, 0, 0),
536*4882a593Smuzhiyun SENSOR_ATTR_2(temp1_max_hyst, S_IRUGO|S_IWUSR, show_temp_max,
537*4882a593Smuzhiyun store_temp_max, 0, 0),
538*4882a593Smuzhiyun SENSOR_ATTR_2(temp1_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 4),
539*4882a593Smuzhiyun SENSOR_ATTR_2(temp1_fault, S_IRUGO, show_temp_fault, NULL, 0, 0),
540*4882a593Smuzhiyun SENSOR_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 0, 1),
541*4882a593Smuzhiyun SENSOR_ATTR_2(temp2_max, S_IRUGO|S_IWUSR, show_temp_crit,
542*4882a593Smuzhiyun store_temp_crit, 0, 1),
543*4882a593Smuzhiyun SENSOR_ATTR_2(temp2_max_hyst, S_IRUGO|S_IWUSR, show_temp_max,
544*4882a593Smuzhiyun store_temp_max, 0, 1),
545*4882a593Smuzhiyun SENSOR_ATTR_2(temp2_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 5),
546*4882a593Smuzhiyun SENSOR_ATTR_2(temp2_fault, S_IRUGO, show_temp_fault, NULL, 0, 1),
547*4882a593Smuzhiyun SENSOR_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 0, 2),
548*4882a593Smuzhiyun SENSOR_ATTR_2(temp3_max, S_IRUGO|S_IWUSR, show_temp_crit,
549*4882a593Smuzhiyun store_temp_crit, 0, 2),
550*4882a593Smuzhiyun SENSOR_ATTR_2(temp3_max_hyst, S_IRUGO|S_IWUSR, show_temp_max,
551*4882a593Smuzhiyun store_temp_max, 0, 2),
552*4882a593Smuzhiyun SENSOR_ATTR_2(temp3_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 6),
553*4882a593Smuzhiyun SENSOR_ATTR_2(temp3_fault, S_IRUGO, show_temp_fault, NULL, 0, 2),
554*4882a593Smuzhiyun };
555*4882a593Smuzhiyun
556*4882a593Smuzhiyun /* in attr for all models */
557*4882a593Smuzhiyun static struct sensor_device_attribute_2 fxxxx_in_attr[] = {
558*4882a593Smuzhiyun SENSOR_ATTR_2(in0_input, S_IRUGO, show_in, NULL, 0, 0),
559*4882a593Smuzhiyun SENSOR_ATTR_2(in1_input, S_IRUGO, show_in, NULL, 0, 1),
560*4882a593Smuzhiyun SENSOR_ATTR_2(in2_input, S_IRUGO, show_in, NULL, 0, 2),
561*4882a593Smuzhiyun SENSOR_ATTR_2(in3_input, S_IRUGO, show_in, NULL, 0, 3),
562*4882a593Smuzhiyun SENSOR_ATTR_2(in4_input, S_IRUGO, show_in, NULL, 0, 4),
563*4882a593Smuzhiyun SENSOR_ATTR_2(in5_input, S_IRUGO, show_in, NULL, 0, 5),
564*4882a593Smuzhiyun SENSOR_ATTR_2(in6_input, S_IRUGO, show_in, NULL, 0, 6),
565*4882a593Smuzhiyun SENSOR_ATTR_2(in7_input, S_IRUGO, show_in, NULL, 0, 7),
566*4882a593Smuzhiyun SENSOR_ATTR_2(in8_input, S_IRUGO, show_in, NULL, 0, 8),
567*4882a593Smuzhiyun SENSOR_ATTR_2(in9_input, S_IRUGO, show_in, NULL, 0, 9),
568*4882a593Smuzhiyun SENSOR_ATTR_2(in10_input, S_IRUGO, show_in, NULL, 0, 10),
569*4882a593Smuzhiyun };
570*4882a593Smuzhiyun
571*4882a593Smuzhiyun /* For models with in1 alarm capability */
572*4882a593Smuzhiyun static struct sensor_device_attribute_2 fxxxx_in1_alarm_attr[] = {
573*4882a593Smuzhiyun SENSOR_ATTR_2(in1_max, S_IRUGO|S_IWUSR, show_in_max, store_in_max,
574*4882a593Smuzhiyun 0, 1),
575*4882a593Smuzhiyun SENSOR_ATTR_2(in1_beep, S_IRUGO|S_IWUSR, show_in_beep, store_in_beep,
576*4882a593Smuzhiyun 0, 1),
577*4882a593Smuzhiyun SENSOR_ATTR_2(in1_alarm, S_IRUGO, show_in_alarm, NULL, 0, 1),
578*4882a593Smuzhiyun };
579*4882a593Smuzhiyun
580*4882a593Smuzhiyun /* Fan / PWM attr common to all models */
581*4882a593Smuzhiyun static struct sensor_device_attribute_2 fxxxx_fan_attr[4][6] = { {
582*4882a593Smuzhiyun SENSOR_ATTR_2(fan1_input, S_IRUGO, show_fan, NULL, 0, 0),
583*4882a593Smuzhiyun SENSOR_ATTR_2(fan1_full_speed, S_IRUGO|S_IWUSR,
584*4882a593Smuzhiyun show_fan_full_speed,
585*4882a593Smuzhiyun store_fan_full_speed, 0, 0),
586*4882a593Smuzhiyun SENSOR_ATTR_2(fan1_alarm, S_IRUGO, show_fan_alarm, NULL, 0, 0),
587*4882a593Smuzhiyun SENSOR_ATTR_2(pwm1, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0, 0),
588*4882a593Smuzhiyun SENSOR_ATTR_2(pwm1_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
589*4882a593Smuzhiyun store_pwm_enable, 0, 0),
590*4882a593Smuzhiyun SENSOR_ATTR_2(pwm1_interpolate, S_IRUGO|S_IWUSR,
591*4882a593Smuzhiyun show_pwm_interpolate, store_pwm_interpolate, 0, 0),
592*4882a593Smuzhiyun }, {
593*4882a593Smuzhiyun SENSOR_ATTR_2(fan2_input, S_IRUGO, show_fan, NULL, 0, 1),
594*4882a593Smuzhiyun SENSOR_ATTR_2(fan2_full_speed, S_IRUGO|S_IWUSR,
595*4882a593Smuzhiyun show_fan_full_speed,
596*4882a593Smuzhiyun store_fan_full_speed, 0, 1),
597*4882a593Smuzhiyun SENSOR_ATTR_2(fan2_alarm, S_IRUGO, show_fan_alarm, NULL, 0, 1),
598*4882a593Smuzhiyun SENSOR_ATTR_2(pwm2, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0, 1),
599*4882a593Smuzhiyun SENSOR_ATTR_2(pwm2_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
600*4882a593Smuzhiyun store_pwm_enable, 0, 1),
601*4882a593Smuzhiyun SENSOR_ATTR_2(pwm2_interpolate, S_IRUGO|S_IWUSR,
602*4882a593Smuzhiyun show_pwm_interpolate, store_pwm_interpolate, 0, 1),
603*4882a593Smuzhiyun }, {
604*4882a593Smuzhiyun SENSOR_ATTR_2(fan3_input, S_IRUGO, show_fan, NULL, 0, 2),
605*4882a593Smuzhiyun SENSOR_ATTR_2(fan3_full_speed, S_IRUGO|S_IWUSR,
606*4882a593Smuzhiyun show_fan_full_speed,
607*4882a593Smuzhiyun store_fan_full_speed, 0, 2),
608*4882a593Smuzhiyun SENSOR_ATTR_2(fan3_alarm, S_IRUGO, show_fan_alarm, NULL, 0, 2),
609*4882a593Smuzhiyun SENSOR_ATTR_2(pwm3, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0, 2),
610*4882a593Smuzhiyun SENSOR_ATTR_2(pwm3_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
611*4882a593Smuzhiyun store_pwm_enable, 0, 2),
612*4882a593Smuzhiyun SENSOR_ATTR_2(pwm3_interpolate, S_IRUGO|S_IWUSR,
613*4882a593Smuzhiyun show_pwm_interpolate, store_pwm_interpolate, 0, 2),
614*4882a593Smuzhiyun }, {
615*4882a593Smuzhiyun SENSOR_ATTR_2(fan4_input, S_IRUGO, show_fan, NULL, 0, 3),
616*4882a593Smuzhiyun SENSOR_ATTR_2(fan4_full_speed, S_IRUGO|S_IWUSR,
617*4882a593Smuzhiyun show_fan_full_speed,
618*4882a593Smuzhiyun store_fan_full_speed, 0, 3),
619*4882a593Smuzhiyun SENSOR_ATTR_2(fan4_alarm, S_IRUGO, show_fan_alarm, NULL, 0, 3),
620*4882a593Smuzhiyun SENSOR_ATTR_2(pwm4, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0, 3),
621*4882a593Smuzhiyun SENSOR_ATTR_2(pwm4_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
622*4882a593Smuzhiyun store_pwm_enable, 0, 3),
623*4882a593Smuzhiyun SENSOR_ATTR_2(pwm4_interpolate, S_IRUGO|S_IWUSR,
624*4882a593Smuzhiyun show_pwm_interpolate, store_pwm_interpolate, 0, 3),
625*4882a593Smuzhiyun } };
626*4882a593Smuzhiyun
627*4882a593Smuzhiyun /* Attr for the third fan of the f71808a, which only has manual pwm */
628*4882a593Smuzhiyun static struct sensor_device_attribute_2 f71808a_fan3_attr[] = {
629*4882a593Smuzhiyun SENSOR_ATTR_2(fan3_input, S_IRUGO, show_fan, NULL, 0, 2),
630*4882a593Smuzhiyun SENSOR_ATTR_2(fan3_alarm, S_IRUGO, show_fan_alarm, NULL, 0, 2),
631*4882a593Smuzhiyun SENSOR_ATTR_2(pwm3, S_IRUGO|S_IWUSR,
632*4882a593Smuzhiyun show_simple_pwm, store_simple_pwm, 0, 2),
633*4882a593Smuzhiyun };
634*4882a593Smuzhiyun
635*4882a593Smuzhiyun /* Attr for models which can beep on Fan alarm */
636*4882a593Smuzhiyun static struct sensor_device_attribute_2 fxxxx_fan_beep_attr[] = {
637*4882a593Smuzhiyun SENSOR_ATTR_2(fan1_beep, S_IRUGO|S_IWUSR, show_fan_beep,
638*4882a593Smuzhiyun store_fan_beep, 0, 0),
639*4882a593Smuzhiyun SENSOR_ATTR_2(fan2_beep, S_IRUGO|S_IWUSR, show_fan_beep,
640*4882a593Smuzhiyun store_fan_beep, 0, 1),
641*4882a593Smuzhiyun SENSOR_ATTR_2(fan3_beep, S_IRUGO|S_IWUSR, show_fan_beep,
642*4882a593Smuzhiyun store_fan_beep, 0, 2),
643*4882a593Smuzhiyun SENSOR_ATTR_2(fan4_beep, S_IRUGO|S_IWUSR, show_fan_beep,
644*4882a593Smuzhiyun store_fan_beep, 0, 3),
645*4882a593Smuzhiyun };
646*4882a593Smuzhiyun
647*4882a593Smuzhiyun /*
648*4882a593Smuzhiyun * PWM attr for the f71862fg, fewer pwms and fewer zones per pwm than the
649*4882a593Smuzhiyun * standard models
650*4882a593Smuzhiyun */
651*4882a593Smuzhiyun static struct sensor_device_attribute_2 f71862fg_auto_pwm_attr[3][7] = { {
652*4882a593Smuzhiyun SENSOR_ATTR_2(pwm1_auto_channels_temp, S_IRUGO|S_IWUSR,
653*4882a593Smuzhiyun show_pwm_auto_point_channel,
654*4882a593Smuzhiyun store_pwm_auto_point_channel, 0, 0),
655*4882a593Smuzhiyun SENSOR_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO|S_IWUSR,
656*4882a593Smuzhiyun show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
657*4882a593Smuzhiyun 1, 0),
658*4882a593Smuzhiyun SENSOR_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO|S_IWUSR,
659*4882a593Smuzhiyun show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
660*4882a593Smuzhiyun 4, 0),
661*4882a593Smuzhiyun SENSOR_ATTR_2(pwm1_auto_point1_temp, S_IRUGO|S_IWUSR,
662*4882a593Smuzhiyun show_pwm_auto_point_temp, store_pwm_auto_point_temp,
663*4882a593Smuzhiyun 0, 0),
664*4882a593Smuzhiyun SENSOR_ATTR_2(pwm1_auto_point2_temp, S_IRUGO|S_IWUSR,
665*4882a593Smuzhiyun show_pwm_auto_point_temp, store_pwm_auto_point_temp,
666*4882a593Smuzhiyun 3, 0),
667*4882a593Smuzhiyun SENSOR_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
668*4882a593Smuzhiyun show_pwm_auto_point_temp_hyst,
669*4882a593Smuzhiyun store_pwm_auto_point_temp_hyst,
670*4882a593Smuzhiyun 0, 0),
671*4882a593Smuzhiyun SENSOR_ATTR_2(pwm1_auto_point2_temp_hyst, S_IRUGO,
672*4882a593Smuzhiyun show_pwm_auto_point_temp_hyst, NULL, 3, 0),
673*4882a593Smuzhiyun }, {
674*4882a593Smuzhiyun SENSOR_ATTR_2(pwm2_auto_channels_temp, S_IRUGO|S_IWUSR,
675*4882a593Smuzhiyun show_pwm_auto_point_channel,
676*4882a593Smuzhiyun store_pwm_auto_point_channel, 0, 1),
677*4882a593Smuzhiyun SENSOR_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO|S_IWUSR,
678*4882a593Smuzhiyun show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
679*4882a593Smuzhiyun 1, 1),
680*4882a593Smuzhiyun SENSOR_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO|S_IWUSR,
681*4882a593Smuzhiyun show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
682*4882a593Smuzhiyun 4, 1),
683*4882a593Smuzhiyun SENSOR_ATTR_2(pwm2_auto_point1_temp, S_IRUGO|S_IWUSR,
684*4882a593Smuzhiyun show_pwm_auto_point_temp, store_pwm_auto_point_temp,
685*4882a593Smuzhiyun 0, 1),
686*4882a593Smuzhiyun SENSOR_ATTR_2(pwm2_auto_point2_temp, S_IRUGO|S_IWUSR,
687*4882a593Smuzhiyun show_pwm_auto_point_temp, store_pwm_auto_point_temp,
688*4882a593Smuzhiyun 3, 1),
689*4882a593Smuzhiyun SENSOR_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
690*4882a593Smuzhiyun show_pwm_auto_point_temp_hyst,
691*4882a593Smuzhiyun store_pwm_auto_point_temp_hyst,
692*4882a593Smuzhiyun 0, 1),
693*4882a593Smuzhiyun SENSOR_ATTR_2(pwm2_auto_point2_temp_hyst, S_IRUGO,
694*4882a593Smuzhiyun show_pwm_auto_point_temp_hyst, NULL, 3, 1),
695*4882a593Smuzhiyun }, {
696*4882a593Smuzhiyun SENSOR_ATTR_2(pwm3_auto_channels_temp, S_IRUGO|S_IWUSR,
697*4882a593Smuzhiyun show_pwm_auto_point_channel,
698*4882a593Smuzhiyun store_pwm_auto_point_channel, 0, 2),
699*4882a593Smuzhiyun SENSOR_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO|S_IWUSR,
700*4882a593Smuzhiyun show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
701*4882a593Smuzhiyun 1, 2),
702*4882a593Smuzhiyun SENSOR_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO|S_IWUSR,
703*4882a593Smuzhiyun show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
704*4882a593Smuzhiyun 4, 2),
705*4882a593Smuzhiyun SENSOR_ATTR_2(pwm3_auto_point1_temp, S_IRUGO|S_IWUSR,
706*4882a593Smuzhiyun show_pwm_auto_point_temp, store_pwm_auto_point_temp,
707*4882a593Smuzhiyun 0, 2),
708*4882a593Smuzhiyun SENSOR_ATTR_2(pwm3_auto_point2_temp, S_IRUGO|S_IWUSR,
709*4882a593Smuzhiyun show_pwm_auto_point_temp, store_pwm_auto_point_temp,
710*4882a593Smuzhiyun 3, 2),
711*4882a593Smuzhiyun SENSOR_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
712*4882a593Smuzhiyun show_pwm_auto_point_temp_hyst,
713*4882a593Smuzhiyun store_pwm_auto_point_temp_hyst,
714*4882a593Smuzhiyun 0, 2),
715*4882a593Smuzhiyun SENSOR_ATTR_2(pwm3_auto_point2_temp_hyst, S_IRUGO,
716*4882a593Smuzhiyun show_pwm_auto_point_temp_hyst, NULL, 3, 2),
717*4882a593Smuzhiyun } };
718*4882a593Smuzhiyun
719*4882a593Smuzhiyun /*
720*4882a593Smuzhiyun * PWM attr for the f71808e/f71869, almost identical to the f71862fg, but the
721*4882a593Smuzhiyun * pwm setting when the temperature is above the pwmX_auto_point1_temp can be
722*4882a593Smuzhiyun * programmed instead of being hardcoded to 0xff
723*4882a593Smuzhiyun */
724*4882a593Smuzhiyun static struct sensor_device_attribute_2 f71869_auto_pwm_attr[3][8] = { {
725*4882a593Smuzhiyun SENSOR_ATTR_2(pwm1_auto_channels_temp, S_IRUGO|S_IWUSR,
726*4882a593Smuzhiyun show_pwm_auto_point_channel,
727*4882a593Smuzhiyun store_pwm_auto_point_channel, 0, 0),
728*4882a593Smuzhiyun SENSOR_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO|S_IWUSR,
729*4882a593Smuzhiyun show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
730*4882a593Smuzhiyun 0, 0),
731*4882a593Smuzhiyun SENSOR_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO|S_IWUSR,
732*4882a593Smuzhiyun show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
733*4882a593Smuzhiyun 1, 0),
734*4882a593Smuzhiyun SENSOR_ATTR_2(pwm1_auto_point3_pwm, S_IRUGO|S_IWUSR,
735*4882a593Smuzhiyun show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
736*4882a593Smuzhiyun 4, 0),
737*4882a593Smuzhiyun SENSOR_ATTR_2(pwm1_auto_point1_temp, S_IRUGO|S_IWUSR,
738*4882a593Smuzhiyun show_pwm_auto_point_temp, store_pwm_auto_point_temp,
739*4882a593Smuzhiyun 0, 0),
740*4882a593Smuzhiyun SENSOR_ATTR_2(pwm1_auto_point2_temp, S_IRUGO|S_IWUSR,
741*4882a593Smuzhiyun show_pwm_auto_point_temp, store_pwm_auto_point_temp,
742*4882a593Smuzhiyun 3, 0),
743*4882a593Smuzhiyun SENSOR_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
744*4882a593Smuzhiyun show_pwm_auto_point_temp_hyst,
745*4882a593Smuzhiyun store_pwm_auto_point_temp_hyst,
746*4882a593Smuzhiyun 0, 0),
747*4882a593Smuzhiyun SENSOR_ATTR_2(pwm1_auto_point2_temp_hyst, S_IRUGO,
748*4882a593Smuzhiyun show_pwm_auto_point_temp_hyst, NULL, 3, 0),
749*4882a593Smuzhiyun }, {
750*4882a593Smuzhiyun SENSOR_ATTR_2(pwm2_auto_channels_temp, S_IRUGO|S_IWUSR,
751*4882a593Smuzhiyun show_pwm_auto_point_channel,
752*4882a593Smuzhiyun store_pwm_auto_point_channel, 0, 1),
753*4882a593Smuzhiyun SENSOR_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO|S_IWUSR,
754*4882a593Smuzhiyun show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
755*4882a593Smuzhiyun 0, 1),
756*4882a593Smuzhiyun SENSOR_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO|S_IWUSR,
757*4882a593Smuzhiyun show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
758*4882a593Smuzhiyun 1, 1),
759*4882a593Smuzhiyun SENSOR_ATTR_2(pwm2_auto_point3_pwm, S_IRUGO|S_IWUSR,
760*4882a593Smuzhiyun show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
761*4882a593Smuzhiyun 4, 1),
762*4882a593Smuzhiyun SENSOR_ATTR_2(pwm2_auto_point1_temp, S_IRUGO|S_IWUSR,
763*4882a593Smuzhiyun show_pwm_auto_point_temp, store_pwm_auto_point_temp,
764*4882a593Smuzhiyun 0, 1),
765*4882a593Smuzhiyun SENSOR_ATTR_2(pwm2_auto_point2_temp, S_IRUGO|S_IWUSR,
766*4882a593Smuzhiyun show_pwm_auto_point_temp, store_pwm_auto_point_temp,
767*4882a593Smuzhiyun 3, 1),
768*4882a593Smuzhiyun SENSOR_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
769*4882a593Smuzhiyun show_pwm_auto_point_temp_hyst,
770*4882a593Smuzhiyun store_pwm_auto_point_temp_hyst,
771*4882a593Smuzhiyun 0, 1),
772*4882a593Smuzhiyun SENSOR_ATTR_2(pwm2_auto_point2_temp_hyst, S_IRUGO,
773*4882a593Smuzhiyun show_pwm_auto_point_temp_hyst, NULL, 3, 1),
774*4882a593Smuzhiyun }, {
775*4882a593Smuzhiyun SENSOR_ATTR_2(pwm3_auto_channels_temp, S_IRUGO|S_IWUSR,
776*4882a593Smuzhiyun show_pwm_auto_point_channel,
777*4882a593Smuzhiyun store_pwm_auto_point_channel, 0, 2),
778*4882a593Smuzhiyun SENSOR_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO|S_IWUSR,
779*4882a593Smuzhiyun show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
780*4882a593Smuzhiyun 0, 2),
781*4882a593Smuzhiyun SENSOR_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO|S_IWUSR,
782*4882a593Smuzhiyun show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
783*4882a593Smuzhiyun 1, 2),
784*4882a593Smuzhiyun SENSOR_ATTR_2(pwm3_auto_point3_pwm, S_IRUGO|S_IWUSR,
785*4882a593Smuzhiyun show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
786*4882a593Smuzhiyun 4, 2),
787*4882a593Smuzhiyun SENSOR_ATTR_2(pwm3_auto_point1_temp, S_IRUGO|S_IWUSR,
788*4882a593Smuzhiyun show_pwm_auto_point_temp, store_pwm_auto_point_temp,
789*4882a593Smuzhiyun 0, 2),
790*4882a593Smuzhiyun SENSOR_ATTR_2(pwm3_auto_point2_temp, S_IRUGO|S_IWUSR,
791*4882a593Smuzhiyun show_pwm_auto_point_temp, store_pwm_auto_point_temp,
792*4882a593Smuzhiyun 3, 2),
793*4882a593Smuzhiyun SENSOR_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
794*4882a593Smuzhiyun show_pwm_auto_point_temp_hyst,
795*4882a593Smuzhiyun store_pwm_auto_point_temp_hyst,
796*4882a593Smuzhiyun 0, 2),
797*4882a593Smuzhiyun SENSOR_ATTR_2(pwm3_auto_point2_temp_hyst, S_IRUGO,
798*4882a593Smuzhiyun show_pwm_auto_point_temp_hyst, NULL, 3, 2),
799*4882a593Smuzhiyun } };
800*4882a593Smuzhiyun
801*4882a593Smuzhiyun /* PWM attr for the standard models */
802*4882a593Smuzhiyun static struct sensor_device_attribute_2 fxxxx_auto_pwm_attr[4][14] = { {
803*4882a593Smuzhiyun SENSOR_ATTR_2(pwm1_auto_channels_temp, S_IRUGO|S_IWUSR,
804*4882a593Smuzhiyun show_pwm_auto_point_channel,
805*4882a593Smuzhiyun store_pwm_auto_point_channel, 0, 0),
806*4882a593Smuzhiyun SENSOR_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO|S_IWUSR,
807*4882a593Smuzhiyun show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
808*4882a593Smuzhiyun 0, 0),
809*4882a593Smuzhiyun SENSOR_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO|S_IWUSR,
810*4882a593Smuzhiyun show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
811*4882a593Smuzhiyun 1, 0),
812*4882a593Smuzhiyun SENSOR_ATTR_2(pwm1_auto_point3_pwm, S_IRUGO|S_IWUSR,
813*4882a593Smuzhiyun show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
814*4882a593Smuzhiyun 2, 0),
815*4882a593Smuzhiyun SENSOR_ATTR_2(pwm1_auto_point4_pwm, S_IRUGO|S_IWUSR,
816*4882a593Smuzhiyun show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
817*4882a593Smuzhiyun 3, 0),
818*4882a593Smuzhiyun SENSOR_ATTR_2(pwm1_auto_point5_pwm, S_IRUGO|S_IWUSR,
819*4882a593Smuzhiyun show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
820*4882a593Smuzhiyun 4, 0),
821*4882a593Smuzhiyun SENSOR_ATTR_2(pwm1_auto_point1_temp, S_IRUGO|S_IWUSR,
822*4882a593Smuzhiyun show_pwm_auto_point_temp, store_pwm_auto_point_temp,
823*4882a593Smuzhiyun 0, 0),
824*4882a593Smuzhiyun SENSOR_ATTR_2(pwm1_auto_point2_temp, S_IRUGO|S_IWUSR,
825*4882a593Smuzhiyun show_pwm_auto_point_temp, store_pwm_auto_point_temp,
826*4882a593Smuzhiyun 1, 0),
827*4882a593Smuzhiyun SENSOR_ATTR_2(pwm1_auto_point3_temp, S_IRUGO|S_IWUSR,
828*4882a593Smuzhiyun show_pwm_auto_point_temp, store_pwm_auto_point_temp,
829*4882a593Smuzhiyun 2, 0),
830*4882a593Smuzhiyun SENSOR_ATTR_2(pwm1_auto_point4_temp, S_IRUGO|S_IWUSR,
831*4882a593Smuzhiyun show_pwm_auto_point_temp, store_pwm_auto_point_temp,
832*4882a593Smuzhiyun 3, 0),
833*4882a593Smuzhiyun SENSOR_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
834*4882a593Smuzhiyun show_pwm_auto_point_temp_hyst,
835*4882a593Smuzhiyun store_pwm_auto_point_temp_hyst,
836*4882a593Smuzhiyun 0, 0),
837*4882a593Smuzhiyun SENSOR_ATTR_2(pwm1_auto_point2_temp_hyst, S_IRUGO,
838*4882a593Smuzhiyun show_pwm_auto_point_temp_hyst, NULL, 1, 0),
839*4882a593Smuzhiyun SENSOR_ATTR_2(pwm1_auto_point3_temp_hyst, S_IRUGO,
840*4882a593Smuzhiyun show_pwm_auto_point_temp_hyst, NULL, 2, 0),
841*4882a593Smuzhiyun SENSOR_ATTR_2(pwm1_auto_point4_temp_hyst, S_IRUGO,
842*4882a593Smuzhiyun show_pwm_auto_point_temp_hyst, NULL, 3, 0),
843*4882a593Smuzhiyun }, {
844*4882a593Smuzhiyun SENSOR_ATTR_2(pwm2_auto_channels_temp, S_IRUGO|S_IWUSR,
845*4882a593Smuzhiyun show_pwm_auto_point_channel,
846*4882a593Smuzhiyun store_pwm_auto_point_channel, 0, 1),
847*4882a593Smuzhiyun SENSOR_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO|S_IWUSR,
848*4882a593Smuzhiyun show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
849*4882a593Smuzhiyun 0, 1),
850*4882a593Smuzhiyun SENSOR_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO|S_IWUSR,
851*4882a593Smuzhiyun show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
852*4882a593Smuzhiyun 1, 1),
853*4882a593Smuzhiyun SENSOR_ATTR_2(pwm2_auto_point3_pwm, S_IRUGO|S_IWUSR,
854*4882a593Smuzhiyun show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
855*4882a593Smuzhiyun 2, 1),
856*4882a593Smuzhiyun SENSOR_ATTR_2(pwm2_auto_point4_pwm, S_IRUGO|S_IWUSR,
857*4882a593Smuzhiyun show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
858*4882a593Smuzhiyun 3, 1),
859*4882a593Smuzhiyun SENSOR_ATTR_2(pwm2_auto_point5_pwm, S_IRUGO|S_IWUSR,
860*4882a593Smuzhiyun show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
861*4882a593Smuzhiyun 4, 1),
862*4882a593Smuzhiyun SENSOR_ATTR_2(pwm2_auto_point1_temp, S_IRUGO|S_IWUSR,
863*4882a593Smuzhiyun show_pwm_auto_point_temp, store_pwm_auto_point_temp,
864*4882a593Smuzhiyun 0, 1),
865*4882a593Smuzhiyun SENSOR_ATTR_2(pwm2_auto_point2_temp, S_IRUGO|S_IWUSR,
866*4882a593Smuzhiyun show_pwm_auto_point_temp, store_pwm_auto_point_temp,
867*4882a593Smuzhiyun 1, 1),
868*4882a593Smuzhiyun SENSOR_ATTR_2(pwm2_auto_point3_temp, S_IRUGO|S_IWUSR,
869*4882a593Smuzhiyun show_pwm_auto_point_temp, store_pwm_auto_point_temp,
870*4882a593Smuzhiyun 2, 1),
871*4882a593Smuzhiyun SENSOR_ATTR_2(pwm2_auto_point4_temp, S_IRUGO|S_IWUSR,
872*4882a593Smuzhiyun show_pwm_auto_point_temp, store_pwm_auto_point_temp,
873*4882a593Smuzhiyun 3, 1),
874*4882a593Smuzhiyun SENSOR_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
875*4882a593Smuzhiyun show_pwm_auto_point_temp_hyst,
876*4882a593Smuzhiyun store_pwm_auto_point_temp_hyst,
877*4882a593Smuzhiyun 0, 1),
878*4882a593Smuzhiyun SENSOR_ATTR_2(pwm2_auto_point2_temp_hyst, S_IRUGO,
879*4882a593Smuzhiyun show_pwm_auto_point_temp_hyst, NULL, 1, 1),
880*4882a593Smuzhiyun SENSOR_ATTR_2(pwm2_auto_point3_temp_hyst, S_IRUGO,
881*4882a593Smuzhiyun show_pwm_auto_point_temp_hyst, NULL, 2, 1),
882*4882a593Smuzhiyun SENSOR_ATTR_2(pwm2_auto_point4_temp_hyst, S_IRUGO,
883*4882a593Smuzhiyun show_pwm_auto_point_temp_hyst, NULL, 3, 1),
884*4882a593Smuzhiyun }, {
885*4882a593Smuzhiyun SENSOR_ATTR_2(pwm3_auto_channels_temp, S_IRUGO|S_IWUSR,
886*4882a593Smuzhiyun show_pwm_auto_point_channel,
887*4882a593Smuzhiyun store_pwm_auto_point_channel, 0, 2),
888*4882a593Smuzhiyun SENSOR_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO|S_IWUSR,
889*4882a593Smuzhiyun show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
890*4882a593Smuzhiyun 0, 2),
891*4882a593Smuzhiyun SENSOR_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO|S_IWUSR,
892*4882a593Smuzhiyun show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
893*4882a593Smuzhiyun 1, 2),
894*4882a593Smuzhiyun SENSOR_ATTR_2(pwm3_auto_point3_pwm, S_IRUGO|S_IWUSR,
895*4882a593Smuzhiyun show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
896*4882a593Smuzhiyun 2, 2),
897*4882a593Smuzhiyun SENSOR_ATTR_2(pwm3_auto_point4_pwm, S_IRUGO|S_IWUSR,
898*4882a593Smuzhiyun show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
899*4882a593Smuzhiyun 3, 2),
900*4882a593Smuzhiyun SENSOR_ATTR_2(pwm3_auto_point5_pwm, S_IRUGO|S_IWUSR,
901*4882a593Smuzhiyun show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
902*4882a593Smuzhiyun 4, 2),
903*4882a593Smuzhiyun SENSOR_ATTR_2(pwm3_auto_point1_temp, S_IRUGO|S_IWUSR,
904*4882a593Smuzhiyun show_pwm_auto_point_temp, store_pwm_auto_point_temp,
905*4882a593Smuzhiyun 0, 2),
906*4882a593Smuzhiyun SENSOR_ATTR_2(pwm3_auto_point2_temp, S_IRUGO|S_IWUSR,
907*4882a593Smuzhiyun show_pwm_auto_point_temp, store_pwm_auto_point_temp,
908*4882a593Smuzhiyun 1, 2),
909*4882a593Smuzhiyun SENSOR_ATTR_2(pwm3_auto_point3_temp, S_IRUGO|S_IWUSR,
910*4882a593Smuzhiyun show_pwm_auto_point_temp, store_pwm_auto_point_temp,
911*4882a593Smuzhiyun 2, 2),
912*4882a593Smuzhiyun SENSOR_ATTR_2(pwm3_auto_point4_temp, S_IRUGO|S_IWUSR,
913*4882a593Smuzhiyun show_pwm_auto_point_temp, store_pwm_auto_point_temp,
914*4882a593Smuzhiyun 3, 2),
915*4882a593Smuzhiyun SENSOR_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
916*4882a593Smuzhiyun show_pwm_auto_point_temp_hyst,
917*4882a593Smuzhiyun store_pwm_auto_point_temp_hyst,
918*4882a593Smuzhiyun 0, 2),
919*4882a593Smuzhiyun SENSOR_ATTR_2(pwm3_auto_point2_temp_hyst, S_IRUGO,
920*4882a593Smuzhiyun show_pwm_auto_point_temp_hyst, NULL, 1, 2),
921*4882a593Smuzhiyun SENSOR_ATTR_2(pwm3_auto_point3_temp_hyst, S_IRUGO,
922*4882a593Smuzhiyun show_pwm_auto_point_temp_hyst, NULL, 2, 2),
923*4882a593Smuzhiyun SENSOR_ATTR_2(pwm3_auto_point4_temp_hyst, S_IRUGO,
924*4882a593Smuzhiyun show_pwm_auto_point_temp_hyst, NULL, 3, 2),
925*4882a593Smuzhiyun }, {
926*4882a593Smuzhiyun SENSOR_ATTR_2(pwm4_auto_channels_temp, S_IRUGO|S_IWUSR,
927*4882a593Smuzhiyun show_pwm_auto_point_channel,
928*4882a593Smuzhiyun store_pwm_auto_point_channel, 0, 3),
929*4882a593Smuzhiyun SENSOR_ATTR_2(pwm4_auto_point1_pwm, S_IRUGO|S_IWUSR,
930*4882a593Smuzhiyun show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
931*4882a593Smuzhiyun 0, 3),
932*4882a593Smuzhiyun SENSOR_ATTR_2(pwm4_auto_point2_pwm, S_IRUGO|S_IWUSR,
933*4882a593Smuzhiyun show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
934*4882a593Smuzhiyun 1, 3),
935*4882a593Smuzhiyun SENSOR_ATTR_2(pwm4_auto_point3_pwm, S_IRUGO|S_IWUSR,
936*4882a593Smuzhiyun show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
937*4882a593Smuzhiyun 2, 3),
938*4882a593Smuzhiyun SENSOR_ATTR_2(pwm4_auto_point4_pwm, S_IRUGO|S_IWUSR,
939*4882a593Smuzhiyun show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
940*4882a593Smuzhiyun 3, 3),
941*4882a593Smuzhiyun SENSOR_ATTR_2(pwm4_auto_point5_pwm, S_IRUGO|S_IWUSR,
942*4882a593Smuzhiyun show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
943*4882a593Smuzhiyun 4, 3),
944*4882a593Smuzhiyun SENSOR_ATTR_2(pwm4_auto_point1_temp, S_IRUGO|S_IWUSR,
945*4882a593Smuzhiyun show_pwm_auto_point_temp, store_pwm_auto_point_temp,
946*4882a593Smuzhiyun 0, 3),
947*4882a593Smuzhiyun SENSOR_ATTR_2(pwm4_auto_point2_temp, S_IRUGO|S_IWUSR,
948*4882a593Smuzhiyun show_pwm_auto_point_temp, store_pwm_auto_point_temp,
949*4882a593Smuzhiyun 1, 3),
950*4882a593Smuzhiyun SENSOR_ATTR_2(pwm4_auto_point3_temp, S_IRUGO|S_IWUSR,
951*4882a593Smuzhiyun show_pwm_auto_point_temp, store_pwm_auto_point_temp,
952*4882a593Smuzhiyun 2, 3),
953*4882a593Smuzhiyun SENSOR_ATTR_2(pwm4_auto_point4_temp, S_IRUGO|S_IWUSR,
954*4882a593Smuzhiyun show_pwm_auto_point_temp, store_pwm_auto_point_temp,
955*4882a593Smuzhiyun 3, 3),
956*4882a593Smuzhiyun SENSOR_ATTR_2(pwm4_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
957*4882a593Smuzhiyun show_pwm_auto_point_temp_hyst,
958*4882a593Smuzhiyun store_pwm_auto_point_temp_hyst,
959*4882a593Smuzhiyun 0, 3),
960*4882a593Smuzhiyun SENSOR_ATTR_2(pwm4_auto_point2_temp_hyst, S_IRUGO,
961*4882a593Smuzhiyun show_pwm_auto_point_temp_hyst, NULL, 1, 3),
962*4882a593Smuzhiyun SENSOR_ATTR_2(pwm4_auto_point3_temp_hyst, S_IRUGO,
963*4882a593Smuzhiyun show_pwm_auto_point_temp_hyst, NULL, 2, 3),
964*4882a593Smuzhiyun SENSOR_ATTR_2(pwm4_auto_point4_temp_hyst, S_IRUGO,
965*4882a593Smuzhiyun show_pwm_auto_point_temp_hyst, NULL, 3, 3),
966*4882a593Smuzhiyun } };
967*4882a593Smuzhiyun
968*4882a593Smuzhiyun /* Fan attr specific to the f8000 (4th fan input can only measure speed) */
969*4882a593Smuzhiyun static struct sensor_device_attribute_2 f8000_fan_attr[] = {
970*4882a593Smuzhiyun SENSOR_ATTR_2(fan4_input, S_IRUGO, show_fan, NULL, 0, 3),
971*4882a593Smuzhiyun };
972*4882a593Smuzhiyun
973*4882a593Smuzhiyun /*
974*4882a593Smuzhiyun * PWM attr for the f8000, zones mapped to temp instead of to pwm!
975*4882a593Smuzhiyun * Also the register block at offset A0 maps to TEMP1 (so our temp2, as the
976*4882a593Smuzhiyun * F8000 starts counting temps at 0), B0 maps the TEMP2 and C0 maps to TEMP0
977*4882a593Smuzhiyun */
978*4882a593Smuzhiyun static struct sensor_device_attribute_2 f8000_auto_pwm_attr[3][14] = { {
979*4882a593Smuzhiyun SENSOR_ATTR_2(pwm1_auto_channels_temp, S_IRUGO|S_IWUSR,
980*4882a593Smuzhiyun show_pwm_auto_point_channel,
981*4882a593Smuzhiyun store_pwm_auto_point_channel, 0, 0),
982*4882a593Smuzhiyun SENSOR_ATTR_2(temp1_auto_point1_pwm, S_IRUGO|S_IWUSR,
983*4882a593Smuzhiyun show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
984*4882a593Smuzhiyun 0, 2),
985*4882a593Smuzhiyun SENSOR_ATTR_2(temp1_auto_point2_pwm, S_IRUGO|S_IWUSR,
986*4882a593Smuzhiyun show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
987*4882a593Smuzhiyun 1, 2),
988*4882a593Smuzhiyun SENSOR_ATTR_2(temp1_auto_point3_pwm, S_IRUGO|S_IWUSR,
989*4882a593Smuzhiyun show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
990*4882a593Smuzhiyun 2, 2),
991*4882a593Smuzhiyun SENSOR_ATTR_2(temp1_auto_point4_pwm, S_IRUGO|S_IWUSR,
992*4882a593Smuzhiyun show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
993*4882a593Smuzhiyun 3, 2),
994*4882a593Smuzhiyun SENSOR_ATTR_2(temp1_auto_point5_pwm, S_IRUGO|S_IWUSR,
995*4882a593Smuzhiyun show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
996*4882a593Smuzhiyun 4, 2),
997*4882a593Smuzhiyun SENSOR_ATTR_2(temp1_auto_point1_temp, S_IRUGO|S_IWUSR,
998*4882a593Smuzhiyun show_pwm_auto_point_temp, store_pwm_auto_point_temp,
999*4882a593Smuzhiyun 0, 2),
1000*4882a593Smuzhiyun SENSOR_ATTR_2(temp1_auto_point2_temp, S_IRUGO|S_IWUSR,
1001*4882a593Smuzhiyun show_pwm_auto_point_temp, store_pwm_auto_point_temp,
1002*4882a593Smuzhiyun 1, 2),
1003*4882a593Smuzhiyun SENSOR_ATTR_2(temp1_auto_point3_temp, S_IRUGO|S_IWUSR,
1004*4882a593Smuzhiyun show_pwm_auto_point_temp, store_pwm_auto_point_temp,
1005*4882a593Smuzhiyun 2, 2),
1006*4882a593Smuzhiyun SENSOR_ATTR_2(temp1_auto_point4_temp, S_IRUGO|S_IWUSR,
1007*4882a593Smuzhiyun show_pwm_auto_point_temp, store_pwm_auto_point_temp,
1008*4882a593Smuzhiyun 3, 2),
1009*4882a593Smuzhiyun SENSOR_ATTR_2(temp1_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
1010*4882a593Smuzhiyun show_pwm_auto_point_temp_hyst,
1011*4882a593Smuzhiyun store_pwm_auto_point_temp_hyst,
1012*4882a593Smuzhiyun 0, 2),
1013*4882a593Smuzhiyun SENSOR_ATTR_2(temp1_auto_point2_temp_hyst, S_IRUGO,
1014*4882a593Smuzhiyun show_pwm_auto_point_temp_hyst, NULL, 1, 2),
1015*4882a593Smuzhiyun SENSOR_ATTR_2(temp1_auto_point3_temp_hyst, S_IRUGO,
1016*4882a593Smuzhiyun show_pwm_auto_point_temp_hyst, NULL, 2, 2),
1017*4882a593Smuzhiyun SENSOR_ATTR_2(temp1_auto_point4_temp_hyst, S_IRUGO,
1018*4882a593Smuzhiyun show_pwm_auto_point_temp_hyst, NULL, 3, 2),
1019*4882a593Smuzhiyun }, {
1020*4882a593Smuzhiyun SENSOR_ATTR_2(pwm2_auto_channels_temp, S_IRUGO|S_IWUSR,
1021*4882a593Smuzhiyun show_pwm_auto_point_channel,
1022*4882a593Smuzhiyun store_pwm_auto_point_channel, 0, 1),
1023*4882a593Smuzhiyun SENSOR_ATTR_2(temp2_auto_point1_pwm, S_IRUGO|S_IWUSR,
1024*4882a593Smuzhiyun show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1025*4882a593Smuzhiyun 0, 0),
1026*4882a593Smuzhiyun SENSOR_ATTR_2(temp2_auto_point2_pwm, S_IRUGO|S_IWUSR,
1027*4882a593Smuzhiyun show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1028*4882a593Smuzhiyun 1, 0),
1029*4882a593Smuzhiyun SENSOR_ATTR_2(temp2_auto_point3_pwm, S_IRUGO|S_IWUSR,
1030*4882a593Smuzhiyun show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1031*4882a593Smuzhiyun 2, 0),
1032*4882a593Smuzhiyun SENSOR_ATTR_2(temp2_auto_point4_pwm, S_IRUGO|S_IWUSR,
1033*4882a593Smuzhiyun show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1034*4882a593Smuzhiyun 3, 0),
1035*4882a593Smuzhiyun SENSOR_ATTR_2(temp2_auto_point5_pwm, S_IRUGO|S_IWUSR,
1036*4882a593Smuzhiyun show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1037*4882a593Smuzhiyun 4, 0),
1038*4882a593Smuzhiyun SENSOR_ATTR_2(temp2_auto_point1_temp, S_IRUGO|S_IWUSR,
1039*4882a593Smuzhiyun show_pwm_auto_point_temp, store_pwm_auto_point_temp,
1040*4882a593Smuzhiyun 0, 0),
1041*4882a593Smuzhiyun SENSOR_ATTR_2(temp2_auto_point2_temp, S_IRUGO|S_IWUSR,
1042*4882a593Smuzhiyun show_pwm_auto_point_temp, store_pwm_auto_point_temp,
1043*4882a593Smuzhiyun 1, 0),
1044*4882a593Smuzhiyun SENSOR_ATTR_2(temp2_auto_point3_temp, S_IRUGO|S_IWUSR,
1045*4882a593Smuzhiyun show_pwm_auto_point_temp, store_pwm_auto_point_temp,
1046*4882a593Smuzhiyun 2, 0),
1047*4882a593Smuzhiyun SENSOR_ATTR_2(temp2_auto_point4_temp, S_IRUGO|S_IWUSR,
1048*4882a593Smuzhiyun show_pwm_auto_point_temp, store_pwm_auto_point_temp,
1049*4882a593Smuzhiyun 3, 0),
1050*4882a593Smuzhiyun SENSOR_ATTR_2(temp2_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
1051*4882a593Smuzhiyun show_pwm_auto_point_temp_hyst,
1052*4882a593Smuzhiyun store_pwm_auto_point_temp_hyst,
1053*4882a593Smuzhiyun 0, 0),
1054*4882a593Smuzhiyun SENSOR_ATTR_2(temp2_auto_point2_temp_hyst, S_IRUGO,
1055*4882a593Smuzhiyun show_pwm_auto_point_temp_hyst, NULL, 1, 0),
1056*4882a593Smuzhiyun SENSOR_ATTR_2(temp2_auto_point3_temp_hyst, S_IRUGO,
1057*4882a593Smuzhiyun show_pwm_auto_point_temp_hyst, NULL, 2, 0),
1058*4882a593Smuzhiyun SENSOR_ATTR_2(temp2_auto_point4_temp_hyst, S_IRUGO,
1059*4882a593Smuzhiyun show_pwm_auto_point_temp_hyst, NULL, 3, 0),
1060*4882a593Smuzhiyun }, {
1061*4882a593Smuzhiyun SENSOR_ATTR_2(pwm3_auto_channels_temp, S_IRUGO|S_IWUSR,
1062*4882a593Smuzhiyun show_pwm_auto_point_channel,
1063*4882a593Smuzhiyun store_pwm_auto_point_channel, 0, 2),
1064*4882a593Smuzhiyun SENSOR_ATTR_2(temp3_auto_point1_pwm, S_IRUGO|S_IWUSR,
1065*4882a593Smuzhiyun show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1066*4882a593Smuzhiyun 0, 1),
1067*4882a593Smuzhiyun SENSOR_ATTR_2(temp3_auto_point2_pwm, S_IRUGO|S_IWUSR,
1068*4882a593Smuzhiyun show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1069*4882a593Smuzhiyun 1, 1),
1070*4882a593Smuzhiyun SENSOR_ATTR_2(temp3_auto_point3_pwm, S_IRUGO|S_IWUSR,
1071*4882a593Smuzhiyun show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1072*4882a593Smuzhiyun 2, 1),
1073*4882a593Smuzhiyun SENSOR_ATTR_2(temp3_auto_point4_pwm, S_IRUGO|S_IWUSR,
1074*4882a593Smuzhiyun show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1075*4882a593Smuzhiyun 3, 1),
1076*4882a593Smuzhiyun SENSOR_ATTR_2(temp3_auto_point5_pwm, S_IRUGO|S_IWUSR,
1077*4882a593Smuzhiyun show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1078*4882a593Smuzhiyun 4, 1),
1079*4882a593Smuzhiyun SENSOR_ATTR_2(temp3_auto_point1_temp, S_IRUGO|S_IWUSR,
1080*4882a593Smuzhiyun show_pwm_auto_point_temp, store_pwm_auto_point_temp,
1081*4882a593Smuzhiyun 0, 1),
1082*4882a593Smuzhiyun SENSOR_ATTR_2(temp3_auto_point2_temp, S_IRUGO|S_IWUSR,
1083*4882a593Smuzhiyun show_pwm_auto_point_temp, store_pwm_auto_point_temp,
1084*4882a593Smuzhiyun 1, 1),
1085*4882a593Smuzhiyun SENSOR_ATTR_2(temp3_auto_point3_temp, S_IRUGO|S_IWUSR,
1086*4882a593Smuzhiyun show_pwm_auto_point_temp, store_pwm_auto_point_temp,
1087*4882a593Smuzhiyun 2, 1),
1088*4882a593Smuzhiyun SENSOR_ATTR_2(temp3_auto_point4_temp, S_IRUGO|S_IWUSR,
1089*4882a593Smuzhiyun show_pwm_auto_point_temp, store_pwm_auto_point_temp,
1090*4882a593Smuzhiyun 3, 1),
1091*4882a593Smuzhiyun SENSOR_ATTR_2(temp3_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
1092*4882a593Smuzhiyun show_pwm_auto_point_temp_hyst,
1093*4882a593Smuzhiyun store_pwm_auto_point_temp_hyst,
1094*4882a593Smuzhiyun 0, 1),
1095*4882a593Smuzhiyun SENSOR_ATTR_2(temp3_auto_point2_temp_hyst, S_IRUGO,
1096*4882a593Smuzhiyun show_pwm_auto_point_temp_hyst, NULL, 1, 1),
1097*4882a593Smuzhiyun SENSOR_ATTR_2(temp3_auto_point3_temp_hyst, S_IRUGO,
1098*4882a593Smuzhiyun show_pwm_auto_point_temp_hyst, NULL, 2, 1),
1099*4882a593Smuzhiyun SENSOR_ATTR_2(temp3_auto_point4_temp_hyst, S_IRUGO,
1100*4882a593Smuzhiyun show_pwm_auto_point_temp_hyst, NULL, 3, 1),
1101*4882a593Smuzhiyun } };
1102*4882a593Smuzhiyun
1103*4882a593Smuzhiyun /* Super I/O functions */
superio_inb(int base,int reg)1104*4882a593Smuzhiyun static inline int superio_inb(int base, int reg)
1105*4882a593Smuzhiyun {
1106*4882a593Smuzhiyun outb(reg, base);
1107*4882a593Smuzhiyun return inb(base + 1);
1108*4882a593Smuzhiyun }
1109*4882a593Smuzhiyun
superio_inw(int base,int reg)1110*4882a593Smuzhiyun static int superio_inw(int base, int reg)
1111*4882a593Smuzhiyun {
1112*4882a593Smuzhiyun int val;
1113*4882a593Smuzhiyun val = superio_inb(base, reg) << 8;
1114*4882a593Smuzhiyun val |= superio_inb(base, reg + 1);
1115*4882a593Smuzhiyun return val;
1116*4882a593Smuzhiyun }
1117*4882a593Smuzhiyun
superio_enter(int base)1118*4882a593Smuzhiyun static inline int superio_enter(int base)
1119*4882a593Smuzhiyun {
1120*4882a593Smuzhiyun /* Don't step on other drivers' I/O space by accident */
1121*4882a593Smuzhiyun if (!request_muxed_region(base, 2, DRVNAME)) {
1122*4882a593Smuzhiyun pr_err("I/O address 0x%04x already in use\n", base);
1123*4882a593Smuzhiyun return -EBUSY;
1124*4882a593Smuzhiyun }
1125*4882a593Smuzhiyun
1126*4882a593Smuzhiyun /* according to the datasheet the key must be send twice! */
1127*4882a593Smuzhiyun outb(SIO_UNLOCK_KEY, base);
1128*4882a593Smuzhiyun outb(SIO_UNLOCK_KEY, base);
1129*4882a593Smuzhiyun
1130*4882a593Smuzhiyun return 0;
1131*4882a593Smuzhiyun }
1132*4882a593Smuzhiyun
superio_select(int base,int ld)1133*4882a593Smuzhiyun static inline void superio_select(int base, int ld)
1134*4882a593Smuzhiyun {
1135*4882a593Smuzhiyun outb(SIO_REG_LDSEL, base);
1136*4882a593Smuzhiyun outb(ld, base + 1);
1137*4882a593Smuzhiyun }
1138*4882a593Smuzhiyun
superio_exit(int base)1139*4882a593Smuzhiyun static inline void superio_exit(int base)
1140*4882a593Smuzhiyun {
1141*4882a593Smuzhiyun outb(SIO_LOCK_KEY, base);
1142*4882a593Smuzhiyun release_region(base, 2);
1143*4882a593Smuzhiyun }
1144*4882a593Smuzhiyun
fan_from_reg(u16 reg)1145*4882a593Smuzhiyun static inline int fan_from_reg(u16 reg)
1146*4882a593Smuzhiyun {
1147*4882a593Smuzhiyun return reg ? (1500000 / reg) : 0;
1148*4882a593Smuzhiyun }
1149*4882a593Smuzhiyun
fan_to_reg(int fan)1150*4882a593Smuzhiyun static inline u16 fan_to_reg(int fan)
1151*4882a593Smuzhiyun {
1152*4882a593Smuzhiyun return fan ? (1500000 / fan) : 0;
1153*4882a593Smuzhiyun }
1154*4882a593Smuzhiyun
f71882fg_read8(struct f71882fg_data * data,u8 reg)1155*4882a593Smuzhiyun static u8 f71882fg_read8(struct f71882fg_data *data, u8 reg)
1156*4882a593Smuzhiyun {
1157*4882a593Smuzhiyun u8 val;
1158*4882a593Smuzhiyun
1159*4882a593Smuzhiyun outb(reg, data->addr + ADDR_REG_OFFSET);
1160*4882a593Smuzhiyun val = inb(data->addr + DATA_REG_OFFSET);
1161*4882a593Smuzhiyun
1162*4882a593Smuzhiyun return val;
1163*4882a593Smuzhiyun }
1164*4882a593Smuzhiyun
f71882fg_read16(struct f71882fg_data * data,u8 reg)1165*4882a593Smuzhiyun static u16 f71882fg_read16(struct f71882fg_data *data, u8 reg)
1166*4882a593Smuzhiyun {
1167*4882a593Smuzhiyun u16 val;
1168*4882a593Smuzhiyun
1169*4882a593Smuzhiyun val = f71882fg_read8(data, reg) << 8;
1170*4882a593Smuzhiyun val |= f71882fg_read8(data, reg + 1);
1171*4882a593Smuzhiyun
1172*4882a593Smuzhiyun return val;
1173*4882a593Smuzhiyun }
1174*4882a593Smuzhiyun
f71882fg_write8(struct f71882fg_data * data,u8 reg,u8 val)1175*4882a593Smuzhiyun static void f71882fg_write8(struct f71882fg_data *data, u8 reg, u8 val)
1176*4882a593Smuzhiyun {
1177*4882a593Smuzhiyun outb(reg, data->addr + ADDR_REG_OFFSET);
1178*4882a593Smuzhiyun outb(val, data->addr + DATA_REG_OFFSET);
1179*4882a593Smuzhiyun }
1180*4882a593Smuzhiyun
f71882fg_write16(struct f71882fg_data * data,u8 reg,u16 val)1181*4882a593Smuzhiyun static void f71882fg_write16(struct f71882fg_data *data, u8 reg, u16 val)
1182*4882a593Smuzhiyun {
1183*4882a593Smuzhiyun f71882fg_write8(data, reg, val >> 8);
1184*4882a593Smuzhiyun f71882fg_write8(data, reg + 1, val & 0xff);
1185*4882a593Smuzhiyun }
1186*4882a593Smuzhiyun
f71882fg_read_temp(struct f71882fg_data * data,int nr)1187*4882a593Smuzhiyun static u16 f71882fg_read_temp(struct f71882fg_data *data, int nr)
1188*4882a593Smuzhiyun {
1189*4882a593Smuzhiyun if (data->type == f71858fg)
1190*4882a593Smuzhiyun return f71882fg_read16(data, F71882FG_REG_TEMP(nr));
1191*4882a593Smuzhiyun else
1192*4882a593Smuzhiyun return f71882fg_read8(data, F71882FG_REG_TEMP(nr));
1193*4882a593Smuzhiyun }
1194*4882a593Smuzhiyun
f71882fg_update_device(struct device * dev)1195*4882a593Smuzhiyun static struct f71882fg_data *f71882fg_update_device(struct device *dev)
1196*4882a593Smuzhiyun {
1197*4882a593Smuzhiyun struct f71882fg_data *data = dev_get_drvdata(dev);
1198*4882a593Smuzhiyun int nr_fans = f71882fg_nr_fans[data->type];
1199*4882a593Smuzhiyun int nr_temps = f71882fg_nr_temps[data->type];
1200*4882a593Smuzhiyun int nr, reg, point;
1201*4882a593Smuzhiyun
1202*4882a593Smuzhiyun mutex_lock(&data->update_lock);
1203*4882a593Smuzhiyun
1204*4882a593Smuzhiyun /* Update once every 60 seconds */
1205*4882a593Smuzhiyun if (time_after(jiffies, data->last_limits + 60 * HZ) ||
1206*4882a593Smuzhiyun !data->valid) {
1207*4882a593Smuzhiyun if (f71882fg_has_in1_alarm[data->type]) {
1208*4882a593Smuzhiyun if (data->type == f81866a) {
1209*4882a593Smuzhiyun data->in1_max =
1210*4882a593Smuzhiyun f71882fg_read8(data,
1211*4882a593Smuzhiyun F81866_REG_IN1_HIGH);
1212*4882a593Smuzhiyun data->in_beep =
1213*4882a593Smuzhiyun f71882fg_read8(data,
1214*4882a593Smuzhiyun F81866_REG_IN_BEEP);
1215*4882a593Smuzhiyun } else {
1216*4882a593Smuzhiyun data->in1_max =
1217*4882a593Smuzhiyun f71882fg_read8(data,
1218*4882a593Smuzhiyun F71882FG_REG_IN1_HIGH);
1219*4882a593Smuzhiyun data->in_beep =
1220*4882a593Smuzhiyun f71882fg_read8(data,
1221*4882a593Smuzhiyun F71882FG_REG_IN_BEEP);
1222*4882a593Smuzhiyun }
1223*4882a593Smuzhiyun }
1224*4882a593Smuzhiyun
1225*4882a593Smuzhiyun /* Get High & boundary temps*/
1226*4882a593Smuzhiyun for (nr = data->temp_start; nr < nr_temps + data->temp_start;
1227*4882a593Smuzhiyun nr++) {
1228*4882a593Smuzhiyun data->temp_ovt[nr] = f71882fg_read8(data,
1229*4882a593Smuzhiyun F71882FG_REG_TEMP_OVT(nr));
1230*4882a593Smuzhiyun data->temp_high[nr] = f71882fg_read8(data,
1231*4882a593Smuzhiyun F71882FG_REG_TEMP_HIGH(nr));
1232*4882a593Smuzhiyun }
1233*4882a593Smuzhiyun
1234*4882a593Smuzhiyun if (data->type != f8000) {
1235*4882a593Smuzhiyun data->temp_hyst[0] = f71882fg_read8(data,
1236*4882a593Smuzhiyun F71882FG_REG_TEMP_HYST(0));
1237*4882a593Smuzhiyun data->temp_hyst[1] = f71882fg_read8(data,
1238*4882a593Smuzhiyun F71882FG_REG_TEMP_HYST(1));
1239*4882a593Smuzhiyun }
1240*4882a593Smuzhiyun /* All but the f71858fg / f8000 have this register */
1241*4882a593Smuzhiyun if ((data->type != f71858fg) && (data->type != f8000)) {
1242*4882a593Smuzhiyun reg = f71882fg_read8(data, F71882FG_REG_TEMP_TYPE);
1243*4882a593Smuzhiyun data->temp_type[1] = (reg & 0x02) ? 2 : 4;
1244*4882a593Smuzhiyun data->temp_type[2] = (reg & 0x04) ? 2 : 4;
1245*4882a593Smuzhiyun data->temp_type[3] = (reg & 0x08) ? 2 : 4;
1246*4882a593Smuzhiyun }
1247*4882a593Smuzhiyun
1248*4882a593Smuzhiyun if (f71882fg_fan_has_beep[data->type])
1249*4882a593Smuzhiyun data->fan_beep = f71882fg_read8(data,
1250*4882a593Smuzhiyun F71882FG_REG_FAN_BEEP);
1251*4882a593Smuzhiyun
1252*4882a593Smuzhiyun if (f71882fg_temp_has_beep[data->type])
1253*4882a593Smuzhiyun data->temp_beep = f71882fg_read8(data,
1254*4882a593Smuzhiyun F71882FG_REG_TEMP_BEEP);
1255*4882a593Smuzhiyun
1256*4882a593Smuzhiyun data->pwm_enable = f71882fg_read8(data,
1257*4882a593Smuzhiyun F71882FG_REG_PWM_ENABLE);
1258*4882a593Smuzhiyun data->pwm_auto_point_hyst[0] =
1259*4882a593Smuzhiyun f71882fg_read8(data, F71882FG_REG_FAN_HYST(0));
1260*4882a593Smuzhiyun data->pwm_auto_point_hyst[1] =
1261*4882a593Smuzhiyun f71882fg_read8(data, F71882FG_REG_FAN_HYST(1));
1262*4882a593Smuzhiyun
1263*4882a593Smuzhiyun for (nr = 0; nr < nr_fans; nr++) {
1264*4882a593Smuzhiyun data->pwm_auto_point_mapping[nr] =
1265*4882a593Smuzhiyun f71882fg_read8(data,
1266*4882a593Smuzhiyun F71882FG_REG_POINT_MAPPING(nr));
1267*4882a593Smuzhiyun
1268*4882a593Smuzhiyun switch (data->type) {
1269*4882a593Smuzhiyun default:
1270*4882a593Smuzhiyun for (point = 0; point < 5; point++) {
1271*4882a593Smuzhiyun data->pwm_auto_point_pwm[nr][point] =
1272*4882a593Smuzhiyun f71882fg_read8(data,
1273*4882a593Smuzhiyun F71882FG_REG_POINT_PWM
1274*4882a593Smuzhiyun (nr, point));
1275*4882a593Smuzhiyun }
1276*4882a593Smuzhiyun for (point = 0; point < 4; point++) {
1277*4882a593Smuzhiyun data->pwm_auto_point_temp[nr][point] =
1278*4882a593Smuzhiyun f71882fg_read8(data,
1279*4882a593Smuzhiyun F71882FG_REG_POINT_TEMP
1280*4882a593Smuzhiyun (nr, point));
1281*4882a593Smuzhiyun }
1282*4882a593Smuzhiyun break;
1283*4882a593Smuzhiyun case f71808e:
1284*4882a593Smuzhiyun case f71869:
1285*4882a593Smuzhiyun data->pwm_auto_point_pwm[nr][0] =
1286*4882a593Smuzhiyun f71882fg_read8(data,
1287*4882a593Smuzhiyun F71882FG_REG_POINT_PWM(nr, 0));
1288*4882a593Smuzhiyun fallthrough;
1289*4882a593Smuzhiyun case f71862fg:
1290*4882a593Smuzhiyun data->pwm_auto_point_pwm[nr][1] =
1291*4882a593Smuzhiyun f71882fg_read8(data,
1292*4882a593Smuzhiyun F71882FG_REG_POINT_PWM
1293*4882a593Smuzhiyun (nr, 1));
1294*4882a593Smuzhiyun data->pwm_auto_point_pwm[nr][4] =
1295*4882a593Smuzhiyun f71882fg_read8(data,
1296*4882a593Smuzhiyun F71882FG_REG_POINT_PWM
1297*4882a593Smuzhiyun (nr, 4));
1298*4882a593Smuzhiyun data->pwm_auto_point_temp[nr][0] =
1299*4882a593Smuzhiyun f71882fg_read8(data,
1300*4882a593Smuzhiyun F71882FG_REG_POINT_TEMP
1301*4882a593Smuzhiyun (nr, 0));
1302*4882a593Smuzhiyun data->pwm_auto_point_temp[nr][3] =
1303*4882a593Smuzhiyun f71882fg_read8(data,
1304*4882a593Smuzhiyun F71882FG_REG_POINT_TEMP
1305*4882a593Smuzhiyun (nr, 3));
1306*4882a593Smuzhiyun break;
1307*4882a593Smuzhiyun }
1308*4882a593Smuzhiyun }
1309*4882a593Smuzhiyun data->last_limits = jiffies;
1310*4882a593Smuzhiyun }
1311*4882a593Smuzhiyun
1312*4882a593Smuzhiyun /* Update every second */
1313*4882a593Smuzhiyun if (time_after(jiffies, data->last_updated + HZ) || !data->valid) {
1314*4882a593Smuzhiyun data->temp_status = f71882fg_read8(data,
1315*4882a593Smuzhiyun F71882FG_REG_TEMP_STATUS);
1316*4882a593Smuzhiyun data->temp_diode_open = f71882fg_read8(data,
1317*4882a593Smuzhiyun F71882FG_REG_TEMP_DIODE_OPEN);
1318*4882a593Smuzhiyun for (nr = data->temp_start; nr < nr_temps + data->temp_start;
1319*4882a593Smuzhiyun nr++)
1320*4882a593Smuzhiyun data->temp[nr] = f71882fg_read_temp(data, nr);
1321*4882a593Smuzhiyun
1322*4882a593Smuzhiyun data->fan_status = f71882fg_read8(data,
1323*4882a593Smuzhiyun F71882FG_REG_FAN_STATUS);
1324*4882a593Smuzhiyun for (nr = 0; nr < nr_fans; nr++) {
1325*4882a593Smuzhiyun data->fan[nr] = f71882fg_read16(data,
1326*4882a593Smuzhiyun F71882FG_REG_FAN(nr));
1327*4882a593Smuzhiyun data->fan_target[nr] =
1328*4882a593Smuzhiyun f71882fg_read16(data, F71882FG_REG_FAN_TARGET(nr));
1329*4882a593Smuzhiyun data->fan_full_speed[nr] =
1330*4882a593Smuzhiyun f71882fg_read16(data,
1331*4882a593Smuzhiyun F71882FG_REG_FAN_FULL_SPEED(nr));
1332*4882a593Smuzhiyun data->pwm[nr] =
1333*4882a593Smuzhiyun f71882fg_read8(data, F71882FG_REG_PWM(nr));
1334*4882a593Smuzhiyun }
1335*4882a593Smuzhiyun /* Some models have 1 more fan with limited capabilities */
1336*4882a593Smuzhiyun if (data->type == f71808a) {
1337*4882a593Smuzhiyun data->fan[2] = f71882fg_read16(data,
1338*4882a593Smuzhiyun F71882FG_REG_FAN(2));
1339*4882a593Smuzhiyun data->pwm[2] = f71882fg_read8(data,
1340*4882a593Smuzhiyun F71882FG_REG_PWM(2));
1341*4882a593Smuzhiyun }
1342*4882a593Smuzhiyun if (data->type == f8000)
1343*4882a593Smuzhiyun data->fan[3] = f71882fg_read16(data,
1344*4882a593Smuzhiyun F71882FG_REG_FAN(3));
1345*4882a593Smuzhiyun
1346*4882a593Smuzhiyun if (f71882fg_has_in1_alarm[data->type]) {
1347*4882a593Smuzhiyun if (data->type == f81866a)
1348*4882a593Smuzhiyun data->in_status = f71882fg_read8(data,
1349*4882a593Smuzhiyun F81866_REG_IN_STATUS);
1350*4882a593Smuzhiyun
1351*4882a593Smuzhiyun else
1352*4882a593Smuzhiyun data->in_status = f71882fg_read8(data,
1353*4882a593Smuzhiyun F71882FG_REG_IN_STATUS);
1354*4882a593Smuzhiyun }
1355*4882a593Smuzhiyun
1356*4882a593Smuzhiyun for (nr = 0; nr < F71882FG_MAX_INS; nr++)
1357*4882a593Smuzhiyun if (f71882fg_has_in[data->type][nr])
1358*4882a593Smuzhiyun data->in[nr] = f71882fg_read8(data,
1359*4882a593Smuzhiyun F71882FG_REG_IN(nr));
1360*4882a593Smuzhiyun
1361*4882a593Smuzhiyun data->last_updated = jiffies;
1362*4882a593Smuzhiyun data->valid = 1;
1363*4882a593Smuzhiyun }
1364*4882a593Smuzhiyun
1365*4882a593Smuzhiyun mutex_unlock(&data->update_lock);
1366*4882a593Smuzhiyun
1367*4882a593Smuzhiyun return data;
1368*4882a593Smuzhiyun }
1369*4882a593Smuzhiyun
1370*4882a593Smuzhiyun /* Sysfs Interface */
show_fan(struct device * dev,struct device_attribute * devattr,char * buf)1371*4882a593Smuzhiyun static ssize_t show_fan(struct device *dev, struct device_attribute *devattr,
1372*4882a593Smuzhiyun char *buf)
1373*4882a593Smuzhiyun {
1374*4882a593Smuzhiyun struct f71882fg_data *data = f71882fg_update_device(dev);
1375*4882a593Smuzhiyun int nr = to_sensor_dev_attr_2(devattr)->index;
1376*4882a593Smuzhiyun int speed = fan_from_reg(data->fan[nr]);
1377*4882a593Smuzhiyun
1378*4882a593Smuzhiyun if (speed == FAN_MIN_DETECT)
1379*4882a593Smuzhiyun speed = 0;
1380*4882a593Smuzhiyun
1381*4882a593Smuzhiyun return sprintf(buf, "%d\n", speed);
1382*4882a593Smuzhiyun }
1383*4882a593Smuzhiyun
show_fan_full_speed(struct device * dev,struct device_attribute * devattr,char * buf)1384*4882a593Smuzhiyun static ssize_t show_fan_full_speed(struct device *dev,
1385*4882a593Smuzhiyun struct device_attribute *devattr, char *buf)
1386*4882a593Smuzhiyun {
1387*4882a593Smuzhiyun struct f71882fg_data *data = f71882fg_update_device(dev);
1388*4882a593Smuzhiyun int nr = to_sensor_dev_attr_2(devattr)->index;
1389*4882a593Smuzhiyun int speed = fan_from_reg(data->fan_full_speed[nr]);
1390*4882a593Smuzhiyun return sprintf(buf, "%d\n", speed);
1391*4882a593Smuzhiyun }
1392*4882a593Smuzhiyun
store_fan_full_speed(struct device * dev,struct device_attribute * devattr,const char * buf,size_t count)1393*4882a593Smuzhiyun static ssize_t store_fan_full_speed(struct device *dev,
1394*4882a593Smuzhiyun struct device_attribute *devattr,
1395*4882a593Smuzhiyun const char *buf, size_t count)
1396*4882a593Smuzhiyun {
1397*4882a593Smuzhiyun struct f71882fg_data *data = dev_get_drvdata(dev);
1398*4882a593Smuzhiyun int err, nr = to_sensor_dev_attr_2(devattr)->index;
1399*4882a593Smuzhiyun long val;
1400*4882a593Smuzhiyun
1401*4882a593Smuzhiyun err = kstrtol(buf, 10, &val);
1402*4882a593Smuzhiyun if (err)
1403*4882a593Smuzhiyun return err;
1404*4882a593Smuzhiyun
1405*4882a593Smuzhiyun val = clamp_val(val, 23, 1500000);
1406*4882a593Smuzhiyun val = fan_to_reg(val);
1407*4882a593Smuzhiyun
1408*4882a593Smuzhiyun mutex_lock(&data->update_lock);
1409*4882a593Smuzhiyun f71882fg_write16(data, F71882FG_REG_FAN_FULL_SPEED(nr), val);
1410*4882a593Smuzhiyun data->fan_full_speed[nr] = val;
1411*4882a593Smuzhiyun mutex_unlock(&data->update_lock);
1412*4882a593Smuzhiyun
1413*4882a593Smuzhiyun return count;
1414*4882a593Smuzhiyun }
1415*4882a593Smuzhiyun
show_fan_beep(struct device * dev,struct device_attribute * devattr,char * buf)1416*4882a593Smuzhiyun static ssize_t show_fan_beep(struct device *dev, struct device_attribute
1417*4882a593Smuzhiyun *devattr, char *buf)
1418*4882a593Smuzhiyun {
1419*4882a593Smuzhiyun struct f71882fg_data *data = f71882fg_update_device(dev);
1420*4882a593Smuzhiyun int nr = to_sensor_dev_attr_2(devattr)->index;
1421*4882a593Smuzhiyun
1422*4882a593Smuzhiyun if (data->fan_beep & (1 << nr))
1423*4882a593Smuzhiyun return sprintf(buf, "1\n");
1424*4882a593Smuzhiyun else
1425*4882a593Smuzhiyun return sprintf(buf, "0\n");
1426*4882a593Smuzhiyun }
1427*4882a593Smuzhiyun
store_fan_beep(struct device * dev,struct device_attribute * devattr,const char * buf,size_t count)1428*4882a593Smuzhiyun static ssize_t store_fan_beep(struct device *dev, struct device_attribute
1429*4882a593Smuzhiyun *devattr, const char *buf, size_t count)
1430*4882a593Smuzhiyun {
1431*4882a593Smuzhiyun struct f71882fg_data *data = dev_get_drvdata(dev);
1432*4882a593Smuzhiyun int err, nr = to_sensor_dev_attr_2(devattr)->index;
1433*4882a593Smuzhiyun unsigned long val;
1434*4882a593Smuzhiyun
1435*4882a593Smuzhiyun err = kstrtoul(buf, 10, &val);
1436*4882a593Smuzhiyun if (err)
1437*4882a593Smuzhiyun return err;
1438*4882a593Smuzhiyun
1439*4882a593Smuzhiyun mutex_lock(&data->update_lock);
1440*4882a593Smuzhiyun data->fan_beep = f71882fg_read8(data, F71882FG_REG_FAN_BEEP);
1441*4882a593Smuzhiyun if (val)
1442*4882a593Smuzhiyun data->fan_beep |= 1 << nr;
1443*4882a593Smuzhiyun else
1444*4882a593Smuzhiyun data->fan_beep &= ~(1 << nr);
1445*4882a593Smuzhiyun
1446*4882a593Smuzhiyun f71882fg_write8(data, F71882FG_REG_FAN_BEEP, data->fan_beep);
1447*4882a593Smuzhiyun mutex_unlock(&data->update_lock);
1448*4882a593Smuzhiyun
1449*4882a593Smuzhiyun return count;
1450*4882a593Smuzhiyun }
1451*4882a593Smuzhiyun
show_fan_alarm(struct device * dev,struct device_attribute * devattr,char * buf)1452*4882a593Smuzhiyun static ssize_t show_fan_alarm(struct device *dev, struct device_attribute
1453*4882a593Smuzhiyun *devattr, char *buf)
1454*4882a593Smuzhiyun {
1455*4882a593Smuzhiyun struct f71882fg_data *data = f71882fg_update_device(dev);
1456*4882a593Smuzhiyun int nr = to_sensor_dev_attr_2(devattr)->index;
1457*4882a593Smuzhiyun
1458*4882a593Smuzhiyun if (data->fan_status & (1 << nr))
1459*4882a593Smuzhiyun return sprintf(buf, "1\n");
1460*4882a593Smuzhiyun else
1461*4882a593Smuzhiyun return sprintf(buf, "0\n");
1462*4882a593Smuzhiyun }
1463*4882a593Smuzhiyun
show_in(struct device * dev,struct device_attribute * devattr,char * buf)1464*4882a593Smuzhiyun static ssize_t show_in(struct device *dev, struct device_attribute *devattr,
1465*4882a593Smuzhiyun char *buf)
1466*4882a593Smuzhiyun {
1467*4882a593Smuzhiyun struct f71882fg_data *data = f71882fg_update_device(dev);
1468*4882a593Smuzhiyun int nr = to_sensor_dev_attr_2(devattr)->index;
1469*4882a593Smuzhiyun
1470*4882a593Smuzhiyun return sprintf(buf, "%d\n", data->in[nr] * 8);
1471*4882a593Smuzhiyun }
1472*4882a593Smuzhiyun
show_in_max(struct device * dev,struct device_attribute * devattr,char * buf)1473*4882a593Smuzhiyun static ssize_t show_in_max(struct device *dev, struct device_attribute
1474*4882a593Smuzhiyun *devattr, char *buf)
1475*4882a593Smuzhiyun {
1476*4882a593Smuzhiyun struct f71882fg_data *data = f71882fg_update_device(dev);
1477*4882a593Smuzhiyun
1478*4882a593Smuzhiyun return sprintf(buf, "%d\n", data->in1_max * 8);
1479*4882a593Smuzhiyun }
1480*4882a593Smuzhiyun
store_in_max(struct device * dev,struct device_attribute * devattr,const char * buf,size_t count)1481*4882a593Smuzhiyun static ssize_t store_in_max(struct device *dev, struct device_attribute
1482*4882a593Smuzhiyun *devattr, const char *buf, size_t count)
1483*4882a593Smuzhiyun {
1484*4882a593Smuzhiyun struct f71882fg_data *data = dev_get_drvdata(dev);
1485*4882a593Smuzhiyun int err;
1486*4882a593Smuzhiyun long val;
1487*4882a593Smuzhiyun
1488*4882a593Smuzhiyun err = kstrtol(buf, 10, &val);
1489*4882a593Smuzhiyun if (err)
1490*4882a593Smuzhiyun return err;
1491*4882a593Smuzhiyun
1492*4882a593Smuzhiyun val /= 8;
1493*4882a593Smuzhiyun val = clamp_val(val, 0, 255);
1494*4882a593Smuzhiyun
1495*4882a593Smuzhiyun mutex_lock(&data->update_lock);
1496*4882a593Smuzhiyun if (data->type == f81866a)
1497*4882a593Smuzhiyun f71882fg_write8(data, F81866_REG_IN1_HIGH, val);
1498*4882a593Smuzhiyun else
1499*4882a593Smuzhiyun f71882fg_write8(data, F71882FG_REG_IN1_HIGH, val);
1500*4882a593Smuzhiyun data->in1_max = val;
1501*4882a593Smuzhiyun mutex_unlock(&data->update_lock);
1502*4882a593Smuzhiyun
1503*4882a593Smuzhiyun return count;
1504*4882a593Smuzhiyun }
1505*4882a593Smuzhiyun
show_in_beep(struct device * dev,struct device_attribute * devattr,char * buf)1506*4882a593Smuzhiyun static ssize_t show_in_beep(struct device *dev, struct device_attribute
1507*4882a593Smuzhiyun *devattr, char *buf)
1508*4882a593Smuzhiyun {
1509*4882a593Smuzhiyun struct f71882fg_data *data = f71882fg_update_device(dev);
1510*4882a593Smuzhiyun int nr = to_sensor_dev_attr_2(devattr)->index;
1511*4882a593Smuzhiyun
1512*4882a593Smuzhiyun if (data->in_beep & (1 << nr))
1513*4882a593Smuzhiyun return sprintf(buf, "1\n");
1514*4882a593Smuzhiyun else
1515*4882a593Smuzhiyun return sprintf(buf, "0\n");
1516*4882a593Smuzhiyun }
1517*4882a593Smuzhiyun
store_in_beep(struct device * dev,struct device_attribute * devattr,const char * buf,size_t count)1518*4882a593Smuzhiyun static ssize_t store_in_beep(struct device *dev, struct device_attribute
1519*4882a593Smuzhiyun *devattr, const char *buf, size_t count)
1520*4882a593Smuzhiyun {
1521*4882a593Smuzhiyun struct f71882fg_data *data = dev_get_drvdata(dev);
1522*4882a593Smuzhiyun int err, nr = to_sensor_dev_attr_2(devattr)->index;
1523*4882a593Smuzhiyun unsigned long val;
1524*4882a593Smuzhiyun
1525*4882a593Smuzhiyun err = kstrtoul(buf, 10, &val);
1526*4882a593Smuzhiyun if (err)
1527*4882a593Smuzhiyun return err;
1528*4882a593Smuzhiyun
1529*4882a593Smuzhiyun mutex_lock(&data->update_lock);
1530*4882a593Smuzhiyun if (data->type == f81866a)
1531*4882a593Smuzhiyun data->in_beep = f71882fg_read8(data, F81866_REG_IN_BEEP);
1532*4882a593Smuzhiyun else
1533*4882a593Smuzhiyun data->in_beep = f71882fg_read8(data, F71882FG_REG_IN_BEEP);
1534*4882a593Smuzhiyun
1535*4882a593Smuzhiyun if (val)
1536*4882a593Smuzhiyun data->in_beep |= 1 << nr;
1537*4882a593Smuzhiyun else
1538*4882a593Smuzhiyun data->in_beep &= ~(1 << nr);
1539*4882a593Smuzhiyun
1540*4882a593Smuzhiyun if (data->type == f81866a)
1541*4882a593Smuzhiyun f71882fg_write8(data, F81866_REG_IN_BEEP, data->in_beep);
1542*4882a593Smuzhiyun else
1543*4882a593Smuzhiyun f71882fg_write8(data, F71882FG_REG_IN_BEEP, data->in_beep);
1544*4882a593Smuzhiyun mutex_unlock(&data->update_lock);
1545*4882a593Smuzhiyun
1546*4882a593Smuzhiyun return count;
1547*4882a593Smuzhiyun }
1548*4882a593Smuzhiyun
show_in_alarm(struct device * dev,struct device_attribute * devattr,char * buf)1549*4882a593Smuzhiyun static ssize_t show_in_alarm(struct device *dev, struct device_attribute
1550*4882a593Smuzhiyun *devattr, char *buf)
1551*4882a593Smuzhiyun {
1552*4882a593Smuzhiyun struct f71882fg_data *data = f71882fg_update_device(dev);
1553*4882a593Smuzhiyun int nr = to_sensor_dev_attr_2(devattr)->index;
1554*4882a593Smuzhiyun
1555*4882a593Smuzhiyun if (data->in_status & (1 << nr))
1556*4882a593Smuzhiyun return sprintf(buf, "1\n");
1557*4882a593Smuzhiyun else
1558*4882a593Smuzhiyun return sprintf(buf, "0\n");
1559*4882a593Smuzhiyun }
1560*4882a593Smuzhiyun
show_temp(struct device * dev,struct device_attribute * devattr,char * buf)1561*4882a593Smuzhiyun static ssize_t show_temp(struct device *dev, struct device_attribute *devattr,
1562*4882a593Smuzhiyun char *buf)
1563*4882a593Smuzhiyun {
1564*4882a593Smuzhiyun struct f71882fg_data *data = f71882fg_update_device(dev);
1565*4882a593Smuzhiyun int nr = to_sensor_dev_attr_2(devattr)->index;
1566*4882a593Smuzhiyun int sign, temp;
1567*4882a593Smuzhiyun
1568*4882a593Smuzhiyun if (data->type == f71858fg) {
1569*4882a593Smuzhiyun /* TEMP_TABLE_SEL 1 or 3 ? */
1570*4882a593Smuzhiyun if (data->temp_config & 1) {
1571*4882a593Smuzhiyun sign = data->temp[nr] & 0x0001;
1572*4882a593Smuzhiyun temp = (data->temp[nr] >> 5) & 0x7ff;
1573*4882a593Smuzhiyun } else {
1574*4882a593Smuzhiyun sign = data->temp[nr] & 0x8000;
1575*4882a593Smuzhiyun temp = (data->temp[nr] >> 5) & 0x3ff;
1576*4882a593Smuzhiyun }
1577*4882a593Smuzhiyun temp *= 125;
1578*4882a593Smuzhiyun if (sign)
1579*4882a593Smuzhiyun temp -= 128000;
1580*4882a593Smuzhiyun } else {
1581*4882a593Smuzhiyun temp = ((s8)data->temp[nr]) * 1000;
1582*4882a593Smuzhiyun }
1583*4882a593Smuzhiyun
1584*4882a593Smuzhiyun return sprintf(buf, "%d\n", temp);
1585*4882a593Smuzhiyun }
1586*4882a593Smuzhiyun
show_temp_max(struct device * dev,struct device_attribute * devattr,char * buf)1587*4882a593Smuzhiyun static ssize_t show_temp_max(struct device *dev, struct device_attribute
1588*4882a593Smuzhiyun *devattr, char *buf)
1589*4882a593Smuzhiyun {
1590*4882a593Smuzhiyun struct f71882fg_data *data = f71882fg_update_device(dev);
1591*4882a593Smuzhiyun int nr = to_sensor_dev_attr_2(devattr)->index;
1592*4882a593Smuzhiyun
1593*4882a593Smuzhiyun return sprintf(buf, "%d\n", data->temp_high[nr] * 1000);
1594*4882a593Smuzhiyun }
1595*4882a593Smuzhiyun
store_temp_max(struct device * dev,struct device_attribute * devattr,const char * buf,size_t count)1596*4882a593Smuzhiyun static ssize_t store_temp_max(struct device *dev, struct device_attribute
1597*4882a593Smuzhiyun *devattr, const char *buf, size_t count)
1598*4882a593Smuzhiyun {
1599*4882a593Smuzhiyun struct f71882fg_data *data = dev_get_drvdata(dev);
1600*4882a593Smuzhiyun int err, nr = to_sensor_dev_attr_2(devattr)->index;
1601*4882a593Smuzhiyun long val;
1602*4882a593Smuzhiyun
1603*4882a593Smuzhiyun err = kstrtol(buf, 10, &val);
1604*4882a593Smuzhiyun if (err)
1605*4882a593Smuzhiyun return err;
1606*4882a593Smuzhiyun
1607*4882a593Smuzhiyun val /= 1000;
1608*4882a593Smuzhiyun val = clamp_val(val, 0, 255);
1609*4882a593Smuzhiyun
1610*4882a593Smuzhiyun mutex_lock(&data->update_lock);
1611*4882a593Smuzhiyun f71882fg_write8(data, F71882FG_REG_TEMP_HIGH(nr), val);
1612*4882a593Smuzhiyun data->temp_high[nr] = val;
1613*4882a593Smuzhiyun mutex_unlock(&data->update_lock);
1614*4882a593Smuzhiyun
1615*4882a593Smuzhiyun return count;
1616*4882a593Smuzhiyun }
1617*4882a593Smuzhiyun
show_temp_max_hyst(struct device * dev,struct device_attribute * devattr,char * buf)1618*4882a593Smuzhiyun static ssize_t show_temp_max_hyst(struct device *dev, struct device_attribute
1619*4882a593Smuzhiyun *devattr, char *buf)
1620*4882a593Smuzhiyun {
1621*4882a593Smuzhiyun struct f71882fg_data *data = f71882fg_update_device(dev);
1622*4882a593Smuzhiyun int nr = to_sensor_dev_attr_2(devattr)->index;
1623*4882a593Smuzhiyun int temp_max_hyst;
1624*4882a593Smuzhiyun
1625*4882a593Smuzhiyun mutex_lock(&data->update_lock);
1626*4882a593Smuzhiyun if (nr & 1)
1627*4882a593Smuzhiyun temp_max_hyst = data->temp_hyst[nr / 2] >> 4;
1628*4882a593Smuzhiyun else
1629*4882a593Smuzhiyun temp_max_hyst = data->temp_hyst[nr / 2] & 0x0f;
1630*4882a593Smuzhiyun temp_max_hyst = (data->temp_high[nr] - temp_max_hyst) * 1000;
1631*4882a593Smuzhiyun mutex_unlock(&data->update_lock);
1632*4882a593Smuzhiyun
1633*4882a593Smuzhiyun return sprintf(buf, "%d\n", temp_max_hyst);
1634*4882a593Smuzhiyun }
1635*4882a593Smuzhiyun
store_temp_max_hyst(struct device * dev,struct device_attribute * devattr,const char * buf,size_t count)1636*4882a593Smuzhiyun static ssize_t store_temp_max_hyst(struct device *dev, struct device_attribute
1637*4882a593Smuzhiyun *devattr, const char *buf, size_t count)
1638*4882a593Smuzhiyun {
1639*4882a593Smuzhiyun struct f71882fg_data *data = dev_get_drvdata(dev);
1640*4882a593Smuzhiyun int err, nr = to_sensor_dev_attr_2(devattr)->index;
1641*4882a593Smuzhiyun ssize_t ret = count;
1642*4882a593Smuzhiyun u8 reg;
1643*4882a593Smuzhiyun long val;
1644*4882a593Smuzhiyun
1645*4882a593Smuzhiyun err = kstrtol(buf, 10, &val);
1646*4882a593Smuzhiyun if (err)
1647*4882a593Smuzhiyun return err;
1648*4882a593Smuzhiyun
1649*4882a593Smuzhiyun val /= 1000;
1650*4882a593Smuzhiyun
1651*4882a593Smuzhiyun mutex_lock(&data->update_lock);
1652*4882a593Smuzhiyun
1653*4882a593Smuzhiyun /* convert abs to relative and check */
1654*4882a593Smuzhiyun data->temp_high[nr] = f71882fg_read8(data, F71882FG_REG_TEMP_HIGH(nr));
1655*4882a593Smuzhiyun val = clamp_val(val, data->temp_high[nr] - 15, data->temp_high[nr]);
1656*4882a593Smuzhiyun val = data->temp_high[nr] - val;
1657*4882a593Smuzhiyun
1658*4882a593Smuzhiyun /* convert value to register contents */
1659*4882a593Smuzhiyun reg = f71882fg_read8(data, F71882FG_REG_TEMP_HYST(nr / 2));
1660*4882a593Smuzhiyun if (nr & 1)
1661*4882a593Smuzhiyun reg = (reg & 0x0f) | (val << 4);
1662*4882a593Smuzhiyun else
1663*4882a593Smuzhiyun reg = (reg & 0xf0) | val;
1664*4882a593Smuzhiyun f71882fg_write8(data, F71882FG_REG_TEMP_HYST(nr / 2), reg);
1665*4882a593Smuzhiyun data->temp_hyst[nr / 2] = reg;
1666*4882a593Smuzhiyun
1667*4882a593Smuzhiyun mutex_unlock(&data->update_lock);
1668*4882a593Smuzhiyun return ret;
1669*4882a593Smuzhiyun }
1670*4882a593Smuzhiyun
show_temp_crit(struct device * dev,struct device_attribute * devattr,char * buf)1671*4882a593Smuzhiyun static ssize_t show_temp_crit(struct device *dev, struct device_attribute
1672*4882a593Smuzhiyun *devattr, char *buf)
1673*4882a593Smuzhiyun {
1674*4882a593Smuzhiyun struct f71882fg_data *data = f71882fg_update_device(dev);
1675*4882a593Smuzhiyun int nr = to_sensor_dev_attr_2(devattr)->index;
1676*4882a593Smuzhiyun
1677*4882a593Smuzhiyun return sprintf(buf, "%d\n", data->temp_ovt[nr] * 1000);
1678*4882a593Smuzhiyun }
1679*4882a593Smuzhiyun
store_temp_crit(struct device * dev,struct device_attribute * devattr,const char * buf,size_t count)1680*4882a593Smuzhiyun static ssize_t store_temp_crit(struct device *dev, struct device_attribute
1681*4882a593Smuzhiyun *devattr, const char *buf, size_t count)
1682*4882a593Smuzhiyun {
1683*4882a593Smuzhiyun struct f71882fg_data *data = dev_get_drvdata(dev);
1684*4882a593Smuzhiyun int err, nr = to_sensor_dev_attr_2(devattr)->index;
1685*4882a593Smuzhiyun long val;
1686*4882a593Smuzhiyun
1687*4882a593Smuzhiyun err = kstrtol(buf, 10, &val);
1688*4882a593Smuzhiyun if (err)
1689*4882a593Smuzhiyun return err;
1690*4882a593Smuzhiyun
1691*4882a593Smuzhiyun val /= 1000;
1692*4882a593Smuzhiyun val = clamp_val(val, 0, 255);
1693*4882a593Smuzhiyun
1694*4882a593Smuzhiyun mutex_lock(&data->update_lock);
1695*4882a593Smuzhiyun f71882fg_write8(data, F71882FG_REG_TEMP_OVT(nr), val);
1696*4882a593Smuzhiyun data->temp_ovt[nr] = val;
1697*4882a593Smuzhiyun mutex_unlock(&data->update_lock);
1698*4882a593Smuzhiyun
1699*4882a593Smuzhiyun return count;
1700*4882a593Smuzhiyun }
1701*4882a593Smuzhiyun
show_temp_crit_hyst(struct device * dev,struct device_attribute * devattr,char * buf)1702*4882a593Smuzhiyun static ssize_t show_temp_crit_hyst(struct device *dev, struct device_attribute
1703*4882a593Smuzhiyun *devattr, char *buf)
1704*4882a593Smuzhiyun {
1705*4882a593Smuzhiyun struct f71882fg_data *data = f71882fg_update_device(dev);
1706*4882a593Smuzhiyun int nr = to_sensor_dev_attr_2(devattr)->index;
1707*4882a593Smuzhiyun int temp_crit_hyst;
1708*4882a593Smuzhiyun
1709*4882a593Smuzhiyun mutex_lock(&data->update_lock);
1710*4882a593Smuzhiyun if (nr & 1)
1711*4882a593Smuzhiyun temp_crit_hyst = data->temp_hyst[nr / 2] >> 4;
1712*4882a593Smuzhiyun else
1713*4882a593Smuzhiyun temp_crit_hyst = data->temp_hyst[nr / 2] & 0x0f;
1714*4882a593Smuzhiyun temp_crit_hyst = (data->temp_ovt[nr] - temp_crit_hyst) * 1000;
1715*4882a593Smuzhiyun mutex_unlock(&data->update_lock);
1716*4882a593Smuzhiyun
1717*4882a593Smuzhiyun return sprintf(buf, "%d\n", temp_crit_hyst);
1718*4882a593Smuzhiyun }
1719*4882a593Smuzhiyun
show_temp_type(struct device * dev,struct device_attribute * devattr,char * buf)1720*4882a593Smuzhiyun static ssize_t show_temp_type(struct device *dev, struct device_attribute
1721*4882a593Smuzhiyun *devattr, char *buf)
1722*4882a593Smuzhiyun {
1723*4882a593Smuzhiyun struct f71882fg_data *data = f71882fg_update_device(dev);
1724*4882a593Smuzhiyun int nr = to_sensor_dev_attr_2(devattr)->index;
1725*4882a593Smuzhiyun
1726*4882a593Smuzhiyun return sprintf(buf, "%d\n", data->temp_type[nr]);
1727*4882a593Smuzhiyun }
1728*4882a593Smuzhiyun
show_temp_beep(struct device * dev,struct device_attribute * devattr,char * buf)1729*4882a593Smuzhiyun static ssize_t show_temp_beep(struct device *dev, struct device_attribute
1730*4882a593Smuzhiyun *devattr, char *buf)
1731*4882a593Smuzhiyun {
1732*4882a593Smuzhiyun struct f71882fg_data *data = f71882fg_update_device(dev);
1733*4882a593Smuzhiyun int nr = to_sensor_dev_attr_2(devattr)->index;
1734*4882a593Smuzhiyun
1735*4882a593Smuzhiyun if (data->temp_beep & (1 << nr))
1736*4882a593Smuzhiyun return sprintf(buf, "1\n");
1737*4882a593Smuzhiyun else
1738*4882a593Smuzhiyun return sprintf(buf, "0\n");
1739*4882a593Smuzhiyun }
1740*4882a593Smuzhiyun
store_temp_beep(struct device * dev,struct device_attribute * devattr,const char * buf,size_t count)1741*4882a593Smuzhiyun static ssize_t store_temp_beep(struct device *dev, struct device_attribute
1742*4882a593Smuzhiyun *devattr, const char *buf, size_t count)
1743*4882a593Smuzhiyun {
1744*4882a593Smuzhiyun struct f71882fg_data *data = dev_get_drvdata(dev);
1745*4882a593Smuzhiyun int err, nr = to_sensor_dev_attr_2(devattr)->index;
1746*4882a593Smuzhiyun unsigned long val;
1747*4882a593Smuzhiyun
1748*4882a593Smuzhiyun err = kstrtoul(buf, 10, &val);
1749*4882a593Smuzhiyun if (err)
1750*4882a593Smuzhiyun return err;
1751*4882a593Smuzhiyun
1752*4882a593Smuzhiyun mutex_lock(&data->update_lock);
1753*4882a593Smuzhiyun data->temp_beep = f71882fg_read8(data, F71882FG_REG_TEMP_BEEP);
1754*4882a593Smuzhiyun if (val)
1755*4882a593Smuzhiyun data->temp_beep |= 1 << nr;
1756*4882a593Smuzhiyun else
1757*4882a593Smuzhiyun data->temp_beep &= ~(1 << nr);
1758*4882a593Smuzhiyun
1759*4882a593Smuzhiyun f71882fg_write8(data, F71882FG_REG_TEMP_BEEP, data->temp_beep);
1760*4882a593Smuzhiyun mutex_unlock(&data->update_lock);
1761*4882a593Smuzhiyun
1762*4882a593Smuzhiyun return count;
1763*4882a593Smuzhiyun }
1764*4882a593Smuzhiyun
show_temp_alarm(struct device * dev,struct device_attribute * devattr,char * buf)1765*4882a593Smuzhiyun static ssize_t show_temp_alarm(struct device *dev, struct device_attribute
1766*4882a593Smuzhiyun *devattr, char *buf)
1767*4882a593Smuzhiyun {
1768*4882a593Smuzhiyun struct f71882fg_data *data = f71882fg_update_device(dev);
1769*4882a593Smuzhiyun int nr = to_sensor_dev_attr_2(devattr)->index;
1770*4882a593Smuzhiyun
1771*4882a593Smuzhiyun if (data->temp_status & (1 << nr))
1772*4882a593Smuzhiyun return sprintf(buf, "1\n");
1773*4882a593Smuzhiyun else
1774*4882a593Smuzhiyun return sprintf(buf, "0\n");
1775*4882a593Smuzhiyun }
1776*4882a593Smuzhiyun
show_temp_fault(struct device * dev,struct device_attribute * devattr,char * buf)1777*4882a593Smuzhiyun static ssize_t show_temp_fault(struct device *dev, struct device_attribute
1778*4882a593Smuzhiyun *devattr, char *buf)
1779*4882a593Smuzhiyun {
1780*4882a593Smuzhiyun struct f71882fg_data *data = f71882fg_update_device(dev);
1781*4882a593Smuzhiyun int nr = to_sensor_dev_attr_2(devattr)->index;
1782*4882a593Smuzhiyun
1783*4882a593Smuzhiyun if (data->temp_diode_open & (1 << nr))
1784*4882a593Smuzhiyun return sprintf(buf, "1\n");
1785*4882a593Smuzhiyun else
1786*4882a593Smuzhiyun return sprintf(buf, "0\n");
1787*4882a593Smuzhiyun }
1788*4882a593Smuzhiyun
show_pwm(struct device * dev,struct device_attribute * devattr,char * buf)1789*4882a593Smuzhiyun static ssize_t show_pwm(struct device *dev,
1790*4882a593Smuzhiyun struct device_attribute *devattr, char *buf)
1791*4882a593Smuzhiyun {
1792*4882a593Smuzhiyun struct f71882fg_data *data = f71882fg_update_device(dev);
1793*4882a593Smuzhiyun int val, nr = to_sensor_dev_attr_2(devattr)->index;
1794*4882a593Smuzhiyun mutex_lock(&data->update_lock);
1795*4882a593Smuzhiyun if (data->pwm_enable & (1 << (2 * nr)))
1796*4882a593Smuzhiyun /* PWM mode */
1797*4882a593Smuzhiyun val = data->pwm[nr];
1798*4882a593Smuzhiyun else {
1799*4882a593Smuzhiyun /* RPM mode */
1800*4882a593Smuzhiyun val = 255 * fan_from_reg(data->fan_target[nr])
1801*4882a593Smuzhiyun / fan_from_reg(data->fan_full_speed[nr]);
1802*4882a593Smuzhiyun }
1803*4882a593Smuzhiyun mutex_unlock(&data->update_lock);
1804*4882a593Smuzhiyun return sprintf(buf, "%d\n", val);
1805*4882a593Smuzhiyun }
1806*4882a593Smuzhiyun
store_pwm(struct device * dev,struct device_attribute * devattr,const char * buf,size_t count)1807*4882a593Smuzhiyun static ssize_t store_pwm(struct device *dev,
1808*4882a593Smuzhiyun struct device_attribute *devattr, const char *buf,
1809*4882a593Smuzhiyun size_t count)
1810*4882a593Smuzhiyun {
1811*4882a593Smuzhiyun struct f71882fg_data *data = dev_get_drvdata(dev);
1812*4882a593Smuzhiyun int err, nr = to_sensor_dev_attr_2(devattr)->index;
1813*4882a593Smuzhiyun long val;
1814*4882a593Smuzhiyun
1815*4882a593Smuzhiyun err = kstrtol(buf, 10, &val);
1816*4882a593Smuzhiyun if (err)
1817*4882a593Smuzhiyun return err;
1818*4882a593Smuzhiyun
1819*4882a593Smuzhiyun val = clamp_val(val, 0, 255);
1820*4882a593Smuzhiyun
1821*4882a593Smuzhiyun mutex_lock(&data->update_lock);
1822*4882a593Smuzhiyun data->pwm_enable = f71882fg_read8(data, F71882FG_REG_PWM_ENABLE);
1823*4882a593Smuzhiyun if ((data->type == f8000 && ((data->pwm_enable >> 2 * nr) & 3) != 2) ||
1824*4882a593Smuzhiyun (data->type != f8000 && !((data->pwm_enable >> 2 * nr) & 2))) {
1825*4882a593Smuzhiyun count = -EROFS;
1826*4882a593Smuzhiyun goto leave;
1827*4882a593Smuzhiyun }
1828*4882a593Smuzhiyun if (data->pwm_enable & (1 << (2 * nr))) {
1829*4882a593Smuzhiyun /* PWM mode */
1830*4882a593Smuzhiyun f71882fg_write8(data, F71882FG_REG_PWM(nr), val);
1831*4882a593Smuzhiyun data->pwm[nr] = val;
1832*4882a593Smuzhiyun } else {
1833*4882a593Smuzhiyun /* RPM mode */
1834*4882a593Smuzhiyun int target, full_speed;
1835*4882a593Smuzhiyun full_speed = f71882fg_read16(data,
1836*4882a593Smuzhiyun F71882FG_REG_FAN_FULL_SPEED(nr));
1837*4882a593Smuzhiyun target = fan_to_reg(val * fan_from_reg(full_speed) / 255);
1838*4882a593Smuzhiyun f71882fg_write16(data, F71882FG_REG_FAN_TARGET(nr), target);
1839*4882a593Smuzhiyun data->fan_target[nr] = target;
1840*4882a593Smuzhiyun data->fan_full_speed[nr] = full_speed;
1841*4882a593Smuzhiyun }
1842*4882a593Smuzhiyun leave:
1843*4882a593Smuzhiyun mutex_unlock(&data->update_lock);
1844*4882a593Smuzhiyun
1845*4882a593Smuzhiyun return count;
1846*4882a593Smuzhiyun }
1847*4882a593Smuzhiyun
show_simple_pwm(struct device * dev,struct device_attribute * devattr,char * buf)1848*4882a593Smuzhiyun static ssize_t show_simple_pwm(struct device *dev,
1849*4882a593Smuzhiyun struct device_attribute *devattr, char *buf)
1850*4882a593Smuzhiyun {
1851*4882a593Smuzhiyun struct f71882fg_data *data = f71882fg_update_device(dev);
1852*4882a593Smuzhiyun int val, nr = to_sensor_dev_attr_2(devattr)->index;
1853*4882a593Smuzhiyun
1854*4882a593Smuzhiyun val = data->pwm[nr];
1855*4882a593Smuzhiyun return sprintf(buf, "%d\n", val);
1856*4882a593Smuzhiyun }
1857*4882a593Smuzhiyun
store_simple_pwm(struct device * dev,struct device_attribute * devattr,const char * buf,size_t count)1858*4882a593Smuzhiyun static ssize_t store_simple_pwm(struct device *dev,
1859*4882a593Smuzhiyun struct device_attribute *devattr,
1860*4882a593Smuzhiyun const char *buf, size_t count)
1861*4882a593Smuzhiyun {
1862*4882a593Smuzhiyun struct f71882fg_data *data = dev_get_drvdata(dev);
1863*4882a593Smuzhiyun int err, nr = to_sensor_dev_attr_2(devattr)->index;
1864*4882a593Smuzhiyun long val;
1865*4882a593Smuzhiyun
1866*4882a593Smuzhiyun err = kstrtol(buf, 10, &val);
1867*4882a593Smuzhiyun if (err)
1868*4882a593Smuzhiyun return err;
1869*4882a593Smuzhiyun
1870*4882a593Smuzhiyun val = clamp_val(val, 0, 255);
1871*4882a593Smuzhiyun
1872*4882a593Smuzhiyun mutex_lock(&data->update_lock);
1873*4882a593Smuzhiyun f71882fg_write8(data, F71882FG_REG_PWM(nr), val);
1874*4882a593Smuzhiyun data->pwm[nr] = val;
1875*4882a593Smuzhiyun mutex_unlock(&data->update_lock);
1876*4882a593Smuzhiyun
1877*4882a593Smuzhiyun return count;
1878*4882a593Smuzhiyun }
1879*4882a593Smuzhiyun
show_pwm_enable(struct device * dev,struct device_attribute * devattr,char * buf)1880*4882a593Smuzhiyun static ssize_t show_pwm_enable(struct device *dev,
1881*4882a593Smuzhiyun struct device_attribute *devattr, char *buf)
1882*4882a593Smuzhiyun {
1883*4882a593Smuzhiyun int result = 0;
1884*4882a593Smuzhiyun struct f71882fg_data *data = f71882fg_update_device(dev);
1885*4882a593Smuzhiyun int nr = to_sensor_dev_attr_2(devattr)->index;
1886*4882a593Smuzhiyun
1887*4882a593Smuzhiyun switch ((data->pwm_enable >> 2 * nr) & 3) {
1888*4882a593Smuzhiyun case 0:
1889*4882a593Smuzhiyun case 1:
1890*4882a593Smuzhiyun result = 2; /* Normal auto mode */
1891*4882a593Smuzhiyun break;
1892*4882a593Smuzhiyun case 2:
1893*4882a593Smuzhiyun result = 1; /* Manual mode */
1894*4882a593Smuzhiyun break;
1895*4882a593Smuzhiyun case 3:
1896*4882a593Smuzhiyun if (data->type == f8000)
1897*4882a593Smuzhiyun result = 3; /* Thermostat mode */
1898*4882a593Smuzhiyun else
1899*4882a593Smuzhiyun result = 1; /* Manual mode */
1900*4882a593Smuzhiyun break;
1901*4882a593Smuzhiyun }
1902*4882a593Smuzhiyun
1903*4882a593Smuzhiyun return sprintf(buf, "%d\n", result);
1904*4882a593Smuzhiyun }
1905*4882a593Smuzhiyun
store_pwm_enable(struct device * dev,struct device_attribute * devattr,const char * buf,size_t count)1906*4882a593Smuzhiyun static ssize_t store_pwm_enable(struct device *dev, struct device_attribute
1907*4882a593Smuzhiyun *devattr, const char *buf, size_t count)
1908*4882a593Smuzhiyun {
1909*4882a593Smuzhiyun struct f71882fg_data *data = dev_get_drvdata(dev);
1910*4882a593Smuzhiyun int err, nr = to_sensor_dev_attr_2(devattr)->index;
1911*4882a593Smuzhiyun long val;
1912*4882a593Smuzhiyun
1913*4882a593Smuzhiyun err = kstrtol(buf, 10, &val);
1914*4882a593Smuzhiyun if (err)
1915*4882a593Smuzhiyun return err;
1916*4882a593Smuzhiyun
1917*4882a593Smuzhiyun /* Special case for F8000 pwm channel 3 which only does auto mode */
1918*4882a593Smuzhiyun if (data->type == f8000 && nr == 2 && val != 2)
1919*4882a593Smuzhiyun return -EINVAL;
1920*4882a593Smuzhiyun
1921*4882a593Smuzhiyun mutex_lock(&data->update_lock);
1922*4882a593Smuzhiyun data->pwm_enable = f71882fg_read8(data, F71882FG_REG_PWM_ENABLE);
1923*4882a593Smuzhiyun /* Special case for F8000 auto PWM mode / Thermostat mode */
1924*4882a593Smuzhiyun if (data->type == f8000 && ((data->pwm_enable >> 2 * nr) & 1)) {
1925*4882a593Smuzhiyun switch (val) {
1926*4882a593Smuzhiyun case 2:
1927*4882a593Smuzhiyun data->pwm_enable &= ~(2 << (2 * nr));
1928*4882a593Smuzhiyun break; /* Normal auto mode */
1929*4882a593Smuzhiyun case 3:
1930*4882a593Smuzhiyun data->pwm_enable |= 2 << (2 * nr);
1931*4882a593Smuzhiyun break; /* Thermostat mode */
1932*4882a593Smuzhiyun default:
1933*4882a593Smuzhiyun count = -EINVAL;
1934*4882a593Smuzhiyun goto leave;
1935*4882a593Smuzhiyun }
1936*4882a593Smuzhiyun } else {
1937*4882a593Smuzhiyun switch (val) {
1938*4882a593Smuzhiyun case 1:
1939*4882a593Smuzhiyun /* The f71858fg does not support manual RPM mode */
1940*4882a593Smuzhiyun if (data->type == f71858fg &&
1941*4882a593Smuzhiyun ((data->pwm_enable >> (2 * nr)) & 1)) {
1942*4882a593Smuzhiyun count = -EINVAL;
1943*4882a593Smuzhiyun goto leave;
1944*4882a593Smuzhiyun }
1945*4882a593Smuzhiyun data->pwm_enable |= 2 << (2 * nr);
1946*4882a593Smuzhiyun break; /* Manual */
1947*4882a593Smuzhiyun case 2:
1948*4882a593Smuzhiyun data->pwm_enable &= ~(2 << (2 * nr));
1949*4882a593Smuzhiyun break; /* Normal auto mode */
1950*4882a593Smuzhiyun default:
1951*4882a593Smuzhiyun count = -EINVAL;
1952*4882a593Smuzhiyun goto leave;
1953*4882a593Smuzhiyun }
1954*4882a593Smuzhiyun }
1955*4882a593Smuzhiyun f71882fg_write8(data, F71882FG_REG_PWM_ENABLE, data->pwm_enable);
1956*4882a593Smuzhiyun leave:
1957*4882a593Smuzhiyun mutex_unlock(&data->update_lock);
1958*4882a593Smuzhiyun
1959*4882a593Smuzhiyun return count;
1960*4882a593Smuzhiyun }
1961*4882a593Smuzhiyun
show_pwm_auto_point_pwm(struct device * dev,struct device_attribute * devattr,char * buf)1962*4882a593Smuzhiyun static ssize_t show_pwm_auto_point_pwm(struct device *dev,
1963*4882a593Smuzhiyun struct device_attribute *devattr,
1964*4882a593Smuzhiyun char *buf)
1965*4882a593Smuzhiyun {
1966*4882a593Smuzhiyun int result;
1967*4882a593Smuzhiyun struct f71882fg_data *data = f71882fg_update_device(dev);
1968*4882a593Smuzhiyun int pwm = to_sensor_dev_attr_2(devattr)->index;
1969*4882a593Smuzhiyun int point = to_sensor_dev_attr_2(devattr)->nr;
1970*4882a593Smuzhiyun
1971*4882a593Smuzhiyun mutex_lock(&data->update_lock);
1972*4882a593Smuzhiyun if (data->pwm_enable & (1 << (2 * pwm))) {
1973*4882a593Smuzhiyun /* PWM mode */
1974*4882a593Smuzhiyun result = data->pwm_auto_point_pwm[pwm][point];
1975*4882a593Smuzhiyun } else {
1976*4882a593Smuzhiyun /* RPM mode */
1977*4882a593Smuzhiyun result = 32 * 255 / (32 + data->pwm_auto_point_pwm[pwm][point]);
1978*4882a593Smuzhiyun }
1979*4882a593Smuzhiyun mutex_unlock(&data->update_lock);
1980*4882a593Smuzhiyun
1981*4882a593Smuzhiyun return sprintf(buf, "%d\n", result);
1982*4882a593Smuzhiyun }
1983*4882a593Smuzhiyun
store_pwm_auto_point_pwm(struct device * dev,struct device_attribute * devattr,const char * buf,size_t count)1984*4882a593Smuzhiyun static ssize_t store_pwm_auto_point_pwm(struct device *dev,
1985*4882a593Smuzhiyun struct device_attribute *devattr,
1986*4882a593Smuzhiyun const char *buf, size_t count)
1987*4882a593Smuzhiyun {
1988*4882a593Smuzhiyun struct f71882fg_data *data = dev_get_drvdata(dev);
1989*4882a593Smuzhiyun int err, pwm = to_sensor_dev_attr_2(devattr)->index;
1990*4882a593Smuzhiyun int point = to_sensor_dev_attr_2(devattr)->nr;
1991*4882a593Smuzhiyun long val;
1992*4882a593Smuzhiyun
1993*4882a593Smuzhiyun err = kstrtol(buf, 10, &val);
1994*4882a593Smuzhiyun if (err)
1995*4882a593Smuzhiyun return err;
1996*4882a593Smuzhiyun
1997*4882a593Smuzhiyun val = clamp_val(val, 0, 255);
1998*4882a593Smuzhiyun
1999*4882a593Smuzhiyun mutex_lock(&data->update_lock);
2000*4882a593Smuzhiyun data->pwm_enable = f71882fg_read8(data, F71882FG_REG_PWM_ENABLE);
2001*4882a593Smuzhiyun if (data->pwm_enable & (1 << (2 * pwm))) {
2002*4882a593Smuzhiyun /* PWM mode */
2003*4882a593Smuzhiyun } else {
2004*4882a593Smuzhiyun /* RPM mode */
2005*4882a593Smuzhiyun if (val < 29) /* Prevent negative numbers */
2006*4882a593Smuzhiyun val = 255;
2007*4882a593Smuzhiyun else
2008*4882a593Smuzhiyun val = (255 - val) * 32 / val;
2009*4882a593Smuzhiyun }
2010*4882a593Smuzhiyun f71882fg_write8(data, F71882FG_REG_POINT_PWM(pwm, point), val);
2011*4882a593Smuzhiyun data->pwm_auto_point_pwm[pwm][point] = val;
2012*4882a593Smuzhiyun mutex_unlock(&data->update_lock);
2013*4882a593Smuzhiyun
2014*4882a593Smuzhiyun return count;
2015*4882a593Smuzhiyun }
2016*4882a593Smuzhiyun
show_pwm_auto_point_temp_hyst(struct device * dev,struct device_attribute * devattr,char * buf)2017*4882a593Smuzhiyun static ssize_t show_pwm_auto_point_temp_hyst(struct device *dev,
2018*4882a593Smuzhiyun struct device_attribute *devattr,
2019*4882a593Smuzhiyun char *buf)
2020*4882a593Smuzhiyun {
2021*4882a593Smuzhiyun int result = 0;
2022*4882a593Smuzhiyun struct f71882fg_data *data = f71882fg_update_device(dev);
2023*4882a593Smuzhiyun int nr = to_sensor_dev_attr_2(devattr)->index;
2024*4882a593Smuzhiyun int point = to_sensor_dev_attr_2(devattr)->nr;
2025*4882a593Smuzhiyun
2026*4882a593Smuzhiyun mutex_lock(&data->update_lock);
2027*4882a593Smuzhiyun if (nr & 1)
2028*4882a593Smuzhiyun result = data->pwm_auto_point_hyst[nr / 2] >> 4;
2029*4882a593Smuzhiyun else
2030*4882a593Smuzhiyun result = data->pwm_auto_point_hyst[nr / 2] & 0x0f;
2031*4882a593Smuzhiyun result = 1000 * (data->pwm_auto_point_temp[nr][point] - result);
2032*4882a593Smuzhiyun mutex_unlock(&data->update_lock);
2033*4882a593Smuzhiyun
2034*4882a593Smuzhiyun return sprintf(buf, "%d\n", result);
2035*4882a593Smuzhiyun }
2036*4882a593Smuzhiyun
store_pwm_auto_point_temp_hyst(struct device * dev,struct device_attribute * devattr,const char * buf,size_t count)2037*4882a593Smuzhiyun static ssize_t store_pwm_auto_point_temp_hyst(struct device *dev,
2038*4882a593Smuzhiyun struct device_attribute *devattr,
2039*4882a593Smuzhiyun const char *buf, size_t count)
2040*4882a593Smuzhiyun {
2041*4882a593Smuzhiyun struct f71882fg_data *data = dev_get_drvdata(dev);
2042*4882a593Smuzhiyun int err, nr = to_sensor_dev_attr_2(devattr)->index;
2043*4882a593Smuzhiyun int point = to_sensor_dev_attr_2(devattr)->nr;
2044*4882a593Smuzhiyun u8 reg;
2045*4882a593Smuzhiyun long val;
2046*4882a593Smuzhiyun
2047*4882a593Smuzhiyun err = kstrtol(buf, 10, &val);
2048*4882a593Smuzhiyun if (err)
2049*4882a593Smuzhiyun return err;
2050*4882a593Smuzhiyun
2051*4882a593Smuzhiyun val /= 1000;
2052*4882a593Smuzhiyun
2053*4882a593Smuzhiyun mutex_lock(&data->update_lock);
2054*4882a593Smuzhiyun data->pwm_auto_point_temp[nr][point] =
2055*4882a593Smuzhiyun f71882fg_read8(data, F71882FG_REG_POINT_TEMP(nr, point));
2056*4882a593Smuzhiyun val = clamp_val(val, data->pwm_auto_point_temp[nr][point] - 15,
2057*4882a593Smuzhiyun data->pwm_auto_point_temp[nr][point]);
2058*4882a593Smuzhiyun val = data->pwm_auto_point_temp[nr][point] - val;
2059*4882a593Smuzhiyun
2060*4882a593Smuzhiyun reg = f71882fg_read8(data, F71882FG_REG_FAN_HYST(nr / 2));
2061*4882a593Smuzhiyun if (nr & 1)
2062*4882a593Smuzhiyun reg = (reg & 0x0f) | (val << 4);
2063*4882a593Smuzhiyun else
2064*4882a593Smuzhiyun reg = (reg & 0xf0) | val;
2065*4882a593Smuzhiyun
2066*4882a593Smuzhiyun f71882fg_write8(data, F71882FG_REG_FAN_HYST(nr / 2), reg);
2067*4882a593Smuzhiyun data->pwm_auto_point_hyst[nr / 2] = reg;
2068*4882a593Smuzhiyun mutex_unlock(&data->update_lock);
2069*4882a593Smuzhiyun
2070*4882a593Smuzhiyun return count;
2071*4882a593Smuzhiyun }
2072*4882a593Smuzhiyun
show_pwm_interpolate(struct device * dev,struct device_attribute * devattr,char * buf)2073*4882a593Smuzhiyun static ssize_t show_pwm_interpolate(struct device *dev,
2074*4882a593Smuzhiyun struct device_attribute *devattr, char *buf)
2075*4882a593Smuzhiyun {
2076*4882a593Smuzhiyun int result;
2077*4882a593Smuzhiyun struct f71882fg_data *data = f71882fg_update_device(dev);
2078*4882a593Smuzhiyun int nr = to_sensor_dev_attr_2(devattr)->index;
2079*4882a593Smuzhiyun
2080*4882a593Smuzhiyun result = (data->pwm_auto_point_mapping[nr] >> 4) & 1;
2081*4882a593Smuzhiyun
2082*4882a593Smuzhiyun return sprintf(buf, "%d\n", result);
2083*4882a593Smuzhiyun }
2084*4882a593Smuzhiyun
store_pwm_interpolate(struct device * dev,struct device_attribute * devattr,const char * buf,size_t count)2085*4882a593Smuzhiyun static ssize_t store_pwm_interpolate(struct device *dev,
2086*4882a593Smuzhiyun struct device_attribute *devattr,
2087*4882a593Smuzhiyun const char *buf, size_t count)
2088*4882a593Smuzhiyun {
2089*4882a593Smuzhiyun struct f71882fg_data *data = dev_get_drvdata(dev);
2090*4882a593Smuzhiyun int err, nr = to_sensor_dev_attr_2(devattr)->index;
2091*4882a593Smuzhiyun unsigned long val;
2092*4882a593Smuzhiyun
2093*4882a593Smuzhiyun err = kstrtoul(buf, 10, &val);
2094*4882a593Smuzhiyun if (err)
2095*4882a593Smuzhiyun return err;
2096*4882a593Smuzhiyun
2097*4882a593Smuzhiyun mutex_lock(&data->update_lock);
2098*4882a593Smuzhiyun data->pwm_auto_point_mapping[nr] =
2099*4882a593Smuzhiyun f71882fg_read8(data, F71882FG_REG_POINT_MAPPING(nr));
2100*4882a593Smuzhiyun if (val)
2101*4882a593Smuzhiyun val = data->pwm_auto_point_mapping[nr] | (1 << 4);
2102*4882a593Smuzhiyun else
2103*4882a593Smuzhiyun val = data->pwm_auto_point_mapping[nr] & (~(1 << 4));
2104*4882a593Smuzhiyun f71882fg_write8(data, F71882FG_REG_POINT_MAPPING(nr), val);
2105*4882a593Smuzhiyun data->pwm_auto_point_mapping[nr] = val;
2106*4882a593Smuzhiyun mutex_unlock(&data->update_lock);
2107*4882a593Smuzhiyun
2108*4882a593Smuzhiyun return count;
2109*4882a593Smuzhiyun }
2110*4882a593Smuzhiyun
show_pwm_auto_point_channel(struct device * dev,struct device_attribute * devattr,char * buf)2111*4882a593Smuzhiyun static ssize_t show_pwm_auto_point_channel(struct device *dev,
2112*4882a593Smuzhiyun struct device_attribute *devattr,
2113*4882a593Smuzhiyun char *buf)
2114*4882a593Smuzhiyun {
2115*4882a593Smuzhiyun int result;
2116*4882a593Smuzhiyun struct f71882fg_data *data = f71882fg_update_device(dev);
2117*4882a593Smuzhiyun int nr = to_sensor_dev_attr_2(devattr)->index;
2118*4882a593Smuzhiyun
2119*4882a593Smuzhiyun result = 1 << ((data->pwm_auto_point_mapping[nr] & 3) -
2120*4882a593Smuzhiyun data->temp_start);
2121*4882a593Smuzhiyun
2122*4882a593Smuzhiyun return sprintf(buf, "%d\n", result);
2123*4882a593Smuzhiyun }
2124*4882a593Smuzhiyun
store_pwm_auto_point_channel(struct device * dev,struct device_attribute * devattr,const char * buf,size_t count)2125*4882a593Smuzhiyun static ssize_t store_pwm_auto_point_channel(struct device *dev,
2126*4882a593Smuzhiyun struct device_attribute *devattr,
2127*4882a593Smuzhiyun const char *buf, size_t count)
2128*4882a593Smuzhiyun {
2129*4882a593Smuzhiyun struct f71882fg_data *data = dev_get_drvdata(dev);
2130*4882a593Smuzhiyun int err, nr = to_sensor_dev_attr_2(devattr)->index;
2131*4882a593Smuzhiyun long val;
2132*4882a593Smuzhiyun
2133*4882a593Smuzhiyun err = kstrtol(buf, 10, &val);
2134*4882a593Smuzhiyun if (err)
2135*4882a593Smuzhiyun return err;
2136*4882a593Smuzhiyun
2137*4882a593Smuzhiyun switch (val) {
2138*4882a593Smuzhiyun case 1:
2139*4882a593Smuzhiyun val = 0;
2140*4882a593Smuzhiyun break;
2141*4882a593Smuzhiyun case 2:
2142*4882a593Smuzhiyun val = 1;
2143*4882a593Smuzhiyun break;
2144*4882a593Smuzhiyun case 4:
2145*4882a593Smuzhiyun val = 2;
2146*4882a593Smuzhiyun break;
2147*4882a593Smuzhiyun default:
2148*4882a593Smuzhiyun return -EINVAL;
2149*4882a593Smuzhiyun }
2150*4882a593Smuzhiyun val += data->temp_start;
2151*4882a593Smuzhiyun mutex_lock(&data->update_lock);
2152*4882a593Smuzhiyun data->pwm_auto_point_mapping[nr] =
2153*4882a593Smuzhiyun f71882fg_read8(data, F71882FG_REG_POINT_MAPPING(nr));
2154*4882a593Smuzhiyun val = (data->pwm_auto_point_mapping[nr] & 0xfc) | val;
2155*4882a593Smuzhiyun f71882fg_write8(data, F71882FG_REG_POINT_MAPPING(nr), val);
2156*4882a593Smuzhiyun data->pwm_auto_point_mapping[nr] = val;
2157*4882a593Smuzhiyun mutex_unlock(&data->update_lock);
2158*4882a593Smuzhiyun
2159*4882a593Smuzhiyun return count;
2160*4882a593Smuzhiyun }
2161*4882a593Smuzhiyun
show_pwm_auto_point_temp(struct device * dev,struct device_attribute * devattr,char * buf)2162*4882a593Smuzhiyun static ssize_t show_pwm_auto_point_temp(struct device *dev,
2163*4882a593Smuzhiyun struct device_attribute *devattr,
2164*4882a593Smuzhiyun char *buf)
2165*4882a593Smuzhiyun {
2166*4882a593Smuzhiyun int result;
2167*4882a593Smuzhiyun struct f71882fg_data *data = f71882fg_update_device(dev);
2168*4882a593Smuzhiyun int pwm = to_sensor_dev_attr_2(devattr)->index;
2169*4882a593Smuzhiyun int point = to_sensor_dev_attr_2(devattr)->nr;
2170*4882a593Smuzhiyun
2171*4882a593Smuzhiyun result = data->pwm_auto_point_temp[pwm][point];
2172*4882a593Smuzhiyun return sprintf(buf, "%d\n", 1000 * result);
2173*4882a593Smuzhiyun }
2174*4882a593Smuzhiyun
store_pwm_auto_point_temp(struct device * dev,struct device_attribute * devattr,const char * buf,size_t count)2175*4882a593Smuzhiyun static ssize_t store_pwm_auto_point_temp(struct device *dev,
2176*4882a593Smuzhiyun struct device_attribute *devattr,
2177*4882a593Smuzhiyun const char *buf, size_t count)
2178*4882a593Smuzhiyun {
2179*4882a593Smuzhiyun struct f71882fg_data *data = dev_get_drvdata(dev);
2180*4882a593Smuzhiyun int err, pwm = to_sensor_dev_attr_2(devattr)->index;
2181*4882a593Smuzhiyun int point = to_sensor_dev_attr_2(devattr)->nr;
2182*4882a593Smuzhiyun long val;
2183*4882a593Smuzhiyun
2184*4882a593Smuzhiyun err = kstrtol(buf, 10, &val);
2185*4882a593Smuzhiyun if (err)
2186*4882a593Smuzhiyun return err;
2187*4882a593Smuzhiyun
2188*4882a593Smuzhiyun val /= 1000;
2189*4882a593Smuzhiyun
2190*4882a593Smuzhiyun if (data->auto_point_temp_signed)
2191*4882a593Smuzhiyun val = clamp_val(val, -128, 127);
2192*4882a593Smuzhiyun else
2193*4882a593Smuzhiyun val = clamp_val(val, 0, 127);
2194*4882a593Smuzhiyun
2195*4882a593Smuzhiyun mutex_lock(&data->update_lock);
2196*4882a593Smuzhiyun f71882fg_write8(data, F71882FG_REG_POINT_TEMP(pwm, point), val);
2197*4882a593Smuzhiyun data->pwm_auto_point_temp[pwm][point] = val;
2198*4882a593Smuzhiyun mutex_unlock(&data->update_lock);
2199*4882a593Smuzhiyun
2200*4882a593Smuzhiyun return count;
2201*4882a593Smuzhiyun }
2202*4882a593Smuzhiyun
name_show(struct device * dev,struct device_attribute * devattr,char * buf)2203*4882a593Smuzhiyun static ssize_t name_show(struct device *dev, struct device_attribute *devattr,
2204*4882a593Smuzhiyun char *buf)
2205*4882a593Smuzhiyun {
2206*4882a593Smuzhiyun struct f71882fg_data *data = dev_get_drvdata(dev);
2207*4882a593Smuzhiyun return sprintf(buf, "%s\n", f71882fg_names[data->type]);
2208*4882a593Smuzhiyun }
2209*4882a593Smuzhiyun
f71882fg_create_sysfs_files(struct platform_device * pdev,struct sensor_device_attribute_2 * attr,int count)2210*4882a593Smuzhiyun static int f71882fg_create_sysfs_files(struct platform_device *pdev,
2211*4882a593Smuzhiyun struct sensor_device_attribute_2 *attr, int count)
2212*4882a593Smuzhiyun {
2213*4882a593Smuzhiyun int err, i;
2214*4882a593Smuzhiyun
2215*4882a593Smuzhiyun for (i = 0; i < count; i++) {
2216*4882a593Smuzhiyun err = device_create_file(&pdev->dev, &attr[i].dev_attr);
2217*4882a593Smuzhiyun if (err)
2218*4882a593Smuzhiyun return err;
2219*4882a593Smuzhiyun }
2220*4882a593Smuzhiyun return 0;
2221*4882a593Smuzhiyun }
2222*4882a593Smuzhiyun
f71882fg_remove_sysfs_files(struct platform_device * pdev,struct sensor_device_attribute_2 * attr,int count)2223*4882a593Smuzhiyun static void f71882fg_remove_sysfs_files(struct platform_device *pdev,
2224*4882a593Smuzhiyun struct sensor_device_attribute_2 *attr, int count)
2225*4882a593Smuzhiyun {
2226*4882a593Smuzhiyun int i;
2227*4882a593Smuzhiyun
2228*4882a593Smuzhiyun for (i = 0; i < count; i++)
2229*4882a593Smuzhiyun device_remove_file(&pdev->dev, &attr[i].dev_attr);
2230*4882a593Smuzhiyun }
2231*4882a593Smuzhiyun
f71882fg_create_fan_sysfs_files(struct platform_device * pdev,int idx)2232*4882a593Smuzhiyun static int f71882fg_create_fan_sysfs_files(
2233*4882a593Smuzhiyun struct platform_device *pdev, int idx)
2234*4882a593Smuzhiyun {
2235*4882a593Smuzhiyun struct f71882fg_data *data = platform_get_drvdata(pdev);
2236*4882a593Smuzhiyun int err;
2237*4882a593Smuzhiyun
2238*4882a593Smuzhiyun /* Sanity check the pwm setting */
2239*4882a593Smuzhiyun err = 0;
2240*4882a593Smuzhiyun switch (data->type) {
2241*4882a593Smuzhiyun case f71858fg:
2242*4882a593Smuzhiyun if (((data->pwm_enable >> (idx * 2)) & 3) == 3)
2243*4882a593Smuzhiyun err = 1;
2244*4882a593Smuzhiyun break;
2245*4882a593Smuzhiyun case f71862fg:
2246*4882a593Smuzhiyun if (((data->pwm_enable >> (idx * 2)) & 1) != 1)
2247*4882a593Smuzhiyun err = 1;
2248*4882a593Smuzhiyun break;
2249*4882a593Smuzhiyun case f8000:
2250*4882a593Smuzhiyun if (idx == 2)
2251*4882a593Smuzhiyun err = data->pwm_enable & 0x20;
2252*4882a593Smuzhiyun break;
2253*4882a593Smuzhiyun default:
2254*4882a593Smuzhiyun break;
2255*4882a593Smuzhiyun }
2256*4882a593Smuzhiyun if (err) {
2257*4882a593Smuzhiyun dev_err(&pdev->dev,
2258*4882a593Smuzhiyun "Invalid (reserved) pwm settings: 0x%02x, "
2259*4882a593Smuzhiyun "skipping fan %d\n",
2260*4882a593Smuzhiyun (data->pwm_enable >> (idx * 2)) & 3, idx + 1);
2261*4882a593Smuzhiyun return 0; /* This is a non fatal condition */
2262*4882a593Smuzhiyun }
2263*4882a593Smuzhiyun
2264*4882a593Smuzhiyun err = f71882fg_create_sysfs_files(pdev, &fxxxx_fan_attr[idx][0],
2265*4882a593Smuzhiyun ARRAY_SIZE(fxxxx_fan_attr[0]));
2266*4882a593Smuzhiyun if (err)
2267*4882a593Smuzhiyun return err;
2268*4882a593Smuzhiyun
2269*4882a593Smuzhiyun if (f71882fg_fan_has_beep[data->type]) {
2270*4882a593Smuzhiyun err = f71882fg_create_sysfs_files(pdev,
2271*4882a593Smuzhiyun &fxxxx_fan_beep_attr[idx],
2272*4882a593Smuzhiyun 1);
2273*4882a593Smuzhiyun if (err)
2274*4882a593Smuzhiyun return err;
2275*4882a593Smuzhiyun }
2276*4882a593Smuzhiyun
2277*4882a593Smuzhiyun dev_info(&pdev->dev, "Fan: %d is in %s mode\n", idx + 1,
2278*4882a593Smuzhiyun (data->pwm_enable & (1 << (2 * idx))) ? "duty-cycle" : "RPM");
2279*4882a593Smuzhiyun
2280*4882a593Smuzhiyun /* Check for unsupported auto pwm settings */
2281*4882a593Smuzhiyun switch (data->type) {
2282*4882a593Smuzhiyun case f71808e:
2283*4882a593Smuzhiyun case f71808a:
2284*4882a593Smuzhiyun case f71869:
2285*4882a593Smuzhiyun case f71869a:
2286*4882a593Smuzhiyun case f71889fg:
2287*4882a593Smuzhiyun case f71889ed:
2288*4882a593Smuzhiyun case f71889a:
2289*4882a593Smuzhiyun data->pwm_auto_point_mapping[idx] =
2290*4882a593Smuzhiyun f71882fg_read8(data, F71882FG_REG_POINT_MAPPING(idx));
2291*4882a593Smuzhiyun if ((data->pwm_auto_point_mapping[idx] & 0x80) ||
2292*4882a593Smuzhiyun (data->pwm_auto_point_mapping[idx] & 3) == 0) {
2293*4882a593Smuzhiyun dev_warn(&pdev->dev,
2294*4882a593Smuzhiyun "Auto pwm controlled by raw digital "
2295*4882a593Smuzhiyun "data, disabling pwm auto_point "
2296*4882a593Smuzhiyun "sysfs attributes for fan %d\n", idx + 1);
2297*4882a593Smuzhiyun return 0; /* This is a non fatal condition */
2298*4882a593Smuzhiyun }
2299*4882a593Smuzhiyun break;
2300*4882a593Smuzhiyun default:
2301*4882a593Smuzhiyun break;
2302*4882a593Smuzhiyun }
2303*4882a593Smuzhiyun
2304*4882a593Smuzhiyun switch (data->type) {
2305*4882a593Smuzhiyun case f71862fg:
2306*4882a593Smuzhiyun err = f71882fg_create_sysfs_files(pdev,
2307*4882a593Smuzhiyun &f71862fg_auto_pwm_attr[idx][0],
2308*4882a593Smuzhiyun ARRAY_SIZE(f71862fg_auto_pwm_attr[0]));
2309*4882a593Smuzhiyun break;
2310*4882a593Smuzhiyun case f71808e:
2311*4882a593Smuzhiyun case f71869:
2312*4882a593Smuzhiyun err = f71882fg_create_sysfs_files(pdev,
2313*4882a593Smuzhiyun &f71869_auto_pwm_attr[idx][0],
2314*4882a593Smuzhiyun ARRAY_SIZE(f71869_auto_pwm_attr[0]));
2315*4882a593Smuzhiyun break;
2316*4882a593Smuzhiyun case f8000:
2317*4882a593Smuzhiyun err = f71882fg_create_sysfs_files(pdev,
2318*4882a593Smuzhiyun &f8000_auto_pwm_attr[idx][0],
2319*4882a593Smuzhiyun ARRAY_SIZE(f8000_auto_pwm_attr[0]));
2320*4882a593Smuzhiyun break;
2321*4882a593Smuzhiyun default:
2322*4882a593Smuzhiyun err = f71882fg_create_sysfs_files(pdev,
2323*4882a593Smuzhiyun &fxxxx_auto_pwm_attr[idx][0],
2324*4882a593Smuzhiyun ARRAY_SIZE(fxxxx_auto_pwm_attr[0]));
2325*4882a593Smuzhiyun }
2326*4882a593Smuzhiyun
2327*4882a593Smuzhiyun return err;
2328*4882a593Smuzhiyun }
2329*4882a593Smuzhiyun
f71882fg_probe(struct platform_device * pdev)2330*4882a593Smuzhiyun static int f71882fg_probe(struct platform_device *pdev)
2331*4882a593Smuzhiyun {
2332*4882a593Smuzhiyun struct f71882fg_data *data;
2333*4882a593Smuzhiyun struct f71882fg_sio_data *sio_data = dev_get_platdata(&pdev->dev);
2334*4882a593Smuzhiyun int nr_fans = f71882fg_nr_fans[sio_data->type];
2335*4882a593Smuzhiyun int nr_temps = f71882fg_nr_temps[sio_data->type];
2336*4882a593Smuzhiyun int err, i;
2337*4882a593Smuzhiyun int size;
2338*4882a593Smuzhiyun u8 start_reg, reg;
2339*4882a593Smuzhiyun
2340*4882a593Smuzhiyun data = devm_kzalloc(&pdev->dev, sizeof(struct f71882fg_data),
2341*4882a593Smuzhiyun GFP_KERNEL);
2342*4882a593Smuzhiyun if (!data)
2343*4882a593Smuzhiyun return -ENOMEM;
2344*4882a593Smuzhiyun
2345*4882a593Smuzhiyun data->addr = platform_get_resource(pdev, IORESOURCE_IO, 0)->start;
2346*4882a593Smuzhiyun data->type = sio_data->type;
2347*4882a593Smuzhiyun data->temp_start =
2348*4882a593Smuzhiyun (data->type == f71858fg || data->type == f8000 ||
2349*4882a593Smuzhiyun data->type == f81866a) ? 0 : 1;
2350*4882a593Smuzhiyun mutex_init(&data->update_lock);
2351*4882a593Smuzhiyun platform_set_drvdata(pdev, data);
2352*4882a593Smuzhiyun
2353*4882a593Smuzhiyun start_reg = f71882fg_read8(data, F71882FG_REG_START);
2354*4882a593Smuzhiyun if (start_reg & 0x04) {
2355*4882a593Smuzhiyun dev_warn(&pdev->dev, "Hardware monitor is powered down\n");
2356*4882a593Smuzhiyun return -ENODEV;
2357*4882a593Smuzhiyun }
2358*4882a593Smuzhiyun if (!(start_reg & 0x03)) {
2359*4882a593Smuzhiyun dev_warn(&pdev->dev, "Hardware monitoring not activated\n");
2360*4882a593Smuzhiyun return -ENODEV;
2361*4882a593Smuzhiyun }
2362*4882a593Smuzhiyun
2363*4882a593Smuzhiyun /* Register sysfs interface files */
2364*4882a593Smuzhiyun err = device_create_file(&pdev->dev, &dev_attr_name);
2365*4882a593Smuzhiyun if (err)
2366*4882a593Smuzhiyun goto exit_unregister_sysfs;
2367*4882a593Smuzhiyun
2368*4882a593Smuzhiyun if (start_reg & 0x01) {
2369*4882a593Smuzhiyun switch (data->type) {
2370*4882a593Smuzhiyun case f71858fg:
2371*4882a593Smuzhiyun data->temp_config =
2372*4882a593Smuzhiyun f71882fg_read8(data, F71882FG_REG_TEMP_CONFIG);
2373*4882a593Smuzhiyun if (data->temp_config & 0x10)
2374*4882a593Smuzhiyun /*
2375*4882a593Smuzhiyun * The f71858fg temperature alarms behave as
2376*4882a593Smuzhiyun * the f8000 alarms in this mode
2377*4882a593Smuzhiyun */
2378*4882a593Smuzhiyun err = f71882fg_create_sysfs_files(pdev,
2379*4882a593Smuzhiyun f8000_temp_attr,
2380*4882a593Smuzhiyun ARRAY_SIZE(f8000_temp_attr));
2381*4882a593Smuzhiyun else
2382*4882a593Smuzhiyun err = f71882fg_create_sysfs_files(pdev,
2383*4882a593Smuzhiyun f71858fg_temp_attr,
2384*4882a593Smuzhiyun ARRAY_SIZE(f71858fg_temp_attr));
2385*4882a593Smuzhiyun break;
2386*4882a593Smuzhiyun case f8000:
2387*4882a593Smuzhiyun err = f71882fg_create_sysfs_files(pdev,
2388*4882a593Smuzhiyun f8000_temp_attr,
2389*4882a593Smuzhiyun ARRAY_SIZE(f8000_temp_attr));
2390*4882a593Smuzhiyun break;
2391*4882a593Smuzhiyun case f81866a:
2392*4882a593Smuzhiyun err = f71882fg_create_sysfs_files(pdev,
2393*4882a593Smuzhiyun f71858fg_temp_attr,
2394*4882a593Smuzhiyun ARRAY_SIZE(f71858fg_temp_attr));
2395*4882a593Smuzhiyun break;
2396*4882a593Smuzhiyun default:
2397*4882a593Smuzhiyun err = f71882fg_create_sysfs_files(pdev,
2398*4882a593Smuzhiyun &fxxxx_temp_attr[0][0],
2399*4882a593Smuzhiyun ARRAY_SIZE(fxxxx_temp_attr[0]) * nr_temps);
2400*4882a593Smuzhiyun }
2401*4882a593Smuzhiyun if (err)
2402*4882a593Smuzhiyun goto exit_unregister_sysfs;
2403*4882a593Smuzhiyun
2404*4882a593Smuzhiyun if (f71882fg_temp_has_beep[data->type]) {
2405*4882a593Smuzhiyun if (data->type == f81866a) {
2406*4882a593Smuzhiyun size = ARRAY_SIZE(f81866_temp_beep_attr[0]);
2407*4882a593Smuzhiyun err = f71882fg_create_sysfs_files(pdev,
2408*4882a593Smuzhiyun &f81866_temp_beep_attr[0][0],
2409*4882a593Smuzhiyun size * nr_temps);
2410*4882a593Smuzhiyun
2411*4882a593Smuzhiyun } else {
2412*4882a593Smuzhiyun size = ARRAY_SIZE(fxxxx_temp_beep_attr[0]);
2413*4882a593Smuzhiyun err = f71882fg_create_sysfs_files(pdev,
2414*4882a593Smuzhiyun &fxxxx_temp_beep_attr[0][0],
2415*4882a593Smuzhiyun size * nr_temps);
2416*4882a593Smuzhiyun }
2417*4882a593Smuzhiyun if (err)
2418*4882a593Smuzhiyun goto exit_unregister_sysfs;
2419*4882a593Smuzhiyun }
2420*4882a593Smuzhiyun
2421*4882a593Smuzhiyun for (i = 0; i < F71882FG_MAX_INS; i++) {
2422*4882a593Smuzhiyun if (f71882fg_has_in[data->type][i]) {
2423*4882a593Smuzhiyun err = device_create_file(&pdev->dev,
2424*4882a593Smuzhiyun &fxxxx_in_attr[i].dev_attr);
2425*4882a593Smuzhiyun if (err)
2426*4882a593Smuzhiyun goto exit_unregister_sysfs;
2427*4882a593Smuzhiyun }
2428*4882a593Smuzhiyun }
2429*4882a593Smuzhiyun if (f71882fg_has_in1_alarm[data->type]) {
2430*4882a593Smuzhiyun err = f71882fg_create_sysfs_files(pdev,
2431*4882a593Smuzhiyun fxxxx_in1_alarm_attr,
2432*4882a593Smuzhiyun ARRAY_SIZE(fxxxx_in1_alarm_attr));
2433*4882a593Smuzhiyun if (err)
2434*4882a593Smuzhiyun goto exit_unregister_sysfs;
2435*4882a593Smuzhiyun }
2436*4882a593Smuzhiyun }
2437*4882a593Smuzhiyun
2438*4882a593Smuzhiyun if (start_reg & 0x02) {
2439*4882a593Smuzhiyun switch (data->type) {
2440*4882a593Smuzhiyun case f71808e:
2441*4882a593Smuzhiyun case f71808a:
2442*4882a593Smuzhiyun case f71869:
2443*4882a593Smuzhiyun case f71869a:
2444*4882a593Smuzhiyun /* These always have signed auto point temps */
2445*4882a593Smuzhiyun data->auto_point_temp_signed = 1;
2446*4882a593Smuzhiyun fallthrough; /* to select correct fan/pwm reg bank! */
2447*4882a593Smuzhiyun case f71889fg:
2448*4882a593Smuzhiyun case f71889ed:
2449*4882a593Smuzhiyun case f71889a:
2450*4882a593Smuzhiyun reg = f71882fg_read8(data, F71882FG_REG_FAN_FAULT_T);
2451*4882a593Smuzhiyun if (reg & F71882FG_FAN_NEG_TEMP_EN)
2452*4882a593Smuzhiyun data->auto_point_temp_signed = 1;
2453*4882a593Smuzhiyun /* Ensure banked pwm registers point to right bank */
2454*4882a593Smuzhiyun reg &= ~F71882FG_FAN_PROG_SEL;
2455*4882a593Smuzhiyun f71882fg_write8(data, F71882FG_REG_FAN_FAULT_T, reg);
2456*4882a593Smuzhiyun break;
2457*4882a593Smuzhiyun default:
2458*4882a593Smuzhiyun break;
2459*4882a593Smuzhiyun }
2460*4882a593Smuzhiyun
2461*4882a593Smuzhiyun data->pwm_enable =
2462*4882a593Smuzhiyun f71882fg_read8(data, F71882FG_REG_PWM_ENABLE);
2463*4882a593Smuzhiyun
2464*4882a593Smuzhiyun for (i = 0; i < nr_fans; i++) {
2465*4882a593Smuzhiyun err = f71882fg_create_fan_sysfs_files(pdev, i);
2466*4882a593Smuzhiyun if (err)
2467*4882a593Smuzhiyun goto exit_unregister_sysfs;
2468*4882a593Smuzhiyun }
2469*4882a593Smuzhiyun
2470*4882a593Smuzhiyun /* Some types have 1 extra fan with limited functionality */
2471*4882a593Smuzhiyun switch (data->type) {
2472*4882a593Smuzhiyun case f71808a:
2473*4882a593Smuzhiyun err = f71882fg_create_sysfs_files(pdev,
2474*4882a593Smuzhiyun f71808a_fan3_attr,
2475*4882a593Smuzhiyun ARRAY_SIZE(f71808a_fan3_attr));
2476*4882a593Smuzhiyun break;
2477*4882a593Smuzhiyun case f8000:
2478*4882a593Smuzhiyun err = f71882fg_create_sysfs_files(pdev,
2479*4882a593Smuzhiyun f8000_fan_attr,
2480*4882a593Smuzhiyun ARRAY_SIZE(f8000_fan_attr));
2481*4882a593Smuzhiyun break;
2482*4882a593Smuzhiyun default:
2483*4882a593Smuzhiyun break;
2484*4882a593Smuzhiyun }
2485*4882a593Smuzhiyun if (err)
2486*4882a593Smuzhiyun goto exit_unregister_sysfs;
2487*4882a593Smuzhiyun }
2488*4882a593Smuzhiyun
2489*4882a593Smuzhiyun data->hwmon_dev = hwmon_device_register(&pdev->dev);
2490*4882a593Smuzhiyun if (IS_ERR(data->hwmon_dev)) {
2491*4882a593Smuzhiyun err = PTR_ERR(data->hwmon_dev);
2492*4882a593Smuzhiyun data->hwmon_dev = NULL;
2493*4882a593Smuzhiyun goto exit_unregister_sysfs;
2494*4882a593Smuzhiyun }
2495*4882a593Smuzhiyun
2496*4882a593Smuzhiyun return 0;
2497*4882a593Smuzhiyun
2498*4882a593Smuzhiyun exit_unregister_sysfs:
2499*4882a593Smuzhiyun f71882fg_remove(pdev); /* Will unregister the sysfs files for us */
2500*4882a593Smuzhiyun return err; /* f71882fg_remove() also frees our data */
2501*4882a593Smuzhiyun }
2502*4882a593Smuzhiyun
f71882fg_remove(struct platform_device * pdev)2503*4882a593Smuzhiyun static int f71882fg_remove(struct platform_device *pdev)
2504*4882a593Smuzhiyun {
2505*4882a593Smuzhiyun struct f71882fg_data *data = platform_get_drvdata(pdev);
2506*4882a593Smuzhiyun int nr_fans = f71882fg_nr_fans[data->type];
2507*4882a593Smuzhiyun int nr_temps = f71882fg_nr_temps[data->type];
2508*4882a593Smuzhiyun int i;
2509*4882a593Smuzhiyun u8 start_reg = f71882fg_read8(data, F71882FG_REG_START);
2510*4882a593Smuzhiyun
2511*4882a593Smuzhiyun if (data->hwmon_dev)
2512*4882a593Smuzhiyun hwmon_device_unregister(data->hwmon_dev);
2513*4882a593Smuzhiyun
2514*4882a593Smuzhiyun device_remove_file(&pdev->dev, &dev_attr_name);
2515*4882a593Smuzhiyun
2516*4882a593Smuzhiyun if (start_reg & 0x01) {
2517*4882a593Smuzhiyun switch (data->type) {
2518*4882a593Smuzhiyun case f71858fg:
2519*4882a593Smuzhiyun if (data->temp_config & 0x10)
2520*4882a593Smuzhiyun f71882fg_remove_sysfs_files(pdev,
2521*4882a593Smuzhiyun f8000_temp_attr,
2522*4882a593Smuzhiyun ARRAY_SIZE(f8000_temp_attr));
2523*4882a593Smuzhiyun else
2524*4882a593Smuzhiyun f71882fg_remove_sysfs_files(pdev,
2525*4882a593Smuzhiyun f71858fg_temp_attr,
2526*4882a593Smuzhiyun ARRAY_SIZE(f71858fg_temp_attr));
2527*4882a593Smuzhiyun break;
2528*4882a593Smuzhiyun case f8000:
2529*4882a593Smuzhiyun f71882fg_remove_sysfs_files(pdev,
2530*4882a593Smuzhiyun f8000_temp_attr,
2531*4882a593Smuzhiyun ARRAY_SIZE(f8000_temp_attr));
2532*4882a593Smuzhiyun break;
2533*4882a593Smuzhiyun case f81866a:
2534*4882a593Smuzhiyun f71882fg_remove_sysfs_files(pdev,
2535*4882a593Smuzhiyun f71858fg_temp_attr,
2536*4882a593Smuzhiyun ARRAY_SIZE(f71858fg_temp_attr));
2537*4882a593Smuzhiyun break;
2538*4882a593Smuzhiyun default:
2539*4882a593Smuzhiyun f71882fg_remove_sysfs_files(pdev,
2540*4882a593Smuzhiyun &fxxxx_temp_attr[0][0],
2541*4882a593Smuzhiyun ARRAY_SIZE(fxxxx_temp_attr[0]) * nr_temps);
2542*4882a593Smuzhiyun }
2543*4882a593Smuzhiyun if (f71882fg_temp_has_beep[data->type]) {
2544*4882a593Smuzhiyun if (data->type == f81866a)
2545*4882a593Smuzhiyun f71882fg_remove_sysfs_files(pdev,
2546*4882a593Smuzhiyun &f81866_temp_beep_attr[0][0],
2547*4882a593Smuzhiyun ARRAY_SIZE(f81866_temp_beep_attr[0])
2548*4882a593Smuzhiyun * nr_temps);
2549*4882a593Smuzhiyun else
2550*4882a593Smuzhiyun f71882fg_remove_sysfs_files(pdev,
2551*4882a593Smuzhiyun &fxxxx_temp_beep_attr[0][0],
2552*4882a593Smuzhiyun ARRAY_SIZE(fxxxx_temp_beep_attr[0])
2553*4882a593Smuzhiyun * nr_temps);
2554*4882a593Smuzhiyun }
2555*4882a593Smuzhiyun
2556*4882a593Smuzhiyun for (i = 0; i < F71882FG_MAX_INS; i++) {
2557*4882a593Smuzhiyun if (f71882fg_has_in[data->type][i]) {
2558*4882a593Smuzhiyun device_remove_file(&pdev->dev,
2559*4882a593Smuzhiyun &fxxxx_in_attr[i].dev_attr);
2560*4882a593Smuzhiyun }
2561*4882a593Smuzhiyun }
2562*4882a593Smuzhiyun if (f71882fg_has_in1_alarm[data->type]) {
2563*4882a593Smuzhiyun f71882fg_remove_sysfs_files(pdev,
2564*4882a593Smuzhiyun fxxxx_in1_alarm_attr,
2565*4882a593Smuzhiyun ARRAY_SIZE(fxxxx_in1_alarm_attr));
2566*4882a593Smuzhiyun }
2567*4882a593Smuzhiyun }
2568*4882a593Smuzhiyun
2569*4882a593Smuzhiyun if (start_reg & 0x02) {
2570*4882a593Smuzhiyun f71882fg_remove_sysfs_files(pdev, &fxxxx_fan_attr[0][0],
2571*4882a593Smuzhiyun ARRAY_SIZE(fxxxx_fan_attr[0]) * nr_fans);
2572*4882a593Smuzhiyun
2573*4882a593Smuzhiyun if (f71882fg_fan_has_beep[data->type]) {
2574*4882a593Smuzhiyun f71882fg_remove_sysfs_files(pdev,
2575*4882a593Smuzhiyun fxxxx_fan_beep_attr, nr_fans);
2576*4882a593Smuzhiyun }
2577*4882a593Smuzhiyun
2578*4882a593Smuzhiyun switch (data->type) {
2579*4882a593Smuzhiyun case f71808a:
2580*4882a593Smuzhiyun f71882fg_remove_sysfs_files(pdev,
2581*4882a593Smuzhiyun &fxxxx_auto_pwm_attr[0][0],
2582*4882a593Smuzhiyun ARRAY_SIZE(fxxxx_auto_pwm_attr[0]) * nr_fans);
2583*4882a593Smuzhiyun f71882fg_remove_sysfs_files(pdev,
2584*4882a593Smuzhiyun f71808a_fan3_attr,
2585*4882a593Smuzhiyun ARRAY_SIZE(f71808a_fan3_attr));
2586*4882a593Smuzhiyun break;
2587*4882a593Smuzhiyun case f71862fg:
2588*4882a593Smuzhiyun f71882fg_remove_sysfs_files(pdev,
2589*4882a593Smuzhiyun &f71862fg_auto_pwm_attr[0][0],
2590*4882a593Smuzhiyun ARRAY_SIZE(f71862fg_auto_pwm_attr[0]) *
2591*4882a593Smuzhiyun nr_fans);
2592*4882a593Smuzhiyun break;
2593*4882a593Smuzhiyun case f71808e:
2594*4882a593Smuzhiyun case f71869:
2595*4882a593Smuzhiyun f71882fg_remove_sysfs_files(pdev,
2596*4882a593Smuzhiyun &f71869_auto_pwm_attr[0][0],
2597*4882a593Smuzhiyun ARRAY_SIZE(f71869_auto_pwm_attr[0]) * nr_fans);
2598*4882a593Smuzhiyun break;
2599*4882a593Smuzhiyun case f8000:
2600*4882a593Smuzhiyun f71882fg_remove_sysfs_files(pdev,
2601*4882a593Smuzhiyun f8000_fan_attr,
2602*4882a593Smuzhiyun ARRAY_SIZE(f8000_fan_attr));
2603*4882a593Smuzhiyun f71882fg_remove_sysfs_files(pdev,
2604*4882a593Smuzhiyun &f8000_auto_pwm_attr[0][0],
2605*4882a593Smuzhiyun ARRAY_SIZE(f8000_auto_pwm_attr[0]) * nr_fans);
2606*4882a593Smuzhiyun break;
2607*4882a593Smuzhiyun default:
2608*4882a593Smuzhiyun f71882fg_remove_sysfs_files(pdev,
2609*4882a593Smuzhiyun &fxxxx_auto_pwm_attr[0][0],
2610*4882a593Smuzhiyun ARRAY_SIZE(fxxxx_auto_pwm_attr[0]) * nr_fans);
2611*4882a593Smuzhiyun }
2612*4882a593Smuzhiyun }
2613*4882a593Smuzhiyun return 0;
2614*4882a593Smuzhiyun }
2615*4882a593Smuzhiyun
f71882fg_find(int sioaddr,struct f71882fg_sio_data * sio_data)2616*4882a593Smuzhiyun static int __init f71882fg_find(int sioaddr, struct f71882fg_sio_data *sio_data)
2617*4882a593Smuzhiyun {
2618*4882a593Smuzhiyun u16 devid;
2619*4882a593Smuzhiyun unsigned short address;
2620*4882a593Smuzhiyun int err = superio_enter(sioaddr);
2621*4882a593Smuzhiyun if (err)
2622*4882a593Smuzhiyun return err;
2623*4882a593Smuzhiyun
2624*4882a593Smuzhiyun devid = superio_inw(sioaddr, SIO_REG_MANID);
2625*4882a593Smuzhiyun if (devid != SIO_FINTEK_ID) {
2626*4882a593Smuzhiyun pr_debug("Not a Fintek device\n");
2627*4882a593Smuzhiyun err = -ENODEV;
2628*4882a593Smuzhiyun goto exit;
2629*4882a593Smuzhiyun }
2630*4882a593Smuzhiyun
2631*4882a593Smuzhiyun devid = force_id ? force_id : superio_inw(sioaddr, SIO_REG_DEVID);
2632*4882a593Smuzhiyun switch (devid) {
2633*4882a593Smuzhiyun case SIO_F71808E_ID:
2634*4882a593Smuzhiyun sio_data->type = f71808e;
2635*4882a593Smuzhiyun break;
2636*4882a593Smuzhiyun case SIO_F71808A_ID:
2637*4882a593Smuzhiyun sio_data->type = f71808a;
2638*4882a593Smuzhiyun break;
2639*4882a593Smuzhiyun case SIO_F71858_ID:
2640*4882a593Smuzhiyun sio_data->type = f71858fg;
2641*4882a593Smuzhiyun break;
2642*4882a593Smuzhiyun case SIO_F71862_ID:
2643*4882a593Smuzhiyun sio_data->type = f71862fg;
2644*4882a593Smuzhiyun break;
2645*4882a593Smuzhiyun case SIO_F71868_ID:
2646*4882a593Smuzhiyun sio_data->type = f71868a;
2647*4882a593Smuzhiyun break;
2648*4882a593Smuzhiyun case SIO_F71869_ID:
2649*4882a593Smuzhiyun sio_data->type = f71869;
2650*4882a593Smuzhiyun break;
2651*4882a593Smuzhiyun case SIO_F71869A_ID:
2652*4882a593Smuzhiyun sio_data->type = f71869a;
2653*4882a593Smuzhiyun break;
2654*4882a593Smuzhiyun case SIO_F71882_ID:
2655*4882a593Smuzhiyun sio_data->type = f71882fg;
2656*4882a593Smuzhiyun break;
2657*4882a593Smuzhiyun case SIO_F71889_ID:
2658*4882a593Smuzhiyun sio_data->type = f71889fg;
2659*4882a593Smuzhiyun break;
2660*4882a593Smuzhiyun case SIO_F71889E_ID:
2661*4882a593Smuzhiyun sio_data->type = f71889ed;
2662*4882a593Smuzhiyun break;
2663*4882a593Smuzhiyun case SIO_F71889A_ID:
2664*4882a593Smuzhiyun sio_data->type = f71889a;
2665*4882a593Smuzhiyun break;
2666*4882a593Smuzhiyun case SIO_F8000_ID:
2667*4882a593Smuzhiyun sio_data->type = f8000;
2668*4882a593Smuzhiyun break;
2669*4882a593Smuzhiyun case SIO_F81768D_ID:
2670*4882a593Smuzhiyun sio_data->type = f81768d;
2671*4882a593Smuzhiyun break;
2672*4882a593Smuzhiyun case SIO_F81865_ID:
2673*4882a593Smuzhiyun sio_data->type = f81865f;
2674*4882a593Smuzhiyun break;
2675*4882a593Smuzhiyun case SIO_F81866_ID:
2676*4882a593Smuzhiyun sio_data->type = f81866a;
2677*4882a593Smuzhiyun break;
2678*4882a593Smuzhiyun default:
2679*4882a593Smuzhiyun pr_info("Unsupported Fintek device: %04x\n",
2680*4882a593Smuzhiyun (unsigned int)devid);
2681*4882a593Smuzhiyun err = -ENODEV;
2682*4882a593Smuzhiyun goto exit;
2683*4882a593Smuzhiyun }
2684*4882a593Smuzhiyun
2685*4882a593Smuzhiyun if (sio_data->type == f71858fg)
2686*4882a593Smuzhiyun superio_select(sioaddr, SIO_F71858FG_LD_HWM);
2687*4882a593Smuzhiyun else
2688*4882a593Smuzhiyun superio_select(sioaddr, SIO_F71882FG_LD_HWM);
2689*4882a593Smuzhiyun
2690*4882a593Smuzhiyun if (!(superio_inb(sioaddr, SIO_REG_ENABLE) & 0x01)) {
2691*4882a593Smuzhiyun pr_warn("Device not activated\n");
2692*4882a593Smuzhiyun err = -ENODEV;
2693*4882a593Smuzhiyun goto exit;
2694*4882a593Smuzhiyun }
2695*4882a593Smuzhiyun
2696*4882a593Smuzhiyun address = superio_inw(sioaddr, SIO_REG_ADDR);
2697*4882a593Smuzhiyun if (address == 0) {
2698*4882a593Smuzhiyun pr_warn("Base address not set\n");
2699*4882a593Smuzhiyun err = -ENODEV;
2700*4882a593Smuzhiyun goto exit;
2701*4882a593Smuzhiyun }
2702*4882a593Smuzhiyun address &= ~(REGION_LENGTH - 1); /* Ignore 3 LSB */
2703*4882a593Smuzhiyun
2704*4882a593Smuzhiyun err = address;
2705*4882a593Smuzhiyun pr_info("Found %s chip at %#x, revision %d\n",
2706*4882a593Smuzhiyun f71882fg_names[sio_data->type], (unsigned int)address,
2707*4882a593Smuzhiyun (int)superio_inb(sioaddr, SIO_REG_DEVREV));
2708*4882a593Smuzhiyun exit:
2709*4882a593Smuzhiyun superio_exit(sioaddr);
2710*4882a593Smuzhiyun return err;
2711*4882a593Smuzhiyun }
2712*4882a593Smuzhiyun
f71882fg_device_add(int address,const struct f71882fg_sio_data * sio_data)2713*4882a593Smuzhiyun static int __init f71882fg_device_add(int address,
2714*4882a593Smuzhiyun const struct f71882fg_sio_data *sio_data)
2715*4882a593Smuzhiyun {
2716*4882a593Smuzhiyun struct resource res = {
2717*4882a593Smuzhiyun .start = address,
2718*4882a593Smuzhiyun .end = address + REGION_LENGTH - 1,
2719*4882a593Smuzhiyun .flags = IORESOURCE_IO,
2720*4882a593Smuzhiyun };
2721*4882a593Smuzhiyun int err;
2722*4882a593Smuzhiyun
2723*4882a593Smuzhiyun f71882fg_pdev = platform_device_alloc(DRVNAME, address);
2724*4882a593Smuzhiyun if (!f71882fg_pdev)
2725*4882a593Smuzhiyun return -ENOMEM;
2726*4882a593Smuzhiyun
2727*4882a593Smuzhiyun res.name = f71882fg_pdev->name;
2728*4882a593Smuzhiyun err = acpi_check_resource_conflict(&res);
2729*4882a593Smuzhiyun if (err)
2730*4882a593Smuzhiyun goto exit_device_put;
2731*4882a593Smuzhiyun
2732*4882a593Smuzhiyun err = platform_device_add_resources(f71882fg_pdev, &res, 1);
2733*4882a593Smuzhiyun if (err) {
2734*4882a593Smuzhiyun pr_err("Device resource addition failed\n");
2735*4882a593Smuzhiyun goto exit_device_put;
2736*4882a593Smuzhiyun }
2737*4882a593Smuzhiyun
2738*4882a593Smuzhiyun err = platform_device_add_data(f71882fg_pdev, sio_data,
2739*4882a593Smuzhiyun sizeof(struct f71882fg_sio_data));
2740*4882a593Smuzhiyun if (err) {
2741*4882a593Smuzhiyun pr_err("Platform data allocation failed\n");
2742*4882a593Smuzhiyun goto exit_device_put;
2743*4882a593Smuzhiyun }
2744*4882a593Smuzhiyun
2745*4882a593Smuzhiyun err = platform_device_add(f71882fg_pdev);
2746*4882a593Smuzhiyun if (err) {
2747*4882a593Smuzhiyun pr_err("Device addition failed\n");
2748*4882a593Smuzhiyun goto exit_device_put;
2749*4882a593Smuzhiyun }
2750*4882a593Smuzhiyun
2751*4882a593Smuzhiyun return 0;
2752*4882a593Smuzhiyun
2753*4882a593Smuzhiyun exit_device_put:
2754*4882a593Smuzhiyun platform_device_put(f71882fg_pdev);
2755*4882a593Smuzhiyun
2756*4882a593Smuzhiyun return err;
2757*4882a593Smuzhiyun }
2758*4882a593Smuzhiyun
f71882fg_init(void)2759*4882a593Smuzhiyun static int __init f71882fg_init(void)
2760*4882a593Smuzhiyun {
2761*4882a593Smuzhiyun int err;
2762*4882a593Smuzhiyun int address;
2763*4882a593Smuzhiyun struct f71882fg_sio_data sio_data;
2764*4882a593Smuzhiyun
2765*4882a593Smuzhiyun memset(&sio_data, 0, sizeof(sio_data));
2766*4882a593Smuzhiyun
2767*4882a593Smuzhiyun address = f71882fg_find(0x2e, &sio_data);
2768*4882a593Smuzhiyun if (address < 0)
2769*4882a593Smuzhiyun address = f71882fg_find(0x4e, &sio_data);
2770*4882a593Smuzhiyun if (address < 0)
2771*4882a593Smuzhiyun return address;
2772*4882a593Smuzhiyun
2773*4882a593Smuzhiyun err = platform_driver_register(&f71882fg_driver);
2774*4882a593Smuzhiyun if (err)
2775*4882a593Smuzhiyun return err;
2776*4882a593Smuzhiyun
2777*4882a593Smuzhiyun err = f71882fg_device_add(address, &sio_data);
2778*4882a593Smuzhiyun if (err)
2779*4882a593Smuzhiyun goto exit_driver;
2780*4882a593Smuzhiyun
2781*4882a593Smuzhiyun return 0;
2782*4882a593Smuzhiyun
2783*4882a593Smuzhiyun exit_driver:
2784*4882a593Smuzhiyun platform_driver_unregister(&f71882fg_driver);
2785*4882a593Smuzhiyun return err;
2786*4882a593Smuzhiyun }
2787*4882a593Smuzhiyun
f71882fg_exit(void)2788*4882a593Smuzhiyun static void __exit f71882fg_exit(void)
2789*4882a593Smuzhiyun {
2790*4882a593Smuzhiyun platform_device_unregister(f71882fg_pdev);
2791*4882a593Smuzhiyun platform_driver_unregister(&f71882fg_driver);
2792*4882a593Smuzhiyun }
2793*4882a593Smuzhiyun
2794*4882a593Smuzhiyun MODULE_DESCRIPTION("F71882FG Hardware Monitoring Driver");
2795*4882a593Smuzhiyun MODULE_AUTHOR("Hans Edgington, Hans de Goede <hdegoede@redhat.com>");
2796*4882a593Smuzhiyun MODULE_LICENSE("GPL");
2797*4882a593Smuzhiyun
2798*4882a593Smuzhiyun module_init(f71882fg_init);
2799*4882a593Smuzhiyun module_exit(f71882fg_exit);
2800