1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * f71805f.c - driver for the Fintek F71805F/FG and F71872F/FG Super-I/O
4*4882a593Smuzhiyun * chips integrated hardware monitoring features
5*4882a593Smuzhiyun * Copyright (C) 2005-2006 Jean Delvare <jdelvare@suse.de>
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * The F71805F/FG is a LPC Super-I/O chip made by Fintek. It integrates
8*4882a593Smuzhiyun * complete hardware monitoring features: voltage, fan and temperature
9*4882a593Smuzhiyun * sensors, and manual and automatic fan speed control.
10*4882a593Smuzhiyun *
11*4882a593Smuzhiyun * The F71872F/FG is almost the same, with two more voltages monitored,
12*4882a593Smuzhiyun * and 6 VID inputs.
13*4882a593Smuzhiyun *
14*4882a593Smuzhiyun * The F71806F/FG is essentially the same as the F71872F/FG. It even has
15*4882a593Smuzhiyun * the same chip ID, so the driver can't differentiate between.
16*4882a593Smuzhiyun */
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun #include <linux/module.h>
21*4882a593Smuzhiyun #include <linux/init.h>
22*4882a593Smuzhiyun #include <linux/slab.h>
23*4882a593Smuzhiyun #include <linux/jiffies.h>
24*4882a593Smuzhiyun #include <linux/platform_device.h>
25*4882a593Smuzhiyun #include <linux/hwmon.h>
26*4882a593Smuzhiyun #include <linux/hwmon-sysfs.h>
27*4882a593Smuzhiyun #include <linux/err.h>
28*4882a593Smuzhiyun #include <linux/mutex.h>
29*4882a593Smuzhiyun #include <linux/sysfs.h>
30*4882a593Smuzhiyun #include <linux/ioport.h>
31*4882a593Smuzhiyun #include <linux/acpi.h>
32*4882a593Smuzhiyun #include <linux/io.h>
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun static unsigned short force_id;
35*4882a593Smuzhiyun module_param(force_id, ushort, 0);
36*4882a593Smuzhiyun MODULE_PARM_DESC(force_id, "Override the detected device ID");
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun static struct platform_device *pdev;
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun #define DRVNAME "f71805f"
41*4882a593Smuzhiyun enum kinds { f71805f, f71872f };
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun /*
44*4882a593Smuzhiyun * Super-I/O constants and functions
45*4882a593Smuzhiyun */
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun #define F71805F_LD_HWM 0x04
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun #define SIO_REG_LDSEL 0x07 /* Logical device select */
50*4882a593Smuzhiyun #define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
51*4882a593Smuzhiyun #define SIO_REG_DEVREV 0x22 /* Device revision */
52*4882a593Smuzhiyun #define SIO_REG_MANID 0x23 /* Fintek ID (2 bytes) */
53*4882a593Smuzhiyun #define SIO_REG_FNSEL1 0x29 /* Multi Function Select 1 (F71872F) */
54*4882a593Smuzhiyun #define SIO_REG_ENABLE 0x30 /* Logical device enable */
55*4882a593Smuzhiyun #define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun #define SIO_FINTEK_ID 0x1934
58*4882a593Smuzhiyun #define SIO_F71805F_ID 0x0406
59*4882a593Smuzhiyun #define SIO_F71872F_ID 0x0341
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun static inline int
superio_inb(int base,int reg)62*4882a593Smuzhiyun superio_inb(int base, int reg)
63*4882a593Smuzhiyun {
64*4882a593Smuzhiyun outb(reg, base);
65*4882a593Smuzhiyun return inb(base + 1);
66*4882a593Smuzhiyun }
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun static int
superio_inw(int base,int reg)69*4882a593Smuzhiyun superio_inw(int base, int reg)
70*4882a593Smuzhiyun {
71*4882a593Smuzhiyun int val;
72*4882a593Smuzhiyun outb(reg++, base);
73*4882a593Smuzhiyun val = inb(base + 1) << 8;
74*4882a593Smuzhiyun outb(reg, base);
75*4882a593Smuzhiyun val |= inb(base + 1);
76*4882a593Smuzhiyun return val;
77*4882a593Smuzhiyun }
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun static inline void
superio_select(int base,int ld)80*4882a593Smuzhiyun superio_select(int base, int ld)
81*4882a593Smuzhiyun {
82*4882a593Smuzhiyun outb(SIO_REG_LDSEL, base);
83*4882a593Smuzhiyun outb(ld, base + 1);
84*4882a593Smuzhiyun }
85*4882a593Smuzhiyun
86*4882a593Smuzhiyun static inline int
superio_enter(int base)87*4882a593Smuzhiyun superio_enter(int base)
88*4882a593Smuzhiyun {
89*4882a593Smuzhiyun if (!request_muxed_region(base, 2, DRVNAME))
90*4882a593Smuzhiyun return -EBUSY;
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun outb(0x87, base);
93*4882a593Smuzhiyun outb(0x87, base);
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun return 0;
96*4882a593Smuzhiyun }
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun static inline void
superio_exit(int base)99*4882a593Smuzhiyun superio_exit(int base)
100*4882a593Smuzhiyun {
101*4882a593Smuzhiyun outb(0xaa, base);
102*4882a593Smuzhiyun release_region(base, 2);
103*4882a593Smuzhiyun }
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun /*
106*4882a593Smuzhiyun * ISA constants
107*4882a593Smuzhiyun */
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun #define REGION_LENGTH 8
110*4882a593Smuzhiyun #define ADDR_REG_OFFSET 5
111*4882a593Smuzhiyun #define DATA_REG_OFFSET 6
112*4882a593Smuzhiyun
113*4882a593Smuzhiyun /*
114*4882a593Smuzhiyun * Registers
115*4882a593Smuzhiyun */
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun /* in nr from 0 to 10 (8-bit values) */
118*4882a593Smuzhiyun #define F71805F_REG_IN(nr) (0x10 + (nr))
119*4882a593Smuzhiyun #define F71805F_REG_IN_HIGH(nr) ((nr) < 10 ? 0x40 + 2 * (nr) : 0x2E)
120*4882a593Smuzhiyun #define F71805F_REG_IN_LOW(nr) ((nr) < 10 ? 0x41 + 2 * (nr) : 0x2F)
121*4882a593Smuzhiyun /* fan nr from 0 to 2 (12-bit values, two registers) */
122*4882a593Smuzhiyun #define F71805F_REG_FAN(nr) (0x20 + 2 * (nr))
123*4882a593Smuzhiyun #define F71805F_REG_FAN_LOW(nr) (0x28 + 2 * (nr))
124*4882a593Smuzhiyun #define F71805F_REG_FAN_TARGET(nr) (0x69 + 16 * (nr))
125*4882a593Smuzhiyun #define F71805F_REG_FAN_CTRL(nr) (0x60 + 16 * (nr))
126*4882a593Smuzhiyun #define F71805F_REG_PWM_FREQ(nr) (0x63 + 16 * (nr))
127*4882a593Smuzhiyun #define F71805F_REG_PWM_DUTY(nr) (0x6B + 16 * (nr))
128*4882a593Smuzhiyun /* temp nr from 0 to 2 (8-bit values) */
129*4882a593Smuzhiyun #define F71805F_REG_TEMP(nr) (0x1B + (nr))
130*4882a593Smuzhiyun #define F71805F_REG_TEMP_HIGH(nr) (0x54 + 2 * (nr))
131*4882a593Smuzhiyun #define F71805F_REG_TEMP_HYST(nr) (0x55 + 2 * (nr))
132*4882a593Smuzhiyun #define F71805F_REG_TEMP_MODE 0x01
133*4882a593Smuzhiyun /* pwm/fan pwmnr from 0 to 2, auto point apnr from 0 to 2 */
134*4882a593Smuzhiyun /* map Fintek numbers to our numbers as follows: 9->0, 5->1, 1->2 */
135*4882a593Smuzhiyun #define F71805F_REG_PWM_AUTO_POINT_TEMP(pwmnr, apnr) \
136*4882a593Smuzhiyun (0xA0 + 0x10 * (pwmnr) + (2 - (apnr)))
137*4882a593Smuzhiyun #define F71805F_REG_PWM_AUTO_POINT_FAN(pwmnr, apnr) \
138*4882a593Smuzhiyun (0xA4 + 0x10 * (pwmnr) + \
139*4882a593Smuzhiyun 2 * (2 - (apnr)))
140*4882a593Smuzhiyun
141*4882a593Smuzhiyun #define F71805F_REG_START 0x00
142*4882a593Smuzhiyun /* status nr from 0 to 2 */
143*4882a593Smuzhiyun #define F71805F_REG_STATUS(nr) (0x36 + (nr))
144*4882a593Smuzhiyun
145*4882a593Smuzhiyun /* individual register bits */
146*4882a593Smuzhiyun #define FAN_CTRL_DC_MODE 0x10
147*4882a593Smuzhiyun #define FAN_CTRL_LATCH_FULL 0x08
148*4882a593Smuzhiyun #define FAN_CTRL_MODE_MASK 0x03
149*4882a593Smuzhiyun #define FAN_CTRL_MODE_SPEED 0x00
150*4882a593Smuzhiyun #define FAN_CTRL_MODE_TEMPERATURE 0x01
151*4882a593Smuzhiyun #define FAN_CTRL_MODE_MANUAL 0x02
152*4882a593Smuzhiyun
153*4882a593Smuzhiyun /*
154*4882a593Smuzhiyun * Data structures and manipulation thereof
155*4882a593Smuzhiyun */
156*4882a593Smuzhiyun
157*4882a593Smuzhiyun struct f71805f_auto_point {
158*4882a593Smuzhiyun u8 temp[3];
159*4882a593Smuzhiyun u16 fan[3];
160*4882a593Smuzhiyun };
161*4882a593Smuzhiyun
162*4882a593Smuzhiyun struct f71805f_data {
163*4882a593Smuzhiyun unsigned short addr;
164*4882a593Smuzhiyun const char *name;
165*4882a593Smuzhiyun struct device *hwmon_dev;
166*4882a593Smuzhiyun
167*4882a593Smuzhiyun struct mutex update_lock;
168*4882a593Smuzhiyun char valid; /* !=0 if following fields are valid */
169*4882a593Smuzhiyun unsigned long last_updated; /* In jiffies */
170*4882a593Smuzhiyun unsigned long last_limits; /* In jiffies */
171*4882a593Smuzhiyun
172*4882a593Smuzhiyun /* Register values */
173*4882a593Smuzhiyun u8 in[11];
174*4882a593Smuzhiyun u8 in_high[11];
175*4882a593Smuzhiyun u8 in_low[11];
176*4882a593Smuzhiyun u16 has_in;
177*4882a593Smuzhiyun u16 fan[3];
178*4882a593Smuzhiyun u16 fan_low[3];
179*4882a593Smuzhiyun u16 fan_target[3];
180*4882a593Smuzhiyun u8 fan_ctrl[3];
181*4882a593Smuzhiyun u8 pwm[3];
182*4882a593Smuzhiyun u8 pwm_freq[3];
183*4882a593Smuzhiyun u8 temp[3];
184*4882a593Smuzhiyun u8 temp_high[3];
185*4882a593Smuzhiyun u8 temp_hyst[3];
186*4882a593Smuzhiyun u8 temp_mode;
187*4882a593Smuzhiyun unsigned long alarms;
188*4882a593Smuzhiyun struct f71805f_auto_point auto_points[3];
189*4882a593Smuzhiyun };
190*4882a593Smuzhiyun
191*4882a593Smuzhiyun struct f71805f_sio_data {
192*4882a593Smuzhiyun enum kinds kind;
193*4882a593Smuzhiyun u8 fnsel1;
194*4882a593Smuzhiyun };
195*4882a593Smuzhiyun
in_from_reg(u8 reg)196*4882a593Smuzhiyun static inline long in_from_reg(u8 reg)
197*4882a593Smuzhiyun {
198*4882a593Smuzhiyun return reg * 8;
199*4882a593Smuzhiyun }
200*4882a593Smuzhiyun
201*4882a593Smuzhiyun /* The 2 least significant bits are not used */
in_to_reg(long val)202*4882a593Smuzhiyun static inline u8 in_to_reg(long val)
203*4882a593Smuzhiyun {
204*4882a593Smuzhiyun if (val <= 0)
205*4882a593Smuzhiyun return 0;
206*4882a593Smuzhiyun if (val >= 2016)
207*4882a593Smuzhiyun return 0xfc;
208*4882a593Smuzhiyun return ((val + 16) / 32) << 2;
209*4882a593Smuzhiyun }
210*4882a593Smuzhiyun
211*4882a593Smuzhiyun /* in0 is downscaled by a factor 2 internally */
in0_from_reg(u8 reg)212*4882a593Smuzhiyun static inline long in0_from_reg(u8 reg)
213*4882a593Smuzhiyun {
214*4882a593Smuzhiyun return reg * 16;
215*4882a593Smuzhiyun }
216*4882a593Smuzhiyun
in0_to_reg(long val)217*4882a593Smuzhiyun static inline u8 in0_to_reg(long val)
218*4882a593Smuzhiyun {
219*4882a593Smuzhiyun if (val <= 0)
220*4882a593Smuzhiyun return 0;
221*4882a593Smuzhiyun if (val >= 4032)
222*4882a593Smuzhiyun return 0xfc;
223*4882a593Smuzhiyun return ((val + 32) / 64) << 2;
224*4882a593Smuzhiyun }
225*4882a593Smuzhiyun
226*4882a593Smuzhiyun /* The 4 most significant bits are not used */
fan_from_reg(u16 reg)227*4882a593Smuzhiyun static inline long fan_from_reg(u16 reg)
228*4882a593Smuzhiyun {
229*4882a593Smuzhiyun reg &= 0xfff;
230*4882a593Smuzhiyun if (!reg || reg == 0xfff)
231*4882a593Smuzhiyun return 0;
232*4882a593Smuzhiyun return 1500000 / reg;
233*4882a593Smuzhiyun }
234*4882a593Smuzhiyun
fan_to_reg(long rpm)235*4882a593Smuzhiyun static inline u16 fan_to_reg(long rpm)
236*4882a593Smuzhiyun {
237*4882a593Smuzhiyun /*
238*4882a593Smuzhiyun * If the low limit is set below what the chip can measure,
239*4882a593Smuzhiyun * store the largest possible 12-bit value in the registers,
240*4882a593Smuzhiyun * so that no alarm will ever trigger.
241*4882a593Smuzhiyun */
242*4882a593Smuzhiyun if (rpm < 367)
243*4882a593Smuzhiyun return 0xfff;
244*4882a593Smuzhiyun return 1500000 / rpm;
245*4882a593Smuzhiyun }
246*4882a593Smuzhiyun
pwm_freq_from_reg(u8 reg)247*4882a593Smuzhiyun static inline unsigned long pwm_freq_from_reg(u8 reg)
248*4882a593Smuzhiyun {
249*4882a593Smuzhiyun unsigned long clock = (reg & 0x80) ? 48000000UL : 1000000UL;
250*4882a593Smuzhiyun
251*4882a593Smuzhiyun reg &= 0x7f;
252*4882a593Smuzhiyun if (reg == 0)
253*4882a593Smuzhiyun reg++;
254*4882a593Smuzhiyun return clock / (reg << 8);
255*4882a593Smuzhiyun }
256*4882a593Smuzhiyun
pwm_freq_to_reg(unsigned long val)257*4882a593Smuzhiyun static inline u8 pwm_freq_to_reg(unsigned long val)
258*4882a593Smuzhiyun {
259*4882a593Smuzhiyun if (val >= 187500) /* The highest we can do */
260*4882a593Smuzhiyun return 0x80;
261*4882a593Smuzhiyun if (val >= 1475) /* Use 48 MHz clock */
262*4882a593Smuzhiyun return 0x80 | (48000000UL / (val << 8));
263*4882a593Smuzhiyun if (val < 31) /* The lowest we can do */
264*4882a593Smuzhiyun return 0x7f;
265*4882a593Smuzhiyun else /* Use 1 MHz clock */
266*4882a593Smuzhiyun return 1000000UL / (val << 8);
267*4882a593Smuzhiyun }
268*4882a593Smuzhiyun
pwm_mode_from_reg(u8 reg)269*4882a593Smuzhiyun static inline int pwm_mode_from_reg(u8 reg)
270*4882a593Smuzhiyun {
271*4882a593Smuzhiyun return !(reg & FAN_CTRL_DC_MODE);
272*4882a593Smuzhiyun }
273*4882a593Smuzhiyun
temp_from_reg(u8 reg)274*4882a593Smuzhiyun static inline long temp_from_reg(u8 reg)
275*4882a593Smuzhiyun {
276*4882a593Smuzhiyun return reg * 1000;
277*4882a593Smuzhiyun }
278*4882a593Smuzhiyun
temp_to_reg(long val)279*4882a593Smuzhiyun static inline u8 temp_to_reg(long val)
280*4882a593Smuzhiyun {
281*4882a593Smuzhiyun if (val <= 0)
282*4882a593Smuzhiyun return 0;
283*4882a593Smuzhiyun if (val >= 1000 * 0xff)
284*4882a593Smuzhiyun return 0xff;
285*4882a593Smuzhiyun return (val + 500) / 1000;
286*4882a593Smuzhiyun }
287*4882a593Smuzhiyun
288*4882a593Smuzhiyun /*
289*4882a593Smuzhiyun * Device I/O access
290*4882a593Smuzhiyun */
291*4882a593Smuzhiyun
292*4882a593Smuzhiyun /* Must be called with data->update_lock held, except during initialization */
f71805f_read8(struct f71805f_data * data,u8 reg)293*4882a593Smuzhiyun static u8 f71805f_read8(struct f71805f_data *data, u8 reg)
294*4882a593Smuzhiyun {
295*4882a593Smuzhiyun outb(reg, data->addr + ADDR_REG_OFFSET);
296*4882a593Smuzhiyun return inb(data->addr + DATA_REG_OFFSET);
297*4882a593Smuzhiyun }
298*4882a593Smuzhiyun
299*4882a593Smuzhiyun /* Must be called with data->update_lock held, except during initialization */
f71805f_write8(struct f71805f_data * data,u8 reg,u8 val)300*4882a593Smuzhiyun static void f71805f_write8(struct f71805f_data *data, u8 reg, u8 val)
301*4882a593Smuzhiyun {
302*4882a593Smuzhiyun outb(reg, data->addr + ADDR_REG_OFFSET);
303*4882a593Smuzhiyun outb(val, data->addr + DATA_REG_OFFSET);
304*4882a593Smuzhiyun }
305*4882a593Smuzhiyun
306*4882a593Smuzhiyun /*
307*4882a593Smuzhiyun * It is important to read the MSB first, because doing so latches the
308*4882a593Smuzhiyun * value of the LSB, so we are sure both bytes belong to the same value.
309*4882a593Smuzhiyun * Must be called with data->update_lock held, except during initialization
310*4882a593Smuzhiyun */
f71805f_read16(struct f71805f_data * data,u8 reg)311*4882a593Smuzhiyun static u16 f71805f_read16(struct f71805f_data *data, u8 reg)
312*4882a593Smuzhiyun {
313*4882a593Smuzhiyun u16 val;
314*4882a593Smuzhiyun
315*4882a593Smuzhiyun outb(reg, data->addr + ADDR_REG_OFFSET);
316*4882a593Smuzhiyun val = inb(data->addr + DATA_REG_OFFSET) << 8;
317*4882a593Smuzhiyun outb(++reg, data->addr + ADDR_REG_OFFSET);
318*4882a593Smuzhiyun val |= inb(data->addr + DATA_REG_OFFSET);
319*4882a593Smuzhiyun
320*4882a593Smuzhiyun return val;
321*4882a593Smuzhiyun }
322*4882a593Smuzhiyun
323*4882a593Smuzhiyun /* Must be called with data->update_lock held, except during initialization */
f71805f_write16(struct f71805f_data * data,u8 reg,u16 val)324*4882a593Smuzhiyun static void f71805f_write16(struct f71805f_data *data, u8 reg, u16 val)
325*4882a593Smuzhiyun {
326*4882a593Smuzhiyun outb(reg, data->addr + ADDR_REG_OFFSET);
327*4882a593Smuzhiyun outb(val >> 8, data->addr + DATA_REG_OFFSET);
328*4882a593Smuzhiyun outb(++reg, data->addr + ADDR_REG_OFFSET);
329*4882a593Smuzhiyun outb(val & 0xff, data->addr + DATA_REG_OFFSET);
330*4882a593Smuzhiyun }
331*4882a593Smuzhiyun
f71805f_update_device(struct device * dev)332*4882a593Smuzhiyun static struct f71805f_data *f71805f_update_device(struct device *dev)
333*4882a593Smuzhiyun {
334*4882a593Smuzhiyun struct f71805f_data *data = dev_get_drvdata(dev);
335*4882a593Smuzhiyun int nr, apnr;
336*4882a593Smuzhiyun
337*4882a593Smuzhiyun mutex_lock(&data->update_lock);
338*4882a593Smuzhiyun
339*4882a593Smuzhiyun /* Limit registers cache is refreshed after 60 seconds */
340*4882a593Smuzhiyun if (time_after(jiffies, data->last_updated + 60 * HZ)
341*4882a593Smuzhiyun || !data->valid) {
342*4882a593Smuzhiyun for (nr = 0; nr < 11; nr++) {
343*4882a593Smuzhiyun if (!(data->has_in & (1 << nr)))
344*4882a593Smuzhiyun continue;
345*4882a593Smuzhiyun data->in_high[nr] = f71805f_read8(data,
346*4882a593Smuzhiyun F71805F_REG_IN_HIGH(nr));
347*4882a593Smuzhiyun data->in_low[nr] = f71805f_read8(data,
348*4882a593Smuzhiyun F71805F_REG_IN_LOW(nr));
349*4882a593Smuzhiyun }
350*4882a593Smuzhiyun for (nr = 0; nr < 3; nr++) {
351*4882a593Smuzhiyun data->fan_low[nr] = f71805f_read16(data,
352*4882a593Smuzhiyun F71805F_REG_FAN_LOW(nr));
353*4882a593Smuzhiyun data->fan_target[nr] = f71805f_read16(data,
354*4882a593Smuzhiyun F71805F_REG_FAN_TARGET(nr));
355*4882a593Smuzhiyun data->pwm_freq[nr] = f71805f_read8(data,
356*4882a593Smuzhiyun F71805F_REG_PWM_FREQ(nr));
357*4882a593Smuzhiyun }
358*4882a593Smuzhiyun for (nr = 0; nr < 3; nr++) {
359*4882a593Smuzhiyun data->temp_high[nr] = f71805f_read8(data,
360*4882a593Smuzhiyun F71805F_REG_TEMP_HIGH(nr));
361*4882a593Smuzhiyun data->temp_hyst[nr] = f71805f_read8(data,
362*4882a593Smuzhiyun F71805F_REG_TEMP_HYST(nr));
363*4882a593Smuzhiyun }
364*4882a593Smuzhiyun data->temp_mode = f71805f_read8(data, F71805F_REG_TEMP_MODE);
365*4882a593Smuzhiyun for (nr = 0; nr < 3; nr++) {
366*4882a593Smuzhiyun for (apnr = 0; apnr < 3; apnr++) {
367*4882a593Smuzhiyun data->auto_points[nr].temp[apnr] =
368*4882a593Smuzhiyun f71805f_read8(data,
369*4882a593Smuzhiyun F71805F_REG_PWM_AUTO_POINT_TEMP(nr,
370*4882a593Smuzhiyun apnr));
371*4882a593Smuzhiyun data->auto_points[nr].fan[apnr] =
372*4882a593Smuzhiyun f71805f_read16(data,
373*4882a593Smuzhiyun F71805F_REG_PWM_AUTO_POINT_FAN(nr,
374*4882a593Smuzhiyun apnr));
375*4882a593Smuzhiyun }
376*4882a593Smuzhiyun }
377*4882a593Smuzhiyun
378*4882a593Smuzhiyun data->last_limits = jiffies;
379*4882a593Smuzhiyun }
380*4882a593Smuzhiyun
381*4882a593Smuzhiyun /* Measurement registers cache is refreshed after 1 second */
382*4882a593Smuzhiyun if (time_after(jiffies, data->last_updated + HZ)
383*4882a593Smuzhiyun || !data->valid) {
384*4882a593Smuzhiyun for (nr = 0; nr < 11; nr++) {
385*4882a593Smuzhiyun if (!(data->has_in & (1 << nr)))
386*4882a593Smuzhiyun continue;
387*4882a593Smuzhiyun data->in[nr] = f71805f_read8(data,
388*4882a593Smuzhiyun F71805F_REG_IN(nr));
389*4882a593Smuzhiyun }
390*4882a593Smuzhiyun for (nr = 0; nr < 3; nr++) {
391*4882a593Smuzhiyun data->fan[nr] = f71805f_read16(data,
392*4882a593Smuzhiyun F71805F_REG_FAN(nr));
393*4882a593Smuzhiyun data->fan_ctrl[nr] = f71805f_read8(data,
394*4882a593Smuzhiyun F71805F_REG_FAN_CTRL(nr));
395*4882a593Smuzhiyun data->pwm[nr] = f71805f_read8(data,
396*4882a593Smuzhiyun F71805F_REG_PWM_DUTY(nr));
397*4882a593Smuzhiyun }
398*4882a593Smuzhiyun for (nr = 0; nr < 3; nr++) {
399*4882a593Smuzhiyun data->temp[nr] = f71805f_read8(data,
400*4882a593Smuzhiyun F71805F_REG_TEMP(nr));
401*4882a593Smuzhiyun }
402*4882a593Smuzhiyun data->alarms = f71805f_read8(data, F71805F_REG_STATUS(0))
403*4882a593Smuzhiyun + (f71805f_read8(data, F71805F_REG_STATUS(1)) << 8)
404*4882a593Smuzhiyun + (f71805f_read8(data, F71805F_REG_STATUS(2)) << 16);
405*4882a593Smuzhiyun
406*4882a593Smuzhiyun data->last_updated = jiffies;
407*4882a593Smuzhiyun data->valid = 1;
408*4882a593Smuzhiyun }
409*4882a593Smuzhiyun
410*4882a593Smuzhiyun mutex_unlock(&data->update_lock);
411*4882a593Smuzhiyun
412*4882a593Smuzhiyun return data;
413*4882a593Smuzhiyun }
414*4882a593Smuzhiyun
415*4882a593Smuzhiyun /*
416*4882a593Smuzhiyun * Sysfs interface
417*4882a593Smuzhiyun */
418*4882a593Smuzhiyun
show_in0(struct device * dev,struct device_attribute * devattr,char * buf)419*4882a593Smuzhiyun static ssize_t show_in0(struct device *dev, struct device_attribute *devattr,
420*4882a593Smuzhiyun char *buf)
421*4882a593Smuzhiyun {
422*4882a593Smuzhiyun struct f71805f_data *data = f71805f_update_device(dev);
423*4882a593Smuzhiyun struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
424*4882a593Smuzhiyun int nr = attr->index;
425*4882a593Smuzhiyun
426*4882a593Smuzhiyun return sprintf(buf, "%ld\n", in0_from_reg(data->in[nr]));
427*4882a593Smuzhiyun }
428*4882a593Smuzhiyun
show_in0_max(struct device * dev,struct device_attribute * devattr,char * buf)429*4882a593Smuzhiyun static ssize_t show_in0_max(struct device *dev, struct device_attribute
430*4882a593Smuzhiyun *devattr, char *buf)
431*4882a593Smuzhiyun {
432*4882a593Smuzhiyun struct f71805f_data *data = f71805f_update_device(dev);
433*4882a593Smuzhiyun struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
434*4882a593Smuzhiyun int nr = attr->index;
435*4882a593Smuzhiyun
436*4882a593Smuzhiyun return sprintf(buf, "%ld\n", in0_from_reg(data->in_high[nr]));
437*4882a593Smuzhiyun }
438*4882a593Smuzhiyun
show_in0_min(struct device * dev,struct device_attribute * devattr,char * buf)439*4882a593Smuzhiyun static ssize_t show_in0_min(struct device *dev, struct device_attribute
440*4882a593Smuzhiyun *devattr, char *buf)
441*4882a593Smuzhiyun {
442*4882a593Smuzhiyun struct f71805f_data *data = f71805f_update_device(dev);
443*4882a593Smuzhiyun struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
444*4882a593Smuzhiyun int nr = attr->index;
445*4882a593Smuzhiyun
446*4882a593Smuzhiyun return sprintf(buf, "%ld\n", in0_from_reg(data->in_low[nr]));
447*4882a593Smuzhiyun }
448*4882a593Smuzhiyun
set_in0_max(struct device * dev,struct device_attribute * devattr,const char * buf,size_t count)449*4882a593Smuzhiyun static ssize_t set_in0_max(struct device *dev, struct device_attribute
450*4882a593Smuzhiyun *devattr, const char *buf, size_t count)
451*4882a593Smuzhiyun {
452*4882a593Smuzhiyun struct f71805f_data *data = dev_get_drvdata(dev);
453*4882a593Smuzhiyun struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
454*4882a593Smuzhiyun int nr = attr->index;
455*4882a593Smuzhiyun long val;
456*4882a593Smuzhiyun int err;
457*4882a593Smuzhiyun
458*4882a593Smuzhiyun err = kstrtol(buf, 10, &val);
459*4882a593Smuzhiyun if (err)
460*4882a593Smuzhiyun return err;
461*4882a593Smuzhiyun
462*4882a593Smuzhiyun mutex_lock(&data->update_lock);
463*4882a593Smuzhiyun data->in_high[nr] = in0_to_reg(val);
464*4882a593Smuzhiyun f71805f_write8(data, F71805F_REG_IN_HIGH(nr), data->in_high[nr]);
465*4882a593Smuzhiyun mutex_unlock(&data->update_lock);
466*4882a593Smuzhiyun
467*4882a593Smuzhiyun return count;
468*4882a593Smuzhiyun }
469*4882a593Smuzhiyun
set_in0_min(struct device * dev,struct device_attribute * devattr,const char * buf,size_t count)470*4882a593Smuzhiyun static ssize_t set_in0_min(struct device *dev, struct device_attribute
471*4882a593Smuzhiyun *devattr, const char *buf, size_t count)
472*4882a593Smuzhiyun {
473*4882a593Smuzhiyun struct f71805f_data *data = dev_get_drvdata(dev);
474*4882a593Smuzhiyun struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
475*4882a593Smuzhiyun int nr = attr->index;
476*4882a593Smuzhiyun long val;
477*4882a593Smuzhiyun int err;
478*4882a593Smuzhiyun
479*4882a593Smuzhiyun err = kstrtol(buf, 10, &val);
480*4882a593Smuzhiyun if (err)
481*4882a593Smuzhiyun return err;
482*4882a593Smuzhiyun
483*4882a593Smuzhiyun mutex_lock(&data->update_lock);
484*4882a593Smuzhiyun data->in_low[nr] = in0_to_reg(val);
485*4882a593Smuzhiyun f71805f_write8(data, F71805F_REG_IN_LOW(nr), data->in_low[nr]);
486*4882a593Smuzhiyun mutex_unlock(&data->update_lock);
487*4882a593Smuzhiyun
488*4882a593Smuzhiyun return count;
489*4882a593Smuzhiyun }
490*4882a593Smuzhiyun
show_in(struct device * dev,struct device_attribute * devattr,char * buf)491*4882a593Smuzhiyun static ssize_t show_in(struct device *dev, struct device_attribute *devattr,
492*4882a593Smuzhiyun char *buf)
493*4882a593Smuzhiyun {
494*4882a593Smuzhiyun struct f71805f_data *data = f71805f_update_device(dev);
495*4882a593Smuzhiyun struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
496*4882a593Smuzhiyun int nr = attr->index;
497*4882a593Smuzhiyun
498*4882a593Smuzhiyun return sprintf(buf, "%ld\n", in_from_reg(data->in[nr]));
499*4882a593Smuzhiyun }
500*4882a593Smuzhiyun
show_in_max(struct device * dev,struct device_attribute * devattr,char * buf)501*4882a593Smuzhiyun static ssize_t show_in_max(struct device *dev, struct device_attribute
502*4882a593Smuzhiyun *devattr, char *buf)
503*4882a593Smuzhiyun {
504*4882a593Smuzhiyun struct f71805f_data *data = f71805f_update_device(dev);
505*4882a593Smuzhiyun struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
506*4882a593Smuzhiyun int nr = attr->index;
507*4882a593Smuzhiyun
508*4882a593Smuzhiyun return sprintf(buf, "%ld\n", in_from_reg(data->in_high[nr]));
509*4882a593Smuzhiyun }
510*4882a593Smuzhiyun
show_in_min(struct device * dev,struct device_attribute * devattr,char * buf)511*4882a593Smuzhiyun static ssize_t show_in_min(struct device *dev, struct device_attribute
512*4882a593Smuzhiyun *devattr, char *buf)
513*4882a593Smuzhiyun {
514*4882a593Smuzhiyun struct f71805f_data *data = f71805f_update_device(dev);
515*4882a593Smuzhiyun struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
516*4882a593Smuzhiyun int nr = attr->index;
517*4882a593Smuzhiyun
518*4882a593Smuzhiyun return sprintf(buf, "%ld\n", in_from_reg(data->in_low[nr]));
519*4882a593Smuzhiyun }
520*4882a593Smuzhiyun
set_in_max(struct device * dev,struct device_attribute * devattr,const char * buf,size_t count)521*4882a593Smuzhiyun static ssize_t set_in_max(struct device *dev, struct device_attribute
522*4882a593Smuzhiyun *devattr, const char *buf, size_t count)
523*4882a593Smuzhiyun {
524*4882a593Smuzhiyun struct f71805f_data *data = dev_get_drvdata(dev);
525*4882a593Smuzhiyun struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
526*4882a593Smuzhiyun int nr = attr->index;
527*4882a593Smuzhiyun long val;
528*4882a593Smuzhiyun int err;
529*4882a593Smuzhiyun
530*4882a593Smuzhiyun err = kstrtol(buf, 10, &val);
531*4882a593Smuzhiyun if (err)
532*4882a593Smuzhiyun return err;
533*4882a593Smuzhiyun
534*4882a593Smuzhiyun mutex_lock(&data->update_lock);
535*4882a593Smuzhiyun data->in_high[nr] = in_to_reg(val);
536*4882a593Smuzhiyun f71805f_write8(data, F71805F_REG_IN_HIGH(nr), data->in_high[nr]);
537*4882a593Smuzhiyun mutex_unlock(&data->update_lock);
538*4882a593Smuzhiyun
539*4882a593Smuzhiyun return count;
540*4882a593Smuzhiyun }
541*4882a593Smuzhiyun
set_in_min(struct device * dev,struct device_attribute * devattr,const char * buf,size_t count)542*4882a593Smuzhiyun static ssize_t set_in_min(struct device *dev, struct device_attribute
543*4882a593Smuzhiyun *devattr, const char *buf, size_t count)
544*4882a593Smuzhiyun {
545*4882a593Smuzhiyun struct f71805f_data *data = dev_get_drvdata(dev);
546*4882a593Smuzhiyun struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
547*4882a593Smuzhiyun int nr = attr->index;
548*4882a593Smuzhiyun long val;
549*4882a593Smuzhiyun int err;
550*4882a593Smuzhiyun
551*4882a593Smuzhiyun err = kstrtol(buf, 10, &val);
552*4882a593Smuzhiyun if (err)
553*4882a593Smuzhiyun return err;
554*4882a593Smuzhiyun
555*4882a593Smuzhiyun mutex_lock(&data->update_lock);
556*4882a593Smuzhiyun data->in_low[nr] = in_to_reg(val);
557*4882a593Smuzhiyun f71805f_write8(data, F71805F_REG_IN_LOW(nr), data->in_low[nr]);
558*4882a593Smuzhiyun mutex_unlock(&data->update_lock);
559*4882a593Smuzhiyun
560*4882a593Smuzhiyun return count;
561*4882a593Smuzhiyun }
562*4882a593Smuzhiyun
show_fan(struct device * dev,struct device_attribute * devattr,char * buf)563*4882a593Smuzhiyun static ssize_t show_fan(struct device *dev, struct device_attribute *devattr,
564*4882a593Smuzhiyun char *buf)
565*4882a593Smuzhiyun {
566*4882a593Smuzhiyun struct f71805f_data *data = f71805f_update_device(dev);
567*4882a593Smuzhiyun struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
568*4882a593Smuzhiyun int nr = attr->index;
569*4882a593Smuzhiyun
570*4882a593Smuzhiyun return sprintf(buf, "%ld\n", fan_from_reg(data->fan[nr]));
571*4882a593Smuzhiyun }
572*4882a593Smuzhiyun
show_fan_min(struct device * dev,struct device_attribute * devattr,char * buf)573*4882a593Smuzhiyun static ssize_t show_fan_min(struct device *dev, struct device_attribute
574*4882a593Smuzhiyun *devattr, char *buf)
575*4882a593Smuzhiyun {
576*4882a593Smuzhiyun struct f71805f_data *data = f71805f_update_device(dev);
577*4882a593Smuzhiyun struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
578*4882a593Smuzhiyun int nr = attr->index;
579*4882a593Smuzhiyun
580*4882a593Smuzhiyun return sprintf(buf, "%ld\n", fan_from_reg(data->fan_low[nr]));
581*4882a593Smuzhiyun }
582*4882a593Smuzhiyun
show_fan_target(struct device * dev,struct device_attribute * devattr,char * buf)583*4882a593Smuzhiyun static ssize_t show_fan_target(struct device *dev, struct device_attribute
584*4882a593Smuzhiyun *devattr, char *buf)
585*4882a593Smuzhiyun {
586*4882a593Smuzhiyun struct f71805f_data *data = f71805f_update_device(dev);
587*4882a593Smuzhiyun struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
588*4882a593Smuzhiyun int nr = attr->index;
589*4882a593Smuzhiyun
590*4882a593Smuzhiyun return sprintf(buf, "%ld\n", fan_from_reg(data->fan_target[nr]));
591*4882a593Smuzhiyun }
592*4882a593Smuzhiyun
set_fan_min(struct device * dev,struct device_attribute * devattr,const char * buf,size_t count)593*4882a593Smuzhiyun static ssize_t set_fan_min(struct device *dev, struct device_attribute
594*4882a593Smuzhiyun *devattr, const char *buf, size_t count)
595*4882a593Smuzhiyun {
596*4882a593Smuzhiyun struct f71805f_data *data = dev_get_drvdata(dev);
597*4882a593Smuzhiyun struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
598*4882a593Smuzhiyun int nr = attr->index;
599*4882a593Smuzhiyun long val;
600*4882a593Smuzhiyun int err;
601*4882a593Smuzhiyun
602*4882a593Smuzhiyun err = kstrtol(buf, 10, &val);
603*4882a593Smuzhiyun if (err)
604*4882a593Smuzhiyun return err;
605*4882a593Smuzhiyun
606*4882a593Smuzhiyun mutex_lock(&data->update_lock);
607*4882a593Smuzhiyun data->fan_low[nr] = fan_to_reg(val);
608*4882a593Smuzhiyun f71805f_write16(data, F71805F_REG_FAN_LOW(nr), data->fan_low[nr]);
609*4882a593Smuzhiyun mutex_unlock(&data->update_lock);
610*4882a593Smuzhiyun
611*4882a593Smuzhiyun return count;
612*4882a593Smuzhiyun }
613*4882a593Smuzhiyun
set_fan_target(struct device * dev,struct device_attribute * devattr,const char * buf,size_t count)614*4882a593Smuzhiyun static ssize_t set_fan_target(struct device *dev, struct device_attribute
615*4882a593Smuzhiyun *devattr, const char *buf, size_t count)
616*4882a593Smuzhiyun {
617*4882a593Smuzhiyun struct f71805f_data *data = dev_get_drvdata(dev);
618*4882a593Smuzhiyun struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
619*4882a593Smuzhiyun int nr = attr->index;
620*4882a593Smuzhiyun long val;
621*4882a593Smuzhiyun int err;
622*4882a593Smuzhiyun
623*4882a593Smuzhiyun err = kstrtol(buf, 10, &val);
624*4882a593Smuzhiyun if (err)
625*4882a593Smuzhiyun return err;
626*4882a593Smuzhiyun
627*4882a593Smuzhiyun mutex_lock(&data->update_lock);
628*4882a593Smuzhiyun data->fan_target[nr] = fan_to_reg(val);
629*4882a593Smuzhiyun f71805f_write16(data, F71805F_REG_FAN_TARGET(nr),
630*4882a593Smuzhiyun data->fan_target[nr]);
631*4882a593Smuzhiyun mutex_unlock(&data->update_lock);
632*4882a593Smuzhiyun
633*4882a593Smuzhiyun return count;
634*4882a593Smuzhiyun }
635*4882a593Smuzhiyun
show_pwm(struct device * dev,struct device_attribute * devattr,char * buf)636*4882a593Smuzhiyun static ssize_t show_pwm(struct device *dev, struct device_attribute *devattr,
637*4882a593Smuzhiyun char *buf)
638*4882a593Smuzhiyun {
639*4882a593Smuzhiyun struct f71805f_data *data = f71805f_update_device(dev);
640*4882a593Smuzhiyun struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
641*4882a593Smuzhiyun int nr = attr->index;
642*4882a593Smuzhiyun
643*4882a593Smuzhiyun return sprintf(buf, "%d\n", (int)data->pwm[nr]);
644*4882a593Smuzhiyun }
645*4882a593Smuzhiyun
show_pwm_enable(struct device * dev,struct device_attribute * devattr,char * buf)646*4882a593Smuzhiyun static ssize_t show_pwm_enable(struct device *dev, struct device_attribute
647*4882a593Smuzhiyun *devattr, char *buf)
648*4882a593Smuzhiyun {
649*4882a593Smuzhiyun struct f71805f_data *data = f71805f_update_device(dev);
650*4882a593Smuzhiyun struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
651*4882a593Smuzhiyun int nr = attr->index;
652*4882a593Smuzhiyun int mode;
653*4882a593Smuzhiyun
654*4882a593Smuzhiyun switch (data->fan_ctrl[nr] & FAN_CTRL_MODE_MASK) {
655*4882a593Smuzhiyun case FAN_CTRL_MODE_SPEED:
656*4882a593Smuzhiyun mode = 3;
657*4882a593Smuzhiyun break;
658*4882a593Smuzhiyun case FAN_CTRL_MODE_TEMPERATURE:
659*4882a593Smuzhiyun mode = 2;
660*4882a593Smuzhiyun break;
661*4882a593Smuzhiyun default: /* MANUAL */
662*4882a593Smuzhiyun mode = 1;
663*4882a593Smuzhiyun }
664*4882a593Smuzhiyun
665*4882a593Smuzhiyun return sprintf(buf, "%d\n", mode);
666*4882a593Smuzhiyun }
667*4882a593Smuzhiyun
show_pwm_freq(struct device * dev,struct device_attribute * devattr,char * buf)668*4882a593Smuzhiyun static ssize_t show_pwm_freq(struct device *dev, struct device_attribute
669*4882a593Smuzhiyun *devattr, char *buf)
670*4882a593Smuzhiyun {
671*4882a593Smuzhiyun struct f71805f_data *data = f71805f_update_device(dev);
672*4882a593Smuzhiyun struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
673*4882a593Smuzhiyun int nr = attr->index;
674*4882a593Smuzhiyun
675*4882a593Smuzhiyun return sprintf(buf, "%lu\n", pwm_freq_from_reg(data->pwm_freq[nr]));
676*4882a593Smuzhiyun }
677*4882a593Smuzhiyun
show_pwm_mode(struct device * dev,struct device_attribute * devattr,char * buf)678*4882a593Smuzhiyun static ssize_t show_pwm_mode(struct device *dev, struct device_attribute
679*4882a593Smuzhiyun *devattr, char *buf)
680*4882a593Smuzhiyun {
681*4882a593Smuzhiyun struct f71805f_data *data = f71805f_update_device(dev);
682*4882a593Smuzhiyun struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
683*4882a593Smuzhiyun int nr = attr->index;
684*4882a593Smuzhiyun
685*4882a593Smuzhiyun return sprintf(buf, "%d\n", pwm_mode_from_reg(data->fan_ctrl[nr]));
686*4882a593Smuzhiyun }
687*4882a593Smuzhiyun
set_pwm(struct device * dev,struct device_attribute * devattr,const char * buf,size_t count)688*4882a593Smuzhiyun static ssize_t set_pwm(struct device *dev, struct device_attribute *devattr,
689*4882a593Smuzhiyun const char *buf, size_t count)
690*4882a593Smuzhiyun {
691*4882a593Smuzhiyun struct f71805f_data *data = dev_get_drvdata(dev);
692*4882a593Smuzhiyun struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
693*4882a593Smuzhiyun int nr = attr->index;
694*4882a593Smuzhiyun unsigned long val;
695*4882a593Smuzhiyun int err;
696*4882a593Smuzhiyun
697*4882a593Smuzhiyun err = kstrtoul(buf, 10, &val);
698*4882a593Smuzhiyun if (err)
699*4882a593Smuzhiyun return err;
700*4882a593Smuzhiyun
701*4882a593Smuzhiyun if (val > 255)
702*4882a593Smuzhiyun return -EINVAL;
703*4882a593Smuzhiyun
704*4882a593Smuzhiyun mutex_lock(&data->update_lock);
705*4882a593Smuzhiyun data->pwm[nr] = val;
706*4882a593Smuzhiyun f71805f_write8(data, F71805F_REG_PWM_DUTY(nr), data->pwm[nr]);
707*4882a593Smuzhiyun mutex_unlock(&data->update_lock);
708*4882a593Smuzhiyun
709*4882a593Smuzhiyun return count;
710*4882a593Smuzhiyun }
711*4882a593Smuzhiyun
712*4882a593Smuzhiyun static struct attribute *f71805f_attr_pwm[];
713*4882a593Smuzhiyun
set_pwm_enable(struct device * dev,struct device_attribute * devattr,const char * buf,size_t count)714*4882a593Smuzhiyun static ssize_t set_pwm_enable(struct device *dev, struct device_attribute
715*4882a593Smuzhiyun *devattr, const char *buf, size_t count)
716*4882a593Smuzhiyun {
717*4882a593Smuzhiyun struct f71805f_data *data = dev_get_drvdata(dev);
718*4882a593Smuzhiyun struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
719*4882a593Smuzhiyun int nr = attr->index;
720*4882a593Smuzhiyun u8 reg;
721*4882a593Smuzhiyun unsigned long val;
722*4882a593Smuzhiyun int err;
723*4882a593Smuzhiyun
724*4882a593Smuzhiyun err = kstrtoul(buf, 10, &val);
725*4882a593Smuzhiyun if (err)
726*4882a593Smuzhiyun return err;
727*4882a593Smuzhiyun
728*4882a593Smuzhiyun if (val < 1 || val > 3)
729*4882a593Smuzhiyun return -EINVAL;
730*4882a593Smuzhiyun
731*4882a593Smuzhiyun if (val > 1) { /* Automatic mode, user can't set PWM value */
732*4882a593Smuzhiyun if (sysfs_chmod_file(&dev->kobj, f71805f_attr_pwm[nr],
733*4882a593Smuzhiyun S_IRUGO))
734*4882a593Smuzhiyun dev_dbg(dev, "chmod -w pwm%d failed\n", nr + 1);
735*4882a593Smuzhiyun }
736*4882a593Smuzhiyun
737*4882a593Smuzhiyun mutex_lock(&data->update_lock);
738*4882a593Smuzhiyun reg = f71805f_read8(data, F71805F_REG_FAN_CTRL(nr))
739*4882a593Smuzhiyun & ~FAN_CTRL_MODE_MASK;
740*4882a593Smuzhiyun switch (val) {
741*4882a593Smuzhiyun case 1:
742*4882a593Smuzhiyun reg |= FAN_CTRL_MODE_MANUAL;
743*4882a593Smuzhiyun break;
744*4882a593Smuzhiyun case 2:
745*4882a593Smuzhiyun reg |= FAN_CTRL_MODE_TEMPERATURE;
746*4882a593Smuzhiyun break;
747*4882a593Smuzhiyun case 3:
748*4882a593Smuzhiyun reg |= FAN_CTRL_MODE_SPEED;
749*4882a593Smuzhiyun break;
750*4882a593Smuzhiyun }
751*4882a593Smuzhiyun data->fan_ctrl[nr] = reg;
752*4882a593Smuzhiyun f71805f_write8(data, F71805F_REG_FAN_CTRL(nr), reg);
753*4882a593Smuzhiyun mutex_unlock(&data->update_lock);
754*4882a593Smuzhiyun
755*4882a593Smuzhiyun if (val == 1) { /* Manual mode, user can set PWM value */
756*4882a593Smuzhiyun if (sysfs_chmod_file(&dev->kobj, f71805f_attr_pwm[nr],
757*4882a593Smuzhiyun S_IRUGO | S_IWUSR))
758*4882a593Smuzhiyun dev_dbg(dev, "chmod +w pwm%d failed\n", nr + 1);
759*4882a593Smuzhiyun }
760*4882a593Smuzhiyun
761*4882a593Smuzhiyun return count;
762*4882a593Smuzhiyun }
763*4882a593Smuzhiyun
set_pwm_freq(struct device * dev,struct device_attribute * devattr,const char * buf,size_t count)764*4882a593Smuzhiyun static ssize_t set_pwm_freq(struct device *dev, struct device_attribute
765*4882a593Smuzhiyun *devattr, const char *buf, size_t count)
766*4882a593Smuzhiyun {
767*4882a593Smuzhiyun struct f71805f_data *data = dev_get_drvdata(dev);
768*4882a593Smuzhiyun struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
769*4882a593Smuzhiyun int nr = attr->index;
770*4882a593Smuzhiyun unsigned long val;
771*4882a593Smuzhiyun int err;
772*4882a593Smuzhiyun
773*4882a593Smuzhiyun err = kstrtoul(buf, 10, &val);
774*4882a593Smuzhiyun if (err)
775*4882a593Smuzhiyun return err;
776*4882a593Smuzhiyun
777*4882a593Smuzhiyun mutex_lock(&data->update_lock);
778*4882a593Smuzhiyun data->pwm_freq[nr] = pwm_freq_to_reg(val);
779*4882a593Smuzhiyun f71805f_write8(data, F71805F_REG_PWM_FREQ(nr), data->pwm_freq[nr]);
780*4882a593Smuzhiyun mutex_unlock(&data->update_lock);
781*4882a593Smuzhiyun
782*4882a593Smuzhiyun return count;
783*4882a593Smuzhiyun }
784*4882a593Smuzhiyun
show_pwm_auto_point_temp(struct device * dev,struct device_attribute * devattr,char * buf)785*4882a593Smuzhiyun static ssize_t show_pwm_auto_point_temp(struct device *dev,
786*4882a593Smuzhiyun struct device_attribute *devattr,
787*4882a593Smuzhiyun char *buf)
788*4882a593Smuzhiyun {
789*4882a593Smuzhiyun struct f71805f_data *data = dev_get_drvdata(dev);
790*4882a593Smuzhiyun struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr);
791*4882a593Smuzhiyun int pwmnr = attr->nr;
792*4882a593Smuzhiyun int apnr = attr->index;
793*4882a593Smuzhiyun
794*4882a593Smuzhiyun return sprintf(buf, "%ld\n",
795*4882a593Smuzhiyun temp_from_reg(data->auto_points[pwmnr].temp[apnr]));
796*4882a593Smuzhiyun }
797*4882a593Smuzhiyun
set_pwm_auto_point_temp(struct device * dev,struct device_attribute * devattr,const char * buf,size_t count)798*4882a593Smuzhiyun static ssize_t set_pwm_auto_point_temp(struct device *dev,
799*4882a593Smuzhiyun struct device_attribute *devattr,
800*4882a593Smuzhiyun const char *buf, size_t count)
801*4882a593Smuzhiyun {
802*4882a593Smuzhiyun struct f71805f_data *data = dev_get_drvdata(dev);
803*4882a593Smuzhiyun struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr);
804*4882a593Smuzhiyun int pwmnr = attr->nr;
805*4882a593Smuzhiyun int apnr = attr->index;
806*4882a593Smuzhiyun unsigned long val;
807*4882a593Smuzhiyun int err;
808*4882a593Smuzhiyun
809*4882a593Smuzhiyun err = kstrtoul(buf, 10, &val);
810*4882a593Smuzhiyun if (err)
811*4882a593Smuzhiyun return err;
812*4882a593Smuzhiyun
813*4882a593Smuzhiyun mutex_lock(&data->update_lock);
814*4882a593Smuzhiyun data->auto_points[pwmnr].temp[apnr] = temp_to_reg(val);
815*4882a593Smuzhiyun f71805f_write8(data, F71805F_REG_PWM_AUTO_POINT_TEMP(pwmnr, apnr),
816*4882a593Smuzhiyun data->auto_points[pwmnr].temp[apnr]);
817*4882a593Smuzhiyun mutex_unlock(&data->update_lock);
818*4882a593Smuzhiyun
819*4882a593Smuzhiyun return count;
820*4882a593Smuzhiyun }
821*4882a593Smuzhiyun
show_pwm_auto_point_fan(struct device * dev,struct device_attribute * devattr,char * buf)822*4882a593Smuzhiyun static ssize_t show_pwm_auto_point_fan(struct device *dev,
823*4882a593Smuzhiyun struct device_attribute *devattr,
824*4882a593Smuzhiyun char *buf)
825*4882a593Smuzhiyun {
826*4882a593Smuzhiyun struct f71805f_data *data = dev_get_drvdata(dev);
827*4882a593Smuzhiyun struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr);
828*4882a593Smuzhiyun int pwmnr = attr->nr;
829*4882a593Smuzhiyun int apnr = attr->index;
830*4882a593Smuzhiyun
831*4882a593Smuzhiyun return sprintf(buf, "%ld\n",
832*4882a593Smuzhiyun fan_from_reg(data->auto_points[pwmnr].fan[apnr]));
833*4882a593Smuzhiyun }
834*4882a593Smuzhiyun
set_pwm_auto_point_fan(struct device * dev,struct device_attribute * devattr,const char * buf,size_t count)835*4882a593Smuzhiyun static ssize_t set_pwm_auto_point_fan(struct device *dev,
836*4882a593Smuzhiyun struct device_attribute *devattr,
837*4882a593Smuzhiyun const char *buf, size_t count)
838*4882a593Smuzhiyun {
839*4882a593Smuzhiyun struct f71805f_data *data = dev_get_drvdata(dev);
840*4882a593Smuzhiyun struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr);
841*4882a593Smuzhiyun int pwmnr = attr->nr;
842*4882a593Smuzhiyun int apnr = attr->index;
843*4882a593Smuzhiyun unsigned long val;
844*4882a593Smuzhiyun int err;
845*4882a593Smuzhiyun
846*4882a593Smuzhiyun err = kstrtoul(buf, 10, &val);
847*4882a593Smuzhiyun if (err)
848*4882a593Smuzhiyun return err;
849*4882a593Smuzhiyun
850*4882a593Smuzhiyun mutex_lock(&data->update_lock);
851*4882a593Smuzhiyun data->auto_points[pwmnr].fan[apnr] = fan_to_reg(val);
852*4882a593Smuzhiyun f71805f_write16(data, F71805F_REG_PWM_AUTO_POINT_FAN(pwmnr, apnr),
853*4882a593Smuzhiyun data->auto_points[pwmnr].fan[apnr]);
854*4882a593Smuzhiyun mutex_unlock(&data->update_lock);
855*4882a593Smuzhiyun
856*4882a593Smuzhiyun return count;
857*4882a593Smuzhiyun }
858*4882a593Smuzhiyun
show_temp(struct device * dev,struct device_attribute * devattr,char * buf)859*4882a593Smuzhiyun static ssize_t show_temp(struct device *dev, struct device_attribute *devattr,
860*4882a593Smuzhiyun char *buf)
861*4882a593Smuzhiyun {
862*4882a593Smuzhiyun struct f71805f_data *data = f71805f_update_device(dev);
863*4882a593Smuzhiyun struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
864*4882a593Smuzhiyun int nr = attr->index;
865*4882a593Smuzhiyun
866*4882a593Smuzhiyun return sprintf(buf, "%ld\n", temp_from_reg(data->temp[nr]));
867*4882a593Smuzhiyun }
868*4882a593Smuzhiyun
show_temp_max(struct device * dev,struct device_attribute * devattr,char * buf)869*4882a593Smuzhiyun static ssize_t show_temp_max(struct device *dev, struct device_attribute
870*4882a593Smuzhiyun *devattr, char *buf)
871*4882a593Smuzhiyun {
872*4882a593Smuzhiyun struct f71805f_data *data = f71805f_update_device(dev);
873*4882a593Smuzhiyun struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
874*4882a593Smuzhiyun int nr = attr->index;
875*4882a593Smuzhiyun
876*4882a593Smuzhiyun return sprintf(buf, "%ld\n", temp_from_reg(data->temp_high[nr]));
877*4882a593Smuzhiyun }
878*4882a593Smuzhiyun
show_temp_hyst(struct device * dev,struct device_attribute * devattr,char * buf)879*4882a593Smuzhiyun static ssize_t show_temp_hyst(struct device *dev, struct device_attribute
880*4882a593Smuzhiyun *devattr, char *buf)
881*4882a593Smuzhiyun {
882*4882a593Smuzhiyun struct f71805f_data *data = f71805f_update_device(dev);
883*4882a593Smuzhiyun struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
884*4882a593Smuzhiyun int nr = attr->index;
885*4882a593Smuzhiyun
886*4882a593Smuzhiyun return sprintf(buf, "%ld\n", temp_from_reg(data->temp_hyst[nr]));
887*4882a593Smuzhiyun }
888*4882a593Smuzhiyun
show_temp_type(struct device * dev,struct device_attribute * devattr,char * buf)889*4882a593Smuzhiyun static ssize_t show_temp_type(struct device *dev, struct device_attribute
890*4882a593Smuzhiyun *devattr, char *buf)
891*4882a593Smuzhiyun {
892*4882a593Smuzhiyun struct f71805f_data *data = f71805f_update_device(dev);
893*4882a593Smuzhiyun struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
894*4882a593Smuzhiyun int nr = attr->index;
895*4882a593Smuzhiyun
896*4882a593Smuzhiyun /* 3 is diode, 4 is thermistor */
897*4882a593Smuzhiyun return sprintf(buf, "%u\n", (data->temp_mode & (1 << nr)) ? 3 : 4);
898*4882a593Smuzhiyun }
899*4882a593Smuzhiyun
set_temp_max(struct device * dev,struct device_attribute * devattr,const char * buf,size_t count)900*4882a593Smuzhiyun static ssize_t set_temp_max(struct device *dev, struct device_attribute
901*4882a593Smuzhiyun *devattr, const char *buf, size_t count)
902*4882a593Smuzhiyun {
903*4882a593Smuzhiyun struct f71805f_data *data = dev_get_drvdata(dev);
904*4882a593Smuzhiyun struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
905*4882a593Smuzhiyun int nr = attr->index;
906*4882a593Smuzhiyun long val;
907*4882a593Smuzhiyun int err;
908*4882a593Smuzhiyun
909*4882a593Smuzhiyun err = kstrtol(buf, 10, &val);
910*4882a593Smuzhiyun if (err)
911*4882a593Smuzhiyun return err;
912*4882a593Smuzhiyun
913*4882a593Smuzhiyun mutex_lock(&data->update_lock);
914*4882a593Smuzhiyun data->temp_high[nr] = temp_to_reg(val);
915*4882a593Smuzhiyun f71805f_write8(data, F71805F_REG_TEMP_HIGH(nr), data->temp_high[nr]);
916*4882a593Smuzhiyun mutex_unlock(&data->update_lock);
917*4882a593Smuzhiyun
918*4882a593Smuzhiyun return count;
919*4882a593Smuzhiyun }
920*4882a593Smuzhiyun
set_temp_hyst(struct device * dev,struct device_attribute * devattr,const char * buf,size_t count)921*4882a593Smuzhiyun static ssize_t set_temp_hyst(struct device *dev, struct device_attribute
922*4882a593Smuzhiyun *devattr, const char *buf, size_t count)
923*4882a593Smuzhiyun {
924*4882a593Smuzhiyun struct f71805f_data *data = dev_get_drvdata(dev);
925*4882a593Smuzhiyun struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
926*4882a593Smuzhiyun int nr = attr->index;
927*4882a593Smuzhiyun long val;
928*4882a593Smuzhiyun int err;
929*4882a593Smuzhiyun
930*4882a593Smuzhiyun err = kstrtol(buf, 10, &val);
931*4882a593Smuzhiyun if (err)
932*4882a593Smuzhiyun return err;
933*4882a593Smuzhiyun
934*4882a593Smuzhiyun mutex_lock(&data->update_lock);
935*4882a593Smuzhiyun data->temp_hyst[nr] = temp_to_reg(val);
936*4882a593Smuzhiyun f71805f_write8(data, F71805F_REG_TEMP_HYST(nr), data->temp_hyst[nr]);
937*4882a593Smuzhiyun mutex_unlock(&data->update_lock);
938*4882a593Smuzhiyun
939*4882a593Smuzhiyun return count;
940*4882a593Smuzhiyun }
941*4882a593Smuzhiyun
alarms_in_show(struct device * dev,struct device_attribute * devattr,char * buf)942*4882a593Smuzhiyun static ssize_t alarms_in_show(struct device *dev, struct device_attribute
943*4882a593Smuzhiyun *devattr, char *buf)
944*4882a593Smuzhiyun {
945*4882a593Smuzhiyun struct f71805f_data *data = f71805f_update_device(dev);
946*4882a593Smuzhiyun
947*4882a593Smuzhiyun return sprintf(buf, "%lu\n", data->alarms & 0x7ff);
948*4882a593Smuzhiyun }
949*4882a593Smuzhiyun
alarms_fan_show(struct device * dev,struct device_attribute * devattr,char * buf)950*4882a593Smuzhiyun static ssize_t alarms_fan_show(struct device *dev, struct device_attribute
951*4882a593Smuzhiyun *devattr, char *buf)
952*4882a593Smuzhiyun {
953*4882a593Smuzhiyun struct f71805f_data *data = f71805f_update_device(dev);
954*4882a593Smuzhiyun
955*4882a593Smuzhiyun return sprintf(buf, "%lu\n", (data->alarms >> 16) & 0x07);
956*4882a593Smuzhiyun }
957*4882a593Smuzhiyun
alarms_temp_show(struct device * dev,struct device_attribute * devattr,char * buf)958*4882a593Smuzhiyun static ssize_t alarms_temp_show(struct device *dev, struct device_attribute
959*4882a593Smuzhiyun *devattr, char *buf)
960*4882a593Smuzhiyun {
961*4882a593Smuzhiyun struct f71805f_data *data = f71805f_update_device(dev);
962*4882a593Smuzhiyun
963*4882a593Smuzhiyun return sprintf(buf, "%lu\n", (data->alarms >> 11) & 0x07);
964*4882a593Smuzhiyun }
965*4882a593Smuzhiyun
show_alarm(struct device * dev,struct device_attribute * devattr,char * buf)966*4882a593Smuzhiyun static ssize_t show_alarm(struct device *dev, struct device_attribute
967*4882a593Smuzhiyun *devattr, char *buf)
968*4882a593Smuzhiyun {
969*4882a593Smuzhiyun struct f71805f_data *data = f71805f_update_device(dev);
970*4882a593Smuzhiyun struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
971*4882a593Smuzhiyun int bitnr = attr->index;
972*4882a593Smuzhiyun
973*4882a593Smuzhiyun return sprintf(buf, "%lu\n", (data->alarms >> bitnr) & 1);
974*4882a593Smuzhiyun }
975*4882a593Smuzhiyun
name_show(struct device * dev,struct device_attribute * devattr,char * buf)976*4882a593Smuzhiyun static ssize_t name_show(struct device *dev, struct device_attribute
977*4882a593Smuzhiyun *devattr, char *buf)
978*4882a593Smuzhiyun {
979*4882a593Smuzhiyun struct f71805f_data *data = dev_get_drvdata(dev);
980*4882a593Smuzhiyun
981*4882a593Smuzhiyun return sprintf(buf, "%s\n", data->name);
982*4882a593Smuzhiyun }
983*4882a593Smuzhiyun
984*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR(in0_input, S_IRUGO, show_in0, NULL, 0);
985*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR(in0_max, S_IRUGO | S_IWUSR,
986*4882a593Smuzhiyun show_in0_max, set_in0_max, 0);
987*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR(in0_min, S_IRUGO | S_IWUSR,
988*4882a593Smuzhiyun show_in0_min, set_in0_min, 0);
989*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR(in1_input, S_IRUGO, show_in, NULL, 1);
990*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR(in1_max, S_IRUGO | S_IWUSR,
991*4882a593Smuzhiyun show_in_max, set_in_max, 1);
992*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR(in1_min, S_IRUGO | S_IWUSR,
993*4882a593Smuzhiyun show_in_min, set_in_min, 1);
994*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR(in2_input, S_IRUGO, show_in, NULL, 2);
995*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR(in2_max, S_IRUGO | S_IWUSR,
996*4882a593Smuzhiyun show_in_max, set_in_max, 2);
997*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR(in2_min, S_IRUGO | S_IWUSR,
998*4882a593Smuzhiyun show_in_min, set_in_min, 2);
999*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR(in3_input, S_IRUGO, show_in, NULL, 3);
1000*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR(in3_max, S_IRUGO | S_IWUSR,
1001*4882a593Smuzhiyun show_in_max, set_in_max, 3);
1002*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR(in3_min, S_IRUGO | S_IWUSR,
1003*4882a593Smuzhiyun show_in_min, set_in_min, 3);
1004*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR(in4_input, S_IRUGO, show_in, NULL, 4);
1005*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR(in4_max, S_IRUGO | S_IWUSR,
1006*4882a593Smuzhiyun show_in_max, set_in_max, 4);
1007*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR(in4_min, S_IRUGO | S_IWUSR,
1008*4882a593Smuzhiyun show_in_min, set_in_min, 4);
1009*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR(in5_input, S_IRUGO, show_in, NULL, 5);
1010*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR(in5_max, S_IRUGO | S_IWUSR,
1011*4882a593Smuzhiyun show_in_max, set_in_max, 5);
1012*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR(in5_min, S_IRUGO | S_IWUSR,
1013*4882a593Smuzhiyun show_in_min, set_in_min, 5);
1014*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR(in6_input, S_IRUGO, show_in, NULL, 6);
1015*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR(in6_max, S_IRUGO | S_IWUSR,
1016*4882a593Smuzhiyun show_in_max, set_in_max, 6);
1017*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR(in6_min, S_IRUGO | S_IWUSR,
1018*4882a593Smuzhiyun show_in_min, set_in_min, 6);
1019*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR(in7_input, S_IRUGO, show_in, NULL, 7);
1020*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR(in7_max, S_IRUGO | S_IWUSR,
1021*4882a593Smuzhiyun show_in_max, set_in_max, 7);
1022*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR(in7_min, S_IRUGO | S_IWUSR,
1023*4882a593Smuzhiyun show_in_min, set_in_min, 7);
1024*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR(in8_input, S_IRUGO, show_in, NULL, 8);
1025*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR(in8_max, S_IRUGO | S_IWUSR,
1026*4882a593Smuzhiyun show_in_max, set_in_max, 8);
1027*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR(in8_min, S_IRUGO | S_IWUSR,
1028*4882a593Smuzhiyun show_in_min, set_in_min, 8);
1029*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR(in9_input, S_IRUGO, show_in0, NULL, 9);
1030*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR(in9_max, S_IRUGO | S_IWUSR,
1031*4882a593Smuzhiyun show_in0_max, set_in0_max, 9);
1032*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR(in9_min, S_IRUGO | S_IWUSR,
1033*4882a593Smuzhiyun show_in0_min, set_in0_min, 9);
1034*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR(in10_input, S_IRUGO, show_in0, NULL, 10);
1035*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR(in10_max, S_IRUGO | S_IWUSR,
1036*4882a593Smuzhiyun show_in0_max, set_in0_max, 10);
1037*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR(in10_min, S_IRUGO | S_IWUSR,
1038*4882a593Smuzhiyun show_in0_min, set_in0_min, 10);
1039*4882a593Smuzhiyun
1040*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0);
1041*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR(fan1_min, S_IRUGO | S_IWUSR,
1042*4882a593Smuzhiyun show_fan_min, set_fan_min, 0);
1043*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR(fan1_target, S_IRUGO | S_IWUSR,
1044*4882a593Smuzhiyun show_fan_target, set_fan_target, 0);
1045*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1);
1046*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR(fan2_min, S_IRUGO | S_IWUSR,
1047*4882a593Smuzhiyun show_fan_min, set_fan_min, 1);
1048*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR(fan2_target, S_IRUGO | S_IWUSR,
1049*4882a593Smuzhiyun show_fan_target, set_fan_target, 1);
1050*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2);
1051*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR(fan3_min, S_IRUGO | S_IWUSR,
1052*4882a593Smuzhiyun show_fan_min, set_fan_min, 2);
1053*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR(fan3_target, S_IRUGO | S_IWUSR,
1054*4882a593Smuzhiyun show_fan_target, set_fan_target, 2);
1055*4882a593Smuzhiyun
1056*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, show_temp, NULL, 0);
1057*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR(temp1_max, S_IRUGO | S_IWUSR,
1058*4882a593Smuzhiyun show_temp_max, set_temp_max, 0);
1059*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR(temp1_max_hyst, S_IRUGO | S_IWUSR,
1060*4882a593Smuzhiyun show_temp_hyst, set_temp_hyst, 0);
1061*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO, show_temp_type, NULL, 0);
1062*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR(temp2_input, S_IRUGO, show_temp, NULL, 1);
1063*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR(temp2_max, S_IRUGO | S_IWUSR,
1064*4882a593Smuzhiyun show_temp_max, set_temp_max, 1);
1065*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR(temp2_max_hyst, S_IRUGO | S_IWUSR,
1066*4882a593Smuzhiyun show_temp_hyst, set_temp_hyst, 1);
1067*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO, show_temp_type, NULL, 1);
1068*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR(temp3_input, S_IRUGO, show_temp, NULL, 2);
1069*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR(temp3_max, S_IRUGO | S_IWUSR,
1070*4882a593Smuzhiyun show_temp_max, set_temp_max, 2);
1071*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR(temp3_max_hyst, S_IRUGO | S_IWUSR,
1072*4882a593Smuzhiyun show_temp_hyst, set_temp_hyst, 2);
1073*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO, show_temp_type, NULL, 2);
1074*4882a593Smuzhiyun
1075*4882a593Smuzhiyun /*
1076*4882a593Smuzhiyun * pwm (value) files are created read-only, write permission is
1077*4882a593Smuzhiyun * then added or removed dynamically as needed
1078*4882a593Smuzhiyun */
1079*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO, show_pwm, set_pwm, 0);
1080*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR(pwm1_enable, S_IRUGO | S_IWUSR,
1081*4882a593Smuzhiyun show_pwm_enable, set_pwm_enable, 0);
1082*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR(pwm1_freq, S_IRUGO | S_IWUSR,
1083*4882a593Smuzhiyun show_pwm_freq, set_pwm_freq, 0);
1084*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR(pwm1_mode, S_IRUGO, show_pwm_mode, NULL, 0);
1085*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO, show_pwm, set_pwm, 1);
1086*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR(pwm2_enable, S_IRUGO | S_IWUSR,
1087*4882a593Smuzhiyun show_pwm_enable, set_pwm_enable, 1);
1088*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR(pwm2_freq, S_IRUGO | S_IWUSR,
1089*4882a593Smuzhiyun show_pwm_freq, set_pwm_freq, 1);
1090*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR(pwm2_mode, S_IRUGO, show_pwm_mode, NULL, 1);
1091*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO, show_pwm, set_pwm, 2);
1092*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR(pwm3_enable, S_IRUGO | S_IWUSR,
1093*4882a593Smuzhiyun show_pwm_enable, set_pwm_enable, 2);
1094*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR(pwm3_freq, S_IRUGO | S_IWUSR,
1095*4882a593Smuzhiyun show_pwm_freq, set_pwm_freq, 2);
1096*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR(pwm3_mode, S_IRUGO, show_pwm_mode, NULL, 2);
1097*4882a593Smuzhiyun
1098*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp, S_IRUGO | S_IWUSR,
1099*4882a593Smuzhiyun show_pwm_auto_point_temp, set_pwm_auto_point_temp,
1100*4882a593Smuzhiyun 0, 0);
1101*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_fan, S_IRUGO | S_IWUSR,
1102*4882a593Smuzhiyun show_pwm_auto_point_fan, set_pwm_auto_point_fan,
1103*4882a593Smuzhiyun 0, 0);
1104*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_temp, S_IRUGO | S_IWUSR,
1105*4882a593Smuzhiyun show_pwm_auto_point_temp, set_pwm_auto_point_temp,
1106*4882a593Smuzhiyun 0, 1);
1107*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_fan, S_IRUGO | S_IWUSR,
1108*4882a593Smuzhiyun show_pwm_auto_point_fan, set_pwm_auto_point_fan,
1109*4882a593Smuzhiyun 0, 1);
1110*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_temp, S_IRUGO | S_IWUSR,
1111*4882a593Smuzhiyun show_pwm_auto_point_temp, set_pwm_auto_point_temp,
1112*4882a593Smuzhiyun 0, 2);
1113*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_fan, S_IRUGO | S_IWUSR,
1114*4882a593Smuzhiyun show_pwm_auto_point_fan, set_pwm_auto_point_fan,
1115*4882a593Smuzhiyun 0, 2);
1116*4882a593Smuzhiyun
1117*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp, S_IRUGO | S_IWUSR,
1118*4882a593Smuzhiyun show_pwm_auto_point_temp, set_pwm_auto_point_temp,
1119*4882a593Smuzhiyun 1, 0);
1120*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_fan, S_IRUGO | S_IWUSR,
1121*4882a593Smuzhiyun show_pwm_auto_point_fan, set_pwm_auto_point_fan,
1122*4882a593Smuzhiyun 1, 0);
1123*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_temp, S_IRUGO | S_IWUSR,
1124*4882a593Smuzhiyun show_pwm_auto_point_temp, set_pwm_auto_point_temp,
1125*4882a593Smuzhiyun 1, 1);
1126*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_fan, S_IRUGO | S_IWUSR,
1127*4882a593Smuzhiyun show_pwm_auto_point_fan, set_pwm_auto_point_fan,
1128*4882a593Smuzhiyun 1, 1);
1129*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_temp, S_IRUGO | S_IWUSR,
1130*4882a593Smuzhiyun show_pwm_auto_point_temp, set_pwm_auto_point_temp,
1131*4882a593Smuzhiyun 1, 2);
1132*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_fan, S_IRUGO | S_IWUSR,
1133*4882a593Smuzhiyun show_pwm_auto_point_fan, set_pwm_auto_point_fan,
1134*4882a593Smuzhiyun 1, 2);
1135*4882a593Smuzhiyun
1136*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp, S_IRUGO | S_IWUSR,
1137*4882a593Smuzhiyun show_pwm_auto_point_temp, set_pwm_auto_point_temp,
1138*4882a593Smuzhiyun 2, 0);
1139*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_fan, S_IRUGO | S_IWUSR,
1140*4882a593Smuzhiyun show_pwm_auto_point_fan, set_pwm_auto_point_fan,
1141*4882a593Smuzhiyun 2, 0);
1142*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_temp, S_IRUGO | S_IWUSR,
1143*4882a593Smuzhiyun show_pwm_auto_point_temp, set_pwm_auto_point_temp,
1144*4882a593Smuzhiyun 2, 1);
1145*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_fan, S_IRUGO | S_IWUSR,
1146*4882a593Smuzhiyun show_pwm_auto_point_fan, set_pwm_auto_point_fan,
1147*4882a593Smuzhiyun 2, 1);
1148*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_temp, S_IRUGO | S_IWUSR,
1149*4882a593Smuzhiyun show_pwm_auto_point_temp, set_pwm_auto_point_temp,
1150*4882a593Smuzhiyun 2, 2);
1151*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_fan, S_IRUGO | S_IWUSR,
1152*4882a593Smuzhiyun show_pwm_auto_point_fan, set_pwm_auto_point_fan,
1153*4882a593Smuzhiyun 2, 2);
1154*4882a593Smuzhiyun
1155*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0);
1156*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1);
1157*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2);
1158*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3);
1159*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 4);
1160*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 5);
1161*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 6);
1162*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 7);
1163*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 8);
1164*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR(in9_alarm, S_IRUGO, show_alarm, NULL, 9);
1165*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR(in10_alarm, S_IRUGO, show_alarm, NULL, 10);
1166*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 11);
1167*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 12);
1168*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 13);
1169*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 16);
1170*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 17);
1171*4882a593Smuzhiyun static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 18);
1172*4882a593Smuzhiyun static DEVICE_ATTR_RO(alarms_in);
1173*4882a593Smuzhiyun static DEVICE_ATTR_RO(alarms_fan);
1174*4882a593Smuzhiyun static DEVICE_ATTR_RO(alarms_temp);
1175*4882a593Smuzhiyun
1176*4882a593Smuzhiyun static DEVICE_ATTR_RO(name);
1177*4882a593Smuzhiyun
1178*4882a593Smuzhiyun static struct attribute *f71805f_attributes[] = {
1179*4882a593Smuzhiyun &sensor_dev_attr_in0_input.dev_attr.attr,
1180*4882a593Smuzhiyun &sensor_dev_attr_in0_max.dev_attr.attr,
1181*4882a593Smuzhiyun &sensor_dev_attr_in0_min.dev_attr.attr,
1182*4882a593Smuzhiyun &sensor_dev_attr_in1_input.dev_attr.attr,
1183*4882a593Smuzhiyun &sensor_dev_attr_in1_max.dev_attr.attr,
1184*4882a593Smuzhiyun &sensor_dev_attr_in1_min.dev_attr.attr,
1185*4882a593Smuzhiyun &sensor_dev_attr_in2_input.dev_attr.attr,
1186*4882a593Smuzhiyun &sensor_dev_attr_in2_max.dev_attr.attr,
1187*4882a593Smuzhiyun &sensor_dev_attr_in2_min.dev_attr.attr,
1188*4882a593Smuzhiyun &sensor_dev_attr_in3_input.dev_attr.attr,
1189*4882a593Smuzhiyun &sensor_dev_attr_in3_max.dev_attr.attr,
1190*4882a593Smuzhiyun &sensor_dev_attr_in3_min.dev_attr.attr,
1191*4882a593Smuzhiyun &sensor_dev_attr_in5_input.dev_attr.attr,
1192*4882a593Smuzhiyun &sensor_dev_attr_in5_max.dev_attr.attr,
1193*4882a593Smuzhiyun &sensor_dev_attr_in5_min.dev_attr.attr,
1194*4882a593Smuzhiyun &sensor_dev_attr_in6_input.dev_attr.attr,
1195*4882a593Smuzhiyun &sensor_dev_attr_in6_max.dev_attr.attr,
1196*4882a593Smuzhiyun &sensor_dev_attr_in6_min.dev_attr.attr,
1197*4882a593Smuzhiyun &sensor_dev_attr_in7_input.dev_attr.attr,
1198*4882a593Smuzhiyun &sensor_dev_attr_in7_max.dev_attr.attr,
1199*4882a593Smuzhiyun &sensor_dev_attr_in7_min.dev_attr.attr,
1200*4882a593Smuzhiyun
1201*4882a593Smuzhiyun &sensor_dev_attr_fan1_input.dev_attr.attr,
1202*4882a593Smuzhiyun &sensor_dev_attr_fan1_min.dev_attr.attr,
1203*4882a593Smuzhiyun &sensor_dev_attr_fan1_alarm.dev_attr.attr,
1204*4882a593Smuzhiyun &sensor_dev_attr_fan1_target.dev_attr.attr,
1205*4882a593Smuzhiyun &sensor_dev_attr_fan2_input.dev_attr.attr,
1206*4882a593Smuzhiyun &sensor_dev_attr_fan2_min.dev_attr.attr,
1207*4882a593Smuzhiyun &sensor_dev_attr_fan2_alarm.dev_attr.attr,
1208*4882a593Smuzhiyun &sensor_dev_attr_fan2_target.dev_attr.attr,
1209*4882a593Smuzhiyun &sensor_dev_attr_fan3_input.dev_attr.attr,
1210*4882a593Smuzhiyun &sensor_dev_attr_fan3_min.dev_attr.attr,
1211*4882a593Smuzhiyun &sensor_dev_attr_fan3_alarm.dev_attr.attr,
1212*4882a593Smuzhiyun &sensor_dev_attr_fan3_target.dev_attr.attr,
1213*4882a593Smuzhiyun
1214*4882a593Smuzhiyun &sensor_dev_attr_pwm1.dev_attr.attr,
1215*4882a593Smuzhiyun &sensor_dev_attr_pwm1_enable.dev_attr.attr,
1216*4882a593Smuzhiyun &sensor_dev_attr_pwm1_mode.dev_attr.attr,
1217*4882a593Smuzhiyun &sensor_dev_attr_pwm2.dev_attr.attr,
1218*4882a593Smuzhiyun &sensor_dev_attr_pwm2_enable.dev_attr.attr,
1219*4882a593Smuzhiyun &sensor_dev_attr_pwm2_mode.dev_attr.attr,
1220*4882a593Smuzhiyun &sensor_dev_attr_pwm3.dev_attr.attr,
1221*4882a593Smuzhiyun &sensor_dev_attr_pwm3_enable.dev_attr.attr,
1222*4882a593Smuzhiyun &sensor_dev_attr_pwm3_mode.dev_attr.attr,
1223*4882a593Smuzhiyun
1224*4882a593Smuzhiyun &sensor_dev_attr_temp1_input.dev_attr.attr,
1225*4882a593Smuzhiyun &sensor_dev_attr_temp1_max.dev_attr.attr,
1226*4882a593Smuzhiyun &sensor_dev_attr_temp1_max_hyst.dev_attr.attr,
1227*4882a593Smuzhiyun &sensor_dev_attr_temp1_type.dev_attr.attr,
1228*4882a593Smuzhiyun &sensor_dev_attr_temp2_input.dev_attr.attr,
1229*4882a593Smuzhiyun &sensor_dev_attr_temp2_max.dev_attr.attr,
1230*4882a593Smuzhiyun &sensor_dev_attr_temp2_max_hyst.dev_attr.attr,
1231*4882a593Smuzhiyun &sensor_dev_attr_temp2_type.dev_attr.attr,
1232*4882a593Smuzhiyun &sensor_dev_attr_temp3_input.dev_attr.attr,
1233*4882a593Smuzhiyun &sensor_dev_attr_temp3_max.dev_attr.attr,
1234*4882a593Smuzhiyun &sensor_dev_attr_temp3_max_hyst.dev_attr.attr,
1235*4882a593Smuzhiyun &sensor_dev_attr_temp3_type.dev_attr.attr,
1236*4882a593Smuzhiyun
1237*4882a593Smuzhiyun &sensor_dev_attr_pwm1_auto_point1_temp.dev_attr.attr,
1238*4882a593Smuzhiyun &sensor_dev_attr_pwm1_auto_point1_fan.dev_attr.attr,
1239*4882a593Smuzhiyun &sensor_dev_attr_pwm1_auto_point2_temp.dev_attr.attr,
1240*4882a593Smuzhiyun &sensor_dev_attr_pwm1_auto_point2_fan.dev_attr.attr,
1241*4882a593Smuzhiyun &sensor_dev_attr_pwm1_auto_point3_temp.dev_attr.attr,
1242*4882a593Smuzhiyun &sensor_dev_attr_pwm1_auto_point3_fan.dev_attr.attr,
1243*4882a593Smuzhiyun &sensor_dev_attr_pwm2_auto_point1_temp.dev_attr.attr,
1244*4882a593Smuzhiyun &sensor_dev_attr_pwm2_auto_point1_fan.dev_attr.attr,
1245*4882a593Smuzhiyun &sensor_dev_attr_pwm2_auto_point2_temp.dev_attr.attr,
1246*4882a593Smuzhiyun &sensor_dev_attr_pwm2_auto_point2_fan.dev_attr.attr,
1247*4882a593Smuzhiyun &sensor_dev_attr_pwm2_auto_point3_temp.dev_attr.attr,
1248*4882a593Smuzhiyun &sensor_dev_attr_pwm2_auto_point3_fan.dev_attr.attr,
1249*4882a593Smuzhiyun &sensor_dev_attr_pwm3_auto_point1_temp.dev_attr.attr,
1250*4882a593Smuzhiyun &sensor_dev_attr_pwm3_auto_point1_fan.dev_attr.attr,
1251*4882a593Smuzhiyun &sensor_dev_attr_pwm3_auto_point2_temp.dev_attr.attr,
1252*4882a593Smuzhiyun &sensor_dev_attr_pwm3_auto_point2_fan.dev_attr.attr,
1253*4882a593Smuzhiyun &sensor_dev_attr_pwm3_auto_point3_temp.dev_attr.attr,
1254*4882a593Smuzhiyun &sensor_dev_attr_pwm3_auto_point3_fan.dev_attr.attr,
1255*4882a593Smuzhiyun
1256*4882a593Smuzhiyun &sensor_dev_attr_in0_alarm.dev_attr.attr,
1257*4882a593Smuzhiyun &sensor_dev_attr_in1_alarm.dev_attr.attr,
1258*4882a593Smuzhiyun &sensor_dev_attr_in2_alarm.dev_attr.attr,
1259*4882a593Smuzhiyun &sensor_dev_attr_in3_alarm.dev_attr.attr,
1260*4882a593Smuzhiyun &sensor_dev_attr_in5_alarm.dev_attr.attr,
1261*4882a593Smuzhiyun &sensor_dev_attr_in6_alarm.dev_attr.attr,
1262*4882a593Smuzhiyun &sensor_dev_attr_in7_alarm.dev_attr.attr,
1263*4882a593Smuzhiyun &dev_attr_alarms_in.attr,
1264*4882a593Smuzhiyun &sensor_dev_attr_temp1_alarm.dev_attr.attr,
1265*4882a593Smuzhiyun &sensor_dev_attr_temp2_alarm.dev_attr.attr,
1266*4882a593Smuzhiyun &sensor_dev_attr_temp3_alarm.dev_attr.attr,
1267*4882a593Smuzhiyun &dev_attr_alarms_temp.attr,
1268*4882a593Smuzhiyun &dev_attr_alarms_fan.attr,
1269*4882a593Smuzhiyun
1270*4882a593Smuzhiyun &dev_attr_name.attr,
1271*4882a593Smuzhiyun NULL
1272*4882a593Smuzhiyun };
1273*4882a593Smuzhiyun
1274*4882a593Smuzhiyun static const struct attribute_group f71805f_group = {
1275*4882a593Smuzhiyun .attrs = f71805f_attributes,
1276*4882a593Smuzhiyun };
1277*4882a593Smuzhiyun
1278*4882a593Smuzhiyun static struct attribute *f71805f_attributes_optin[4][5] = {
1279*4882a593Smuzhiyun {
1280*4882a593Smuzhiyun &sensor_dev_attr_in4_input.dev_attr.attr,
1281*4882a593Smuzhiyun &sensor_dev_attr_in4_max.dev_attr.attr,
1282*4882a593Smuzhiyun &sensor_dev_attr_in4_min.dev_attr.attr,
1283*4882a593Smuzhiyun &sensor_dev_attr_in4_alarm.dev_attr.attr,
1284*4882a593Smuzhiyun NULL
1285*4882a593Smuzhiyun }, {
1286*4882a593Smuzhiyun &sensor_dev_attr_in8_input.dev_attr.attr,
1287*4882a593Smuzhiyun &sensor_dev_attr_in8_max.dev_attr.attr,
1288*4882a593Smuzhiyun &sensor_dev_attr_in8_min.dev_attr.attr,
1289*4882a593Smuzhiyun &sensor_dev_attr_in8_alarm.dev_attr.attr,
1290*4882a593Smuzhiyun NULL
1291*4882a593Smuzhiyun }, {
1292*4882a593Smuzhiyun &sensor_dev_attr_in9_input.dev_attr.attr,
1293*4882a593Smuzhiyun &sensor_dev_attr_in9_max.dev_attr.attr,
1294*4882a593Smuzhiyun &sensor_dev_attr_in9_min.dev_attr.attr,
1295*4882a593Smuzhiyun &sensor_dev_attr_in9_alarm.dev_attr.attr,
1296*4882a593Smuzhiyun NULL
1297*4882a593Smuzhiyun }, {
1298*4882a593Smuzhiyun &sensor_dev_attr_in10_input.dev_attr.attr,
1299*4882a593Smuzhiyun &sensor_dev_attr_in10_max.dev_attr.attr,
1300*4882a593Smuzhiyun &sensor_dev_attr_in10_min.dev_attr.attr,
1301*4882a593Smuzhiyun &sensor_dev_attr_in10_alarm.dev_attr.attr,
1302*4882a593Smuzhiyun NULL
1303*4882a593Smuzhiyun }
1304*4882a593Smuzhiyun };
1305*4882a593Smuzhiyun
1306*4882a593Smuzhiyun static const struct attribute_group f71805f_group_optin[4] = {
1307*4882a593Smuzhiyun { .attrs = f71805f_attributes_optin[0] },
1308*4882a593Smuzhiyun { .attrs = f71805f_attributes_optin[1] },
1309*4882a593Smuzhiyun { .attrs = f71805f_attributes_optin[2] },
1310*4882a593Smuzhiyun { .attrs = f71805f_attributes_optin[3] },
1311*4882a593Smuzhiyun };
1312*4882a593Smuzhiyun
1313*4882a593Smuzhiyun /*
1314*4882a593Smuzhiyun * We don't include pwm_freq files in the arrays above, because they must be
1315*4882a593Smuzhiyun * created conditionally (only if pwm_mode is 1 == PWM)
1316*4882a593Smuzhiyun */
1317*4882a593Smuzhiyun static struct attribute *f71805f_attributes_pwm_freq[] = {
1318*4882a593Smuzhiyun &sensor_dev_attr_pwm1_freq.dev_attr.attr,
1319*4882a593Smuzhiyun &sensor_dev_attr_pwm2_freq.dev_attr.attr,
1320*4882a593Smuzhiyun &sensor_dev_attr_pwm3_freq.dev_attr.attr,
1321*4882a593Smuzhiyun NULL
1322*4882a593Smuzhiyun };
1323*4882a593Smuzhiyun
1324*4882a593Smuzhiyun static const struct attribute_group f71805f_group_pwm_freq = {
1325*4882a593Smuzhiyun .attrs = f71805f_attributes_pwm_freq,
1326*4882a593Smuzhiyun };
1327*4882a593Smuzhiyun
1328*4882a593Smuzhiyun /* We also need an indexed access to pwmN files to toggle writability */
1329*4882a593Smuzhiyun static struct attribute *f71805f_attr_pwm[] = {
1330*4882a593Smuzhiyun &sensor_dev_attr_pwm1.dev_attr.attr,
1331*4882a593Smuzhiyun &sensor_dev_attr_pwm2.dev_attr.attr,
1332*4882a593Smuzhiyun &sensor_dev_attr_pwm3.dev_attr.attr,
1333*4882a593Smuzhiyun };
1334*4882a593Smuzhiyun
1335*4882a593Smuzhiyun /*
1336*4882a593Smuzhiyun * Device registration and initialization
1337*4882a593Smuzhiyun */
1338*4882a593Smuzhiyun
f71805f_init_device(struct f71805f_data * data)1339*4882a593Smuzhiyun static void f71805f_init_device(struct f71805f_data *data)
1340*4882a593Smuzhiyun {
1341*4882a593Smuzhiyun u8 reg;
1342*4882a593Smuzhiyun int i;
1343*4882a593Smuzhiyun
1344*4882a593Smuzhiyun reg = f71805f_read8(data, F71805F_REG_START);
1345*4882a593Smuzhiyun if ((reg & 0x41) != 0x01) {
1346*4882a593Smuzhiyun pr_debug("Starting monitoring operations\n");
1347*4882a593Smuzhiyun f71805f_write8(data, F71805F_REG_START, (reg | 0x01) & ~0x40);
1348*4882a593Smuzhiyun }
1349*4882a593Smuzhiyun
1350*4882a593Smuzhiyun /*
1351*4882a593Smuzhiyun * Fan monitoring can be disabled. If it is, we won't be polling
1352*4882a593Smuzhiyun * the register values, and won't create the related sysfs files.
1353*4882a593Smuzhiyun */
1354*4882a593Smuzhiyun for (i = 0; i < 3; i++) {
1355*4882a593Smuzhiyun data->fan_ctrl[i] = f71805f_read8(data,
1356*4882a593Smuzhiyun F71805F_REG_FAN_CTRL(i));
1357*4882a593Smuzhiyun /*
1358*4882a593Smuzhiyun * Clear latch full bit, else "speed mode" fan speed control
1359*4882a593Smuzhiyun * doesn't work
1360*4882a593Smuzhiyun */
1361*4882a593Smuzhiyun if (data->fan_ctrl[i] & FAN_CTRL_LATCH_FULL) {
1362*4882a593Smuzhiyun data->fan_ctrl[i] &= ~FAN_CTRL_LATCH_FULL;
1363*4882a593Smuzhiyun f71805f_write8(data, F71805F_REG_FAN_CTRL(i),
1364*4882a593Smuzhiyun data->fan_ctrl[i]);
1365*4882a593Smuzhiyun }
1366*4882a593Smuzhiyun }
1367*4882a593Smuzhiyun }
1368*4882a593Smuzhiyun
f71805f_probe(struct platform_device * pdev)1369*4882a593Smuzhiyun static int f71805f_probe(struct platform_device *pdev)
1370*4882a593Smuzhiyun {
1371*4882a593Smuzhiyun struct f71805f_sio_data *sio_data = dev_get_platdata(&pdev->dev);
1372*4882a593Smuzhiyun struct f71805f_data *data;
1373*4882a593Smuzhiyun struct resource *res;
1374*4882a593Smuzhiyun int i, err;
1375*4882a593Smuzhiyun
1376*4882a593Smuzhiyun static const char * const names[] = {
1377*4882a593Smuzhiyun "f71805f",
1378*4882a593Smuzhiyun "f71872f",
1379*4882a593Smuzhiyun };
1380*4882a593Smuzhiyun
1381*4882a593Smuzhiyun data = devm_kzalloc(&pdev->dev, sizeof(struct f71805f_data),
1382*4882a593Smuzhiyun GFP_KERNEL);
1383*4882a593Smuzhiyun if (!data)
1384*4882a593Smuzhiyun return -ENOMEM;
1385*4882a593Smuzhiyun
1386*4882a593Smuzhiyun res = platform_get_resource(pdev, IORESOURCE_IO, 0);
1387*4882a593Smuzhiyun if (!devm_request_region(&pdev->dev, res->start + ADDR_REG_OFFSET, 2,
1388*4882a593Smuzhiyun DRVNAME)) {
1389*4882a593Smuzhiyun dev_err(&pdev->dev, "Failed to request region 0x%lx-0x%lx\n",
1390*4882a593Smuzhiyun (unsigned long)(res->start + ADDR_REG_OFFSET),
1391*4882a593Smuzhiyun (unsigned long)(res->start + ADDR_REG_OFFSET + 1));
1392*4882a593Smuzhiyun return -EBUSY;
1393*4882a593Smuzhiyun }
1394*4882a593Smuzhiyun data->addr = res->start;
1395*4882a593Smuzhiyun data->name = names[sio_data->kind];
1396*4882a593Smuzhiyun mutex_init(&data->update_lock);
1397*4882a593Smuzhiyun
1398*4882a593Smuzhiyun platform_set_drvdata(pdev, data);
1399*4882a593Smuzhiyun
1400*4882a593Smuzhiyun /* Some voltage inputs depend on chip model and configuration */
1401*4882a593Smuzhiyun switch (sio_data->kind) {
1402*4882a593Smuzhiyun case f71805f:
1403*4882a593Smuzhiyun data->has_in = 0x1ff;
1404*4882a593Smuzhiyun break;
1405*4882a593Smuzhiyun case f71872f:
1406*4882a593Smuzhiyun data->has_in = 0x6ef;
1407*4882a593Smuzhiyun if (sio_data->fnsel1 & 0x01)
1408*4882a593Smuzhiyun data->has_in |= (1 << 4); /* in4 */
1409*4882a593Smuzhiyun if (sio_data->fnsel1 & 0x02)
1410*4882a593Smuzhiyun data->has_in |= (1 << 8); /* in8 */
1411*4882a593Smuzhiyun break;
1412*4882a593Smuzhiyun }
1413*4882a593Smuzhiyun
1414*4882a593Smuzhiyun /* Initialize the F71805F chip */
1415*4882a593Smuzhiyun f71805f_init_device(data);
1416*4882a593Smuzhiyun
1417*4882a593Smuzhiyun /* Register sysfs interface files */
1418*4882a593Smuzhiyun err = sysfs_create_group(&pdev->dev.kobj, &f71805f_group);
1419*4882a593Smuzhiyun if (err)
1420*4882a593Smuzhiyun return err;
1421*4882a593Smuzhiyun if (data->has_in & (1 << 4)) { /* in4 */
1422*4882a593Smuzhiyun err = sysfs_create_group(&pdev->dev.kobj,
1423*4882a593Smuzhiyun &f71805f_group_optin[0]);
1424*4882a593Smuzhiyun if (err)
1425*4882a593Smuzhiyun goto exit_remove_files;
1426*4882a593Smuzhiyun }
1427*4882a593Smuzhiyun if (data->has_in & (1 << 8)) { /* in8 */
1428*4882a593Smuzhiyun err = sysfs_create_group(&pdev->dev.kobj,
1429*4882a593Smuzhiyun &f71805f_group_optin[1]);
1430*4882a593Smuzhiyun if (err)
1431*4882a593Smuzhiyun goto exit_remove_files;
1432*4882a593Smuzhiyun }
1433*4882a593Smuzhiyun if (data->has_in & (1 << 9)) { /* in9 (F71872F/FG only) */
1434*4882a593Smuzhiyun err = sysfs_create_group(&pdev->dev.kobj,
1435*4882a593Smuzhiyun &f71805f_group_optin[2]);
1436*4882a593Smuzhiyun if (err)
1437*4882a593Smuzhiyun goto exit_remove_files;
1438*4882a593Smuzhiyun }
1439*4882a593Smuzhiyun if (data->has_in & (1 << 10)) { /* in9 (F71872F/FG only) */
1440*4882a593Smuzhiyun err = sysfs_create_group(&pdev->dev.kobj,
1441*4882a593Smuzhiyun &f71805f_group_optin[3]);
1442*4882a593Smuzhiyun if (err)
1443*4882a593Smuzhiyun goto exit_remove_files;
1444*4882a593Smuzhiyun }
1445*4882a593Smuzhiyun for (i = 0; i < 3; i++) {
1446*4882a593Smuzhiyun /* If control mode is PWM, create pwm_freq file */
1447*4882a593Smuzhiyun if (!(data->fan_ctrl[i] & FAN_CTRL_DC_MODE)) {
1448*4882a593Smuzhiyun err = sysfs_create_file(&pdev->dev.kobj,
1449*4882a593Smuzhiyun f71805f_attributes_pwm_freq[i]);
1450*4882a593Smuzhiyun if (err)
1451*4882a593Smuzhiyun goto exit_remove_files;
1452*4882a593Smuzhiyun }
1453*4882a593Smuzhiyun /* If PWM is in manual mode, add write permission */
1454*4882a593Smuzhiyun if (data->fan_ctrl[i] & FAN_CTRL_MODE_MANUAL) {
1455*4882a593Smuzhiyun err = sysfs_chmod_file(&pdev->dev.kobj,
1456*4882a593Smuzhiyun f71805f_attr_pwm[i],
1457*4882a593Smuzhiyun S_IRUGO | S_IWUSR);
1458*4882a593Smuzhiyun if (err) {
1459*4882a593Smuzhiyun dev_err(&pdev->dev, "chmod +w pwm%d failed\n",
1460*4882a593Smuzhiyun i + 1);
1461*4882a593Smuzhiyun goto exit_remove_files;
1462*4882a593Smuzhiyun }
1463*4882a593Smuzhiyun }
1464*4882a593Smuzhiyun }
1465*4882a593Smuzhiyun
1466*4882a593Smuzhiyun data->hwmon_dev = hwmon_device_register(&pdev->dev);
1467*4882a593Smuzhiyun if (IS_ERR(data->hwmon_dev)) {
1468*4882a593Smuzhiyun err = PTR_ERR(data->hwmon_dev);
1469*4882a593Smuzhiyun dev_err(&pdev->dev, "Class registration failed (%d)\n", err);
1470*4882a593Smuzhiyun goto exit_remove_files;
1471*4882a593Smuzhiyun }
1472*4882a593Smuzhiyun
1473*4882a593Smuzhiyun return 0;
1474*4882a593Smuzhiyun
1475*4882a593Smuzhiyun exit_remove_files:
1476*4882a593Smuzhiyun sysfs_remove_group(&pdev->dev.kobj, &f71805f_group);
1477*4882a593Smuzhiyun for (i = 0; i < 4; i++)
1478*4882a593Smuzhiyun sysfs_remove_group(&pdev->dev.kobj, &f71805f_group_optin[i]);
1479*4882a593Smuzhiyun sysfs_remove_group(&pdev->dev.kobj, &f71805f_group_pwm_freq);
1480*4882a593Smuzhiyun return err;
1481*4882a593Smuzhiyun }
1482*4882a593Smuzhiyun
f71805f_remove(struct platform_device * pdev)1483*4882a593Smuzhiyun static int f71805f_remove(struct platform_device *pdev)
1484*4882a593Smuzhiyun {
1485*4882a593Smuzhiyun struct f71805f_data *data = platform_get_drvdata(pdev);
1486*4882a593Smuzhiyun int i;
1487*4882a593Smuzhiyun
1488*4882a593Smuzhiyun hwmon_device_unregister(data->hwmon_dev);
1489*4882a593Smuzhiyun sysfs_remove_group(&pdev->dev.kobj, &f71805f_group);
1490*4882a593Smuzhiyun for (i = 0; i < 4; i++)
1491*4882a593Smuzhiyun sysfs_remove_group(&pdev->dev.kobj, &f71805f_group_optin[i]);
1492*4882a593Smuzhiyun sysfs_remove_group(&pdev->dev.kobj, &f71805f_group_pwm_freq);
1493*4882a593Smuzhiyun
1494*4882a593Smuzhiyun return 0;
1495*4882a593Smuzhiyun }
1496*4882a593Smuzhiyun
1497*4882a593Smuzhiyun static struct platform_driver f71805f_driver = {
1498*4882a593Smuzhiyun .driver = {
1499*4882a593Smuzhiyun .name = DRVNAME,
1500*4882a593Smuzhiyun },
1501*4882a593Smuzhiyun .probe = f71805f_probe,
1502*4882a593Smuzhiyun .remove = f71805f_remove,
1503*4882a593Smuzhiyun };
1504*4882a593Smuzhiyun
f71805f_device_add(unsigned short address,const struct f71805f_sio_data * sio_data)1505*4882a593Smuzhiyun static int __init f71805f_device_add(unsigned short address,
1506*4882a593Smuzhiyun const struct f71805f_sio_data *sio_data)
1507*4882a593Smuzhiyun {
1508*4882a593Smuzhiyun struct resource res = {
1509*4882a593Smuzhiyun .start = address,
1510*4882a593Smuzhiyun .end = address + REGION_LENGTH - 1,
1511*4882a593Smuzhiyun .flags = IORESOURCE_IO,
1512*4882a593Smuzhiyun };
1513*4882a593Smuzhiyun int err;
1514*4882a593Smuzhiyun
1515*4882a593Smuzhiyun pdev = platform_device_alloc(DRVNAME, address);
1516*4882a593Smuzhiyun if (!pdev) {
1517*4882a593Smuzhiyun err = -ENOMEM;
1518*4882a593Smuzhiyun pr_err("Device allocation failed\n");
1519*4882a593Smuzhiyun goto exit;
1520*4882a593Smuzhiyun }
1521*4882a593Smuzhiyun
1522*4882a593Smuzhiyun res.name = pdev->name;
1523*4882a593Smuzhiyun err = acpi_check_resource_conflict(&res);
1524*4882a593Smuzhiyun if (err)
1525*4882a593Smuzhiyun goto exit_device_put;
1526*4882a593Smuzhiyun
1527*4882a593Smuzhiyun err = platform_device_add_resources(pdev, &res, 1);
1528*4882a593Smuzhiyun if (err) {
1529*4882a593Smuzhiyun pr_err("Device resource addition failed (%d)\n", err);
1530*4882a593Smuzhiyun goto exit_device_put;
1531*4882a593Smuzhiyun }
1532*4882a593Smuzhiyun
1533*4882a593Smuzhiyun err = platform_device_add_data(pdev, sio_data,
1534*4882a593Smuzhiyun sizeof(struct f71805f_sio_data));
1535*4882a593Smuzhiyun if (err) {
1536*4882a593Smuzhiyun pr_err("Platform data allocation failed\n");
1537*4882a593Smuzhiyun goto exit_device_put;
1538*4882a593Smuzhiyun }
1539*4882a593Smuzhiyun
1540*4882a593Smuzhiyun err = platform_device_add(pdev);
1541*4882a593Smuzhiyun if (err) {
1542*4882a593Smuzhiyun pr_err("Device addition failed (%d)\n", err);
1543*4882a593Smuzhiyun goto exit_device_put;
1544*4882a593Smuzhiyun }
1545*4882a593Smuzhiyun
1546*4882a593Smuzhiyun return 0;
1547*4882a593Smuzhiyun
1548*4882a593Smuzhiyun exit_device_put:
1549*4882a593Smuzhiyun platform_device_put(pdev);
1550*4882a593Smuzhiyun exit:
1551*4882a593Smuzhiyun return err;
1552*4882a593Smuzhiyun }
1553*4882a593Smuzhiyun
f71805f_find(int sioaddr,unsigned short * address,struct f71805f_sio_data * sio_data)1554*4882a593Smuzhiyun static int __init f71805f_find(int sioaddr, unsigned short *address,
1555*4882a593Smuzhiyun struct f71805f_sio_data *sio_data)
1556*4882a593Smuzhiyun {
1557*4882a593Smuzhiyun int err;
1558*4882a593Smuzhiyun u16 devid;
1559*4882a593Smuzhiyun
1560*4882a593Smuzhiyun static const char * const names[] = {
1561*4882a593Smuzhiyun "F71805F/FG",
1562*4882a593Smuzhiyun "F71872F/FG or F71806F/FG",
1563*4882a593Smuzhiyun };
1564*4882a593Smuzhiyun
1565*4882a593Smuzhiyun err = superio_enter(sioaddr);
1566*4882a593Smuzhiyun if (err)
1567*4882a593Smuzhiyun return err;
1568*4882a593Smuzhiyun
1569*4882a593Smuzhiyun err = -ENODEV;
1570*4882a593Smuzhiyun devid = superio_inw(sioaddr, SIO_REG_MANID);
1571*4882a593Smuzhiyun if (devid != SIO_FINTEK_ID)
1572*4882a593Smuzhiyun goto exit;
1573*4882a593Smuzhiyun
1574*4882a593Smuzhiyun devid = force_id ? force_id : superio_inw(sioaddr, SIO_REG_DEVID);
1575*4882a593Smuzhiyun switch (devid) {
1576*4882a593Smuzhiyun case SIO_F71805F_ID:
1577*4882a593Smuzhiyun sio_data->kind = f71805f;
1578*4882a593Smuzhiyun break;
1579*4882a593Smuzhiyun case SIO_F71872F_ID:
1580*4882a593Smuzhiyun sio_data->kind = f71872f;
1581*4882a593Smuzhiyun sio_data->fnsel1 = superio_inb(sioaddr, SIO_REG_FNSEL1);
1582*4882a593Smuzhiyun break;
1583*4882a593Smuzhiyun default:
1584*4882a593Smuzhiyun pr_info("Unsupported Fintek device, skipping\n");
1585*4882a593Smuzhiyun goto exit;
1586*4882a593Smuzhiyun }
1587*4882a593Smuzhiyun
1588*4882a593Smuzhiyun superio_select(sioaddr, F71805F_LD_HWM);
1589*4882a593Smuzhiyun if (!(superio_inb(sioaddr, SIO_REG_ENABLE) & 0x01)) {
1590*4882a593Smuzhiyun pr_warn("Device not activated, skipping\n");
1591*4882a593Smuzhiyun goto exit;
1592*4882a593Smuzhiyun }
1593*4882a593Smuzhiyun
1594*4882a593Smuzhiyun *address = superio_inw(sioaddr, SIO_REG_ADDR);
1595*4882a593Smuzhiyun if (*address == 0) {
1596*4882a593Smuzhiyun pr_warn("Base address not set, skipping\n");
1597*4882a593Smuzhiyun goto exit;
1598*4882a593Smuzhiyun }
1599*4882a593Smuzhiyun *address &= ~(REGION_LENGTH - 1); /* Ignore 3 LSB */
1600*4882a593Smuzhiyun
1601*4882a593Smuzhiyun err = 0;
1602*4882a593Smuzhiyun pr_info("Found %s chip at %#x, revision %u\n",
1603*4882a593Smuzhiyun names[sio_data->kind], *address,
1604*4882a593Smuzhiyun superio_inb(sioaddr, SIO_REG_DEVREV));
1605*4882a593Smuzhiyun
1606*4882a593Smuzhiyun exit:
1607*4882a593Smuzhiyun superio_exit(sioaddr);
1608*4882a593Smuzhiyun return err;
1609*4882a593Smuzhiyun }
1610*4882a593Smuzhiyun
f71805f_init(void)1611*4882a593Smuzhiyun static int __init f71805f_init(void)
1612*4882a593Smuzhiyun {
1613*4882a593Smuzhiyun int err;
1614*4882a593Smuzhiyun unsigned short address;
1615*4882a593Smuzhiyun struct f71805f_sio_data sio_data;
1616*4882a593Smuzhiyun
1617*4882a593Smuzhiyun if (f71805f_find(0x2e, &address, &sio_data)
1618*4882a593Smuzhiyun && f71805f_find(0x4e, &address, &sio_data))
1619*4882a593Smuzhiyun return -ENODEV;
1620*4882a593Smuzhiyun
1621*4882a593Smuzhiyun err = platform_driver_register(&f71805f_driver);
1622*4882a593Smuzhiyun if (err)
1623*4882a593Smuzhiyun goto exit;
1624*4882a593Smuzhiyun
1625*4882a593Smuzhiyun /* Sets global pdev as a side effect */
1626*4882a593Smuzhiyun err = f71805f_device_add(address, &sio_data);
1627*4882a593Smuzhiyun if (err)
1628*4882a593Smuzhiyun goto exit_driver;
1629*4882a593Smuzhiyun
1630*4882a593Smuzhiyun return 0;
1631*4882a593Smuzhiyun
1632*4882a593Smuzhiyun exit_driver:
1633*4882a593Smuzhiyun platform_driver_unregister(&f71805f_driver);
1634*4882a593Smuzhiyun exit:
1635*4882a593Smuzhiyun return err;
1636*4882a593Smuzhiyun }
1637*4882a593Smuzhiyun
f71805f_exit(void)1638*4882a593Smuzhiyun static void __exit f71805f_exit(void)
1639*4882a593Smuzhiyun {
1640*4882a593Smuzhiyun platform_device_unregister(pdev);
1641*4882a593Smuzhiyun platform_driver_unregister(&f71805f_driver);
1642*4882a593Smuzhiyun }
1643*4882a593Smuzhiyun
1644*4882a593Smuzhiyun MODULE_AUTHOR("Jean Delvare <jdelvare@suse.de>");
1645*4882a593Smuzhiyun MODULE_LICENSE("GPL");
1646*4882a593Smuzhiyun MODULE_DESCRIPTION("F71805F/F71872F hardware monitoring driver");
1647*4882a593Smuzhiyun
1648*4882a593Smuzhiyun module_init(f71805f_init);
1649*4882a593Smuzhiyun module_exit(f71805f_exit);
1650