1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * asc7621.c - Part of lm_sensors, Linux kernel modules for hardware monitoring
4*4882a593Smuzhiyun * Copyright (c) 2007, 2010 George Joseph <george.joseph@fairview5.com>
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun #include <linux/module.h>
8*4882a593Smuzhiyun #include <linux/init.h>
9*4882a593Smuzhiyun #include <linux/slab.h>
10*4882a593Smuzhiyun #include <linux/jiffies.h>
11*4882a593Smuzhiyun #include <linux/i2c.h>
12*4882a593Smuzhiyun #include <linux/hwmon.h>
13*4882a593Smuzhiyun #include <linux/hwmon-sysfs.h>
14*4882a593Smuzhiyun #include <linux/err.h>
15*4882a593Smuzhiyun #include <linux/mutex.h>
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun /* Addresses to scan */
18*4882a593Smuzhiyun static const unsigned short normal_i2c[] = {
19*4882a593Smuzhiyun 0x2c, 0x2d, 0x2e, I2C_CLIENT_END
20*4882a593Smuzhiyun };
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun enum asc7621_type {
23*4882a593Smuzhiyun asc7621,
24*4882a593Smuzhiyun asc7621a
25*4882a593Smuzhiyun };
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun #define INTERVAL_HIGH (HZ + HZ / 2)
28*4882a593Smuzhiyun #define INTERVAL_LOW (1 * 60 * HZ)
29*4882a593Smuzhiyun #define PRI_NONE 0
30*4882a593Smuzhiyun #define PRI_LOW 1
31*4882a593Smuzhiyun #define PRI_HIGH 2
32*4882a593Smuzhiyun #define FIRST_CHIP asc7621
33*4882a593Smuzhiyun #define LAST_CHIP asc7621a
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun struct asc7621_chip {
36*4882a593Smuzhiyun char *name;
37*4882a593Smuzhiyun enum asc7621_type chip_type;
38*4882a593Smuzhiyun u8 company_reg;
39*4882a593Smuzhiyun u8 company_id;
40*4882a593Smuzhiyun u8 verstep_reg;
41*4882a593Smuzhiyun u8 verstep_id;
42*4882a593Smuzhiyun const unsigned short *addresses;
43*4882a593Smuzhiyun };
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun static struct asc7621_chip asc7621_chips[] = {
46*4882a593Smuzhiyun {
47*4882a593Smuzhiyun .name = "asc7621",
48*4882a593Smuzhiyun .chip_type = asc7621,
49*4882a593Smuzhiyun .company_reg = 0x3e,
50*4882a593Smuzhiyun .company_id = 0x61,
51*4882a593Smuzhiyun .verstep_reg = 0x3f,
52*4882a593Smuzhiyun .verstep_id = 0x6c,
53*4882a593Smuzhiyun .addresses = normal_i2c,
54*4882a593Smuzhiyun },
55*4882a593Smuzhiyun {
56*4882a593Smuzhiyun .name = "asc7621a",
57*4882a593Smuzhiyun .chip_type = asc7621a,
58*4882a593Smuzhiyun .company_reg = 0x3e,
59*4882a593Smuzhiyun .company_id = 0x61,
60*4882a593Smuzhiyun .verstep_reg = 0x3f,
61*4882a593Smuzhiyun .verstep_id = 0x6d,
62*4882a593Smuzhiyun .addresses = normal_i2c,
63*4882a593Smuzhiyun },
64*4882a593Smuzhiyun };
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun /*
67*4882a593Smuzhiyun * Defines the highest register to be used, not the count.
68*4882a593Smuzhiyun * The actual count will probably be smaller because of gaps
69*4882a593Smuzhiyun * in the implementation (unused register locations).
70*4882a593Smuzhiyun * This define will safely set the array size of both the parameter
71*4882a593Smuzhiyun * and data arrays.
72*4882a593Smuzhiyun * This comes from the data sheet register description table.
73*4882a593Smuzhiyun */
74*4882a593Smuzhiyun #define LAST_REGISTER 0xff
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun struct asc7621_data {
77*4882a593Smuzhiyun struct i2c_client client;
78*4882a593Smuzhiyun struct device *class_dev;
79*4882a593Smuzhiyun struct mutex update_lock;
80*4882a593Smuzhiyun int valid; /* !=0 if following fields are valid */
81*4882a593Smuzhiyun unsigned long last_high_reading; /* In jiffies */
82*4882a593Smuzhiyun unsigned long last_low_reading; /* In jiffies */
83*4882a593Smuzhiyun /*
84*4882a593Smuzhiyun * Registers we care about occupy the corresponding index
85*4882a593Smuzhiyun * in the array. Registers we don't care about are left
86*4882a593Smuzhiyun * at 0.
87*4882a593Smuzhiyun */
88*4882a593Smuzhiyun u8 reg[LAST_REGISTER + 1];
89*4882a593Smuzhiyun };
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun /*
92*4882a593Smuzhiyun * Macro to get the parent asc7621_param structure
93*4882a593Smuzhiyun * from a sensor_device_attribute passed into the
94*4882a593Smuzhiyun * show/store functions.
95*4882a593Smuzhiyun */
96*4882a593Smuzhiyun #define to_asc7621_param(_sda) \
97*4882a593Smuzhiyun container_of(_sda, struct asc7621_param, sda)
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun /*
100*4882a593Smuzhiyun * Each parameter to be retrieved needs an asc7621_param structure
101*4882a593Smuzhiyun * allocated. It contains the sensor_device_attribute structure
102*4882a593Smuzhiyun * and the control info needed to retrieve the value from the register map.
103*4882a593Smuzhiyun */
104*4882a593Smuzhiyun struct asc7621_param {
105*4882a593Smuzhiyun struct sensor_device_attribute sda;
106*4882a593Smuzhiyun u8 priority;
107*4882a593Smuzhiyun u8 msb[3];
108*4882a593Smuzhiyun u8 lsb[3];
109*4882a593Smuzhiyun u8 mask[3];
110*4882a593Smuzhiyun u8 shift[3];
111*4882a593Smuzhiyun };
112*4882a593Smuzhiyun
113*4882a593Smuzhiyun /*
114*4882a593Smuzhiyun * This is the map that ultimately indicates whether we'll be
115*4882a593Smuzhiyun * retrieving a register value or not, and at what frequency.
116*4882a593Smuzhiyun */
117*4882a593Smuzhiyun static u8 asc7621_register_priorities[255];
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun static struct asc7621_data *asc7621_update_device(struct device *dev);
120*4882a593Smuzhiyun
read_byte(struct i2c_client * client,u8 reg)121*4882a593Smuzhiyun static inline u8 read_byte(struct i2c_client *client, u8 reg)
122*4882a593Smuzhiyun {
123*4882a593Smuzhiyun int res = i2c_smbus_read_byte_data(client, reg);
124*4882a593Smuzhiyun if (res < 0) {
125*4882a593Smuzhiyun dev_err(&client->dev,
126*4882a593Smuzhiyun "Unable to read from register 0x%02x.\n", reg);
127*4882a593Smuzhiyun return 0;
128*4882a593Smuzhiyun }
129*4882a593Smuzhiyun return res & 0xff;
130*4882a593Smuzhiyun }
131*4882a593Smuzhiyun
write_byte(struct i2c_client * client,u8 reg,u8 data)132*4882a593Smuzhiyun static inline int write_byte(struct i2c_client *client, u8 reg, u8 data)
133*4882a593Smuzhiyun {
134*4882a593Smuzhiyun int res = i2c_smbus_write_byte_data(client, reg, data);
135*4882a593Smuzhiyun if (res < 0) {
136*4882a593Smuzhiyun dev_err(&client->dev,
137*4882a593Smuzhiyun "Unable to write value 0x%02x to register 0x%02x.\n",
138*4882a593Smuzhiyun data, reg);
139*4882a593Smuzhiyun }
140*4882a593Smuzhiyun return res;
141*4882a593Smuzhiyun }
142*4882a593Smuzhiyun
143*4882a593Smuzhiyun /*
144*4882a593Smuzhiyun * Data Handlers
145*4882a593Smuzhiyun * Each function handles the formatting, storage
146*4882a593Smuzhiyun * and retrieval of like parameters.
147*4882a593Smuzhiyun */
148*4882a593Smuzhiyun
149*4882a593Smuzhiyun #define SETUP_SHOW_DATA_PARAM(d, a) \
150*4882a593Smuzhiyun struct sensor_device_attribute *sda = to_sensor_dev_attr(a); \
151*4882a593Smuzhiyun struct asc7621_data *data = asc7621_update_device(d); \
152*4882a593Smuzhiyun struct asc7621_param *param = to_asc7621_param(sda)
153*4882a593Smuzhiyun
154*4882a593Smuzhiyun #define SETUP_STORE_DATA_PARAM(d, a) \
155*4882a593Smuzhiyun struct sensor_device_attribute *sda = to_sensor_dev_attr(a); \
156*4882a593Smuzhiyun struct i2c_client *client = to_i2c_client(d); \
157*4882a593Smuzhiyun struct asc7621_data *data = i2c_get_clientdata(client); \
158*4882a593Smuzhiyun struct asc7621_param *param = to_asc7621_param(sda)
159*4882a593Smuzhiyun
160*4882a593Smuzhiyun /*
161*4882a593Smuzhiyun * u8 is just what it sounds like...an unsigned byte with no
162*4882a593Smuzhiyun * special formatting.
163*4882a593Smuzhiyun */
show_u8(struct device * dev,struct device_attribute * attr,char * buf)164*4882a593Smuzhiyun static ssize_t show_u8(struct device *dev, struct device_attribute *attr,
165*4882a593Smuzhiyun char *buf)
166*4882a593Smuzhiyun {
167*4882a593Smuzhiyun SETUP_SHOW_DATA_PARAM(dev, attr);
168*4882a593Smuzhiyun
169*4882a593Smuzhiyun return sprintf(buf, "%u\n", data->reg[param->msb[0]]);
170*4882a593Smuzhiyun }
171*4882a593Smuzhiyun
store_u8(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)172*4882a593Smuzhiyun static ssize_t store_u8(struct device *dev, struct device_attribute *attr,
173*4882a593Smuzhiyun const char *buf, size_t count)
174*4882a593Smuzhiyun {
175*4882a593Smuzhiyun SETUP_STORE_DATA_PARAM(dev, attr);
176*4882a593Smuzhiyun long reqval;
177*4882a593Smuzhiyun
178*4882a593Smuzhiyun if (kstrtol(buf, 10, &reqval))
179*4882a593Smuzhiyun return -EINVAL;
180*4882a593Smuzhiyun
181*4882a593Smuzhiyun reqval = clamp_val(reqval, 0, 255);
182*4882a593Smuzhiyun
183*4882a593Smuzhiyun mutex_lock(&data->update_lock);
184*4882a593Smuzhiyun data->reg[param->msb[0]] = reqval;
185*4882a593Smuzhiyun write_byte(client, param->msb[0], reqval);
186*4882a593Smuzhiyun mutex_unlock(&data->update_lock);
187*4882a593Smuzhiyun return count;
188*4882a593Smuzhiyun }
189*4882a593Smuzhiyun
190*4882a593Smuzhiyun /*
191*4882a593Smuzhiyun * Many of the config values occupy only a few bits of a register.
192*4882a593Smuzhiyun */
show_bitmask(struct device * dev,struct device_attribute * attr,char * buf)193*4882a593Smuzhiyun static ssize_t show_bitmask(struct device *dev,
194*4882a593Smuzhiyun struct device_attribute *attr, char *buf)
195*4882a593Smuzhiyun {
196*4882a593Smuzhiyun SETUP_SHOW_DATA_PARAM(dev, attr);
197*4882a593Smuzhiyun
198*4882a593Smuzhiyun return sprintf(buf, "%u\n",
199*4882a593Smuzhiyun (data->reg[param->msb[0]] >> param->
200*4882a593Smuzhiyun shift[0]) & param->mask[0]);
201*4882a593Smuzhiyun }
202*4882a593Smuzhiyun
store_bitmask(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)203*4882a593Smuzhiyun static ssize_t store_bitmask(struct device *dev,
204*4882a593Smuzhiyun struct device_attribute *attr,
205*4882a593Smuzhiyun const char *buf, size_t count)
206*4882a593Smuzhiyun {
207*4882a593Smuzhiyun SETUP_STORE_DATA_PARAM(dev, attr);
208*4882a593Smuzhiyun long reqval;
209*4882a593Smuzhiyun u8 currval;
210*4882a593Smuzhiyun
211*4882a593Smuzhiyun if (kstrtol(buf, 10, &reqval))
212*4882a593Smuzhiyun return -EINVAL;
213*4882a593Smuzhiyun
214*4882a593Smuzhiyun reqval = clamp_val(reqval, 0, param->mask[0]);
215*4882a593Smuzhiyun
216*4882a593Smuzhiyun reqval = (reqval & param->mask[0]) << param->shift[0];
217*4882a593Smuzhiyun
218*4882a593Smuzhiyun mutex_lock(&data->update_lock);
219*4882a593Smuzhiyun currval = read_byte(client, param->msb[0]);
220*4882a593Smuzhiyun reqval |= (currval & ~(param->mask[0] << param->shift[0]));
221*4882a593Smuzhiyun data->reg[param->msb[0]] = reqval;
222*4882a593Smuzhiyun write_byte(client, param->msb[0], reqval);
223*4882a593Smuzhiyun mutex_unlock(&data->update_lock);
224*4882a593Smuzhiyun return count;
225*4882a593Smuzhiyun }
226*4882a593Smuzhiyun
227*4882a593Smuzhiyun /*
228*4882a593Smuzhiyun * 16 bit fan rpm values
229*4882a593Smuzhiyun * reported by the device as the number of 11.111us periods (90khz)
230*4882a593Smuzhiyun * between full fan rotations. Therefore...
231*4882a593Smuzhiyun * RPM = (90000 * 60) / register value
232*4882a593Smuzhiyun */
show_fan16(struct device * dev,struct device_attribute * attr,char * buf)233*4882a593Smuzhiyun static ssize_t show_fan16(struct device *dev,
234*4882a593Smuzhiyun struct device_attribute *attr, char *buf)
235*4882a593Smuzhiyun {
236*4882a593Smuzhiyun SETUP_SHOW_DATA_PARAM(dev, attr);
237*4882a593Smuzhiyun u16 regval;
238*4882a593Smuzhiyun
239*4882a593Smuzhiyun mutex_lock(&data->update_lock);
240*4882a593Smuzhiyun regval = (data->reg[param->msb[0]] << 8) | data->reg[param->lsb[0]];
241*4882a593Smuzhiyun mutex_unlock(&data->update_lock);
242*4882a593Smuzhiyun
243*4882a593Smuzhiyun return sprintf(buf, "%u\n",
244*4882a593Smuzhiyun (regval == 0 ? -1 : (regval) ==
245*4882a593Smuzhiyun 0xffff ? 0 : 5400000 / regval));
246*4882a593Smuzhiyun }
247*4882a593Smuzhiyun
store_fan16(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)248*4882a593Smuzhiyun static ssize_t store_fan16(struct device *dev,
249*4882a593Smuzhiyun struct device_attribute *attr, const char *buf,
250*4882a593Smuzhiyun size_t count)
251*4882a593Smuzhiyun {
252*4882a593Smuzhiyun SETUP_STORE_DATA_PARAM(dev, attr);
253*4882a593Smuzhiyun long reqval;
254*4882a593Smuzhiyun
255*4882a593Smuzhiyun if (kstrtol(buf, 10, &reqval))
256*4882a593Smuzhiyun return -EINVAL;
257*4882a593Smuzhiyun
258*4882a593Smuzhiyun /*
259*4882a593Smuzhiyun * If a minimum RPM of zero is requested, then we set the register to
260*4882a593Smuzhiyun * 0xffff. This value allows the fan to be stopped completely without
261*4882a593Smuzhiyun * generating an alarm.
262*4882a593Smuzhiyun */
263*4882a593Smuzhiyun reqval =
264*4882a593Smuzhiyun (reqval <= 0 ? 0xffff : clamp_val(5400000 / reqval, 0, 0xfffe));
265*4882a593Smuzhiyun
266*4882a593Smuzhiyun mutex_lock(&data->update_lock);
267*4882a593Smuzhiyun data->reg[param->msb[0]] = (reqval >> 8) & 0xff;
268*4882a593Smuzhiyun data->reg[param->lsb[0]] = reqval & 0xff;
269*4882a593Smuzhiyun write_byte(client, param->msb[0], data->reg[param->msb[0]]);
270*4882a593Smuzhiyun write_byte(client, param->lsb[0], data->reg[param->lsb[0]]);
271*4882a593Smuzhiyun mutex_unlock(&data->update_lock);
272*4882a593Smuzhiyun
273*4882a593Smuzhiyun return count;
274*4882a593Smuzhiyun }
275*4882a593Smuzhiyun
276*4882a593Smuzhiyun /*
277*4882a593Smuzhiyun * Voltages are scaled in the device so that the nominal voltage
278*4882a593Smuzhiyun * is 3/4ths of the 0-255 range (i.e. 192).
279*4882a593Smuzhiyun * If all voltages are 'normal' then all voltage registers will
280*4882a593Smuzhiyun * read 0xC0.
281*4882a593Smuzhiyun *
282*4882a593Smuzhiyun * The data sheet provides us with the 3/4 scale value for each voltage
283*4882a593Smuzhiyun * which is stored in in_scaling. The sda->index parameter value provides
284*4882a593Smuzhiyun * the index into in_scaling.
285*4882a593Smuzhiyun *
286*4882a593Smuzhiyun * NOTE: The chip expects the first 2 inputs be 2.5 and 2.25 volts
287*4882a593Smuzhiyun * respectively. That doesn't mean that's what the motherboard provides. :)
288*4882a593Smuzhiyun */
289*4882a593Smuzhiyun
290*4882a593Smuzhiyun static const int asc7621_in_scaling[] = {
291*4882a593Smuzhiyun 2500, 2250, 3300, 5000, 12000
292*4882a593Smuzhiyun };
293*4882a593Smuzhiyun
show_in10(struct device * dev,struct device_attribute * attr,char * buf)294*4882a593Smuzhiyun static ssize_t show_in10(struct device *dev, struct device_attribute *attr,
295*4882a593Smuzhiyun char *buf)
296*4882a593Smuzhiyun {
297*4882a593Smuzhiyun SETUP_SHOW_DATA_PARAM(dev, attr);
298*4882a593Smuzhiyun u16 regval;
299*4882a593Smuzhiyun u8 nr = sda->index;
300*4882a593Smuzhiyun
301*4882a593Smuzhiyun mutex_lock(&data->update_lock);
302*4882a593Smuzhiyun regval = (data->reg[param->msb[0]] << 8) | (data->reg[param->lsb[0]]);
303*4882a593Smuzhiyun mutex_unlock(&data->update_lock);
304*4882a593Smuzhiyun
305*4882a593Smuzhiyun /* The LSB value is a 2-bit scaling of the MSB's LSbit value. */
306*4882a593Smuzhiyun regval = (regval >> 6) * asc7621_in_scaling[nr] / (0xc0 << 2);
307*4882a593Smuzhiyun
308*4882a593Smuzhiyun return sprintf(buf, "%u\n", regval);
309*4882a593Smuzhiyun }
310*4882a593Smuzhiyun
311*4882a593Smuzhiyun /* 8 bit voltage values (the mins and maxs) */
show_in8(struct device * dev,struct device_attribute * attr,char * buf)312*4882a593Smuzhiyun static ssize_t show_in8(struct device *dev, struct device_attribute *attr,
313*4882a593Smuzhiyun char *buf)
314*4882a593Smuzhiyun {
315*4882a593Smuzhiyun SETUP_SHOW_DATA_PARAM(dev, attr);
316*4882a593Smuzhiyun u8 nr = sda->index;
317*4882a593Smuzhiyun
318*4882a593Smuzhiyun return sprintf(buf, "%u\n",
319*4882a593Smuzhiyun ((data->reg[param->msb[0]] *
320*4882a593Smuzhiyun asc7621_in_scaling[nr]) / 0xc0));
321*4882a593Smuzhiyun }
322*4882a593Smuzhiyun
store_in8(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)323*4882a593Smuzhiyun static ssize_t store_in8(struct device *dev, struct device_attribute *attr,
324*4882a593Smuzhiyun const char *buf, size_t count)
325*4882a593Smuzhiyun {
326*4882a593Smuzhiyun SETUP_STORE_DATA_PARAM(dev, attr);
327*4882a593Smuzhiyun long reqval;
328*4882a593Smuzhiyun u8 nr = sda->index;
329*4882a593Smuzhiyun
330*4882a593Smuzhiyun if (kstrtol(buf, 10, &reqval))
331*4882a593Smuzhiyun return -EINVAL;
332*4882a593Smuzhiyun
333*4882a593Smuzhiyun reqval = clamp_val(reqval, 0, 0xffff);
334*4882a593Smuzhiyun
335*4882a593Smuzhiyun reqval = reqval * 0xc0 / asc7621_in_scaling[nr];
336*4882a593Smuzhiyun
337*4882a593Smuzhiyun reqval = clamp_val(reqval, 0, 0xff);
338*4882a593Smuzhiyun
339*4882a593Smuzhiyun mutex_lock(&data->update_lock);
340*4882a593Smuzhiyun data->reg[param->msb[0]] = reqval;
341*4882a593Smuzhiyun write_byte(client, param->msb[0], reqval);
342*4882a593Smuzhiyun mutex_unlock(&data->update_lock);
343*4882a593Smuzhiyun
344*4882a593Smuzhiyun return count;
345*4882a593Smuzhiyun }
346*4882a593Smuzhiyun
show_temp8(struct device * dev,struct device_attribute * attr,char * buf)347*4882a593Smuzhiyun static ssize_t show_temp8(struct device *dev,
348*4882a593Smuzhiyun struct device_attribute *attr, char *buf)
349*4882a593Smuzhiyun {
350*4882a593Smuzhiyun SETUP_SHOW_DATA_PARAM(dev, attr);
351*4882a593Smuzhiyun
352*4882a593Smuzhiyun return sprintf(buf, "%d\n", ((s8) data->reg[param->msb[0]]) * 1000);
353*4882a593Smuzhiyun }
354*4882a593Smuzhiyun
store_temp8(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)355*4882a593Smuzhiyun static ssize_t store_temp8(struct device *dev,
356*4882a593Smuzhiyun struct device_attribute *attr, const char *buf,
357*4882a593Smuzhiyun size_t count)
358*4882a593Smuzhiyun {
359*4882a593Smuzhiyun SETUP_STORE_DATA_PARAM(dev, attr);
360*4882a593Smuzhiyun long reqval;
361*4882a593Smuzhiyun s8 temp;
362*4882a593Smuzhiyun
363*4882a593Smuzhiyun if (kstrtol(buf, 10, &reqval))
364*4882a593Smuzhiyun return -EINVAL;
365*4882a593Smuzhiyun
366*4882a593Smuzhiyun reqval = clamp_val(reqval, -127000, 127000);
367*4882a593Smuzhiyun
368*4882a593Smuzhiyun temp = reqval / 1000;
369*4882a593Smuzhiyun
370*4882a593Smuzhiyun mutex_lock(&data->update_lock);
371*4882a593Smuzhiyun data->reg[param->msb[0]] = temp;
372*4882a593Smuzhiyun write_byte(client, param->msb[0], temp);
373*4882a593Smuzhiyun mutex_unlock(&data->update_lock);
374*4882a593Smuzhiyun return count;
375*4882a593Smuzhiyun }
376*4882a593Smuzhiyun
377*4882a593Smuzhiyun /*
378*4882a593Smuzhiyun * Temperatures that occupy 2 bytes always have the whole
379*4882a593Smuzhiyun * number of degrees in the MSB with some part of the LSB
380*4882a593Smuzhiyun * indicating fractional degrees.
381*4882a593Smuzhiyun */
382*4882a593Smuzhiyun
383*4882a593Smuzhiyun /* mmmmmmmm.llxxxxxx */
show_temp10(struct device * dev,struct device_attribute * attr,char * buf)384*4882a593Smuzhiyun static ssize_t show_temp10(struct device *dev,
385*4882a593Smuzhiyun struct device_attribute *attr, char *buf)
386*4882a593Smuzhiyun {
387*4882a593Smuzhiyun SETUP_SHOW_DATA_PARAM(dev, attr);
388*4882a593Smuzhiyun u8 msb, lsb;
389*4882a593Smuzhiyun int temp;
390*4882a593Smuzhiyun
391*4882a593Smuzhiyun mutex_lock(&data->update_lock);
392*4882a593Smuzhiyun msb = data->reg[param->msb[0]];
393*4882a593Smuzhiyun lsb = (data->reg[param->lsb[0]] >> 6) & 0x03;
394*4882a593Smuzhiyun temp = (((s8) msb) * 1000) + (lsb * 250);
395*4882a593Smuzhiyun mutex_unlock(&data->update_lock);
396*4882a593Smuzhiyun
397*4882a593Smuzhiyun return sprintf(buf, "%d\n", temp);
398*4882a593Smuzhiyun }
399*4882a593Smuzhiyun
400*4882a593Smuzhiyun /* mmmmmm.ll */
show_temp62(struct device * dev,struct device_attribute * attr,char * buf)401*4882a593Smuzhiyun static ssize_t show_temp62(struct device *dev,
402*4882a593Smuzhiyun struct device_attribute *attr, char *buf)
403*4882a593Smuzhiyun {
404*4882a593Smuzhiyun SETUP_SHOW_DATA_PARAM(dev, attr);
405*4882a593Smuzhiyun u8 regval = data->reg[param->msb[0]];
406*4882a593Smuzhiyun int temp = ((s8) (regval & 0xfc) * 1000) + ((regval & 0x03) * 250);
407*4882a593Smuzhiyun
408*4882a593Smuzhiyun return sprintf(buf, "%d\n", temp);
409*4882a593Smuzhiyun }
410*4882a593Smuzhiyun
store_temp62(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)411*4882a593Smuzhiyun static ssize_t store_temp62(struct device *dev,
412*4882a593Smuzhiyun struct device_attribute *attr, const char *buf,
413*4882a593Smuzhiyun size_t count)
414*4882a593Smuzhiyun {
415*4882a593Smuzhiyun SETUP_STORE_DATA_PARAM(dev, attr);
416*4882a593Smuzhiyun long reqval, i, f;
417*4882a593Smuzhiyun s8 temp;
418*4882a593Smuzhiyun
419*4882a593Smuzhiyun if (kstrtol(buf, 10, &reqval))
420*4882a593Smuzhiyun return -EINVAL;
421*4882a593Smuzhiyun
422*4882a593Smuzhiyun reqval = clamp_val(reqval, -32000, 31750);
423*4882a593Smuzhiyun i = reqval / 1000;
424*4882a593Smuzhiyun f = reqval - (i * 1000);
425*4882a593Smuzhiyun temp = i << 2;
426*4882a593Smuzhiyun temp |= f / 250;
427*4882a593Smuzhiyun
428*4882a593Smuzhiyun mutex_lock(&data->update_lock);
429*4882a593Smuzhiyun data->reg[param->msb[0]] = temp;
430*4882a593Smuzhiyun write_byte(client, param->msb[0], temp);
431*4882a593Smuzhiyun mutex_unlock(&data->update_lock);
432*4882a593Smuzhiyun return count;
433*4882a593Smuzhiyun }
434*4882a593Smuzhiyun
435*4882a593Smuzhiyun /*
436*4882a593Smuzhiyun * The aSC7621 doesn't provide an "auto_point2". Instead, you
437*4882a593Smuzhiyun * specify the auto_point1 and a range. To keep with the sysfs
438*4882a593Smuzhiyun * hwmon specs, we synthesize the auto_point_2 from them.
439*4882a593Smuzhiyun */
440*4882a593Smuzhiyun
441*4882a593Smuzhiyun static const u32 asc7621_range_map[] = {
442*4882a593Smuzhiyun 2000, 2500, 3330, 4000, 5000, 6670, 8000, 10000,
443*4882a593Smuzhiyun 13330, 16000, 20000, 26670, 32000, 40000, 53330, 80000,
444*4882a593Smuzhiyun };
445*4882a593Smuzhiyun
show_ap2_temp(struct device * dev,struct device_attribute * attr,char * buf)446*4882a593Smuzhiyun static ssize_t show_ap2_temp(struct device *dev,
447*4882a593Smuzhiyun struct device_attribute *attr, char *buf)
448*4882a593Smuzhiyun {
449*4882a593Smuzhiyun SETUP_SHOW_DATA_PARAM(dev, attr);
450*4882a593Smuzhiyun long auto_point1;
451*4882a593Smuzhiyun u8 regval;
452*4882a593Smuzhiyun int temp;
453*4882a593Smuzhiyun
454*4882a593Smuzhiyun mutex_lock(&data->update_lock);
455*4882a593Smuzhiyun auto_point1 = ((s8) data->reg[param->msb[1]]) * 1000;
456*4882a593Smuzhiyun regval =
457*4882a593Smuzhiyun ((data->reg[param->msb[0]] >> param->shift[0]) & param->mask[0]);
458*4882a593Smuzhiyun temp = auto_point1 + asc7621_range_map[clamp_val(regval, 0, 15)];
459*4882a593Smuzhiyun mutex_unlock(&data->update_lock);
460*4882a593Smuzhiyun
461*4882a593Smuzhiyun return sprintf(buf, "%d\n", temp);
462*4882a593Smuzhiyun
463*4882a593Smuzhiyun }
464*4882a593Smuzhiyun
store_ap2_temp(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)465*4882a593Smuzhiyun static ssize_t store_ap2_temp(struct device *dev,
466*4882a593Smuzhiyun struct device_attribute *attr,
467*4882a593Smuzhiyun const char *buf, size_t count)
468*4882a593Smuzhiyun {
469*4882a593Smuzhiyun SETUP_STORE_DATA_PARAM(dev, attr);
470*4882a593Smuzhiyun long reqval, auto_point1;
471*4882a593Smuzhiyun int i;
472*4882a593Smuzhiyun u8 currval, newval = 0;
473*4882a593Smuzhiyun
474*4882a593Smuzhiyun if (kstrtol(buf, 10, &reqval))
475*4882a593Smuzhiyun return -EINVAL;
476*4882a593Smuzhiyun
477*4882a593Smuzhiyun mutex_lock(&data->update_lock);
478*4882a593Smuzhiyun auto_point1 = data->reg[param->msb[1]] * 1000;
479*4882a593Smuzhiyun reqval = clamp_val(reqval, auto_point1 + 2000, auto_point1 + 80000);
480*4882a593Smuzhiyun
481*4882a593Smuzhiyun for (i = ARRAY_SIZE(asc7621_range_map) - 1; i >= 0; i--) {
482*4882a593Smuzhiyun if (reqval >= auto_point1 + asc7621_range_map[i]) {
483*4882a593Smuzhiyun newval = i;
484*4882a593Smuzhiyun break;
485*4882a593Smuzhiyun }
486*4882a593Smuzhiyun }
487*4882a593Smuzhiyun
488*4882a593Smuzhiyun newval = (newval & param->mask[0]) << param->shift[0];
489*4882a593Smuzhiyun currval = read_byte(client, param->msb[0]);
490*4882a593Smuzhiyun newval |= (currval & ~(param->mask[0] << param->shift[0]));
491*4882a593Smuzhiyun data->reg[param->msb[0]] = newval;
492*4882a593Smuzhiyun write_byte(client, param->msb[0], newval);
493*4882a593Smuzhiyun mutex_unlock(&data->update_lock);
494*4882a593Smuzhiyun return count;
495*4882a593Smuzhiyun }
496*4882a593Smuzhiyun
show_pwm_ac(struct device * dev,struct device_attribute * attr,char * buf)497*4882a593Smuzhiyun static ssize_t show_pwm_ac(struct device *dev,
498*4882a593Smuzhiyun struct device_attribute *attr, char *buf)
499*4882a593Smuzhiyun {
500*4882a593Smuzhiyun SETUP_SHOW_DATA_PARAM(dev, attr);
501*4882a593Smuzhiyun u8 config, altbit, regval;
502*4882a593Smuzhiyun static const u8 map[] = {
503*4882a593Smuzhiyun 0x01, 0x02, 0x04, 0x1f, 0x00, 0x06, 0x07, 0x10,
504*4882a593Smuzhiyun 0x08, 0x0f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f
505*4882a593Smuzhiyun };
506*4882a593Smuzhiyun
507*4882a593Smuzhiyun mutex_lock(&data->update_lock);
508*4882a593Smuzhiyun config = (data->reg[param->msb[0]] >> param->shift[0]) & param->mask[0];
509*4882a593Smuzhiyun altbit = (data->reg[param->msb[1]] >> param->shift[1]) & param->mask[1];
510*4882a593Smuzhiyun regval = config | (altbit << 3);
511*4882a593Smuzhiyun mutex_unlock(&data->update_lock);
512*4882a593Smuzhiyun
513*4882a593Smuzhiyun return sprintf(buf, "%u\n", map[clamp_val(regval, 0, 15)]);
514*4882a593Smuzhiyun }
515*4882a593Smuzhiyun
store_pwm_ac(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)516*4882a593Smuzhiyun static ssize_t store_pwm_ac(struct device *dev,
517*4882a593Smuzhiyun struct device_attribute *attr,
518*4882a593Smuzhiyun const char *buf, size_t count)
519*4882a593Smuzhiyun {
520*4882a593Smuzhiyun SETUP_STORE_DATA_PARAM(dev, attr);
521*4882a593Smuzhiyun unsigned long reqval;
522*4882a593Smuzhiyun u8 currval, config, altbit, newval;
523*4882a593Smuzhiyun static const u16 map[] = {
524*4882a593Smuzhiyun 0x04, 0x00, 0x01, 0xff, 0x02, 0xff, 0x05, 0x06,
525*4882a593Smuzhiyun 0x08, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x0f,
526*4882a593Smuzhiyun 0x07, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
527*4882a593Smuzhiyun 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x03,
528*4882a593Smuzhiyun };
529*4882a593Smuzhiyun
530*4882a593Smuzhiyun if (kstrtoul(buf, 10, &reqval))
531*4882a593Smuzhiyun return -EINVAL;
532*4882a593Smuzhiyun
533*4882a593Smuzhiyun if (reqval > 31)
534*4882a593Smuzhiyun return -EINVAL;
535*4882a593Smuzhiyun
536*4882a593Smuzhiyun reqval = map[reqval];
537*4882a593Smuzhiyun if (reqval == 0xff)
538*4882a593Smuzhiyun return -EINVAL;
539*4882a593Smuzhiyun
540*4882a593Smuzhiyun config = reqval & 0x07;
541*4882a593Smuzhiyun altbit = (reqval >> 3) & 0x01;
542*4882a593Smuzhiyun
543*4882a593Smuzhiyun config = (config & param->mask[0]) << param->shift[0];
544*4882a593Smuzhiyun altbit = (altbit & param->mask[1]) << param->shift[1];
545*4882a593Smuzhiyun
546*4882a593Smuzhiyun mutex_lock(&data->update_lock);
547*4882a593Smuzhiyun currval = read_byte(client, param->msb[0]);
548*4882a593Smuzhiyun newval = config | (currval & ~(param->mask[0] << param->shift[0]));
549*4882a593Smuzhiyun newval = altbit | (newval & ~(param->mask[1] << param->shift[1]));
550*4882a593Smuzhiyun data->reg[param->msb[0]] = newval;
551*4882a593Smuzhiyun write_byte(client, param->msb[0], newval);
552*4882a593Smuzhiyun mutex_unlock(&data->update_lock);
553*4882a593Smuzhiyun return count;
554*4882a593Smuzhiyun }
555*4882a593Smuzhiyun
show_pwm_enable(struct device * dev,struct device_attribute * attr,char * buf)556*4882a593Smuzhiyun static ssize_t show_pwm_enable(struct device *dev,
557*4882a593Smuzhiyun struct device_attribute *attr, char *buf)
558*4882a593Smuzhiyun {
559*4882a593Smuzhiyun SETUP_SHOW_DATA_PARAM(dev, attr);
560*4882a593Smuzhiyun u8 config, altbit, minoff, val, newval;
561*4882a593Smuzhiyun
562*4882a593Smuzhiyun mutex_lock(&data->update_lock);
563*4882a593Smuzhiyun config = (data->reg[param->msb[0]] >> param->shift[0]) & param->mask[0];
564*4882a593Smuzhiyun altbit = (data->reg[param->msb[1]] >> param->shift[1]) & param->mask[1];
565*4882a593Smuzhiyun minoff = (data->reg[param->msb[2]] >> param->shift[2]) & param->mask[2];
566*4882a593Smuzhiyun mutex_unlock(&data->update_lock);
567*4882a593Smuzhiyun
568*4882a593Smuzhiyun val = config | (altbit << 3);
569*4882a593Smuzhiyun
570*4882a593Smuzhiyun if (val == 3 || val >= 10)
571*4882a593Smuzhiyun newval = 255;
572*4882a593Smuzhiyun else if (val == 4)
573*4882a593Smuzhiyun newval = 0;
574*4882a593Smuzhiyun else if (val == 7)
575*4882a593Smuzhiyun newval = 1;
576*4882a593Smuzhiyun else if (minoff == 1)
577*4882a593Smuzhiyun newval = 2;
578*4882a593Smuzhiyun else
579*4882a593Smuzhiyun newval = 3;
580*4882a593Smuzhiyun
581*4882a593Smuzhiyun return sprintf(buf, "%u\n", newval);
582*4882a593Smuzhiyun }
583*4882a593Smuzhiyun
store_pwm_enable(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)584*4882a593Smuzhiyun static ssize_t store_pwm_enable(struct device *dev,
585*4882a593Smuzhiyun struct device_attribute *attr,
586*4882a593Smuzhiyun const char *buf, size_t count)
587*4882a593Smuzhiyun {
588*4882a593Smuzhiyun SETUP_STORE_DATA_PARAM(dev, attr);
589*4882a593Smuzhiyun long reqval;
590*4882a593Smuzhiyun u8 currval, config, altbit, newval, minoff = 255;
591*4882a593Smuzhiyun
592*4882a593Smuzhiyun if (kstrtol(buf, 10, &reqval))
593*4882a593Smuzhiyun return -EINVAL;
594*4882a593Smuzhiyun
595*4882a593Smuzhiyun switch (reqval) {
596*4882a593Smuzhiyun case 0:
597*4882a593Smuzhiyun newval = 0x04;
598*4882a593Smuzhiyun break;
599*4882a593Smuzhiyun case 1:
600*4882a593Smuzhiyun newval = 0x07;
601*4882a593Smuzhiyun break;
602*4882a593Smuzhiyun case 2:
603*4882a593Smuzhiyun newval = 0x00;
604*4882a593Smuzhiyun minoff = 1;
605*4882a593Smuzhiyun break;
606*4882a593Smuzhiyun case 3:
607*4882a593Smuzhiyun newval = 0x00;
608*4882a593Smuzhiyun minoff = 0;
609*4882a593Smuzhiyun break;
610*4882a593Smuzhiyun case 255:
611*4882a593Smuzhiyun newval = 0x03;
612*4882a593Smuzhiyun break;
613*4882a593Smuzhiyun default:
614*4882a593Smuzhiyun return -EINVAL;
615*4882a593Smuzhiyun }
616*4882a593Smuzhiyun
617*4882a593Smuzhiyun config = newval & 0x07;
618*4882a593Smuzhiyun altbit = (newval >> 3) & 0x01;
619*4882a593Smuzhiyun
620*4882a593Smuzhiyun mutex_lock(&data->update_lock);
621*4882a593Smuzhiyun config = (config & param->mask[0]) << param->shift[0];
622*4882a593Smuzhiyun altbit = (altbit & param->mask[1]) << param->shift[1];
623*4882a593Smuzhiyun currval = read_byte(client, param->msb[0]);
624*4882a593Smuzhiyun newval = config | (currval & ~(param->mask[0] << param->shift[0]));
625*4882a593Smuzhiyun newval = altbit | (newval & ~(param->mask[1] << param->shift[1]));
626*4882a593Smuzhiyun data->reg[param->msb[0]] = newval;
627*4882a593Smuzhiyun write_byte(client, param->msb[0], newval);
628*4882a593Smuzhiyun if (minoff < 255) {
629*4882a593Smuzhiyun minoff = (minoff & param->mask[2]) << param->shift[2];
630*4882a593Smuzhiyun currval = read_byte(client, param->msb[2]);
631*4882a593Smuzhiyun newval =
632*4882a593Smuzhiyun minoff | (currval & ~(param->mask[2] << param->shift[2]));
633*4882a593Smuzhiyun data->reg[param->msb[2]] = newval;
634*4882a593Smuzhiyun write_byte(client, param->msb[2], newval);
635*4882a593Smuzhiyun }
636*4882a593Smuzhiyun mutex_unlock(&data->update_lock);
637*4882a593Smuzhiyun return count;
638*4882a593Smuzhiyun }
639*4882a593Smuzhiyun
640*4882a593Smuzhiyun static const u32 asc7621_pwm_freq_map[] = {
641*4882a593Smuzhiyun 10, 15, 23, 30, 38, 47, 62, 94,
642*4882a593Smuzhiyun 23000, 24000, 25000, 26000, 27000, 28000, 29000, 30000
643*4882a593Smuzhiyun };
644*4882a593Smuzhiyun
show_pwm_freq(struct device * dev,struct device_attribute * attr,char * buf)645*4882a593Smuzhiyun static ssize_t show_pwm_freq(struct device *dev,
646*4882a593Smuzhiyun struct device_attribute *attr, char *buf)
647*4882a593Smuzhiyun {
648*4882a593Smuzhiyun SETUP_SHOW_DATA_PARAM(dev, attr);
649*4882a593Smuzhiyun u8 regval =
650*4882a593Smuzhiyun (data->reg[param->msb[0]] >> param->shift[0]) & param->mask[0];
651*4882a593Smuzhiyun
652*4882a593Smuzhiyun regval = clamp_val(regval, 0, 15);
653*4882a593Smuzhiyun
654*4882a593Smuzhiyun return sprintf(buf, "%u\n", asc7621_pwm_freq_map[regval]);
655*4882a593Smuzhiyun }
656*4882a593Smuzhiyun
store_pwm_freq(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)657*4882a593Smuzhiyun static ssize_t store_pwm_freq(struct device *dev,
658*4882a593Smuzhiyun struct device_attribute *attr,
659*4882a593Smuzhiyun const char *buf, size_t count)
660*4882a593Smuzhiyun {
661*4882a593Smuzhiyun SETUP_STORE_DATA_PARAM(dev, attr);
662*4882a593Smuzhiyun unsigned long reqval;
663*4882a593Smuzhiyun u8 currval, newval = 255;
664*4882a593Smuzhiyun int i;
665*4882a593Smuzhiyun
666*4882a593Smuzhiyun if (kstrtoul(buf, 10, &reqval))
667*4882a593Smuzhiyun return -EINVAL;
668*4882a593Smuzhiyun
669*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(asc7621_pwm_freq_map); i++) {
670*4882a593Smuzhiyun if (reqval == asc7621_pwm_freq_map[i]) {
671*4882a593Smuzhiyun newval = i;
672*4882a593Smuzhiyun break;
673*4882a593Smuzhiyun }
674*4882a593Smuzhiyun }
675*4882a593Smuzhiyun if (newval == 255)
676*4882a593Smuzhiyun return -EINVAL;
677*4882a593Smuzhiyun
678*4882a593Smuzhiyun newval = (newval & param->mask[0]) << param->shift[0];
679*4882a593Smuzhiyun
680*4882a593Smuzhiyun mutex_lock(&data->update_lock);
681*4882a593Smuzhiyun currval = read_byte(client, param->msb[0]);
682*4882a593Smuzhiyun newval |= (currval & ~(param->mask[0] << param->shift[0]));
683*4882a593Smuzhiyun data->reg[param->msb[0]] = newval;
684*4882a593Smuzhiyun write_byte(client, param->msb[0], newval);
685*4882a593Smuzhiyun mutex_unlock(&data->update_lock);
686*4882a593Smuzhiyun return count;
687*4882a593Smuzhiyun }
688*4882a593Smuzhiyun
689*4882a593Smuzhiyun static const u32 asc7621_pwm_auto_spinup_map[] = {
690*4882a593Smuzhiyun 0, 100, 250, 400, 700, 1000, 2000, 4000
691*4882a593Smuzhiyun };
692*4882a593Smuzhiyun
show_pwm_ast(struct device * dev,struct device_attribute * attr,char * buf)693*4882a593Smuzhiyun static ssize_t show_pwm_ast(struct device *dev,
694*4882a593Smuzhiyun struct device_attribute *attr, char *buf)
695*4882a593Smuzhiyun {
696*4882a593Smuzhiyun SETUP_SHOW_DATA_PARAM(dev, attr);
697*4882a593Smuzhiyun u8 regval =
698*4882a593Smuzhiyun (data->reg[param->msb[0]] >> param->shift[0]) & param->mask[0];
699*4882a593Smuzhiyun
700*4882a593Smuzhiyun regval = clamp_val(regval, 0, 7);
701*4882a593Smuzhiyun
702*4882a593Smuzhiyun return sprintf(buf, "%u\n", asc7621_pwm_auto_spinup_map[regval]);
703*4882a593Smuzhiyun
704*4882a593Smuzhiyun }
705*4882a593Smuzhiyun
store_pwm_ast(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)706*4882a593Smuzhiyun static ssize_t store_pwm_ast(struct device *dev,
707*4882a593Smuzhiyun struct device_attribute *attr,
708*4882a593Smuzhiyun const char *buf, size_t count)
709*4882a593Smuzhiyun {
710*4882a593Smuzhiyun SETUP_STORE_DATA_PARAM(dev, attr);
711*4882a593Smuzhiyun long reqval;
712*4882a593Smuzhiyun u8 currval, newval = 255;
713*4882a593Smuzhiyun u32 i;
714*4882a593Smuzhiyun
715*4882a593Smuzhiyun if (kstrtol(buf, 10, &reqval))
716*4882a593Smuzhiyun return -EINVAL;
717*4882a593Smuzhiyun
718*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(asc7621_pwm_auto_spinup_map); i++) {
719*4882a593Smuzhiyun if (reqval == asc7621_pwm_auto_spinup_map[i]) {
720*4882a593Smuzhiyun newval = i;
721*4882a593Smuzhiyun break;
722*4882a593Smuzhiyun }
723*4882a593Smuzhiyun }
724*4882a593Smuzhiyun if (newval == 255)
725*4882a593Smuzhiyun return -EINVAL;
726*4882a593Smuzhiyun
727*4882a593Smuzhiyun newval = (newval & param->mask[0]) << param->shift[0];
728*4882a593Smuzhiyun
729*4882a593Smuzhiyun mutex_lock(&data->update_lock);
730*4882a593Smuzhiyun currval = read_byte(client, param->msb[0]);
731*4882a593Smuzhiyun newval |= (currval & ~(param->mask[0] << param->shift[0]));
732*4882a593Smuzhiyun data->reg[param->msb[0]] = newval;
733*4882a593Smuzhiyun write_byte(client, param->msb[0], newval);
734*4882a593Smuzhiyun mutex_unlock(&data->update_lock);
735*4882a593Smuzhiyun return count;
736*4882a593Smuzhiyun }
737*4882a593Smuzhiyun
738*4882a593Smuzhiyun static const u32 asc7621_temp_smoothing_time_map[] = {
739*4882a593Smuzhiyun 35000, 17600, 11800, 7000, 4400, 3000, 1600, 800
740*4882a593Smuzhiyun };
741*4882a593Smuzhiyun
show_temp_st(struct device * dev,struct device_attribute * attr,char * buf)742*4882a593Smuzhiyun static ssize_t show_temp_st(struct device *dev,
743*4882a593Smuzhiyun struct device_attribute *attr, char *buf)
744*4882a593Smuzhiyun {
745*4882a593Smuzhiyun SETUP_SHOW_DATA_PARAM(dev, attr);
746*4882a593Smuzhiyun u8 regval =
747*4882a593Smuzhiyun (data->reg[param->msb[0]] >> param->shift[0]) & param->mask[0];
748*4882a593Smuzhiyun regval = clamp_val(regval, 0, 7);
749*4882a593Smuzhiyun
750*4882a593Smuzhiyun return sprintf(buf, "%u\n", asc7621_temp_smoothing_time_map[regval]);
751*4882a593Smuzhiyun }
752*4882a593Smuzhiyun
store_temp_st(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)753*4882a593Smuzhiyun static ssize_t store_temp_st(struct device *dev,
754*4882a593Smuzhiyun struct device_attribute *attr,
755*4882a593Smuzhiyun const char *buf, size_t count)
756*4882a593Smuzhiyun {
757*4882a593Smuzhiyun SETUP_STORE_DATA_PARAM(dev, attr);
758*4882a593Smuzhiyun long reqval;
759*4882a593Smuzhiyun u8 currval, newval = 255;
760*4882a593Smuzhiyun u32 i;
761*4882a593Smuzhiyun
762*4882a593Smuzhiyun if (kstrtol(buf, 10, &reqval))
763*4882a593Smuzhiyun return -EINVAL;
764*4882a593Smuzhiyun
765*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(asc7621_temp_smoothing_time_map); i++) {
766*4882a593Smuzhiyun if (reqval == asc7621_temp_smoothing_time_map[i]) {
767*4882a593Smuzhiyun newval = i;
768*4882a593Smuzhiyun break;
769*4882a593Smuzhiyun }
770*4882a593Smuzhiyun }
771*4882a593Smuzhiyun
772*4882a593Smuzhiyun if (newval == 255)
773*4882a593Smuzhiyun return -EINVAL;
774*4882a593Smuzhiyun
775*4882a593Smuzhiyun newval = (newval & param->mask[0]) << param->shift[0];
776*4882a593Smuzhiyun
777*4882a593Smuzhiyun mutex_lock(&data->update_lock);
778*4882a593Smuzhiyun currval = read_byte(client, param->msb[0]);
779*4882a593Smuzhiyun newval |= (currval & ~(param->mask[0] << param->shift[0]));
780*4882a593Smuzhiyun data->reg[param->msb[0]] = newval;
781*4882a593Smuzhiyun write_byte(client, param->msb[0], newval);
782*4882a593Smuzhiyun mutex_unlock(&data->update_lock);
783*4882a593Smuzhiyun return count;
784*4882a593Smuzhiyun }
785*4882a593Smuzhiyun
786*4882a593Smuzhiyun /*
787*4882a593Smuzhiyun * End of data handlers
788*4882a593Smuzhiyun *
789*4882a593Smuzhiyun * These defines do nothing more than make the table easier
790*4882a593Smuzhiyun * to read when wrapped at column 80.
791*4882a593Smuzhiyun */
792*4882a593Smuzhiyun
793*4882a593Smuzhiyun /*
794*4882a593Smuzhiyun * Creates a variable length array inititalizer.
795*4882a593Smuzhiyun * VAA(1,3,5,7) would produce {1,3,5,7}
796*4882a593Smuzhiyun */
797*4882a593Smuzhiyun #define VAA(args...) {args}
798*4882a593Smuzhiyun
799*4882a593Smuzhiyun #define PREAD(name, n, pri, rm, rl, m, s, r) \
800*4882a593Smuzhiyun {.sda = SENSOR_ATTR(name, S_IRUGO, show_##r, NULL, n), \
801*4882a593Smuzhiyun .priority = pri, .msb[0] = rm, .lsb[0] = rl, .mask[0] = m, \
802*4882a593Smuzhiyun .shift[0] = s,}
803*4882a593Smuzhiyun
804*4882a593Smuzhiyun #define PWRITE(name, n, pri, rm, rl, m, s, r) \
805*4882a593Smuzhiyun {.sda = SENSOR_ATTR(name, S_IRUGO | S_IWUSR, show_##r, store_##r, n), \
806*4882a593Smuzhiyun .priority = pri, .msb[0] = rm, .lsb[0] = rl, .mask[0] = m, \
807*4882a593Smuzhiyun .shift[0] = s,}
808*4882a593Smuzhiyun
809*4882a593Smuzhiyun /*
810*4882a593Smuzhiyun * PWRITEM assumes that the initializers for the .msb, .lsb, .mask and .shift
811*4882a593Smuzhiyun * were created using the VAA macro.
812*4882a593Smuzhiyun */
813*4882a593Smuzhiyun #define PWRITEM(name, n, pri, rm, rl, m, s, r) \
814*4882a593Smuzhiyun {.sda = SENSOR_ATTR(name, S_IRUGO | S_IWUSR, show_##r, store_##r, n), \
815*4882a593Smuzhiyun .priority = pri, .msb = rm, .lsb = rl, .mask = m, .shift = s,}
816*4882a593Smuzhiyun
817*4882a593Smuzhiyun static struct asc7621_param asc7621_params[] = {
818*4882a593Smuzhiyun PREAD(in0_input, 0, PRI_HIGH, 0x20, 0x13, 0, 0, in10),
819*4882a593Smuzhiyun PREAD(in1_input, 1, PRI_HIGH, 0x21, 0x18, 0, 0, in10),
820*4882a593Smuzhiyun PREAD(in2_input, 2, PRI_HIGH, 0x22, 0x11, 0, 0, in10),
821*4882a593Smuzhiyun PREAD(in3_input, 3, PRI_HIGH, 0x23, 0x12, 0, 0, in10),
822*4882a593Smuzhiyun PREAD(in4_input, 4, PRI_HIGH, 0x24, 0x14, 0, 0, in10),
823*4882a593Smuzhiyun
824*4882a593Smuzhiyun PWRITE(in0_min, 0, PRI_LOW, 0x44, 0, 0, 0, in8),
825*4882a593Smuzhiyun PWRITE(in1_min, 1, PRI_LOW, 0x46, 0, 0, 0, in8),
826*4882a593Smuzhiyun PWRITE(in2_min, 2, PRI_LOW, 0x48, 0, 0, 0, in8),
827*4882a593Smuzhiyun PWRITE(in3_min, 3, PRI_LOW, 0x4a, 0, 0, 0, in8),
828*4882a593Smuzhiyun PWRITE(in4_min, 4, PRI_LOW, 0x4c, 0, 0, 0, in8),
829*4882a593Smuzhiyun
830*4882a593Smuzhiyun PWRITE(in0_max, 0, PRI_LOW, 0x45, 0, 0, 0, in8),
831*4882a593Smuzhiyun PWRITE(in1_max, 1, PRI_LOW, 0x47, 0, 0, 0, in8),
832*4882a593Smuzhiyun PWRITE(in2_max, 2, PRI_LOW, 0x49, 0, 0, 0, in8),
833*4882a593Smuzhiyun PWRITE(in3_max, 3, PRI_LOW, 0x4b, 0, 0, 0, in8),
834*4882a593Smuzhiyun PWRITE(in4_max, 4, PRI_LOW, 0x4d, 0, 0, 0, in8),
835*4882a593Smuzhiyun
836*4882a593Smuzhiyun PREAD(in0_alarm, 0, PRI_HIGH, 0x41, 0, 0x01, 0, bitmask),
837*4882a593Smuzhiyun PREAD(in1_alarm, 1, PRI_HIGH, 0x41, 0, 0x01, 1, bitmask),
838*4882a593Smuzhiyun PREAD(in2_alarm, 2, PRI_HIGH, 0x41, 0, 0x01, 2, bitmask),
839*4882a593Smuzhiyun PREAD(in3_alarm, 3, PRI_HIGH, 0x41, 0, 0x01, 3, bitmask),
840*4882a593Smuzhiyun PREAD(in4_alarm, 4, PRI_HIGH, 0x42, 0, 0x01, 0, bitmask),
841*4882a593Smuzhiyun
842*4882a593Smuzhiyun PREAD(fan1_input, 0, PRI_HIGH, 0x29, 0x28, 0, 0, fan16),
843*4882a593Smuzhiyun PREAD(fan2_input, 1, PRI_HIGH, 0x2b, 0x2a, 0, 0, fan16),
844*4882a593Smuzhiyun PREAD(fan3_input, 2, PRI_HIGH, 0x2d, 0x2c, 0, 0, fan16),
845*4882a593Smuzhiyun PREAD(fan4_input, 3, PRI_HIGH, 0x2f, 0x2e, 0, 0, fan16),
846*4882a593Smuzhiyun
847*4882a593Smuzhiyun PWRITE(fan1_min, 0, PRI_LOW, 0x55, 0x54, 0, 0, fan16),
848*4882a593Smuzhiyun PWRITE(fan2_min, 1, PRI_LOW, 0x57, 0x56, 0, 0, fan16),
849*4882a593Smuzhiyun PWRITE(fan3_min, 2, PRI_LOW, 0x59, 0x58, 0, 0, fan16),
850*4882a593Smuzhiyun PWRITE(fan4_min, 3, PRI_LOW, 0x5b, 0x5a, 0, 0, fan16),
851*4882a593Smuzhiyun
852*4882a593Smuzhiyun PREAD(fan1_alarm, 0, PRI_HIGH, 0x42, 0, 0x01, 2, bitmask),
853*4882a593Smuzhiyun PREAD(fan2_alarm, 1, PRI_HIGH, 0x42, 0, 0x01, 3, bitmask),
854*4882a593Smuzhiyun PREAD(fan3_alarm, 2, PRI_HIGH, 0x42, 0, 0x01, 4, bitmask),
855*4882a593Smuzhiyun PREAD(fan4_alarm, 3, PRI_HIGH, 0x42, 0, 0x01, 5, bitmask),
856*4882a593Smuzhiyun
857*4882a593Smuzhiyun PREAD(temp1_input, 0, PRI_HIGH, 0x25, 0x10, 0, 0, temp10),
858*4882a593Smuzhiyun PREAD(temp2_input, 1, PRI_HIGH, 0x26, 0x15, 0, 0, temp10),
859*4882a593Smuzhiyun PREAD(temp3_input, 2, PRI_HIGH, 0x27, 0x16, 0, 0, temp10),
860*4882a593Smuzhiyun PREAD(temp4_input, 3, PRI_HIGH, 0x33, 0x17, 0, 0, temp10),
861*4882a593Smuzhiyun PREAD(temp5_input, 4, PRI_HIGH, 0xf7, 0xf6, 0, 0, temp10),
862*4882a593Smuzhiyun PREAD(temp6_input, 5, PRI_HIGH, 0xf9, 0xf8, 0, 0, temp10),
863*4882a593Smuzhiyun PREAD(temp7_input, 6, PRI_HIGH, 0xfb, 0xfa, 0, 0, temp10),
864*4882a593Smuzhiyun PREAD(temp8_input, 7, PRI_HIGH, 0xfd, 0xfc, 0, 0, temp10),
865*4882a593Smuzhiyun
866*4882a593Smuzhiyun PWRITE(temp1_min, 0, PRI_LOW, 0x4e, 0, 0, 0, temp8),
867*4882a593Smuzhiyun PWRITE(temp2_min, 1, PRI_LOW, 0x50, 0, 0, 0, temp8),
868*4882a593Smuzhiyun PWRITE(temp3_min, 2, PRI_LOW, 0x52, 0, 0, 0, temp8),
869*4882a593Smuzhiyun PWRITE(temp4_min, 3, PRI_LOW, 0x34, 0, 0, 0, temp8),
870*4882a593Smuzhiyun
871*4882a593Smuzhiyun PWRITE(temp1_max, 0, PRI_LOW, 0x4f, 0, 0, 0, temp8),
872*4882a593Smuzhiyun PWRITE(temp2_max, 1, PRI_LOW, 0x51, 0, 0, 0, temp8),
873*4882a593Smuzhiyun PWRITE(temp3_max, 2, PRI_LOW, 0x53, 0, 0, 0, temp8),
874*4882a593Smuzhiyun PWRITE(temp4_max, 3, PRI_LOW, 0x35, 0, 0, 0, temp8),
875*4882a593Smuzhiyun
876*4882a593Smuzhiyun PREAD(temp1_alarm, 0, PRI_HIGH, 0x41, 0, 0x01, 4, bitmask),
877*4882a593Smuzhiyun PREAD(temp2_alarm, 1, PRI_HIGH, 0x41, 0, 0x01, 5, bitmask),
878*4882a593Smuzhiyun PREAD(temp3_alarm, 2, PRI_HIGH, 0x41, 0, 0x01, 6, bitmask),
879*4882a593Smuzhiyun PREAD(temp4_alarm, 3, PRI_HIGH, 0x43, 0, 0x01, 0, bitmask),
880*4882a593Smuzhiyun
881*4882a593Smuzhiyun PWRITE(temp1_source, 0, PRI_LOW, 0x02, 0, 0x07, 4, bitmask),
882*4882a593Smuzhiyun PWRITE(temp2_source, 1, PRI_LOW, 0x02, 0, 0x07, 0, bitmask),
883*4882a593Smuzhiyun PWRITE(temp3_source, 2, PRI_LOW, 0x03, 0, 0x07, 4, bitmask),
884*4882a593Smuzhiyun PWRITE(temp4_source, 3, PRI_LOW, 0x03, 0, 0x07, 0, bitmask),
885*4882a593Smuzhiyun
886*4882a593Smuzhiyun PWRITE(temp1_smoothing_enable, 0, PRI_LOW, 0x62, 0, 0x01, 3, bitmask),
887*4882a593Smuzhiyun PWRITE(temp2_smoothing_enable, 1, PRI_LOW, 0x63, 0, 0x01, 7, bitmask),
888*4882a593Smuzhiyun PWRITE(temp3_smoothing_enable, 2, PRI_LOW, 0x63, 0, 0x01, 3, bitmask),
889*4882a593Smuzhiyun PWRITE(temp4_smoothing_enable, 3, PRI_LOW, 0x3c, 0, 0x01, 3, bitmask),
890*4882a593Smuzhiyun
891*4882a593Smuzhiyun PWRITE(temp1_smoothing_time, 0, PRI_LOW, 0x62, 0, 0x07, 0, temp_st),
892*4882a593Smuzhiyun PWRITE(temp2_smoothing_time, 1, PRI_LOW, 0x63, 0, 0x07, 4, temp_st),
893*4882a593Smuzhiyun PWRITE(temp3_smoothing_time, 2, PRI_LOW, 0x63, 0, 0x07, 0, temp_st),
894*4882a593Smuzhiyun PWRITE(temp4_smoothing_time, 3, PRI_LOW, 0x3c, 0, 0x07, 0, temp_st),
895*4882a593Smuzhiyun
896*4882a593Smuzhiyun PWRITE(temp1_auto_point1_temp_hyst, 0, PRI_LOW, 0x6d, 0, 0x0f, 4,
897*4882a593Smuzhiyun bitmask),
898*4882a593Smuzhiyun PWRITE(temp2_auto_point1_temp_hyst, 1, PRI_LOW, 0x6d, 0, 0x0f, 0,
899*4882a593Smuzhiyun bitmask),
900*4882a593Smuzhiyun PWRITE(temp3_auto_point1_temp_hyst, 2, PRI_LOW, 0x6e, 0, 0x0f, 4,
901*4882a593Smuzhiyun bitmask),
902*4882a593Smuzhiyun PWRITE(temp4_auto_point1_temp_hyst, 3, PRI_LOW, 0x6e, 0, 0x0f, 0,
903*4882a593Smuzhiyun bitmask),
904*4882a593Smuzhiyun
905*4882a593Smuzhiyun PREAD(temp1_auto_point2_temp_hyst, 0, PRI_LOW, 0x6d, 0, 0x0f, 4,
906*4882a593Smuzhiyun bitmask),
907*4882a593Smuzhiyun PREAD(temp2_auto_point2_temp_hyst, 1, PRI_LOW, 0x6d, 0, 0x0f, 0,
908*4882a593Smuzhiyun bitmask),
909*4882a593Smuzhiyun PREAD(temp3_auto_point2_temp_hyst, 2, PRI_LOW, 0x6e, 0, 0x0f, 4,
910*4882a593Smuzhiyun bitmask),
911*4882a593Smuzhiyun PREAD(temp4_auto_point2_temp_hyst, 3, PRI_LOW, 0x6e, 0, 0x0f, 0,
912*4882a593Smuzhiyun bitmask),
913*4882a593Smuzhiyun
914*4882a593Smuzhiyun PWRITE(temp1_auto_point1_temp, 0, PRI_LOW, 0x67, 0, 0, 0, temp8),
915*4882a593Smuzhiyun PWRITE(temp2_auto_point1_temp, 1, PRI_LOW, 0x68, 0, 0, 0, temp8),
916*4882a593Smuzhiyun PWRITE(temp3_auto_point1_temp, 2, PRI_LOW, 0x69, 0, 0, 0, temp8),
917*4882a593Smuzhiyun PWRITE(temp4_auto_point1_temp, 3, PRI_LOW, 0x3b, 0, 0, 0, temp8),
918*4882a593Smuzhiyun
919*4882a593Smuzhiyun PWRITEM(temp1_auto_point2_temp, 0, PRI_LOW, VAA(0x5f, 0x67), VAA(0),
920*4882a593Smuzhiyun VAA(0x0f), VAA(4), ap2_temp),
921*4882a593Smuzhiyun PWRITEM(temp2_auto_point2_temp, 1, PRI_LOW, VAA(0x60, 0x68), VAA(0),
922*4882a593Smuzhiyun VAA(0x0f), VAA(4), ap2_temp),
923*4882a593Smuzhiyun PWRITEM(temp3_auto_point2_temp, 2, PRI_LOW, VAA(0x61, 0x69), VAA(0),
924*4882a593Smuzhiyun VAA(0x0f), VAA(4), ap2_temp),
925*4882a593Smuzhiyun PWRITEM(temp4_auto_point2_temp, 3, PRI_LOW, VAA(0x3c, 0x3b), VAA(0),
926*4882a593Smuzhiyun VAA(0x0f), VAA(4), ap2_temp),
927*4882a593Smuzhiyun
928*4882a593Smuzhiyun PWRITE(temp1_crit, 0, PRI_LOW, 0x6a, 0, 0, 0, temp8),
929*4882a593Smuzhiyun PWRITE(temp2_crit, 1, PRI_LOW, 0x6b, 0, 0, 0, temp8),
930*4882a593Smuzhiyun PWRITE(temp3_crit, 2, PRI_LOW, 0x6c, 0, 0, 0, temp8),
931*4882a593Smuzhiyun PWRITE(temp4_crit, 3, PRI_LOW, 0x3d, 0, 0, 0, temp8),
932*4882a593Smuzhiyun
933*4882a593Smuzhiyun PWRITE(temp5_enable, 4, PRI_LOW, 0x0e, 0, 0x01, 0, bitmask),
934*4882a593Smuzhiyun PWRITE(temp6_enable, 5, PRI_LOW, 0x0e, 0, 0x01, 1, bitmask),
935*4882a593Smuzhiyun PWRITE(temp7_enable, 6, PRI_LOW, 0x0e, 0, 0x01, 2, bitmask),
936*4882a593Smuzhiyun PWRITE(temp8_enable, 7, PRI_LOW, 0x0e, 0, 0x01, 3, bitmask),
937*4882a593Smuzhiyun
938*4882a593Smuzhiyun PWRITE(remote1_offset, 0, PRI_LOW, 0x1c, 0, 0, 0, temp62),
939*4882a593Smuzhiyun PWRITE(remote2_offset, 1, PRI_LOW, 0x1d, 0, 0, 0, temp62),
940*4882a593Smuzhiyun
941*4882a593Smuzhiyun PWRITE(pwm1, 0, PRI_HIGH, 0x30, 0, 0, 0, u8),
942*4882a593Smuzhiyun PWRITE(pwm2, 1, PRI_HIGH, 0x31, 0, 0, 0, u8),
943*4882a593Smuzhiyun PWRITE(pwm3, 2, PRI_HIGH, 0x32, 0, 0, 0, u8),
944*4882a593Smuzhiyun
945*4882a593Smuzhiyun PWRITE(pwm1_invert, 0, PRI_LOW, 0x5c, 0, 0x01, 4, bitmask),
946*4882a593Smuzhiyun PWRITE(pwm2_invert, 1, PRI_LOW, 0x5d, 0, 0x01, 4, bitmask),
947*4882a593Smuzhiyun PWRITE(pwm3_invert, 2, PRI_LOW, 0x5e, 0, 0x01, 4, bitmask),
948*4882a593Smuzhiyun
949*4882a593Smuzhiyun PWRITEM(pwm1_enable, 0, PRI_LOW, VAA(0x5c, 0x5c, 0x62), VAA(0, 0, 0),
950*4882a593Smuzhiyun VAA(0x07, 0x01, 0x01), VAA(5, 3, 5), pwm_enable),
951*4882a593Smuzhiyun PWRITEM(pwm2_enable, 1, PRI_LOW, VAA(0x5d, 0x5d, 0x62), VAA(0, 0, 0),
952*4882a593Smuzhiyun VAA(0x07, 0x01, 0x01), VAA(5, 3, 6), pwm_enable),
953*4882a593Smuzhiyun PWRITEM(pwm3_enable, 2, PRI_LOW, VAA(0x5e, 0x5e, 0x62), VAA(0, 0, 0),
954*4882a593Smuzhiyun VAA(0x07, 0x01, 0x01), VAA(5, 3, 7), pwm_enable),
955*4882a593Smuzhiyun
956*4882a593Smuzhiyun PWRITEM(pwm1_auto_channels, 0, PRI_LOW, VAA(0x5c, 0x5c), VAA(0, 0),
957*4882a593Smuzhiyun VAA(0x07, 0x01), VAA(5, 3), pwm_ac),
958*4882a593Smuzhiyun PWRITEM(pwm2_auto_channels, 1, PRI_LOW, VAA(0x5d, 0x5d), VAA(0, 0),
959*4882a593Smuzhiyun VAA(0x07, 0x01), VAA(5, 3), pwm_ac),
960*4882a593Smuzhiyun PWRITEM(pwm3_auto_channels, 2, PRI_LOW, VAA(0x5e, 0x5e), VAA(0, 0),
961*4882a593Smuzhiyun VAA(0x07, 0x01), VAA(5, 3), pwm_ac),
962*4882a593Smuzhiyun
963*4882a593Smuzhiyun PWRITE(pwm1_auto_point1_pwm, 0, PRI_LOW, 0x64, 0, 0, 0, u8),
964*4882a593Smuzhiyun PWRITE(pwm2_auto_point1_pwm, 1, PRI_LOW, 0x65, 0, 0, 0, u8),
965*4882a593Smuzhiyun PWRITE(pwm3_auto_point1_pwm, 2, PRI_LOW, 0x66, 0, 0, 0, u8),
966*4882a593Smuzhiyun
967*4882a593Smuzhiyun PWRITE(pwm1_auto_point2_pwm, 0, PRI_LOW, 0x38, 0, 0, 0, u8),
968*4882a593Smuzhiyun PWRITE(pwm2_auto_point2_pwm, 1, PRI_LOW, 0x39, 0, 0, 0, u8),
969*4882a593Smuzhiyun PWRITE(pwm3_auto_point2_pwm, 2, PRI_LOW, 0x3a, 0, 0, 0, u8),
970*4882a593Smuzhiyun
971*4882a593Smuzhiyun PWRITE(pwm1_freq, 0, PRI_LOW, 0x5f, 0, 0x0f, 0, pwm_freq),
972*4882a593Smuzhiyun PWRITE(pwm2_freq, 1, PRI_LOW, 0x60, 0, 0x0f, 0, pwm_freq),
973*4882a593Smuzhiyun PWRITE(pwm3_freq, 2, PRI_LOW, 0x61, 0, 0x0f, 0, pwm_freq),
974*4882a593Smuzhiyun
975*4882a593Smuzhiyun PREAD(pwm1_auto_zone_assigned, 0, PRI_LOW, 0, 0, 0x03, 2, bitmask),
976*4882a593Smuzhiyun PREAD(pwm2_auto_zone_assigned, 1, PRI_LOW, 0, 0, 0x03, 4, bitmask),
977*4882a593Smuzhiyun PREAD(pwm3_auto_zone_assigned, 2, PRI_LOW, 0, 0, 0x03, 6, bitmask),
978*4882a593Smuzhiyun
979*4882a593Smuzhiyun PWRITE(pwm1_auto_spinup_time, 0, PRI_LOW, 0x5c, 0, 0x07, 0, pwm_ast),
980*4882a593Smuzhiyun PWRITE(pwm2_auto_spinup_time, 1, PRI_LOW, 0x5d, 0, 0x07, 0, pwm_ast),
981*4882a593Smuzhiyun PWRITE(pwm3_auto_spinup_time, 2, PRI_LOW, 0x5e, 0, 0x07, 0, pwm_ast),
982*4882a593Smuzhiyun
983*4882a593Smuzhiyun PWRITE(peci_enable, 0, PRI_LOW, 0x40, 0, 0x01, 4, bitmask),
984*4882a593Smuzhiyun PWRITE(peci_avg, 0, PRI_LOW, 0x36, 0, 0x07, 0, bitmask),
985*4882a593Smuzhiyun PWRITE(peci_domain, 0, PRI_LOW, 0x36, 0, 0x01, 3, bitmask),
986*4882a593Smuzhiyun PWRITE(peci_legacy, 0, PRI_LOW, 0x36, 0, 0x01, 4, bitmask),
987*4882a593Smuzhiyun PWRITE(peci_diode, 0, PRI_LOW, 0x0e, 0, 0x07, 4, bitmask),
988*4882a593Smuzhiyun PWRITE(peci_4domain, 0, PRI_LOW, 0x0e, 0, 0x01, 4, bitmask),
989*4882a593Smuzhiyun
990*4882a593Smuzhiyun };
991*4882a593Smuzhiyun
asc7621_update_device(struct device * dev)992*4882a593Smuzhiyun static struct asc7621_data *asc7621_update_device(struct device *dev)
993*4882a593Smuzhiyun {
994*4882a593Smuzhiyun struct i2c_client *client = to_i2c_client(dev);
995*4882a593Smuzhiyun struct asc7621_data *data = i2c_get_clientdata(client);
996*4882a593Smuzhiyun int i;
997*4882a593Smuzhiyun
998*4882a593Smuzhiyun /*
999*4882a593Smuzhiyun * The asc7621 chips guarantee consistent reads of multi-byte values
1000*4882a593Smuzhiyun * regardless of the order of the reads. No special logic is needed
1001*4882a593Smuzhiyun * so we can just read the registers in whatever order they appear
1002*4882a593Smuzhiyun * in the asc7621_params array.
1003*4882a593Smuzhiyun */
1004*4882a593Smuzhiyun
1005*4882a593Smuzhiyun mutex_lock(&data->update_lock);
1006*4882a593Smuzhiyun
1007*4882a593Smuzhiyun /* Read all the high priority registers */
1008*4882a593Smuzhiyun
1009*4882a593Smuzhiyun if (!data->valid ||
1010*4882a593Smuzhiyun time_after(jiffies, data->last_high_reading + INTERVAL_HIGH)) {
1011*4882a593Smuzhiyun
1012*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(asc7621_register_priorities); i++) {
1013*4882a593Smuzhiyun if (asc7621_register_priorities[i] == PRI_HIGH) {
1014*4882a593Smuzhiyun data->reg[i] =
1015*4882a593Smuzhiyun i2c_smbus_read_byte_data(client, i) & 0xff;
1016*4882a593Smuzhiyun }
1017*4882a593Smuzhiyun }
1018*4882a593Smuzhiyun data->last_high_reading = jiffies;
1019*4882a593Smuzhiyun } /* last_reading */
1020*4882a593Smuzhiyun
1021*4882a593Smuzhiyun /* Read all the low priority registers. */
1022*4882a593Smuzhiyun
1023*4882a593Smuzhiyun if (!data->valid ||
1024*4882a593Smuzhiyun time_after(jiffies, data->last_low_reading + INTERVAL_LOW)) {
1025*4882a593Smuzhiyun
1026*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(asc7621_params); i++) {
1027*4882a593Smuzhiyun if (asc7621_register_priorities[i] == PRI_LOW) {
1028*4882a593Smuzhiyun data->reg[i] =
1029*4882a593Smuzhiyun i2c_smbus_read_byte_data(client, i) & 0xff;
1030*4882a593Smuzhiyun }
1031*4882a593Smuzhiyun }
1032*4882a593Smuzhiyun data->last_low_reading = jiffies;
1033*4882a593Smuzhiyun } /* last_reading */
1034*4882a593Smuzhiyun
1035*4882a593Smuzhiyun data->valid = 1;
1036*4882a593Smuzhiyun
1037*4882a593Smuzhiyun mutex_unlock(&data->update_lock);
1038*4882a593Smuzhiyun
1039*4882a593Smuzhiyun return data;
1040*4882a593Smuzhiyun }
1041*4882a593Smuzhiyun
1042*4882a593Smuzhiyun /*
1043*4882a593Smuzhiyun * Standard detection and initialization below
1044*4882a593Smuzhiyun *
1045*4882a593Smuzhiyun * Helper function that checks if an address is valid
1046*4882a593Smuzhiyun * for a particular chip.
1047*4882a593Smuzhiyun */
1048*4882a593Smuzhiyun
valid_address_for_chip(int chip_type,int address)1049*4882a593Smuzhiyun static inline int valid_address_for_chip(int chip_type, int address)
1050*4882a593Smuzhiyun {
1051*4882a593Smuzhiyun int i;
1052*4882a593Smuzhiyun
1053*4882a593Smuzhiyun for (i = 0; asc7621_chips[chip_type].addresses[i] != I2C_CLIENT_END;
1054*4882a593Smuzhiyun i++) {
1055*4882a593Smuzhiyun if (asc7621_chips[chip_type].addresses[i] == address)
1056*4882a593Smuzhiyun return 1;
1057*4882a593Smuzhiyun }
1058*4882a593Smuzhiyun return 0;
1059*4882a593Smuzhiyun }
1060*4882a593Smuzhiyun
asc7621_init_client(struct i2c_client * client)1061*4882a593Smuzhiyun static void asc7621_init_client(struct i2c_client *client)
1062*4882a593Smuzhiyun {
1063*4882a593Smuzhiyun int value;
1064*4882a593Smuzhiyun
1065*4882a593Smuzhiyun /* Warn if part was not "READY" */
1066*4882a593Smuzhiyun
1067*4882a593Smuzhiyun value = read_byte(client, 0x40);
1068*4882a593Smuzhiyun
1069*4882a593Smuzhiyun if (value & 0x02) {
1070*4882a593Smuzhiyun dev_err(&client->dev,
1071*4882a593Smuzhiyun "Client (%d,0x%02x) config is locked.\n",
1072*4882a593Smuzhiyun i2c_adapter_id(client->adapter), client->addr);
1073*4882a593Smuzhiyun }
1074*4882a593Smuzhiyun if (!(value & 0x04)) {
1075*4882a593Smuzhiyun dev_err(&client->dev, "Client (%d,0x%02x) is not ready.\n",
1076*4882a593Smuzhiyun i2c_adapter_id(client->adapter), client->addr);
1077*4882a593Smuzhiyun }
1078*4882a593Smuzhiyun
1079*4882a593Smuzhiyun /*
1080*4882a593Smuzhiyun * Start monitoring
1081*4882a593Smuzhiyun *
1082*4882a593Smuzhiyun * Try to clear LOCK, Set START, save everything else
1083*4882a593Smuzhiyun */
1084*4882a593Smuzhiyun value = (value & ~0x02) | 0x01;
1085*4882a593Smuzhiyun write_byte(client, 0x40, value & 0xff);
1086*4882a593Smuzhiyun
1087*4882a593Smuzhiyun }
1088*4882a593Smuzhiyun
1089*4882a593Smuzhiyun static int
asc7621_probe(struct i2c_client * client)1090*4882a593Smuzhiyun asc7621_probe(struct i2c_client *client)
1091*4882a593Smuzhiyun {
1092*4882a593Smuzhiyun struct asc7621_data *data;
1093*4882a593Smuzhiyun int i, err;
1094*4882a593Smuzhiyun
1095*4882a593Smuzhiyun if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA))
1096*4882a593Smuzhiyun return -EIO;
1097*4882a593Smuzhiyun
1098*4882a593Smuzhiyun data = devm_kzalloc(&client->dev, sizeof(struct asc7621_data),
1099*4882a593Smuzhiyun GFP_KERNEL);
1100*4882a593Smuzhiyun if (data == NULL)
1101*4882a593Smuzhiyun return -ENOMEM;
1102*4882a593Smuzhiyun
1103*4882a593Smuzhiyun i2c_set_clientdata(client, data);
1104*4882a593Smuzhiyun mutex_init(&data->update_lock);
1105*4882a593Smuzhiyun
1106*4882a593Smuzhiyun /* Initialize the asc7621 chip */
1107*4882a593Smuzhiyun asc7621_init_client(client);
1108*4882a593Smuzhiyun
1109*4882a593Smuzhiyun /* Create the sysfs entries */
1110*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(asc7621_params); i++) {
1111*4882a593Smuzhiyun err =
1112*4882a593Smuzhiyun device_create_file(&client->dev,
1113*4882a593Smuzhiyun &(asc7621_params[i].sda.dev_attr));
1114*4882a593Smuzhiyun if (err)
1115*4882a593Smuzhiyun goto exit_remove;
1116*4882a593Smuzhiyun }
1117*4882a593Smuzhiyun
1118*4882a593Smuzhiyun data->class_dev = hwmon_device_register(&client->dev);
1119*4882a593Smuzhiyun if (IS_ERR(data->class_dev)) {
1120*4882a593Smuzhiyun err = PTR_ERR(data->class_dev);
1121*4882a593Smuzhiyun goto exit_remove;
1122*4882a593Smuzhiyun }
1123*4882a593Smuzhiyun
1124*4882a593Smuzhiyun return 0;
1125*4882a593Smuzhiyun
1126*4882a593Smuzhiyun exit_remove:
1127*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(asc7621_params); i++) {
1128*4882a593Smuzhiyun device_remove_file(&client->dev,
1129*4882a593Smuzhiyun &(asc7621_params[i].sda.dev_attr));
1130*4882a593Smuzhiyun }
1131*4882a593Smuzhiyun
1132*4882a593Smuzhiyun return err;
1133*4882a593Smuzhiyun }
1134*4882a593Smuzhiyun
asc7621_detect(struct i2c_client * client,struct i2c_board_info * info)1135*4882a593Smuzhiyun static int asc7621_detect(struct i2c_client *client,
1136*4882a593Smuzhiyun struct i2c_board_info *info)
1137*4882a593Smuzhiyun {
1138*4882a593Smuzhiyun struct i2c_adapter *adapter = client->adapter;
1139*4882a593Smuzhiyun int company, verstep, chip_index;
1140*4882a593Smuzhiyun
1141*4882a593Smuzhiyun if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
1142*4882a593Smuzhiyun return -ENODEV;
1143*4882a593Smuzhiyun
1144*4882a593Smuzhiyun for (chip_index = FIRST_CHIP; chip_index <= LAST_CHIP; chip_index++) {
1145*4882a593Smuzhiyun
1146*4882a593Smuzhiyun if (!valid_address_for_chip(chip_index, client->addr))
1147*4882a593Smuzhiyun continue;
1148*4882a593Smuzhiyun
1149*4882a593Smuzhiyun company = read_byte(client,
1150*4882a593Smuzhiyun asc7621_chips[chip_index].company_reg);
1151*4882a593Smuzhiyun verstep = read_byte(client,
1152*4882a593Smuzhiyun asc7621_chips[chip_index].verstep_reg);
1153*4882a593Smuzhiyun
1154*4882a593Smuzhiyun if (company == asc7621_chips[chip_index].company_id &&
1155*4882a593Smuzhiyun verstep == asc7621_chips[chip_index].verstep_id) {
1156*4882a593Smuzhiyun strlcpy(info->type, asc7621_chips[chip_index].name,
1157*4882a593Smuzhiyun I2C_NAME_SIZE);
1158*4882a593Smuzhiyun
1159*4882a593Smuzhiyun dev_info(&adapter->dev, "Matched %s at 0x%02x\n",
1160*4882a593Smuzhiyun asc7621_chips[chip_index].name, client->addr);
1161*4882a593Smuzhiyun return 0;
1162*4882a593Smuzhiyun }
1163*4882a593Smuzhiyun }
1164*4882a593Smuzhiyun
1165*4882a593Smuzhiyun return -ENODEV;
1166*4882a593Smuzhiyun }
1167*4882a593Smuzhiyun
asc7621_remove(struct i2c_client * client)1168*4882a593Smuzhiyun static int asc7621_remove(struct i2c_client *client)
1169*4882a593Smuzhiyun {
1170*4882a593Smuzhiyun struct asc7621_data *data = i2c_get_clientdata(client);
1171*4882a593Smuzhiyun int i;
1172*4882a593Smuzhiyun
1173*4882a593Smuzhiyun hwmon_device_unregister(data->class_dev);
1174*4882a593Smuzhiyun
1175*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(asc7621_params); i++) {
1176*4882a593Smuzhiyun device_remove_file(&client->dev,
1177*4882a593Smuzhiyun &(asc7621_params[i].sda.dev_attr));
1178*4882a593Smuzhiyun }
1179*4882a593Smuzhiyun
1180*4882a593Smuzhiyun return 0;
1181*4882a593Smuzhiyun }
1182*4882a593Smuzhiyun
1183*4882a593Smuzhiyun static const struct i2c_device_id asc7621_id[] = {
1184*4882a593Smuzhiyun {"asc7621", asc7621},
1185*4882a593Smuzhiyun {"asc7621a", asc7621a},
1186*4882a593Smuzhiyun {},
1187*4882a593Smuzhiyun };
1188*4882a593Smuzhiyun
1189*4882a593Smuzhiyun MODULE_DEVICE_TABLE(i2c, asc7621_id);
1190*4882a593Smuzhiyun
1191*4882a593Smuzhiyun static struct i2c_driver asc7621_driver = {
1192*4882a593Smuzhiyun .class = I2C_CLASS_HWMON,
1193*4882a593Smuzhiyun .driver = {
1194*4882a593Smuzhiyun .name = "asc7621",
1195*4882a593Smuzhiyun },
1196*4882a593Smuzhiyun .probe_new = asc7621_probe,
1197*4882a593Smuzhiyun .remove = asc7621_remove,
1198*4882a593Smuzhiyun .id_table = asc7621_id,
1199*4882a593Smuzhiyun .detect = asc7621_detect,
1200*4882a593Smuzhiyun .address_list = normal_i2c,
1201*4882a593Smuzhiyun };
1202*4882a593Smuzhiyun
sm_asc7621_init(void)1203*4882a593Smuzhiyun static int __init sm_asc7621_init(void)
1204*4882a593Smuzhiyun {
1205*4882a593Smuzhiyun int i, j;
1206*4882a593Smuzhiyun /*
1207*4882a593Smuzhiyun * Collect all the registers needed into a single array.
1208*4882a593Smuzhiyun * This way, if a register isn't actually used for anything,
1209*4882a593Smuzhiyun * we don't retrieve it.
1210*4882a593Smuzhiyun */
1211*4882a593Smuzhiyun
1212*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(asc7621_params); i++) {
1213*4882a593Smuzhiyun for (j = 0; j < ARRAY_SIZE(asc7621_params[i].msb); j++)
1214*4882a593Smuzhiyun asc7621_register_priorities[asc7621_params[i].msb[j]] =
1215*4882a593Smuzhiyun asc7621_params[i].priority;
1216*4882a593Smuzhiyun for (j = 0; j < ARRAY_SIZE(asc7621_params[i].lsb); j++)
1217*4882a593Smuzhiyun asc7621_register_priorities[asc7621_params[i].lsb[j]] =
1218*4882a593Smuzhiyun asc7621_params[i].priority;
1219*4882a593Smuzhiyun }
1220*4882a593Smuzhiyun return i2c_add_driver(&asc7621_driver);
1221*4882a593Smuzhiyun }
1222*4882a593Smuzhiyun
sm_asc7621_exit(void)1223*4882a593Smuzhiyun static void __exit sm_asc7621_exit(void)
1224*4882a593Smuzhiyun {
1225*4882a593Smuzhiyun i2c_del_driver(&asc7621_driver);
1226*4882a593Smuzhiyun }
1227*4882a593Smuzhiyun
1228*4882a593Smuzhiyun MODULE_LICENSE("GPL");
1229*4882a593Smuzhiyun MODULE_AUTHOR("George Joseph");
1230*4882a593Smuzhiyun MODULE_DESCRIPTION("Andigilog aSC7621 and aSC7621a driver");
1231*4882a593Smuzhiyun
1232*4882a593Smuzhiyun module_init(sm_asc7621_init);
1233*4882a593Smuzhiyun module_exit(sm_asc7621_exit);
1234